From 773a2df6406e7b2445e9930535367d0e8356cc51 Mon Sep 17 00:00:00 2001 From: Daryl Maier Date: Thu, 30 May 2024 12:46:01 -0400 Subject: [PATCH] Clean up TLH prefetching enablement Signed-off-by: Daryl Maier --- compiler/x/codegen/OMRCodeGenerator.cpp | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/compiler/x/codegen/OMRCodeGenerator.cpp b/compiler/x/codegen/OMRCodeGenerator.cpp index 980c5f796c7..542a99376a9 100644 --- a/compiler/x/codegen/OMRCodeGenerator.cpp +++ b/compiler/x/codegen/OMRCodeGenerator.cpp @@ -323,13 +323,7 @@ OMR::X86::CodeGenerator::initializeX86(TR::Compilation *comp) self()->setXMMDoubleLoadOpCode(TR::InstOpCode::MOVSDRegMem); } - // Enable software prefetch of the TLH and configure the TLH prefetching - // geometry. - // - TR_ASSERT_FATAL(comp->compileRelocatableCode() || comp->isOutOfProcessCompilation() || comp->compilePortableCode() || comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_CORE2) == comp->cg()->getX86ProcessorInfo().isIntelCore2(), "isIntelCore2() failed\n"); - TR_ASSERT_FATAL(comp->compileRelocatableCode() || comp->isOutOfProcessCompilation() || comp->compilePortableCode() || comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_NEHALEM) == comp->cg()->getX86ProcessorInfo().isIntelNehalem(), "isIntelNehalem() failed\n"); - if (((!comp->getOption(TR_DisableTLHPrefetch) && (comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_CORE2) || comp->target().cpu.is(OMR_PROCESSOR_X86_INTEL_NEHALEM))) || - (comp->getOption(TR_TLHPrefetch)))) + if (comp->getOption(TR_TLHPrefetch)) { self()->setEnableTLHPrefetching(); }