From dad4e3aafc2e273d9e054e1afa01a0271397e4af Mon Sep 17 00:00:00 2001 From: Thomas Date: Sat, 19 May 2018 12:34:03 +0200 Subject: [PATCH] fixes #212: SPIon ( baud -- ) SPI clock divider 2^baud --- lib/hw/pd8544.fs | 2 +- lib/hw/spi.fs | 24 +++++++++++++++++------- 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/lib/hw/pd8544.fs b/lib/hw/pd8544.fs index 22a2a7c..96f2499 100644 --- a/lib/hw/pd8544.fs +++ b/lib/hw/pd8544.fs @@ -91,7 +91,7 @@ NVM : init [ $18 PC_DDR ]C! [ $18 PC_CR1 ]C! - SPIon + 1 SPIon 65 LCDinit \ init, set contrast value ; diff --git a/lib/hw/spi.fs b/lib/hw/spi.fs index dc22622..0b0122e 100644 --- a/lib/hw/spi.fs +++ b/lib/hw/spi.fs @@ -3,12 +3,21 @@ \ refer to github.com/TG9541/stm8ef/blob/master/LICENSE.md #require ]C! +#require ]B! \ Init and enable SPI -: SPIon ( -- ) - [ $14 SPI_CR1 ]C! \ master, CLK/8, CPOL=CPHA=0, MSB first - [ $01 SPI_CR2 ]C! \ no NSS, FD, no CRC - [ $54 SPI_CR1 ]C! \ enable SPI +: SPIon ( baud -- ) + [ + $5C C, \ INCW X ; pull baud + $F6 C, \ LD A,(X) + $5C C, \ INCW X + $A407 , \ AND A,#7 ; CPOL=CPHA=0 + $4E C, \ SWAP A ; 16 * + $47 C, \ SRA A ; 2 / + $AA04 , \ OR A,#4 ; set master mode + $C7 C, SPI_CR1 , ] \ LD SPI_CR1,A + [ $01 SPI_CR2 ]C! \ no NSS, FD, no CRC + [ 1 SPI_CR1 6 ]B! \ SPI enable ; \ disable SPI @@ -20,10 +29,10 @@ : SPI ( c -- c) [ $E601 , \ LD A,(1,X) $C7 C, SPI_DR , \ LD SPI_DR,A - $7203 , SPI_SR , $FB C, \ BTJF SPI_SR,#SPITXE_WAIT (1) $7201 , SPI_SR , $FB C, \ BTJF SPI_SR,#SPIRXNE_WAIT (0) $C6 C, SPI_DR , \ LD A,SPI_DR - $E701 , ] \ LD (1,X),A + $E701 , \ LD (1,X),A + $7F C, ] \ CLR (X) ; \\ Example: @@ -50,7 +59,8 @@ NVM RAM -SPIon +1 SPIon \ clock SPI = click core / 2 + \ loopback: connect pins PC6/MOSI and PC7/MISO) 165 SPI . \ 165 SPIoff