diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index f40e4815cce..cba876deae2 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -1474,6 +1474,23 @@ if opt_tool(CPUS, "PIC16C62X") then table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/pic16c62x/16c62xdsm.h") end +-------------------------------------------------- +-- Microchip PIC16x8x +--@src/devices/cpu/pic16x8x/pic16x8x.h,CPUS["PIC16X8X"] = true +-------------------------------------------------- + +if CPUS["PIC16X8X"] then + files { + MAME_DIR .. "src/devices/cpu/pic16x8x/pic16x8x.cpp", + MAME_DIR .. "src/devices/cpu/pic16x8x/pic16x8x.h", + } +end + +if opt_tool(CPUS, "PIC16X8X") then + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/pic16x8x/16x8xdsm.cpp") + table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/pic16x8x/16x8xdsm.h") +end + -------------------------------------------------- -- Generic PIC16 - Disassembler only --@src/devices/cpu/pic16/pic16.h,CPUS["PIC16"] = true @@ -2958,6 +2975,18 @@ if (CPUS["Z80"]~=null or CPUS["KC80"]~=null) then MAME_DIR .. "src/devices/cpu/z80/z84c015.cpp", MAME_DIR .. "src/devices/cpu/z80/z84c015.h", } + + dependency { + { MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80.hxx" }, + { MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80_rop.hxx" }, + { MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80_ncs800rop.hxx" }, + } + + custombuildtask { + { MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating Z80 source file...", PYTHON .. " $(1) $(<) $(@)" } }, + { MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80_rop.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating Z80 \\(rop\\) source file...", PYTHON .. " $(1) rop $(<) $(@)" } }, + { MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80_ncs800rop.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating NSC800 \\(rop\\) source file...", PYTHON .. " $(1) ncs800rop $(<) $(@)" } }, + } end if CPUS["KC80"] then diff --git a/src/devices/bus/saitek_osa/maestro.cpp b/src/devices/bus/saitek_osa/maestro.cpp index 2599707130c..074ca363172 100644 --- a/src/devices/bus/saitek_osa/maestro.cpp +++ b/src/devices/bus/saitek_osa/maestro.cpp @@ -339,37 +339,41 @@ ROM_START( maestro ) ROMX_LOAD("m6c_807c_u2.u2", 0x0000, 0x8000, CRC(57c34b4d) SHA1(1f436687f90b1afd4646e90d5617cf05c4465c98), ROM_BIOS(1)) ROMX_LOAD("b6c_721_u3.u3", 0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(1)) - // C (C and above are shared Maestro/Analyst) - ROM_SYSTEM_BIOS(2, "c1", "Maestro C (set 1)") - ROMX_LOAD("m6l_b30d_u2.u2", 0x0000, 0x8000, CRC(bb10e15c) SHA1(7b0fb987c49da76a03b46c80d2b4eacaa785ee75), ROM_BIOS(2)) - ROMX_LOAD("b6c_721_u3.u3", 0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(2)) + ROM_SYSTEM_BIOS(2, "b3", "Maestro B (set 3)") + ROMX_LOAD("m6c_530_u2.u2", 0x0000, 0x8000, CRC(a8be85d8) SHA1(a7fb2b6a185bd5b355b3ba78439332a25c456773), ROM_BIOS(2)) + ROMX_LOAD("b6c_528a_u3.u3", 0x8000, 0x8000, CRC(c03dfe60) SHA1(efbc9abd5e93f51d5c49376c3fd7c87ee4ede82b), ROM_BIOS(2)) - ROM_SYSTEM_BIOS(3, "c2", "Maestro C (set 2)") - ROMX_LOAD("m6l_b30b_u2.u2", 0x0000, 0x8000, CRC(4b5026d7) SHA1(9715a0220c1bd3456480104f1c7ae61cbf1a1d73), ROM_BIOS(3)) + // C (C and above are shared Maestro/Analyst) + ROM_SYSTEM_BIOS(3, "c1", "Maestro C (set 1)") + ROMX_LOAD("m6l_b30d_u2.u2", 0x0000, 0x8000, CRC(bb10e15c) SHA1(7b0fb987c49da76a03b46c80d2b4eacaa785ee75), ROM_BIOS(3)) ROMX_LOAD("b6c_721_u3.u3", 0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(3)) - ROM_SYSTEM_BIOS(4, "c3", "Maestro C (set 3)") - ROMX_LOAD("m6l_b25_u2.u2", 0x0000, 0x8000, CRC(217ae56c) SHA1(27ec80d0f82723c2710e2ccb477705934a4c2119), ROM_BIOS(4)) + ROM_SYSTEM_BIOS(4, "c2", "Maestro C (set 2)") + ROMX_LOAD("m6l_b30b_u2.u2", 0x0000, 0x8000, CRC(4b5026d7) SHA1(9715a0220c1bd3456480104f1c7ae61cbf1a1d73), ROM_BIOS(4)) ROMX_LOAD("b6c_721_u3.u3", 0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(4)) - // D - ROM_SYSTEM_BIOS(5, "d1", "Maestro D (set 1)") - ROMX_LOAD("ma3_714a_u2.u2", 0x0000, 0x8000, CRC(435e1e30) SHA1(0d82df7c40443cb341dacebdf65f33c3e03bce70), ROM_BIOS(5)) - ROMX_LOAD("b6m_b15_u3.u3", 0x8000, 0x8000, CRC(6155de90) SHA1(bb5cdf061dde2d1dc7925d455891c3ade1d274e3), ROM_BIOS(5)) + ROM_SYSTEM_BIOS(5, "c3", "Maestro C (set 3)") + ROMX_LOAD("m6l_b25_u2.u2", 0x0000, 0x8000, CRC(217ae56c) SHA1(27ec80d0f82723c2710e2ccb477705934a4c2119), ROM_BIOS(5)) + ROMX_LOAD("b6c_721_u3.u3", 0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(5)) - ROM_SYSTEM_BIOS(6, "d2", "Maestro D (set 2)") + // D + ROM_SYSTEM_BIOS(6, "d1", "Maestro D (set 1)") ROMX_LOAD("ma3_714a_u2.u2", 0x0000, 0x8000, CRC(435e1e30) SHA1(0d82df7c40443cb341dacebdf65f33c3e03bce70), ROM_BIOS(6)) - ROMX_LOAD("b6m_629_u3.u3", 0x8000, 0x8000, CRC(15e7b1f1) SHA1(d2a757114f13c6141d74a15671aa06b675304b4a), ROM_BIOS(6)) + ROMX_LOAD("b6m_b15_u3.u3", 0x8000, 0x8000, CRC(6155de90) SHA1(bb5cdf061dde2d1dc7925d455891c3ade1d274e3), ROM_BIOS(6)) + + ROM_SYSTEM_BIOS(7, "d2", "Maestro D (set 2)") + ROMX_LOAD("ma3_714a_u2.u2", 0x0000, 0x8000, CRC(435e1e30) SHA1(0d82df7c40443cb341dacebdf65f33c3e03bce70), ROM_BIOS(7)) + ROMX_LOAD("b6m_629_u3.u3", 0x8000, 0x8000, CRC(15e7b1f1) SHA1(d2a757114f13c6141d74a15671aa06b675304b4a), ROM_BIOS(7)) // D+ - ROM_SYSTEM_BIOS(7, "dp", "Maestro D+") - ROMX_LOAD("m6m_625_u2.u2", 0x0000, 0x8000, CRC(aa7b5cfd) SHA1(e909108fdace633a519fecf0b9876fe6a46b2067), ROM_BIOS(7)) - ROMX_LOAD("b6m_614_u3.u3", 0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(7)) + ROM_SYSTEM_BIOS(8, "dp", "Maestro D+") + ROMX_LOAD("m6m_625_u2.u2", 0x0000, 0x8000, CRC(aa7b5cfd) SHA1(e909108fdace633a519fecf0b9876fe6a46b2067), ROM_BIOS(8)) + ROMX_LOAD("b6m_614_u3.u3", 0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(8)) // D++ - ROM_SYSTEM_BIOS(8, "dpp", "Maestro D++") - ROMX_LOAD("d++_u2.u2", 0x0000, 0x8000, CRC(48ef032c) SHA1(d336cb2096780b4d3bcceda0d2ed1246e780cd8d), ROM_BIOS(8)) - ROMX_LOAD("b6m_614_u3.u3", 0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(8)) + ROM_SYSTEM_BIOS(9, "dpp", "Maestro D++") + ROMX_LOAD("d++_u2.u2", 0x0000, 0x8000, CRC(48ef032c) SHA1(d336cb2096780b4d3bcceda0d2ed1246e780cd8d), ROM_BIOS(9)) + ROMX_LOAD("b6m_614_u3.u3", 0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(9)) ROM_END ROM_START( analyst ) diff --git a/src/devices/cpu/es5510/es5510.cpp b/src/devices/cpu/es5510/es5510.cpp index ac2d6e070de..7ba2d91bc39 100644 --- a/src/devices/cpu/es5510/es5510.cpp +++ b/src/devices/cpu/es5510/es5510.cpp @@ -2,10 +2,10 @@ // copyright-holders:Christian Brunschen /*************************************************************************************** * - * es5510.c - Ensoniq ES5510 (ESP) emulation + * es5510.cpp - Ensoniq ES5510 (ESP) emulation * by Christian Brunschen * - * TODO + * TODO: * gunlock and clones: Glitch sound after game over once (MT #07861) * DRAM Size isn't verified, differs per machines? * diff --git a/src/devices/cpu/f2mc16/f2mc16.cpp b/src/devices/cpu/f2mc16/f2mc16.cpp index bee96cbc76f..07684dadab0 100644 --- a/src/devices/cpu/f2mc16/f2mc16.cpp +++ b/src/devices/cpu/f2mc16/f2mc16.cpp @@ -1389,6 +1389,10 @@ void f2mc16_device::execute_run() opcodes_eari7c(read_8((m_pcb<<16) | (m_pc+1))); break; + case 0x7f: // RWi,ea-type instructions + opcodes_rwiea7f(read_8((m_pcb<<16) | (m_pc+1))); + break; + // MOV A, Rx case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: m_acc <<= 16; @@ -3209,6 +3213,23 @@ void f2mc16_device::opcodes_ea72(u8 operand) m_icount -= 3; break; + // RORC Rx + case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: + m_shifted_carry = (m_ps & F_C) ? 1 : 0; + m_tmp8 = read_rX(operand & 7); + m_ps &= ~F_C; + if (m_tmp8 & 1) + { + m_ps |= F_C; + } + m_tmp8 >>= 1; + m_tmp8 |= m_shifted_carry ? 0x80 : 0; + write_rX(operand & 7, m_tmp8); + setNZ_8(m_tmp8); + m_pc += 2; + m_icount -= 3; + break; + // INC Rx case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: m_tmp8 = doINC_8(read_rX(operand & 7)); @@ -3834,6 +3855,16 @@ void f2mc16_device::opcodes_ea74(u8 operand) { switch (operand) { + // ADD A, Rx + case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: + m_tmp8 = read_rX(operand & 7); + m_tmp8 = doADD_8(m_acc & 0xff, m_tmp8); + m_acc &= 0xffff0000; + m_acc |= m_tmp8; + m_pc += 2; + m_icount -= 3; + break; + // SUB A, Rx case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: m_tmp8 = read_rX(operand & 7); @@ -3929,6 +3960,17 @@ void f2mc16_device::opcodes_ea74(u8 operand) m_icount -= 4; break; + // AND A, Rx + case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: + m_tmp32 = read_rX(operand & 7); + m_tmp32 |= 0xffffff00; + m_acc &= m_tmp32; + setNZ_8(m_acc & 0xff); + m_ps &= ~F_V; + m_pc += 2; + m_icount -= 3; + break; + // OR A, Rx case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7: m_acc |= read_rX(operand & 7); @@ -4501,6 +4543,14 @@ void f2mc16_device::opcodes_ea77(u8 operand) m_icount -= 3; break; + // NEGW RWx + case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67: + m_tmp16 = doSUB_16(0, read_rwX(operand & 7)); + write_rwX(operand & 0x7, m_tmp16); + m_pc += 2; + m_icount -= 3; + break; + // ANDW RWx, A case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: m_tmp16 = read_rwX(operand & 7); @@ -4534,6 +4584,16 @@ void f2mc16_device::opcodes_ea77(u8 operand) m_icount -= 3; break; + // NOTW RWx + case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: + m_tmp16 = read_rwX(operand & 7) ^ 0xffff; + write_rwX(operand & 0x7, m_tmp16); + setNZ_16(m_tmp16); + m_ps &= ~F_V; + m_pc += 2; + m_icount -= 3; + break; + default: fatalerror("Unknown F2MC EA77 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc); break; @@ -4812,6 +4872,24 @@ void f2mc16_device::opcodes_eari7c(u8 operand) } } +void f2mc16_device::opcodes_rwiea7f(u8 operand) +{ + if (operand & 0x18) + { + fatalerror("Unknown F2MC EA7F operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc); + } + else + { + // XCHW RWx, RWy + m_tmp16 = read_rwX(operand & 0x7); + m_tmp16aux = read_rwX((operand>>5) & 0x7); + write_rwX((operand>>5) & 0x7, m_tmp16); + write_rwX(operand & 0x7, m_tmp16aux); + m_pc += 2; + m_icount -= 7; + } +} + void f2mc16_device::execute_set_input(int inputnum, int state) { } diff --git a/src/devices/cpu/f2mc16/f2mc16.h b/src/devices/cpu/f2mc16/f2mc16.h index e8757734473..7e2f4d94281 100644 --- a/src/devices/cpu/f2mc16/f2mc16.h +++ b/src/devices/cpu/f2mc16/f2mc16.h @@ -699,6 +699,7 @@ class f2mc16_device : public cpu_device void opcodes_riea7a(u8 operand); void opcodes_rwiea7b(u8 operand); void opcodes_eari7c(u8 operand); + void opcodes_rwiea7f(u8 operand); void set_irq(int vector, int level); void clear_irq(int vector); diff --git a/src/devices/cpu/f2mc16/f2mc16d.cpp b/src/devices/cpu/f2mc16/f2mc16d.cpp index 5d238f37aca..90aaf712ca5 100644 --- a/src/devices/cpu/f2mc16/f2mc16d.cpp +++ b/src/devices/cpu/f2mc16/f2mc16d.cpp @@ -416,7 +416,7 @@ offs_t f2mc16_disassembler::dasm_cstrop(std::ostream &stream, offs_t pc, u32 byt } else if ((op2 & 0xcc) == 0x80) util::stream_format(stream, "%-8s%s", s_sceq_ops[BIT(op2, 4, 2)], s_segment_prefixes[BIT(op2, 0, 2)]); - else if ((op2 & 0xec) == 0xc0) + else if ((op2 & 0xdc) == 0xc0) util::stream_format(stream, "%-8s%s", op2 >= 0xe0 ? "FILSWI" : "FILSI", s_segment_prefixes[BIT(op2, 0, 2)]); else { @@ -1322,17 +1322,9 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f break; case 0x30: case 0x31: - { - u8 operand = opcodes.r8(pc + bytes++); - if (operand == 0x01) - util::stream_format(stream, "%-8sA", BIT(op, 0) ? "DEC" : "INC"); - else - { - util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD"); - format_imm_signed(stream, s32(s8(operand))); - } + util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD"); + format_imm_signed(stream, s32(s8(opcodes.r8(pc + bytes++)))); break; - } case 0x32: util::stream_format(stream, "%-8sA", "SUBC"); diff --git a/src/devices/cpu/pic16x8x/16x8xdsm.cpp b/src/devices/cpu/pic16x8x/16x8xdsm.cpp new file mode 100644 index 00000000000..6f20d03eaf2 --- /dev/null +++ b/src/devices/cpu/pic16x8x/16x8xdsm.cpp @@ -0,0 +1,258 @@ +// license:BSD-3-Clause +// copyright-holders: Grull Osgo +/************************************************************************ + + Microchip PIC16X8x Emulator + + Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta. + +A Address to jump to. +B Bit address within an 8-bit file register. +D Destination select (0 = store result in W (accumulator)) + (1 = store result in file register) +F Register file address. +K Literal field, constant data. + +Includes Flags ID's on SFR registers where possible. + +************************************************************************/ + +#include "emu.h" +#include "16x8xdsm.h" + +#include +#include + +const u8 pic16x8x_disassembler::sfr_bank0[16] = { 0, 0, 0, 1, 0, 2, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0}; + +const char *const pic16x8x_disassembler::sfregs[12] = +{ + "INDF", "TMR0", "PCL", "STATUS", "FSR", "PORTA", "PORTB", "Reg$07", "EEDATA", "EEADDR", "PCLATH", "INTCON" +}; + +const char *const pic16x8x_disassembler::dest[2] = { "W", "Reg" }; + +const char *const pic16x8x_disassembler::reg_flags[9][8] = +{ + {"0", "1", "2", "3", "4", "5", "6", "7"}, // no flags + {"C", "DC", "Z", "PD", "TO", "RP0", "RP1", "IRP"}, // status + {"RA0", "RA1", "RA2", "RA3", "RA4/T0CKI", "5", "6", "7"}, // portA + {"RB0/INT", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // portB + {"RBIF", "INTF", "T0IF", "RBIE", "INTE", "T0IE", "EEIE", "GIE"}, // intcon + {"PS0", "PS1", "PS2", "PSA", "T0SE", "T0CS", "INTEDG", "RBPU"}, // option + {"RA0", "RA1", "RA2", "RA3", "RA4", "5", "6", "7"}, // trisa + {"RB0", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // trisb + {"RD", "WR", "WREN", "WRERR", "EEIF", "5", "6", "7"} // eecon +}; + +const char *const pic16x8x_disassembler::PIC16X8xFormats[] = +{ + "00000000000000", "nop", + "00000000001000", "return", + "00000000001001", "retfie", + "00000000100000", "nop", + "00000001000000", "nop", + "00000001100000", "nop", + "00000001100011", "sleep", + "00000001100100", "clrwdt", + "0000001fffffff", "movwf %F", + "00000100000000", "clrw", + "0000011fffffff", "clrf %F", + "000010dfffffff", "subwf %F,%D", + "000011dfffffff", "decf %F,%D", + "000100dfffffff", "iorwf %F,%D", + "000101dfffffff", "andwf %F,%D", + "000110dfffffff", "xorwf %F,%D", + "000111dfffffff", "addwf %F,%D", + "001000dfffffff", "movf %F,%D", + "001001dfffffff", "comf %F,%D", + "001010dfffffff", "incf %F,%D", + "001011dfffffff", "decfsz %F,%D", + "001100dfffffff", "rrf %F,%D", + "001101dfffffff", "rlf %F,%D", + "001110dfffffff", "swapf %F,%D", + "001111dfffffff", "incfsz %F,%D", + "0100bbbfffffff", "bcf %F,%B", + "0101bbbfffffff", "bsf %F,%B", + "0110bbbfffffff", "btfsc %F,%B", + "0111bbbfffffff", "btfss %F,%B", + "110100kkkkkkkk", "retlw %K", + "110101kkkkkkkk", "retlw %K", + "110110kkkkkkkk", "retlw %K", + "110111kkkkkkkk", "retlw %K", + "100aaaaaaaaaaa", "call %A", + "101aaaaaaaaaaa", "goto %A", + "110000kkkkkkkk", "movlw %K", + "110001kkkkkkkk", "movlw %K", + "110010kkkkkkkk", "movlw %K", + "110011kkkkkkkk", "movlw %K", + "111000kkkkkkkk", "iorlw %K", + "111001kkkkkkkk", "andlw %K", + "111010kkkkkkkk", "xorlw %K", + "111100kkkkkkkk", "sublw %K", + "111101kkkkkkkk", "sublw %K", + "111110kkkkkkkk", "addlw %K", + "111111kkkkkkkk", "addlw %K", + nullptr +}; + +pic16x8x_disassembler::pic16x8x_disassembler() +{ + const char *p; + const char *const *ops; + u16 mask, bits; + int bit; + + ops = PIC16X8xFormats; + while (*ops) + { + p = *ops; + mask = 0; bits = 0; bit = 13; + while (*p && bit >= 0) + { + switch (*p++) + { + case '1': mask |= 1<= 0) + { + osd_printf_debug("{%c/%d}",*cp,bit); + switch (*cp) + { + case 'a': a <<=1; a |= ((code & (1< Op; +}; + +#endif diff --git a/src/devices/cpu/pic16x8x/pic16x8x.cpp b/src/devices/cpu/pic16x8x/pic16x8x.cpp new file mode 100644 index 00000000000..af62420bd30 --- /dev/null +++ b/src/devices/cpu/pic16x8x/pic16x8x.cpp @@ -0,0 +1,1418 @@ +// license:BSD-3-Clause +// copyright-holders:Grull Osgo +/**************************************************************************************** + + Microchip PIC16x8x Emulator + + https://ww1.microchip.com/downloads/en/DeviceDoc/30445D.pdf + + Based on MAME's PIC16C5x/62x cpu devices developed by Tony La Porta + and improvements to SFR's accesss made by ajrhacker. + + Preliminary version to give support to magicle and other games + on misc/magicard.cpp driver, providing some protection level via I2C bus. + + Coded and partially tested: + - All instruction set and disassembler. + - I/O Ports. + - WDT. + - Timer/Counter. + - All (4) interrupt sources. + - Input lines. + - Internal EEPROM with default and NVRAM functionality. + + ToDo: + - Verify if data ram addreess map mirroring is properly coded acording to datasheet description. + + - Choose wich is the best option to set the config word, if via set instruction or from dump data or some sort of combination via default options. + + - Improve the debug section. + + - Verify eeprom write sequence (see datashhet) + + Improvements: + - SFR's Flag description (bit oriented instructions) in disassembler where possible. + +****************************************************************************************/ + +#include "emu.h" +#include "pic16x8x.h" +#include "16x8xdsm.h" + +DEFINE_DEVICE_TYPE(PIC16CR83, pic16cr83_device, "pic16cr83", "Microchip PIC16CR83") +DEFINE_DEVICE_TYPE(PIC16CR84, pic16cr84_device, "pic16cr84", "Microchip PIC16CR84") +DEFINE_DEVICE_TYPE(PIC16F83, pic16f83_device, "pic16f83", "Microchip PIC16F83") +DEFINE_DEVICE_TYPE(PIC16F84, pic16f84_device, "pic16f84", "Microchip PIC16F84") +DEFINE_DEVICE_TYPE(PIC16F84A, pic16f84a_device, "pic16f84a", "Microchip PIC16F84A") + +/**************************************************************************** + * Internal Memory Maps + ****************************************************************************/ + +void pic16x8x_device::rom_9(address_map &map) +{ + map(0x000, 0x1ff).rom(); +} + +void pic16x8x_device::rom_10(address_map &map) +{ + map(0x000, 0x3ff).rom(); +} + + +/* Notes from datasheet: + The address depends on the device used. +Devices with 36 bytes ends at 2Fh, devices with +68 bytes ends at 4Fh.*/ + +void pic16x8x_device::core_regs(address_map &map, u8 mirror) +{ + map(0x00, 0x00).noprw().mirror(mirror); // Not an actual register, reading indirectly (FSR=0) returns 0 + map(0x01, 0x01).rw(FUNC(pic16x8x_device::tmr0_r), FUNC(pic16x8x_device::tmr0_w)); + map(0x02, 0x02).rw(FUNC(pic16x8x_device::pcl_r), FUNC(pic16x8x_device::pcl_w)).mirror(mirror); + map(0x03, 0x03).rw(FUNC(pic16x8x_device::status_r), FUNC(pic16x8x_device::status_w)).mirror(mirror); + map(0x04, 0x04).rw(FUNC(pic16x8x_device::fsr_r), FUNC(pic16x8x_device::fsr_w)).mirror(mirror); + map(0x05, 0x05).rw(FUNC(pic16x8x_device::porta_r), FUNC(pic16x8x_device::porta_w)); + map(0x06, 0x06).rw(FUNC(pic16x8x_device::portb_r), FUNC(pic16x8x_device::portb_w)); + map(0x07, 0x07).noprw().mirror(mirror); // Not an actual register, returns 0 + map(0x08, 0x08).rw(FUNC(pic16x8x_device::eedata_r), FUNC(pic16x8x_device::eedata_w)); + map(0x09, 0x09).rw(FUNC(pic16x8x_device::eeadr_r), FUNC(pic16x8x_device::eeadr_w)); + map(0x0a, 0x0a).rw(FUNC(pic16x8x_device::pclath_r), FUNC(pic16x8x_device::pclath_w)).mirror(mirror); + map(0x0b, 0x0b).rw(FUNC(pic16x8x_device::intcon_r), FUNC(pic16x8x_device::intcon_w)).mirror(mirror); + map(0x81, 0x81).rw(FUNC(pic16x8x_device::option_r), FUNC(pic16x8x_device::option_w)); + map(0x85, 0x85).rw(FUNC(pic16x8x_device::trisa_r), FUNC(pic16x8x_device::trisa_w)); + map(0x86, 0x86).rw(FUNC(pic16x8x_device::trisb_r), FUNC(pic16x8x_device::trisb_w)); + map(0x88, 0x88).rw(FUNC(pic16x8x_device::eecon1_r), FUNC(pic16x8x_device::eecon1_w)); + map(0x89, 0x89).rw(FUNC(pic16x8x_device::eecon2_r), FUNC(pic16x8x_device::eecon2_w)); +} + +void pic16x8x_device::ram_6(address_map &map) +{ + // 0x00 - 0x0b SFR's Bank 0 + // 0x0c - 0x2f GPR's + // 0x80 - 0x8b SFR's Bank 1 + // 0x8c - 0xaf GPR Mirrored to 0x0c - 0x2f + core_regs(map, 0x80); + map(0x0c, 0x2f).ram().mirror(0x80); +} + +void pic16x8x_device::ram_7(address_map &map) +{ + // 0x00 - 0x0b SFR's Bank 0 + // 0x0c - 0x4f GPR's + // 0x80 - 0x8b SFR's Bank 1 + // 0x8c - 0xcf GPR Mirrored to 0x0c - 0x4f + core_regs(map, 0x80); + map(0x0c, 0x4f).ram().mirror(0x80); +} + + +pic16x8x_device::pic16x8x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, address_map_constructor program_map, address_map_constructor data_map) + : cpu_device(mconfig, type, tag, owner, clock) + , device_nvram_interface(mconfig, *this) + , m_region(*this, DEVICE_SELF) + , m_program_config("program", ENDIANNESS_LITTLE, 16, program_width, -1, program_map) + , m_data_config("data", ENDIANNESS_LITTLE, 8, 8, 0, data_map) + , m_program_width(program_width) + , m_CONFIG(0x3fff) + , m_read_port(*this, 0) + , m_write_port(*this) +{ +} + +pic16x83_device::pic16x83_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) + : pic16x8x_device(mconfig, type, tag, owner, clock, 9, address_map_constructor(FUNC(pic16x8x_device::rom_9), this), address_map_constructor(FUNC(pic16x8x_device::ram_6), this)) +{ +} + +pic16x84_device::pic16x84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) + : pic16x8x_device(mconfig, type, tag, owner, clock, 10, address_map_constructor(FUNC(pic16x8x_device::rom_10), this), address_map_constructor(FUNC(pic16x8x_device::ram_7), this)) +{ +} + +pic16cr83_device::pic16cr83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : pic16x83_device(mconfig, PIC16CR83, tag, owner, clock) +{ +} + +pic16cr84_device::pic16cr84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : pic16x84_device(mconfig, PIC16CR84, tag, owner, clock) +{ +} + +pic16f83_device::pic16f83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : pic16x83_device(mconfig, PIC16F83, tag, owner, clock) +{ +} + +pic16f84_device::pic16f84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : pic16x84_device(mconfig, PIC16F84, tag, owner, clock) +{ +} + +pic16f84a_device::pic16f84a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : pic16x84_device(mconfig, PIC16F84A, tag, owner, clock) +{ +} + +device_memory_interface::space_config_vector pic16x8x_device::memory_space_config() const +{ + return space_config_vector + { + std::make_pair(AS_PROGRAM, &m_program_config), + std::make_pair(AS_DATA, &m_data_config) + }; +} + +std::unique_ptr pic16x8x_device::create_disassembler() +{ + return std::make_unique(); +} + + +/* Notes about NVRAM / PIC eeprom data + +Dump size is 4280 Bytes, 16 bits wide. +0000h-03ffh is program data +0400h-3fffh is dummy data +4000h-400fh is user and config data +4010h-41ffh is dummy data +4200h-4280h is eeprom data + +NVRAM saved data is 8 bits wide, in accordance with the data width +of the EEPROM memory of the PIC. +This means that we need to perform the conversion from the default +NVRAM dumped data to the NVRAM saved data. +*/ + +void pic16x8x_device::nvram_default() +{ + u16 dump_size = 0x4280; + u16 eeprom_dump = 0x4200; + + // populate from a memory region if present + if (m_region.found()) + { + if( m_region->bytes() != dump_size ) // pic memory dump total size + { + fatalerror( "Region '%s' wrong size (expected size = 0x%X)\n", tag(), dump_size ); + } + + if( m_region->bytewidth() != 2 ) // pic memory dumps are 16 bits wide + { + fatalerror( "Region '%s' needs to be an 16-bit region\n", tag() ); + } + + // Get default NVRAM data from memory region + memcpy(m_buff, m_region->base() + eeprom_dump, m_internal_eeprom_size * 2); + + // Data width conversion + for (u8 i=0; i < m_internal_eeprom_size; i++) + m_eeprom_data[i] = m_buff[i] & 0x00ff; + } + +} + +bool pic16x8x_device::nvram_read(util::read_stream &file) +{ + auto const [err, actual] = read(file, m_eeprom_data, m_internal_eeprom_size); + return !err && (actual == m_internal_eeprom_size); +} + +bool pic16x8x_device::nvram_write(util::write_stream &file) +{ + auto const [err, actual] = write(file, m_eeprom_data, m_internal_eeprom_size); + return !err && (actual == m_internal_eeprom_size); +} + + +// EEPROM data access +u8 pic16x8x_device::m_eeread(offs_t offs) +{ + return m_eeprom_data[offs]; +} + +void pic16x8x_device::m_eewrite(offs_t offs, u8 data) +{ + m_eeprom_data[offs] = data & m_data_mask; +} + + +// ******** The following is the STATUS flag register definition. ******** +// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +// | IRP | RP1 | RP0 | T0| PD| Z | DC | C | + +// IRP Register Bank Select - Unimplemented on this device +constexpr u8 RP1_FLAG = 0x40; // Register Bank Select Bit 1 +constexpr u8 RP0_FLAG = 0x20; // Register Bank Select Bit 0 + // 00 = Bank 0 (00h-7fh) + // 01 = Bank 1 (80h-ffh) + // 10 = Bank 2 (100h-17fh) + // 11 = Bank 3 (180h-1ffh) + // Each bank is 128 bytes. Only bit RP0 is used by the PIC16F8X. RP1 should be mantained clear. +constexpr u8 TO_FLAG = 0x10; // TO Time Out flag (WatchDog) +constexpr u8 PD_FLAG = 0x08; // PD Power Down flag +constexpr u8 Z_FLAG = 0x04; // Z Zero Flag +constexpr u8 DC_FLAG = 0x02; // DC Digit Carry/Borrow flag (Nibble) +constexpr u8 C_FLAG = 0x01; // C Carry/Borrow Flag (Byte) + +#define RP0 (m_STATUS & RP0_FLAG) +#define TO (m_STATUS & TO_FLAG) +#define PD (m_STATUS & PD_FLAG) +#define ZERO (m_STATUS & Z_FLAG) +#define DC (m_STATUS & DC_FLAG) +#define CARRY (m_STATUS & C_FLAG) + + +// ******** The following is the OPTION flag register definition. ******** +// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +// | RBPU | INTEDG | T0CS | T0SE | PSA | PS2 | PS1 | PS0 | +constexpr u8 RBPU_FLAG = 0x80; // RBPU PORTB Pull-up Enable bit +constexpr u8 INTEDG_FLAG = 0x40; // INTEDG Interrupt Edge Select bit + // 1 = Interrupt on rising edge of RB0/INT pin + // 0 = Interrupt on falling edge of RB0/INT pin +constexpr u8 T0CS_FLAG = 0x20; // T0CS Timer 0 clock source select + // 1 = Transition on RA4/T0CKI pin + // 0 = Internal instruction cycle clock (CLKOUT) +constexpr u8 T0SE_FLAG = 0x10; // T0SE Timer 0 clock source edge select + // 1 = Increment on high-to-low transition on RA4/T0CKI pin + // 0 = Increment on low-to-high transition on RA4/T0CKI pin +constexpr u8 PSA_FLAG = 0x08; // PSA Prescaler Assignment bit + // 1 = Prescaler is assigned to the WDT + // 0 = Prescaler is assigned to the Timer0 module +constexpr u8 PS_REG = 0x07; // PS Prescaler Rate select + +#define RBPU (m_OPTION & RBPU_FLAG) +#define INTEDG (m_OPTION & INTEDG_FLAG) +#define T0CS (m_OPTION & T0CS_FLAG) +#define T0SE (m_OPTION & T0SE_FLAG) +#define PSA (m_OPTION & PSA_FLAG) +#define PS (m_OPTION & PS_REG) + + +// ******** The following is the CONFIG Flag register definition. ******** +// | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +// | CP | WDTE | FOSC | + // CP Code Protect (ROM read protect) +constexpr u8 WDTE_FLAG = 0x04; // WDTE WatchDog Timer enable +constexpr u8 FOSC_FLAG = 0x03; // FOSC Oscillator source select + +#define WDTE (m_CONFIG & WDTE_FLAG) +#define FOSC (m_CONFIG & FOSC_FLAG) + + +// ******** The following is the INTCON flag register definition. ******** +// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +// | GIE | EEIE | T0IE | INTE | RBIE | T0IF | INTF | RBIF | + +constexpr u8 GIE_FLAG = 0x80; +constexpr u8 EEIE_FLAG = 0x40; +constexpr u8 T0IE_FLAG = 0x20; +constexpr u8 INTE_FLAG = 0x10; +constexpr u8 RBIE_FLAG = 0x08; +constexpr u8 T0IF_FLAG = 0x04; +constexpr u8 INTF_FLAG = 0x02; +constexpr u8 RBIF_FLAG = 0x01; + +#define GIE (m_INTCON & GIE_FLAG) +#define EEIE (m_INTCON & EEIE_FLAG) +#define T0IE (m_INTCON & T0IE_FLAG) +#define INTE (m_INTCON & INTE_FLAG) +#define RBIE (m_INTCON & RBIE_FLAG) +#define T0IF (m_INTCON & T0IF_FLAG) +#define INTF (m_INTCON & INTF_FLAG) +#define RBIF (m_INTCON & RBIF_FLAG) + +// ******** The following is the EECON1 Flag register definition. ******** +// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | +// | | | | EEIF | WRERR | WREN | WR | RD | + +constexpr u8 EEIF_FLAG = 0x10; +constexpr u8 WRERR_FLAG = 0x08; +constexpr u8 WREN_FLAG = 0x04; +constexpr u8 EEWR_FLAG = 0x02; +constexpr u8 EERD_FLAG = 0x01; + +#define EEIF (m_EECON1 & EEIF_FLAG) +#define WRERR (m_EECON1 & WRERR_FLAG) +#define WREN (m_EECON1 & WREN_FLAG) +#define EEWR (m_EECON1 & EEWR_FLAG) +#define EERD (m_EECON1 & EERD_FLAG) + +/************************************************************************ + * Fixed Vectors + ************************************************************************/ + +constexpr u8 RESET_VECTOR = 0x00; +constexpr u8 INT_VECTOR = 0x04; + +/************************************************************************ + * Shortcuts + ************************************************************************/ + +#define RISING_EDGE_RB0 (( (int)(RB0_in - m_old_RB0) > 0) ? 1 : 0) +#define FALLING_EDGE_RB0 (( (int)(RB0_in - m_old_RB0) < 0) ? 1 : 0) + +#define M_RDEEPROM(A) m_eeread(A) +#define M_WREEPROM(A,V) m_eewrite(A, V) + +#define CLR(flagreg, flag) (flagreg &= u8(~flag)) +#define SET(flagreg, flag) (flagreg |= (flag)) + +#define ADDR ((m_opcode.b.l & 0x7f) | (RP0 << 2)) +#define BITPOS ((m_opcode.w >> 7) & 7) + + +void pic16x8x_device::calc_zero_flag() +{ + if (m_ALU == 0) + SET(m_STATUS, Z_FLAG); + else + CLR(m_STATUS, Z_FLAG); +} + +void pic16x8x_device::calc_add_flags(u8 augend) +{ + calc_zero_flag(); + + if (augend > m_ALU) + SET(m_STATUS, C_FLAG); + else + CLR(m_STATUS, C_FLAG); + + if ((augend & 0x0f) > (m_ALU & 0x0f)) + SET(m_STATUS, DC_FLAG); + else + CLR(m_STATUS, DC_FLAG); +} + +void pic16x8x_device::calc_sub_flags(u8 minuend) +{ + calc_zero_flag(); + + if (minuend < m_ALU) + CLR(m_STATUS, C_FLAG); + else + SET(m_STATUS, C_FLAG); + + if ((minuend & 0x0f) < (m_ALU & 0x0f)) + CLR(m_STATUS, DC_FLAG); + else + SET(m_STATUS, DC_FLAG); +} + +void pic16x8x_device::set_pc(u16 addr) +{ + m_PCL = addr & m_program_mask; +} + +/* +Notes about Stack (from datasheet) +After the stack has been PUSHed eight times, the ninth +push overwrites the value that was stored from the first +push. The tenth push overwrites the second push (and +so on) +*/ + +u16 pic16x8x_device::pop_stack() +{ + m_stack_pointer = (m_stack_pointer - 1) & 0x0f; + u16 data = m_STACK[m_stack_pointer]; + return data & m_program_mask; +} + +void pic16x8x_device::push_stack(u16 data) +{ + m_STACK[m_stack_pointer] = data & m_program_mask; + m_stack_pointer = (m_stack_pointer + 1) & 0x0f; +} + +void pic16x8x_device::store_result(u8 addr, u8 data) +{ + if (m_opcode.b.l & 0x80) + store_regfile(addr, data); + else + m_W = data; + +} + +// *** Special function registers (SFR's) *** + +// *** SFR Access *** +u8 pic16x8x_device::get_regfile(u8 addr) +{ + if (addr == 0) + { // Indirect addressing + addr = m_FSR & m_data_mask; + } + return m_data.read_byte(addr); +} + +void pic16x8x_device::store_regfile(u8 addr, u8 data) +{ + if (addr == 0) + { // Indirect addressing + addr = m_FSR & m_data_mask; + } + m_data.write_byte(addr, data); +} + +// *** SFR Functions *** +u8 pic16x8x_device::tmr0_r() +{ + return m_TMR0; +} + +void pic16x8x_device::tmr0_w(u8 data) +{ + m_delay_timer = 2; // Timer increment is inhibited for 2 cycles + if (PSA == 0) m_prescaler = 0; // Must clear the Prescaler + m_TMR0 = data; +} + +u8 pic16x8x_device::pcl_r() +{ + return m_PCL; +} + +void pic16x8x_device::pcl_w(u8 data) +{ + m_PCL = data; + set_pc((m_PCLATH << 8) | data); + m_inst_cycles++; +} + +u8 pic16x8x_device::status_r() +{ + return m_STATUS; +} + +void pic16x8x_device::status_w(u8 data) +{ + m_STATUS = (m_STATUS & (TO_FLAG | PD_FLAG)) | (data & u8(~(TO_FLAG | PD_FLAG))); +} + +u8 pic16x8x_device::fsr_r() +{ + return m_FSR | (uint8_t)(~m_data_mask); +} + +void pic16x8x_device::fsr_w(u8 data) +{ + m_FSR = data | u8(~m_data_mask); +} + +u8 pic16x8x_device::porta_r() +{ + u8 data = m_read_port[PORTA](PORTA, 0xff); + data &= m_port_tris[PORTA]; + data |= (u8(~m_port_tris[PORTA]) & m_port_data[PORTA]); + return data & 0x1f; // 5-bit port (only lower 5 bits used) +} + +void pic16x8x_device::porta_w(u8 data) +{ + data &= 0x1f; // 5-bit port (only lower 5 bits used) + m_write_port[PORTA](PORTA, data & u8(~m_port_tris[PORTA]) & 0x1f, u8(~m_port_tris[PORTA]) & 0x1f); + m_port_data[PORTA] = data; +} + +u8 pic16x8x_device::portb_r() +{ + u8 data = m_read_port[PORTB](PORTB, 0xff); + data &= m_port_tris[PORTB]; + data |= (u8(~m_port_tris[PORTB]) & m_port_data[PORTB]); + return data; +} + +void pic16x8x_device::portb_w(u8 data) +{ + m_write_port[PORTB](PORTB, data & u8(~m_port_tris[PORTB]), u8(~m_port_tris[PORTB])); + m_port_data[PORTB] = data; +} + +u8 pic16x8x_device::eedata_r() +{ + return m_EEDATA; +} + +void pic16x8x_device::eedata_w(u8 data) +{ + m_EEDATA = data; +} + +u8 pic16x8x_device::eeadr_r() +{ + return m_EEADR; +} + +void pic16x8x_device::eeadr_w(u8 data) +{ + m_EEADR = data; +} + +u8 pic16x8x_device::pclath_r() +{ + return m_PCLATH; +} + +void pic16x8x_device::pclath_w(u8 data) +{ + m_PCLATH = data; +} + +u8 pic16x8x_device::intcon_r() +{ + return m_INTCON; +} + +void pic16x8x_device::intcon_w(u8 data) +{ + m_INTCON = data; +} + +u8 pic16x8x_device::trisa_r() +{ + return m_port_tris[PORTA]; +} + +void pic16x8x_device::trisa_w(u8 data) +{ + if (m_port_tris[PORTA] != data) + { + m_port_tris[PORTA] = data | 0xe0; + m_write_port[PORTA](PORTA, m_port_data[PORTA] & u8(~m_port_tris[PORTA]) & 0x1f, u8(~m_port_tris[PORTA]) & 0x1f); + } +} + +u8 pic16x8x_device::trisb_r() +{ + return m_port_tris[PORTB]; +} + +void pic16x8x_device::trisb_w(u8 data) +{ + if (m_port_tris[PORTB] != data) + { + m_port_tris[PORTB] = data; + m_write_port[PORTB](PORTB, m_port_data[PORTB] & u8(~m_port_tris[PORTB]), u8(~m_port_tris[PORTB])); + } +} + +u8 pic16x8x_device::eecon1_r() +{ + return m_EECON1; +} + +void pic16x8x_device::eecon1_w(u8 data) +{ + if (!((data & WREN_FLAG) && EEWR)) // The WR bit will be inhibited from being set unless the WREN bit is set.(from datasheet) + CLR(data, EEWR); // Clear the flag if it don't meet the requirements + + m_EECON1 = data; // update register + + if (EERD) // cheack flag condition to read eeprom + { + m_EEDATA = M_RDEEPROM(m_EEADR); // do eeprom read + CLR(m_EECON1, EERD_FLAG); // clear read enable flag + } + + if (WREN && EEWR && (m_EECON2 == 0xff)) // check flags conditions to write eeprom + { + M_WREEPROM(m_EEADR, data); // do eeprom write + CLR(m_EECON1, EEWR_FLAG); // clear write enable flag + SET(m_EECON1, EEIF_FLAG); // assuming write was done, set EEIF + } +} + +u8 pic16x8x_device::eecon2_r() +{ + return m_EECON2; +} + +void pic16x8x_device::eecon2_w(u8 data) +{ + if((m_EECON2!=0x55) & (data==0x55)) + m_EECON2 = data; + else if((m_EECON2==0x55) & (data==0xAA)) + m_EECON2 = 0xff; + else + m_EECON2 = data; +} + +u8 pic16x8x_device::option_r() +{ + return m_OPTION; +} + +void pic16x8x_device::option_w(u8 data) +{ + m_OPTION = data; +} + +/************************************************************************ + * Emulate the Instructions + ************************************************************************/ + +void pic16x8x_device::illegal() +{ + logerror("PIC16x8x: PC=%03x, Illegal opcode = %04x\n", m_PREVPC, m_opcode.w); +} + +/* + Note: + According to the manual, if the STATUS register is the destination for an instruction that affects the Z, DC or C bits + then the write to these three bits is disabled. These bits are set or cleared according to the device logic. + To ensure this is correctly emulated, in instructions that write to the file registers, always change the status flags + *after* storing the result of the instruction. + e.g. CALCULATE_*, SET(STATUS,*_FLAG) and CLR(STATUS,*_FLAG) should appear as the last steps of the instruction emulation. +*/ + +void pic16x8x_device::addlw() +{ + // New + m_ALU = m_opcode.b.l + m_W; + m_W = m_ALU; + calc_zero_flag(); +} + +void pic16x8x_device::addwf() +{ + u8 augend = get_regfile(ADDR); + m_ALU = augend + m_W; + store_result(ADDR, m_ALU); + calc_add_flags(augend); +} + +void pic16x8x_device::andlw() +{ + m_ALU = m_opcode.b.l & m_W; + m_W = m_ALU; + calc_zero_flag(); +} + +void pic16x8x_device::andwf() +{ + m_ALU = get_regfile(ADDR) & m_W; + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + +void pic16x8x_device::bcf() +{ + m_ALU = get_regfile(ADDR); + m_ALU &= ~(1 << BITPOS); + store_regfile(ADDR, m_ALU); +} + +void pic16x8x_device::bsf() +{ + m_ALU = get_regfile(ADDR); + m_ALU |= 1 << BITPOS; + store_regfile(ADDR, m_ALU); +} + +void pic16x8x_device::btfss() +{ + if (BIT(get_regfile(ADDR), BITPOS)) + { + set_pc(m_PCL + 1); + m_inst_cycles++; // Add NOP cycles + } +} + +void pic16x8x_device::btfsc() +{ + if (!BIT(get_regfile(ADDR), BITPOS)) + { + set_pc(m_PCL + 1); + m_inst_cycles++; // Add NOP cycles + } +} + +void pic16x8x_device::call() +{ + push_stack(m_PCL); + set_pc(((m_PCLATH & 0x18) << 8 ) | (m_opcode.w & 0x07ff)); +} + + +void pic16x8x_device::clrw() +{ + m_W = 0; + SET(m_STATUS, Z_FLAG); +} + +void pic16x8x_device::clrf() +{ + store_regfile(ADDR, 0); + SET(m_STATUS, Z_FLAG); +} + +void pic16x8x_device::clrwdt() +{ + m_WDT = 0; + if (PSA) m_prescaler = 0; + SET(m_STATUS, TO_FLAG); + SET(m_STATUS, PD_FLAG); +} + +void pic16x8x_device::comf() +{ + m_ALU = u8(~(get_regfile(ADDR))); + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + +void pic16x8x_device::decf() +{ + m_ALU = get_regfile(ADDR) - 1; + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + +void pic16x8x_device::decfsz() +{ + m_ALU = get_regfile(ADDR) - 1; + store_result(ADDR, m_ALU); + if (m_ALU == 0) + { + set_pc(m_PCL + 1); + m_inst_cycles++; // Add NOP cycles + } +} + +void pic16x8x_device::goto_op() +{ + set_pc(((m_PCLATH & 0x18) << 8 ) | (m_opcode.w & 0x07ff)); +} + +void pic16x8x_device::incf() +{ + m_ALU = get_regfile(ADDR) + 1; + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + +void pic16x8x_device::incfsz() +{ + m_ALU = get_regfile(ADDR) + 1; + store_result(ADDR, m_ALU); + if (m_ALU == 0) + { + set_pc(m_PCL + 1); + m_inst_cycles++; // Add NOP cycles + } +} + +void pic16x8x_device::iorlw() +{ + m_ALU = m_opcode.b.l | m_W; + m_W = m_ALU; + calc_zero_flag(); +} + +void pic16x8x_device::iorwf() +{ + m_ALU = get_regfile(ADDR) | m_W; + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + +void pic16x8x_device::movf() +{ + m_ALU = get_regfile(ADDR); + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + +void pic16x8x_device::movlw() +{ + m_W = m_opcode.b.l; +} + +void pic16x8x_device::movwf() +{ + store_regfile(ADDR, m_W); +} + +void pic16x8x_device::nop() +{ + // Do nothing +} + +void pic16x8x_device::retfie() // new for 16x8x +{ + // New + set_pc(pop_stack()); + m_irq_in_progress = false; +} + +void pic16x8x_device::retlw() +{ + m_W = m_opcode.b.l; + set_pc(pop_stack()); +} + +void pic16x8x_device::retrn() // new for 16x8x +{ + set_pc(pop_stack()); +} + +void pic16x8x_device::rlf() +{ + m_ALU = get_regfile(ADDR); + int carry = BIT(m_ALU, 7); + m_ALU <<= 1; + if (m_STATUS & C_FLAG) m_ALU |= 1; + store_result(ADDR, m_ALU); + + if (carry) + SET(m_STATUS, C_FLAG); + else + CLR(m_STATUS, C_FLAG); +} + +void pic16x8x_device::rrf() +{ + m_ALU = get_regfile(ADDR); + int carry = BIT(m_ALU, 0); + m_ALU >>= 1; + if (m_STATUS & C_FLAG) m_ALU |= 0x80; + store_result(ADDR, m_ALU); + + if (carry) + SET(m_STATUS, C_FLAG); + else + CLR(m_STATUS, C_FLAG); +} + +void pic16x8x_device::sleepic() +{ + if (WDTE) m_WDT = 0; + if (PSA) m_prescaler = 0; + SET(m_STATUS, TO_FLAG); + CLR(m_STATUS, PD_FLAG); +} + +void pic16x8x_device::sublw() // new for 16x8x : Substract W from literal +{ + // New + u8 minuend = m_opcode.b.l; + m_ALU = minuend - m_W; + m_W = m_ALU; + calc_sub_flags(minuend); +} + +void pic16x8x_device::subwf() // Substract W from f +{ + u8 minuend = get_regfile(ADDR); + m_ALU = minuend - m_W; + store_result(ADDR, m_ALU); + calc_sub_flags(minuend); +} + +void pic16x8x_device::swapf() +{ + u8 reg = get_regfile(ADDR); + m_ALU = reg << 4 | reg >> 4; + store_result(ADDR, m_ALU); +} + +void pic16x8x_device::xorlw() +{ + m_ALU = m_W ^ m_opcode.b.l; + m_W = m_ALU; + calc_zero_flag(); +} + +void pic16x8x_device::xorwf() +{ + m_ALU = get_regfile(ADDR) ^ m_W; + store_result(ADDR, m_ALU); + calc_zero_flag(); +} + + +/*********************************************************************** + * Opcode Table (Cycles, Instruction) + ***********************************************************************/ + +const pic16x8x_device::pic16x8x_opcode pic16x8x_device::s_opcode_main[128]= +{ + {1, &pic16x8x_device::nop },{1, &pic16x8x_device::movwf },{1, &pic16x8x_device::clrw },{1, &pic16x8x_device::clrf }, // 00 + {1, &pic16x8x_device::subwf },{1, &pic16x8x_device::subwf },{1, &pic16x8x_device::decf },{1, &pic16x8x_device::decf }, // 04 + {1, &pic16x8x_device::iorwf },{1, &pic16x8x_device::iorwf },{1, &pic16x8x_device::andwf },{1, &pic16x8x_device::andwf }, // 08 + {1, &pic16x8x_device::xorwf },{1, &pic16x8x_device::xorwf },{1, &pic16x8x_device::addwf },{1, &pic16x8x_device::addwf }, // 0C + {1, &pic16x8x_device::movf },{1, &pic16x8x_device::movf },{1, &pic16x8x_device::comf },{1, &pic16x8x_device::comf }, // 10 + {1, &pic16x8x_device::incf },{1, &pic16x8x_device::incf },{1, &pic16x8x_device::decfsz },{1, &pic16x8x_device::decfsz }, // 14 + {1, &pic16x8x_device::rrf },{1, &pic16x8x_device::rrf },{1, &pic16x8x_device::rlf },{1, &pic16x8x_device::rlf }, // 18 + {1, &pic16x8x_device::swapf },{1, &pic16x8x_device::swapf },{1, &pic16x8x_device::incfsz },{1, &pic16x8x_device::incfsz }, // 1C + {1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf }, // 20 + {1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf }, + {1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf }, // 28 + {1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf }, + {1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc }, // 30 + {1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc }, + {1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss }, // 38 + {1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss }, + {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call }, // 40 + {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call }, + {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call }, // 48 + {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call }, + {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op }, // 50 + {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op }, + {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op }, // 58 + {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op }, + {1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw }, // 60 + {1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw }, + {2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw }, // 68 + {2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw }, + {1, &pic16x8x_device::iorlw },{1, &pic16x8x_device::iorlw },{1, &pic16x8x_device::andlw },{1, &pic16x8x_device::andlw }, // 70 + {1, &pic16x8x_device::xorlw },{1, &pic16x8x_device::xorlw },{1, &pic16x8x_device::xorlw },{1, &pic16x8x_device::xorlw }, // 74 + {1, &pic16x8x_device::sublw },{1, &pic16x8x_device::sublw },{1, &pic16x8x_device::sublw },{1, &pic16x8x_device::sublw }, // 78 + {1, &pic16x8x_device::addlw },{1, &pic16x8x_device::addlw },{1, &pic16x8x_device::addlw },{1, &pic16x8x_device::addlw } // 7C +}; + +const pic16x8x_device::pic16x8x_opcode pic16x8x_device::s_opcode_00x[128]= +{ + {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 00 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {2, &pic16x8x_device::retrn },{2, &pic16x8x_device::retfie },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 08 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 10 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 18 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 20 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 28 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 30 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 38 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 40 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 48 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 50 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 58 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::sleepic }, // 60 + {1, &pic16x8x_device::clrwdt },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 68 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 70 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 78 + {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal } +}; + + +/**************************************************************************** + * Inits CPU emulation + ****************************************************************************/ + +enum +{ + PIC16X8x_PC=1, PIC16X8x_W, PIC16X8x_ALU, PIC16X8x_WDT, PIC16X8x_PSCL, PIC16X8x_CONFIG +}; + +void pic16x8x_device::device_start() +{ + space(AS_PROGRAM).cache(m_program); + space(AS_DATA).specific(m_data); + + m_program_mask = (1 << m_program_width) - 1; + m_data_mask = 0xff; + m_status_mask = 0xff; + m_PCL = 0; + m_PREVPC = 0; + m_W = 0; + m_OPTION = 0; + m_ALU = 0; + m_WDT = 0; + m_TMR0 = 0; + m_STATUS = ~m_status_mask; + m_FSR = 0; + std::fill(std::begin(m_port_data), std::end(m_port_data), 0); + std::fill(std::begin(m_port_tris), std::end(m_port_tris), 0); + std::fill(std::begin(m_STACK), std::end(m_STACK), 0); + m_prescaler = 0; + m_opcode.w = 0; + m_delay_timer = 0; + m_rtcc = 0; + m_count_cycles = 0; + m_inst_cycles = 0; + m_stack_pointer = 0; + m_debugger_temp = 0; + m_portb_chdetect_temp = 0xff; + m_irq_in_progress = false; + + // save states + save_item(NAME(m_PCL)); + save_item(NAME(m_PREVPC)); + save_item(NAME(m_CONFIG)); + save_item(NAME(m_W)); + save_item(NAME(m_OPTION)); + save_item(NAME(m_ALU)); + save_item(NAME(m_WDT)); + save_item(NAME(m_TMR0)); + save_item(NAME(m_STATUS)); + save_item(NAME(m_FSR)); + save_item(NAME(m_port_data)); + save_item(NAME(m_port_tris)); + save_item(NAME(m_EEDATA)); + save_item(NAME(m_EEADR)); + save_item(NAME(m_EECON1)); + save_item(NAME(m_EECON2)); + save_item(NAME(m_PCLATH)); + save_item(NAME(m_INTCON)); + save_item(NAME(m_STACK)); + save_item(NAME(m_prescaler)); + save_item(NAME(m_opcode.w)); + save_item(NAME(m_delay_timer)); + save_item(NAME(m_rtcc)); + save_item(NAME(m_count_cycles)); + save_item(NAME(m_inst_cycles)); + save_item(NAME(m_stack_pointer)); + save_item(NAME(m_old_RB0)); + save_item(NAME(m_irq_in_progress)); + save_item(NAME(m_eeprom_data)); + + + // debugger + state_add( PIC16X8x_PC, "PC", m_PCL).mask(0xfff).formatstr("%03X"); + state_add( PIC16X8x_W, "W", m_W).formatstr("%02X"); + state_add( PIC16X8x_ALU, "ALU", m_ALU).formatstr("%02X"); + state_add( PIC16X8x_WDT, "WDT", m_WDT).formatstr("%04X"); + state_add( PIC16X8x_CONFIG, "CNF", m_CONFIG).formatstr("%04X"); + state_add( PIC16X8x_PSCL, "PSCL", m_debugger_temp).callimport().formatstr("%3s"); + + state_add( STATE_GENPC, "GENPC", m_PCL).noshow(); + state_add( STATE_GENPCBASE, "CURPC", m_PREVPC).noshow(); + state_add( STATE_GENFLAGS, "GENFLAGS", m_OPTION).formatstr("%13s").noshow(); + + set_icountptr(m_icount); +} + + +void pic16x8x_device::state_import(const device_state_entry &entry) +{ + switch (entry.index()) + { + case PIC16X8x_PSCL: + m_prescaler = m_debugger_temp; + break; + } +} + +void pic16x8x_device::state_export(const device_state_entry &entry) +{ + switch (entry.index()) + { + } +} + +void pic16x8x_device::state_string_export(const device_state_entry &entry, std::string &str) const +{ + switch (entry.index()) + { + case PIC16X8x_PSCL: + str = string_format("%c%02X", ((m_OPTION & 0x08) ? 'W' : 'T'), m_prescaler); + break; + + case STATE_GENFLAGS: + str = string_format("%01x%c%c%c%c%c %c%c%c%03x", + (m_STATUS & 0xe0) >> 5, + m_STATUS & 0x10 ? '.':'O', // WDT Overflow + m_STATUS & 0x08 ? 'P':'D', // Power/Down + m_STATUS & 0x04 ? 'Z':'.', // Zero + m_STATUS & 0x02 ? 'c':'b', // Nibble Carry/Borrow + m_STATUS & 0x01 ? 'C':'B', // Carry/Borrow + + m_OPTION & 0x20 ? 'C':'T', // Counter/Timer + m_OPTION & 0x10 ? 'N':'P', // Negative/Positive + m_OPTION & 0x08 ? 'W':'T', // WatchDog/Timer + m_OPTION & 0x08 ? (1<<(m_OPTION&7)) : (2<<(m_OPTION&7))); + break; + } +} + + +/**************************************************************************** + * Reset registers to their initial values + ****************************************************************************/ + +void pic16x8x_device::reset_regs() +{ + set_pc(RESET_VECTOR); + m_port_tris[PORTA] = 0x1f; + m_port_tris[PORTB] = 0xff; + m_OPTION = T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG; + m_PREVPC = m_PCL; + m_STATUS = 0x18; + m_PCL = 0; + m_prescaler = 0; + m_delay_timer = 0; + m_inst_cycles = 0; + m_count_cycles = 0; + m_stack_pointer = 0; + m_portb_chdetect_temp = 0xff; + m_old_RB0 = 0; +} + +void pic16x8x_device::set_config(u16 data) +{ + logerror("Writing %04x to the PIC16x8x configuration bits\n", data); + m_CONFIG = (data & 0x3fff); +} + +void pic16x8x_device::watchdog_reset() +{ + SET(m_STATUS, TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG); + reset_regs(); +} + +void pic16x8x_device::device_reset() +{ + reset_regs(); + CLR(m_STATUS, RP0_FLAG); + CLR(m_STATUS, RP1_FLAG); + + // Setting TO_FLAG from Config Word + if(WDTE) + SET(m_STATUS, TO_FLAG); + else + CLR(m_STATUS, TO_FLAG); + + SET(m_STATUS, PD_FLAG); + store_regfile(3, m_STATUS); + store_regfile(4, m_FSR); +} + + +/**************************************************************************** + * WatchDog + ****************************************************************************/ + +void pic16x8x_device::update_watchdog(int counts) +{ + /* + WatchDog is set up to count 18,000 (0x464f hex) ticks to provide + the timeout period of 0.018ms based on a 4MHz input clock. + Note: the 4MHz clock should be divided by the PIC16C5x_CLOCK_DIVIDER + which effectively makes the PIC run at 1MHz internally. + + If the current instruction is CLRWDT or SLEEP, don't update the WDT + */ + + if ((m_opcode.w != 3) && (m_opcode.w != 4)) + { + u16 old_WDT = m_WDT; + + m_WDT -= counts; + + if (m_WDT > 0x464f) + { + m_WDT = 0x464f - (0xffff - m_WDT); + } + + if (((old_WDT != 0) && (old_WDT < m_WDT)) || (m_WDT == 0)) + { + if (PSA) + { + m_prescaler++; + if (m_prescaler >= (1 << PS)) + { // Prescale values from 1 to 128 + m_prescaler = 0; + CLR(m_STATUS, TO_FLAG); + watchdog_reset(); + } + } + else + { + CLR(m_STATUS, TO_FLAG); + watchdog_reset(); + } + } + } +} + + +/**************************************************************************** + * Update Timer + ****************************************************************************/ + +void pic16x8x_device::update_timer(int counts) +{ + if (m_delay_timer > 0) + { // Timer increment is inhibited + int dt = m_delay_timer; + m_delay_timer -= m_inst_cycles; + counts -= dt; + } + + if (m_delay_timer > 0 || counts <= 0) + return; + + if (PSA == 0) + { // if PSA is cleared, prescaler is assigned to timer + m_prescaler += counts; + if (m_prescaler >= (2 << PS)) + { // Prescale values from 2 to 256 + m_TMR0 += (m_prescaler / (2 << PS)); + if(m_TMR0 == 0) + SET(m_INTCON, T0IF_FLAG); + m_prescaler %= (2 << PS); // Overflow prescaler + } + } + else + { + m_TMR0 += counts; + if(m_TMR0 == 0) + SET(m_INTCON, T0IF_FLAG); + } +} + +void pic16x8x_device::execute_set_input(int line, int state) +{ + u8 RB0_in; + switch (line) + { + // RTCC/RA4_T0CKI pin + case PIC16x8x_T0CKI: + if (T0CS && state != m_rtcc) + { // Count mode, edge triggered + if ((T0SE && !state) || (!T0SE && state)) + m_count_cycles++; + } + m_rtcc = state; + break; + + case PIC16x8x_RB0INT: + RB0_in = state; + if (INTEDG) + { /* Interrupt on Rising edge RB0 input */ + if (RISING_EDGE_RB0) + { + SET(m_INTCON, INTF_FLAG); + } + } + else + { /* Interrupt on Falling edge RB0 input */ + if (FALLING_EDGE_RB0) + { + SET(m_INTCON, INTF_FLAG); + } + } + m_old_RB0 = RB0_in; + break; + + default: + break; + } +} + +/*------------------------------------------------- + check_irqs - check for and process IRQs +-------------------------------------------------*/ + +void pic16x8x_device::check_irqs() +{ + // if something is in progress, we do nothing + if (m_irq_in_progress) + return; + + if(m_read_port[PORTB](PORTB, 0xf0) != m_portb_chdetect_temp) + { + m_portb_chdetect_temp = m_read_port[PORTB](PORTB, 0xf0); + SET(m_INTCON, RBIF_FLAG); + } + + else if(GIE && RBIE && RBIF) + { + push_stack(m_PCL); + set_pc(INT_VECTOR); + standard_irq_callback(0, m_PCL); + m_irq_in_progress = true; + } + + else if(GIE && INTE && INTF) + { + push_stack(m_PCL); + set_pc(INT_VECTOR); + standard_irq_callback(1, m_PCL); + m_irq_in_progress = true; + } + + else if(GIE && T0IE && T0IF) + { + push_stack(m_PCL); + set_pc(INT_VECTOR); + standard_irq_callback(2, m_PCL); + m_irq_in_progress = true; + } + + else if(GIE && EEIE && EEIF) + { + push_stack(m_PCL); + set_pc(INT_VECTOR); + standard_irq_callback(3, m_PCL); + m_irq_in_progress = true; + } +} + + +/**************************************************************************** + * Execute IPeriod. Return 0 if emulation should be stopped + ****************************************************************************/ + +void pic16x8x_device::execute_run() +{ + do + { + // check interrupts + check_irqs(); + + if (PD == 0) + { // Sleep Mode + m_count_cycles = 0; + m_inst_cycles = 1; + debugger_instruction_hook(m_PCL); + } + else + { + m_PREVPC = m_PCL; + + debugger_instruction_hook(m_PCL); + + m_opcode.w = m_program.read_word(m_PCL); + set_pc(m_PCL + 1); + + if ( (m_opcode.w & 0x3f80) != 0x0000) + { // Do all opcodes except the 00? ones + m_inst_cycles = s_opcode_main[((m_opcode.w >> 7) & 0x7f)].cycles; + (this->*s_opcode_main[((m_opcode.w >> 7) & 0x7f)].function)(); + } + else + { // Opcode 0x00? has many opcodes in its minor nibble + m_inst_cycles = s_opcode_00x[(m_opcode.b.l & 0x7f)].cycles; + (this->*s_opcode_00x[(m_opcode.b.l & 0x7f)].function)(); + } + + update_timer(T0CS ? m_count_cycles : m_inst_cycles); + m_count_cycles = 0; + } + + if (WDTE) + { + update_watchdog(m_inst_cycles); + } + + m_icount -= m_inst_cycles; + + } while (m_icount > 0); +} diff --git a/src/devices/cpu/pic16x8x/pic16x8x.h b/src/devices/cpu/pic16x8x/pic16x8x.h new file mode 100644 index 00000000000..52456dbb3d6 --- /dev/null +++ b/src/devices/cpu/pic16x8x/pic16x8x.h @@ -0,0 +1,319 @@ +// license:BSD-3-Clause +// copyright-holders:Grull Osgo +/************************************************************************ + + Microchip PIC16x8x Emulator + + Based on MAME's PIC16C5x/62x cpu devices developed by Tony La Porta + and improvements to SFR's accesss made by ajrhacker. + + +************************************************************************/ + +#ifndef MAME_CPU_PIC16X8X_PIC16X8X_H +#define MAME_CPU_PIC16X8X_PIC16X8X_H + +#pragma once + +// input lines +enum +{ + PIC16x8x_T0CKI = 0, + PIC16x8x_RB0INT +}; + +DECLARE_DEVICE_TYPE(PIC16CR83, pic16cr83_device) +DECLARE_DEVICE_TYPE(PIC16CR84, pic16cr84_device) +DECLARE_DEVICE_TYPE(PIC16F83, pic16f83_device) +DECLARE_DEVICE_TYPE(PIC16F84, pic16f84_device) +DECLARE_DEVICE_TYPE(PIC16F84A, pic16f84a_device) + +class pic16x8x_device : public cpu_device, public device_nvram_interface +{ + +// i/o ports + enum + { + PORTA = 0, + PORTB + }; + +public: + // port a, 5 bits, 2-way + auto read_a() { return m_read_port[PORTA].bind(); } + auto write_a() { return m_write_port[PORTA].bind(); } + + // port b, 8 bits, 2-way + auto read_b() { return m_read_port[PORTB].bind(); } + auto write_b() { return m_write_port[PORTB].bind(); } + + /**************************************************************************** + * Function to configure the CONFIG register. This is actually hard-wired + * during ROM programming, so should be called in the driver INIT, with + * the value if known (available in HEX dumps of the ROM). + ****************************************************************************/ + void set_config(u16 data); + + void core_regs(address_map &map, u8 mirror = 0); + + void ram_6(address_map &map); + void rom_9(address_map &map); + void ram_7(address_map &map); + void rom_10(address_map &map); + +protected: + // construction/destruction + pic16x8x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, address_map_constructor program_map, address_map_constructor data_map); + + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_execute_interface overrides + /************************************************************************** + * Internal Clock divisor + * + * External Clock is divided internally by 4 for the instruction cycle + * times. (Each instruction cycle passes through 4 machine states). This + * is handled by the cpu execution engine. + **************************************************************************/ + virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } + virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } + virtual u32 execute_min_cycles() const noexcept override { return 1; } + virtual u32 execute_max_cycles() const noexcept override { return 2; } + virtual u32 execute_input_lines() const noexcept override { return 1; } + virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PIC16x8x_T0CKI; } + virtual void execute_run() override; + virtual void execute_set_input(int line, int state) override; + + // device_memory_interface overrides + virtual space_config_vector memory_space_config() const override; + + // device_nvram_interface implementation + virtual bool nvram_read(util::read_stream &file) override; + virtual bool nvram_write(util::write_stream &file) override; + virtual void nvram_default() override; + + // device_state_interface overrides + virtual void state_import(const device_state_entry &entry) override; + virtual void state_export(const device_state_entry &entry) override; + virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; + + // device_disasm_interface overrides + virtual std::unique_ptr create_disassembler() override; + + u8 m_eeprom_data[0x40]; + u16 m_buff[0x40]; + + optional_memory_region m_region; + + // address spaces + address_space_config m_program_config; + address_space_config m_data_config; + + int m_program_width; + +private: + + memory_access<13, 1, -1, ENDIANNESS_LITTLE>::cache m_program; + memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_data; + + /******************** CPU Internal Registers *******************/ + u16 m_PCL; + u16 m_PREVPC; + u8 m_W; + u8 m_OPTION; + u16 m_CONFIG; + u8 m_ALU; + u16 m_WDT; + u8 m_TMR0; + u8 m_STATUS; + u8 m_FSR; + u8 m_EEDATA; + u8 m_EEADR; + u8 m_PCLATH; + u8 m_INTCON; + u8 m_EECON1; + u8 m_EECON2; + u8 m_port_data[2]; + u8 m_port_tris[2]; + u16 m_STACK[8]; + u16 m_prescaler; // Note: this is really an 8-bit register + PAIR16 m_opcode; + int m_icount; + int m_delay_timer; + int m_rtcc; + u8 m_count_cycles; + u8 m_data_mask; + u16 m_program_mask; + u8 m_status_mask; + u8 m_inst_cycles; + u8 m_stack_pointer; + u8 m_old_RB0; + u8 m_portb_chdetect_temp; + bool m_irq_in_progress; + + const u8 m_internal_eeprom_size = 0x40; + + // i/o handlers + devcb_read8::array<2> m_read_port; + devcb_write8::array<2> m_write_port; + + // For debugger + int m_debugger_temp; + + // opcode table entry + typedef void (pic16x8x_device::*pic16x8x_ophandler)(); + struct pic16x8x_opcode + { + u8 cycles; + pic16x8x_ophandler function; + }; + + static const pic16x8x_opcode s_opcode_main[128]; + static const pic16x8x_opcode s_opcode_00x[128]; + + void check_irqs(); + + // EEPROM data access + u8 m_eeread(offs_t offs); + void m_eewrite(offs_t offs, u8 data); + + //void update_internalram_ptr(); + void calc_zero_flag(); + void calc_add_flags(u8 augend); + void calc_sub_flags(u8 minuend); + u16 pop_stack(); + void push_stack(u16 data); + void set_pc(u16 addr); + u8 get_regfile(u8 addr); + void store_regfile(u8 addr, u8 data); + void store_result(u8 addr, u8 data); + u8 tmr0_r(); + void tmr0_w(u8 data); + u8 pcl_r(); + void pcl_w(u8 data); + u8 status_r(); + void status_w(u8 data); + u8 fsr_r(); + void fsr_w(u8 data); + u8 porta_r(); + void porta_w(u8 data); + u8 portb_r(); + void portb_w(u8 data); + u8 eedata_r(); + void eedata_w(u8 data); + u8 eeadr_r(); + void eeadr_w(u8 data); + u8 pclath_r(); + void pclath_w(u8 data); + u8 intcon_r(); + void intcon_w(u8 data); + u8 trisa_r(); + void trisa_w(u8 data); + u8 trisb_r(); + void trisb_w(u8 data); + u8 eecon1_r(); + void eecon1_w(u8 data); + u8 eecon2_r(); + void eecon2_w(u8 data); + u8 option_r(); + void option_w(u8 data); + void reset_regs(); + void watchdog_reset(); + void update_watchdog(int counts); + void update_timer(int counts); + + void illegal(); + void addlw(); // new for 16x8x + void addwf(); + void andwf(); + void andlw(); + void bcf(); + void bsf(); + void btfss(); + void btfsc(); + void call(); + void clrw(); + void clrf(); + void clrwdt(); + void comf(); + void decf(); + void decfsz(); + void goto_op(); + void incf(); + void incfsz(); + void iorlw(); + void iorwf(); + void movf(); + void movlw(); + void movwf(); + void nop(); + void retfie(); // new for 16x8x + void retlw(); + void retrn(); // new for 16x8x - can´t use return as mnemonic - Others PIC's uses "returns", should I use it? + void rlf(); + void rrf(); + void sleepic(); + void sublw(); // new for 16x8x + void subwf(); + void swapf(); + void xorlw(); + void xorwf(); +}; + + +class pic16x83_device : public pic16x8x_device +{ +public: + // construction/destruction + pic16x83_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width); +}; + +class pic16x84_device : public pic16x8x_device +{ +public: + // construction/destruction + pic16x84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width); +}; + +class pic16cr83_device : public pic16x83_device +{ +public: + // construction/destruction + pic16cr83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + + +class pic16cr84_device : public pic16x84_device +{ +public: + // construction/destruction + pic16cr84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + + +class pic16f83_device : public pic16x83_device +{ +public: + // construction/destruction + pic16f83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + + +class pic16f84_device : public pic16x84_device +{ +public: + // construction/destruction + pic16f84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + + +class pic16f84a_device : public pic16x84_device +{ +public: + // construction/destruction + pic16f84a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); +}; + +#endif // MAME_CPU_PIC16X8X_PIC16X8X_H diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp index 84baa3e3904..3d3774a26e7 100644 --- a/src/devices/cpu/z80/z80.cpp +++ b/src/devices/cpu/z80/z80.cpp @@ -161,6 +161,10 @@ #define A m_af.b.h #define F m_af.b.l #define Q m_q +#define QT m_qtemp +#define I m_i +#define R m_r +#define R2 m_r2 #define BCD m_bc.d #define BC m_bc.w.l @@ -192,6 +196,15 @@ #define WZ_L m_wz.b.l +#define TADR m_shared_addr.w // Typically represents values from A0..15 pins. 16bit input in steps. +#define TADR_H m_shared_addr.b.h +#define TADR_L m_shared_addr.b.l +#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps. +#define TDAT2 m_shared_data2.w +#define TDAT_H m_shared_data.b.h +#define TDAT_L m_shared_data.b.l +#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps. + static bool tables_initialised = false; static u8 SZ[256]; // zero and sign flags static u8 SZ_BIT[256]; // zero, sign and parity/overflow (=zero) flags for BIT opcode @@ -203,91 +216,10 @@ static u8 SZHVC_add[2*256*256]; static u8 SZHVC_sub[2*256*256]; -/*************************************************************** - * define an opcode function - ***************************************************************/ -#define OP(prefix,opcode) inline void z80_device::prefix##_##opcode() - -/*************************************************************** - * adjust cycle count by n T-states - ***************************************************************/ -#define T(icount) execute_cycles(icount) - -#define EXEC(prefix,opcode) do { \ - unsigned op = opcode; \ - switch(op) \ - { \ - case 0x00:prefix##_##00();break; case 0x01:prefix##_##01();break; case 0x02:prefix##_##02();break; case 0x03:prefix##_##03();break; \ - case 0x04:prefix##_##04();break; case 0x05:prefix##_##05();break; case 0x06:prefix##_##06();break; case 0x07:prefix##_##07();break; \ - case 0x08:prefix##_##08();break; case 0x09:prefix##_##09();break; case 0x0a:prefix##_##0a();break; case 0x0b:prefix##_##0b();break; \ - case 0x0c:prefix##_##0c();break; case 0x0d:prefix##_##0d();break; case 0x0e:prefix##_##0e();break; case 0x0f:prefix##_##0f();break; \ - case 0x10:prefix##_##10();break; case 0x11:prefix##_##11();break; case 0x12:prefix##_##12();break; case 0x13:prefix##_##13();break; \ - case 0x14:prefix##_##14();break; case 0x15:prefix##_##15();break; case 0x16:prefix##_##16();break; case 0x17:prefix##_##17();break; \ - case 0x18:prefix##_##18();break; case 0x19:prefix##_##19();break; case 0x1a:prefix##_##1a();break; case 0x1b:prefix##_##1b();break; \ - case 0x1c:prefix##_##1c();break; case 0x1d:prefix##_##1d();break; case 0x1e:prefix##_##1e();break; case 0x1f:prefix##_##1f();break; \ - case 0x20:prefix##_##20();break; case 0x21:prefix##_##21();break; case 0x22:prefix##_##22();break; case 0x23:prefix##_##23();break; \ - case 0x24:prefix##_##24();break; case 0x25:prefix##_##25();break; case 0x26:prefix##_##26();break; case 0x27:prefix##_##27();break; \ - case 0x28:prefix##_##28();break; case 0x29:prefix##_##29();break; case 0x2a:prefix##_##2a();break; case 0x2b:prefix##_##2b();break; \ - case 0x2c:prefix##_##2c();break; case 0x2d:prefix##_##2d();break; case 0x2e:prefix##_##2e();break; case 0x2f:prefix##_##2f();break; \ - case 0x30:prefix##_##30();break; case 0x31:prefix##_##31();break; case 0x32:prefix##_##32();break; case 0x33:prefix##_##33();break; \ - case 0x34:prefix##_##34();break; case 0x35:prefix##_##35();break; case 0x36:prefix##_##36();break; case 0x37:prefix##_##37();break; \ - case 0x38:prefix##_##38();break; case 0x39:prefix##_##39();break; case 0x3a:prefix##_##3a();break; case 0x3b:prefix##_##3b();break; \ - case 0x3c:prefix##_##3c();break; case 0x3d:prefix##_##3d();break; case 0x3e:prefix##_##3e();break; case 0x3f:prefix##_##3f();break; \ - case 0x40:prefix##_##40();break; case 0x41:prefix##_##41();break; case 0x42:prefix##_##42();break; case 0x43:prefix##_##43();break; \ - case 0x44:prefix##_##44();break; case 0x45:prefix##_##45();break; case 0x46:prefix##_##46();break; case 0x47:prefix##_##47();break; \ - case 0x48:prefix##_##48();break; case 0x49:prefix##_##49();break; case 0x4a:prefix##_##4a();break; case 0x4b:prefix##_##4b();break; \ - case 0x4c:prefix##_##4c();break; case 0x4d:prefix##_##4d();break; case 0x4e:prefix##_##4e();break; case 0x4f:prefix##_##4f();break; \ - case 0x50:prefix##_##50();break; case 0x51:prefix##_##51();break; case 0x52:prefix##_##52();break; case 0x53:prefix##_##53();break; \ - case 0x54:prefix##_##54();break; case 0x55:prefix##_##55();break; case 0x56:prefix##_##56();break; case 0x57:prefix##_##57();break; \ - case 0x58:prefix##_##58();break; case 0x59:prefix##_##59();break; case 0x5a:prefix##_##5a();break; case 0x5b:prefix##_##5b();break; \ - case 0x5c:prefix##_##5c();break; case 0x5d:prefix##_##5d();break; case 0x5e:prefix##_##5e();break; case 0x5f:prefix##_##5f();break; \ - case 0x60:prefix##_##60();break; case 0x61:prefix##_##61();break; case 0x62:prefix##_##62();break; case 0x63:prefix##_##63();break; \ - case 0x64:prefix##_##64();break; case 0x65:prefix##_##65();break; case 0x66:prefix##_##66();break; case 0x67:prefix##_##67();break; \ - case 0x68:prefix##_##68();break; case 0x69:prefix##_##69();break; case 0x6a:prefix##_##6a();break; case 0x6b:prefix##_##6b();break; \ - case 0x6c:prefix##_##6c();break; case 0x6d:prefix##_##6d();break; case 0x6e:prefix##_##6e();break; case 0x6f:prefix##_##6f();break; \ - case 0x70:prefix##_##70();break; case 0x71:prefix##_##71();break; case 0x72:prefix##_##72();break; case 0x73:prefix##_##73();break; \ - case 0x74:prefix##_##74();break; case 0x75:prefix##_##75();break; case 0x76:prefix##_##76();break; case 0x77:prefix##_##77();break; \ - case 0x78:prefix##_##78();break; case 0x79:prefix##_##79();break; case 0x7a:prefix##_##7a();break; case 0x7b:prefix##_##7b();break; \ - case 0x7c:prefix##_##7c();break; case 0x7d:prefix##_##7d();break; case 0x7e:prefix##_##7e();break; case 0x7f:prefix##_##7f();break; \ - case 0x80:prefix##_##80();break; case 0x81:prefix##_##81();break; case 0x82:prefix##_##82();break; case 0x83:prefix##_##83();break; \ - case 0x84:prefix##_##84();break; case 0x85:prefix##_##85();break; case 0x86:prefix##_##86();break; case 0x87:prefix##_##87();break; \ - case 0x88:prefix##_##88();break; case 0x89:prefix##_##89();break; case 0x8a:prefix##_##8a();break; case 0x8b:prefix##_##8b();break; \ - case 0x8c:prefix##_##8c();break; case 0x8d:prefix##_##8d();break; case 0x8e:prefix##_##8e();break; case 0x8f:prefix##_##8f();break; \ - case 0x90:prefix##_##90();break; case 0x91:prefix##_##91();break; case 0x92:prefix##_##92();break; case 0x93:prefix##_##93();break; \ - case 0x94:prefix##_##94();break; case 0x95:prefix##_##95();break; case 0x96:prefix##_##96();break; case 0x97:prefix##_##97();break; \ - case 0x98:prefix##_##98();break; case 0x99:prefix##_##99();break; case 0x9a:prefix##_##9a();break; case 0x9b:prefix##_##9b();break; \ - case 0x9c:prefix##_##9c();break; case 0x9d:prefix##_##9d();break; case 0x9e:prefix##_##9e();break; case 0x9f:prefix##_##9f();break; \ - case 0xa0:prefix##_##a0();break; case 0xa1:prefix##_##a1();break; case 0xa2:prefix##_##a2();break; case 0xa3:prefix##_##a3();break; \ - case 0xa4:prefix##_##a4();break; case 0xa5:prefix##_##a5();break; case 0xa6:prefix##_##a6();break; case 0xa7:prefix##_##a7();break; \ - case 0xa8:prefix##_##a8();break; case 0xa9:prefix##_##a9();break; case 0xaa:prefix##_##aa();break; case 0xab:prefix##_##ab();break; \ - case 0xac:prefix##_##ac();break; case 0xad:prefix##_##ad();break; case 0xae:prefix##_##ae();break; case 0xaf:prefix##_##af();break; \ - case 0xb0:prefix##_##b0();break; case 0xb1:prefix##_##b1();break; case 0xb2:prefix##_##b2();break; case 0xb3:prefix##_##b3();break; \ - case 0xb4:prefix##_##b4();break; case 0xb5:prefix##_##b5();break; case 0xb6:prefix##_##b6();break; case 0xb7:prefix##_##b7();break; \ - case 0xb8:prefix##_##b8();break; case 0xb9:prefix##_##b9();break; case 0xba:prefix##_##ba();break; case 0xbb:prefix##_##bb();break; \ - case 0xbc:prefix##_##bc();break; case 0xbd:prefix##_##bd();break; case 0xbe:prefix##_##be();break; case 0xbf:prefix##_##bf();break; \ - case 0xc0:prefix##_##c0();break; case 0xc1:prefix##_##c1();break; case 0xc2:prefix##_##c2();break; case 0xc3:prefix##_##c3();break; \ - case 0xc4:prefix##_##c4();break; case 0xc5:prefix##_##c5();break; case 0xc6:prefix##_##c6();break; case 0xc7:prefix##_##c7();break; \ - case 0xc8:prefix##_##c8();break; case 0xc9:prefix##_##c9();break; case 0xca:prefix##_##ca();break; case 0xcb:prefix##_##cb();break; \ - case 0xcc:prefix##_##cc();break; case 0xcd:prefix##_##cd();break; case 0xce:prefix##_##ce();break; case 0xcf:prefix##_##cf();break; \ - case 0xd0:prefix##_##d0();break; case 0xd1:prefix##_##d1();break; case 0xd2:prefix##_##d2();break; case 0xd3:prefix##_##d3();break; \ - case 0xd4:prefix##_##d4();break; case 0xd5:prefix##_##d5();break; case 0xd6:prefix##_##d6();break; case 0xd7:prefix##_##d7();break; \ - case 0xd8:prefix##_##d8();break; case 0xd9:prefix##_##d9();break; case 0xda:prefix##_##da();break; case 0xdb:prefix##_##db();break; \ - case 0xdc:prefix##_##dc();break; case 0xdd:prefix##_##dd();break; case 0xde:prefix##_##de();break; case 0xdf:prefix##_##df();break; \ - case 0xe0:prefix##_##e0();break; case 0xe1:prefix##_##e1();break; case 0xe2:prefix##_##e2();break; case 0xe3:prefix##_##e3();break; \ - case 0xe4:prefix##_##e4();break; case 0xe5:prefix##_##e5();break; case 0xe6:prefix##_##e6();break; case 0xe7:prefix##_##e7();break; \ - case 0xe8:prefix##_##e8();break; case 0xe9:prefix##_##e9();break; case 0xea:prefix##_##ea();break; case 0xeb:prefix##_##eb();break; \ - case 0xec:prefix##_##ec();break; case 0xed:prefix##_##ed();break; case 0xee:prefix##_##ee();break; case 0xef:prefix##_##ef();break; \ - case 0xf0:prefix##_##f0();break; case 0xf1:prefix##_##f1();break; case 0xf2:prefix##_##f2();break; case 0xf3:prefix##_##f3();break; \ - case 0xf4:prefix##_##f4();break; case 0xf5:prefix##_##f5();break; case 0xf6:prefix##_##f6();break; case 0xf7:prefix##_##f7();break; \ - case 0xf8:prefix##_##f8();break; case 0xf9:prefix##_##f9();break; case 0xfa:prefix##_##fa();break; case 0xfb:prefix##_##fb();break; \ - case 0xfc:prefix##_##fc();break; case 0xfd:prefix##_##fd();break; case 0xfe:prefix##_##fe();break; case 0xff:prefix##_##ff();break; \ - } \ -} while (0) - /*************************************************************** * Enter halt state; write 1 to callback on first execution ***************************************************************/ -inline void z80_device::halt() +void z80_device::halt() { if (!m_halt) { @@ -299,7 +231,7 @@ inline void z80_device::halt() /*************************************************************** * Leave halt state; write 0 to callback ***************************************************************/ -inline void z80_device::leave_halt() +void z80_device::leave_halt() { if (m_halt) { @@ -308,91 +240,20 @@ inline void z80_device::leave_halt() } } -/*************************************************************** - * Input a byte from given I/O port - ***************************************************************/ -inline u8 z80_device::in(u16 port) -{ - u8 res = m_io.read_byte(port); - T(m_iorq_cycles); - return res; -} - -/*************************************************************** - * Output a byte to given I/O port - ***************************************************************/ -inline void z80_device::out(u16 port, u8 value) -{ - m_io.write_byte(port, value); - T(m_iorq_cycles); -} - /*************************************************************** * Read a byte from given memory location ***************************************************************/ -inline u8 z80_device::data_read(u16 addr) -{ - return m_data.read_byte(translate_memory_address(addr)); -} - -u8 z80_device::rm(u16 addr) +u8 z80_device::data_read(u16 addr) { - u8 res = data_read(addr); - T(m_memrq_cycles); - return res; -} - -u8 z80_device::rm_reg(u16 addr) -{ - u8 res = rm(addr); - nomreq_addr(addr, 1); - return res; -} - -/*************************************************************** - * Read a word from given memory location - ***************************************************************/ -inline void z80_device::rm16(u16 addr, PAIR &r) -{ - r.b.l = data_read(addr); - T(m_memrq_cycles); - r.b.h = data_read(addr + 1); - T(m_memrq_cycles); + return m_data.read_interruptible(translate_memory_address(addr)); } /*************************************************************** * Write a byte to given memory location ***************************************************************/ -inline void z80_device::data_write(u16 addr, u8 value) -{ - m_data.write_byte(translate_memory_address((u32)addr), value); -} - -inline void z80_device::wm(u16 addr, u8 value) -{ - data_write(addr, value); - T(m_memrq_cycles); -} - -/*************************************************************** - * Write a word to given memory location - ***************************************************************/ -inline void z80_device::wm16(u16 addr, PAIR &r) -{ - wm(addr, r.b.l); - wm(addr + 1, r.b.h); -} - -/*************************************************************** - * Write a word to (SP) - * in: TDAT - ***************************************************************/ -inline void z80_device::wm16_sp(PAIR &r) +void z80_device::data_write(u16 addr, u8 value) { - SP--; - wm(SPD, r.b.h); - SP--; - wm(SPD, r.b.l); + m_data.write_interruptible(translate_memory_address((u32)addr), value); } /*************************************************************** @@ -400,25 +261,11 @@ inline void z80_device::wm16_sp(PAIR &r) * reading opcodes. In case of system with memory mapped I/O, * this function can be used to greatly speed up emulation ***************************************************************/ -inline u8 z80_device::opcode_read() +u8 z80_device::opcode_read() { return m_opcodes.read_byte(translate_memory_address(PCD)); } -u8 z80_device::rop() -{ - u8 res = opcode_read(); - T(m_m1_cycles - 2); - m_refresh_cb((m_i << 8) | (m_r2 & 0x80) | (m_r & 0x7f), 0x00, 0xff); - T(2); - PC++; - m_r++; - Q = m_qtemp; - m_qtemp = YF | XF; - - return res; -} - /**************************************************************** * arg() is identical to rop() except it is used * for reading opcode arguments. This difference can be used to @@ -426,251 +273,33 @@ u8 z80_device::rop() * opcodes and opcode arguments * out: TDAT8 ***************************************************************/ -inline u8 z80_device::arg_read() +u8 z80_device::arg_read() { return m_args.read_byte(translate_memory_address(PCD)); } -u8 z80_device::arg() -{ - u8 res = arg_read(); - T(m_memrq_cycles); - PC++; - - return res; -} - -u16 z80_device::arg16() -{ - u8 const res = arg(); - - return (u16(arg()) << 8) | res; -} - -/*************************************************************** - * Calculate the effective address EA of an opcode using - * IX+offset resp. IY+offset addressing. - ***************************************************************/ -inline void z80_device::eax() -{ - m_ea = (u32)(u16)(IX + (s8)arg()); - WZ = m_ea; -} - -inline void z80_device::eay() -{ - m_ea = (u32)(u16)(IY + (s8)arg()); - WZ = m_ea; -} - -/*************************************************************** - * POP - ***************************************************************/ -inline void z80_device::pop(PAIR &r) -{ - rm16(SPD, r); - SP += 2; -} - -/*************************************************************** - * PUSH - ***************************************************************/ -inline void z80_device::push(PAIR &r) -{ - nomreq_ir(1); - wm16_sp(r); -} - -/*************************************************************** - * JP - ***************************************************************/ -inline void z80_device::jp(void) -{ - PCD = arg16(); - WZ = PCD; -} - -/*************************************************************** - * JP_COND - ***************************************************************/ -inline void z80_device::jp_cond(bool cond) -{ - if (cond) - { - PCD = arg16(); - WZ = PCD; - } - else - WZ = arg16(); // implicit do PC += 2 -} - -/*************************************************************** - * JR - ***************************************************************/ -inline void z80_device::jr() -{ - s8 a = (s8)arg(); // arg() also increments PC - nomreq_addr(PCD - 1, 5); - PC += a; // so don't do PC += arg() - WZ = PC; -} - -/*************************************************************** - * JR_COND - ***************************************************************/ -inline void z80_device::jr_cond(bool cond, u8 opcode) -{ - if (cond) - { - jr(); - } - else - { - arg(); - // nomreq_addr(PCD, 3); - // PC++; - } -} - -/*************************************************************** - * CALL - ***************************************************************/ -inline void z80_device::call() -{ - m_ea = arg16(); - nomreq_addr(PCD - 1, 1); - WZ = m_ea; - wm16_sp(m_pc); - PCD = m_ea; -} - -/*************************************************************** - * CALL_COND - ***************************************************************/ -inline void z80_device::call_cond(bool cond, u8 opcode) -{ - if (cond) - { - m_ea = arg16(); - nomreq_addr(PCD - 1, 1); - WZ = m_ea; - wm16_sp(m_pc); - PCD = m_ea; - } - else - WZ = arg16(); // implicit call PC+=2; -} - -/*************************************************************** - * RET_COND - ***************************************************************/ -inline void z80_device::ret_cond(bool cond, u8 opcode) -{ - nomreq_ir(1); - if (cond) - { - pop(m_pc); - WZ = PC; - } -} - -/*************************************************************** - * RETN - ***************************************************************/ -inline void z80_device::retn() -{ - LOGINT("RETN m_iff1:%d m_iff2:%d\n", m_iff1, m_iff2); - pop(m_pc); - WZ = PC; - m_iff1 = m_iff2; -} - -/*************************************************************** - * RETI - ***************************************************************/ -inline void z80_device::reti() -{ - pop(m_pc); - WZ = PC; - m_iff1 = m_iff2; - daisy_call_reti_device(); -} - -/*************************************************************** - * LD R,A - ***************************************************************/ -inline void z80_device::ld_r_a() -{ - nomreq_ir(1); - m_r = A; - m_r2 = A & 0x80; // keep bit 7 of r -} - -/*************************************************************** - * LD A,R - ***************************************************************/ -inline void z80_device::ld_a_r() -{ - nomreq_ir(1); - A = (m_r & 0x7f) | m_r2; - set_f((F & CF) | SZ[A] | (m_iff2 << 2)); - m_after_ldair = true; -} - -/*************************************************************** - * LD I,A - ***************************************************************/ -inline void z80_device::ld_i_a() -{ - nomreq_ir(1); - m_i = A; -} - -/*************************************************************** - * LD A,I - ***************************************************************/ -inline void z80_device::ld_a_i() -{ - nomreq_ir(1); - A = m_i; - set_f((F & CF) | SZ[A] | (m_iff2 << 2)); - m_after_ldair = true; -} - -/*************************************************************** - * RST - ***************************************************************/ -inline void z80_device::rst(u16 addr) -{ - push(m_pc); - PCD = addr; - WZ = PC; -} - /*************************************************************** * INC r8 ***************************************************************/ -inline u8 z80_device::inc(u8 value) +void z80_device::inc(u8 &r) { - u8 res = value + 1; - set_f((F & CF) | SZHV_inc[res]); - return (u8)res; + ++r; + set_f((F & CF) | SZHV_inc[r]); } /*************************************************************** * DEC r8 ***************************************************************/ -inline u8 z80_device::dec(u8 value) +void z80_device::dec(u8 &r) { - u8 res = value - 1; - set_f((F & CF) | SZHV_dec[res]); - return res; + --r; + set_f((F & CF) | SZHV_dec[r]); } /*************************************************************** * RLCA ***************************************************************/ -inline void z80_device::rlca() +void z80_device::rlca() { A = (A << 1) | (A >> 7); set_f((F & (SF | ZF | PF)) | (A & (YF | XF | CF))); @@ -679,7 +308,7 @@ inline void z80_device::rlca() /*************************************************************** * RRCA ***************************************************************/ -inline void z80_device::rrca() +void z80_device::rrca() { set_f((F & (SF | ZF | PF)) | (A & CF)); A = (A >> 1) | (A << 7); @@ -689,7 +318,7 @@ inline void z80_device::rrca() /*************************************************************** * RLA ***************************************************************/ -inline void z80_device::rla() +void z80_device::rla() { u8 res = (A << 1) | (F & CF); u8 c = (A & 0x80) ? CF : 0; @@ -700,7 +329,7 @@ inline void z80_device::rla() /*************************************************************** * RRA ***************************************************************/ -inline void z80_device::rra() +void z80_device::rra() { u8 res = (A >> 1) | (F << 7); u8 c = (A & 0x01) ? CF : 0; @@ -708,36 +337,10 @@ inline void z80_device::rra() A = res; } -/*************************************************************** - * RRD - ***************************************************************/ -inline void z80_device::rrd() -{ - u8 n = rm(HL); - WZ = HL + 1; - nomreq_addr(HL, 4); - wm(HL, (n >> 4) | (A << 4)); - A = (A & 0xf0) | (n & 0x0f); - set_f((F & CF) | SZP[A]); -} - -/*************************************************************** - * RLD - ***************************************************************/ -inline void z80_device::rld() -{ - u8 n = rm(HL); - WZ = HL + 1; - nomreq_addr(HL, 4); - wm(HL, (n << 4) | (A & 0x0f)); - A = (A & 0xf0) | (n >> 4); - set_f((F & CF) | SZP[A]); -} - /*************************************************************** * ADD A,n ***************************************************************/ -inline void z80_device::add_a(u8 value) +void z80_device::add_a(u8 value) { u32 ah = AFD & 0xff00; u32 res = (u8)((ah >> 8) + value); @@ -748,7 +351,7 @@ inline void z80_device::add_a(u8 value) /*************************************************************** * ADC A,n ***************************************************************/ -inline void z80_device::adc_a(u8 value) +void z80_device::adc_a(u8 value) { u32 ah = AFD & 0xff00, c = AFD & 1; u32 res = (u8)((ah >> 8) + value + c); @@ -759,7 +362,7 @@ inline void z80_device::adc_a(u8 value) /*************************************************************** * SUB n ***************************************************************/ -inline void z80_device::sub(u8 value) +void z80_device::sub(u8 value) { u32 ah = AFD & 0xff00; u32 res = (u8)((ah >> 8) - value); @@ -770,7 +373,7 @@ inline void z80_device::sub(u8 value) /*************************************************************** * SBC A,n ***************************************************************/ -inline void z80_device::sbc_a(u8 value) +void z80_device::sbc_a(u8 value) { u32 ah = AFD & 0xff00, c = AFD & 1; u32 res = (u8)((ah >> 8) - value - c); @@ -781,7 +384,7 @@ inline void z80_device::sbc_a(u8 value) /*************************************************************** * NEG ***************************************************************/ -inline void z80_device::neg() +void z80_device::neg() { u8 value = A; A = 0; @@ -791,32 +394,28 @@ inline void z80_device::neg() /*************************************************************** * DAA ***************************************************************/ -inline void z80_device::daa() +void z80_device::daa() { u8 a = A; if (F & NF) { - if ((F & HF) | ((A & 0xf) > 9)) - a -= 6; - if ((F & CF) | (A > 0x99)) - a -= 0x60; + if ((F&HF) | ((A&0xf)>9)) a-=6; + if ((F&CF) | (A>0x99)) a-=0x60; } else { - if ((F & HF) | ((A & 0xf) > 9)) - a += 6; - if ((F & CF) | (A > 0x99)) - a += 0x60; + if ((F&HF) | ((A&0xf)>9)) a+=6; + if ((F&CF) | (A>0x99)) a+=0x60; } - set_f((F & (CF | NF)) | (A > 0x99) | ((A ^ a) & HF) | SZP[a]); + set_f((F&(CF|NF)) | (A>0x99) | ((A^a)&HF) | SZP[a]); A = a; } /*************************************************************** * AND n ***************************************************************/ -inline void z80_device::and_a(u8 value) +void z80_device::and_a(u8 value) { A &= value; set_f(SZP[A] | HF); @@ -825,7 +424,7 @@ inline void z80_device::and_a(u8 value) /*************************************************************** * OR n ***************************************************************/ -inline void z80_device::or_a(u8 value) +void z80_device::or_a(u8 value) { A |= value; set_f(SZP[A]); @@ -834,7 +433,7 @@ inline void z80_device::or_a(u8 value) /*************************************************************** * XOR n ***************************************************************/ -inline void z80_device::xor_a(u8 value) +void z80_device::xor_a(u8 value) { A ^= value; set_f(SZP[A]); @@ -843,7 +442,7 @@ inline void z80_device::xor_a(u8 value) /*************************************************************** * CP n ***************************************************************/ -inline void z80_device::cp(u8 value) +void z80_device::cp(u8 value) { unsigned val = value; u32 ah = AFD & 0xff00; @@ -854,7 +453,7 @@ inline void z80_device::cp(u8 value) /*************************************************************** * EXX ***************************************************************/ -inline void z80_device::exx() +void z80_device::exx() { using std::swap; swap(m_bc, m_bc2); @@ -862,71 +461,10 @@ inline void z80_device::exx() swap(m_hl, m_hl2); } -/*************************************************************** - * EX (SP),r16 - * in: TDAT - ***************************************************************/ -inline void z80_device::ex_sp(PAIR &r) -{ - PAIR tmp = {{0, 0, 0, 0}}; - pop(tmp); - nomreq_addr(SPD - 1, 1); - wm16_sp(r); - nomreq_addr(SPD, 2); - r = tmp; - WZ = r.d; -} - -/*************************************************************** - * ADD16 - ***************************************************************/ -inline void z80_device::add16(PAIR &dr, PAIR &sr) -{ - nomreq_ir(7); - u32 res = dr.d + sr.d; - WZ = dr.d + 1; - set_f((F & (SF | ZF | VF)) | - (((dr.d ^ res ^ sr.d) >> 8) & HF) | - ((res >> 16) & CF) | ((res >> 8) & (YF | XF))); - dr.w.l = (u16)res; -} - -/*************************************************************** - * ADC HL,r16 - ***************************************************************/ -inline void z80_device::adc_hl(PAIR &r) -{ - nomreq_ir(7); - u32 res = HLD + r.d + (F & CF); - WZ = HL + 1; - set_f((((HLD ^ res ^ r.d) >> 8) & HF) | - ((res >> 16) & CF) | - ((res >> 8) & (SF | YF | XF)) | - ((res & 0xffff) ? 0 : ZF) | - (((r.d ^ HLD ^ 0x8000) & (r.d ^ res) & 0x8000) >> 13)); - HL = (u16)res; -} - -/*************************************************************** - * SBC HL,r16 - ***************************************************************/ -inline void z80_device::sbc_hl(PAIR &r) -{ - nomreq_ir(7); - u32 res = HLD - r.d - (F & CF); - WZ = HL + 1; - set_f((((HLD ^ res ^ r.d) >> 8) & HF) | NF | - ((res >> 16) & CF) | - ((res >> 8) & (SF | YF | XF)) | - ((res & 0xffff) ? 0 : ZF) | - (((r.d ^ HLD) & (HLD ^ res) & 0x8000) >> 13)); - HL = (u16)res; -} - /*************************************************************** * RLC r8 ***************************************************************/ -inline u8 z80_device::rlc(u8 value) +u8 z80_device::rlc(u8 value) { unsigned res = value; unsigned c = (res & 0x80) ? CF : 0; @@ -938,7 +476,7 @@ inline u8 z80_device::rlc(u8 value) /*************************************************************** * RRC r8 ***************************************************************/ -inline u8 z80_device::rrc(u8 value) +u8 z80_device::rrc(u8 value) { unsigned res = value; unsigned c = (res & 0x01) ? CF : 0; @@ -950,7 +488,7 @@ inline u8 z80_device::rrc(u8 value) /*************************************************************** * RL r8 ***************************************************************/ -inline u8 z80_device::rl(u8 value) +u8 z80_device::rl(u8 value) { unsigned res = value; unsigned c = (res & 0x80) ? CF : 0; @@ -962,7 +500,7 @@ inline u8 z80_device::rl(u8 value) /*************************************************************** * RR r8 ***************************************************************/ -inline u8 z80_device::rr(u8 value) +u8 z80_device::rr(u8 value) { unsigned res = value; unsigned c = (res & 0x01) ? CF : 0; @@ -974,7 +512,7 @@ inline u8 z80_device::rr(u8 value) /*************************************************************** * SLA r8 ***************************************************************/ -inline u8 z80_device::sla(u8 value) +u8 z80_device::sla(u8 value) { unsigned res = value; unsigned c = (res & 0x80) ? CF : 0; @@ -986,7 +524,7 @@ inline u8 z80_device::sla(u8 value) /*************************************************************** * SRA r8 ***************************************************************/ -inline u8 z80_device::sra(u8 value) +u8 z80_device::sra(u8 value) { unsigned res = value; unsigned c = (res & 0x01) ? CF : 0; @@ -998,7 +536,7 @@ inline u8 z80_device::sra(u8 value) /*************************************************************** * SLL r8 ***************************************************************/ -inline u8 z80_device::sll(u8 value) +u8 z80_device::sll(u8 value) { unsigned res = value; unsigned c = (res & 0x80) ? CF : 0; @@ -1010,7 +548,7 @@ inline u8 z80_device::sll(u8 value) /*************************************************************** * SRL r8 ***************************************************************/ -inline u8 z80_device::srl(u8 value) +u8 z80_device::srl(u8 value) { unsigned res = value; unsigned c = (res & 0x01) ? CF : 0; @@ -1022,7 +560,7 @@ inline u8 z80_device::srl(u8 value) /*************************************************************** * BIT bit,r8 ***************************************************************/ -inline void z80_device::bit(int bit, u8 value) +void z80_device::bit(int bit, u8 value) { set_f((F & CF) | HF | (SZ_BIT[value & (1 << bit)] & ~(YF | XF)) | (value & (YF | XF))); } @@ -1030,7 +568,7 @@ inline void z80_device::bit(int bit, u8 value) /*************************************************************** * BIT bit,(HL) ***************************************************************/ -inline void z80_device::bit_hl(int bit, u8 value) +void z80_device::bit_hl(int bit, u8 value) { set_f((F & CF) | HF | (SZ_BIT[value & (1 << bit)] & ~(YF | XF)) | (WZ_H & (YF | XF))); } @@ -1038,7 +576,7 @@ inline void z80_device::bit_hl(int bit, u8 value) /*************************************************************** * BIT bit,(IX/Y+o) ***************************************************************/ -inline void z80_device::bit_xy(int bit, u8 value) +void z80_device::bit_xy(int bit, u8 value) { set_f((F & CF) | HF | (SZ_BIT[value & (1 << bit)] & ~(YF | XF)) | ((m_ea >> 8) & (YF | XF))); } @@ -1046,7 +584,7 @@ inline void z80_device::bit_xy(int bit, u8 value) /*************************************************************** * RES bit,r8 ***************************************************************/ -inline u8 z80_device::res(int bit, u8 value) +u8 z80_device::res(int bit, u8 value) { return value & ~(1 << bit); } @@ -1054,2279 +592,62 @@ inline u8 z80_device::res(int bit, u8 value) /*************************************************************** * SET bit,r8 ***************************************************************/ -inline u8 z80_device::set(int bit, u8 value) +u8 z80_device::set(int bit, u8 value) { return value | (1 << bit); } -/*************************************************************** - * LDI - ***************************************************************/ -inline void z80_device::ldi() -{ - u8 io = rm(HL); - wm(DE, io); - nomreq_addr(DE, 2); - set_f(F & (SF | ZF | CF)); - if ((A + io) & 0x02) - F |= YF; // bit 1 -> flag 5 - if ((A + io) & 0x08) - F |= XF; // bit 3 -> flag 3 - HL++; - DE++; - BC--; - if (BC) - F |= VF; -} - -/*************************************************************** - * CPI - ***************************************************************/ -inline void z80_device::cpi() -{ - u8 val = rm(HL); - nomreq_addr(HL, 5); - u8 res = A - val; - WZ++; - HL++; - BC--; - set_f((F & CF) | (SZ[res] & ~(YF | XF)) | ((A ^ val ^ res) & HF) | NF); - if (F & HF) - res -= 1; - if (res & 0x02) - F |= YF; // bit 1 -> flag 5 - if (res & 0x08) - F |= XF; // bit 3 -> flag 3 - if (BC) - F |= VF; -} - -/*************************************************************** - * INI - ***************************************************************/ -inline u8 z80_device::ini() -{ - nomreq_ir(1); - const u8 io = in(BC); - WZ = BC + 1; - B--; - wm(HL, io); - HL++; - set_f(SZ[B]); - unsigned t = (unsigned)((C + 1) & 0xff) + (unsigned)io; - if (io & SF) - F |= NF; - if (t & 0x100) - F |= HF | CF; - F |= SZP[(u8)(t & 0x07) ^ B] & PF; - - return io; -} - -/*************************************************************** - * OUTI - ***************************************************************/ -inline u8 z80_device::outi() -{ - nomreq_ir(1); - const u8 io = rm(HL); - B--; - WZ = BC + 1; - out(BC, io); - HL++; - set_f(SZ[B]); - unsigned t = (unsigned)L + (unsigned)io; - if (io & SF) - F |= NF; - if (t & 0x100) - F |= HF | CF; - F |= SZP[(u8)(t & 0x07) ^ B] & PF; - - return io; -} - -/*************************************************************** - * LDD - ***************************************************************/ -inline void z80_device::ldd() -{ - const u8 io = rm(HL); - wm(DE, io); - nomreq_addr(DE, 2); - set_f(F & (SF | ZF | CF)); - if ((A + io) & 0x02) - F |= YF; // bit 1 -> flag 5 - if ((A + io) & 0x08) - F |= XF; // bit 3 -> flag 3 - HL--; - DE--; - BC--; - if (BC) - F |= VF; -} - -/*************************************************************** - * CPD - ***************************************************************/ -inline void z80_device::cpd() -{ - u8 val = rm(HL); - nomreq_addr(HL, 5); - u8 res = A - val; - WZ--; - HL--; - BC--; - set_f((F & CF) | (SZ[res] & ~(YF | XF)) | ((A ^ val ^ res) & HF) | NF); - if (F & HF) - res -= 1; - if (res & 0x02) - F |= YF; // bit 1 -> flag 5 - if (res & 0x08) - F |= XF; // bit 3 -> flag 3 - if (BC) - F |= VF; -} - -/*************************************************************** - * IND - ***************************************************************/ -inline u8 z80_device::ind() -{ - nomreq_ir(1); - const u8 io = in(BC); - WZ = BC - 1; - B--; - wm(HL, io); - HL--; - set_f(SZ[B]); - unsigned t = ((unsigned)(C - 1) & 0xff) + (unsigned)io; - if (io & SF) - F |= NF; - if (t & 0x100) - F |= HF | CF; - F |= SZP[(u8)(t & 0x07) ^ B] & PF; - - return io; -} - -/*************************************************************** - * OUTD - ***************************************************************/ -inline u8 z80_device::outd() -{ - nomreq_ir(1); - const u8 io = rm(HL); - B--; - WZ = BC - 1; - out(BC, io); - HL--; - set_f(SZ[B]); - unsigned t = (unsigned)L + (unsigned)io; - if (io & SF) - F |= NF; - if (t & 0x100) - F |= HF | CF; - F |= SZP[(u8)(t & 0x07) ^ B] & PF; - - return io; -} - -/*************************************************************** - * LDIR - ***************************************************************/ -inline void z80_device::ldir() -{ - ldi(); - if (BC != 0) - { - nomreq_addr(DE, 5); - PC -= 2; - WZ = PC + 1; - F &= ~(YF | XF); - F |= (PC >> 8) & (YF | XF); - } -} - -/*************************************************************** - * CPIR - ***************************************************************/ -inline void z80_device::cpir() -{ - cpi(); - if (BC != 0 && !(F & ZF)) - { - nomreq_addr(HL, 5); - PC -= 2; - WZ = PC + 1; - F &= ~(YF | XF); - F |= (PC >> 8) & (YF | XF); - } -} - -inline void z80_device::block_io_interrupted_flags(u8 data) +void z80_device::block_io_interrupted_flags() { F &= ~(YF | XF); F |= (PC >> 8) & (YF | XF); if (F & CF) { F &= ~HF; - if (data & 0x80) + if (TDAT8 & 0x80) { F ^= (SZP[(B - 1) & 0x07] ^ PF) & PF; - if ((B & 0x0f) == 0x00) - F |= HF; + if ((B & 0x0f) == 0x00) F |= HF; } else { F ^= (SZP[(B + 1) & 0x07] ^ PF) & PF; - if ((B & 0x0f) == 0x0f) - F |= HF; + if ((B & 0x0f) == 0x0f) F |= HF; } } else { - F ^= (SZP[B & 0x07] ^ PF) & PF; - } -} - -/*************************************************************** - * INIR - ***************************************************************/ -inline void z80_device::inir() -{ - const u8 data = ini(); - if (B != 0) - { - nomreq_addr(HL, 5); - PC -= 2; - WZ = PC + 1; - block_io_interrupted_flags(data); - } -} - -/*************************************************************** - * OTIR - ***************************************************************/ -inline void z80_device::otir() -{ - const u8 data = outi(); - if (B != 0) - { - nomreq_addr(BC, 5); - PC -= 2; - WZ = PC + 1; - block_io_interrupted_flags(data); - } -} - -/*************************************************************** - * LDDR - ***************************************************************/ -inline void z80_device::lddr() -{ - ldd(); - if (BC != 0) - { - nomreq_addr(DE, 5); - PC -= 2; - WZ = PC + 1; - F &= ~(YF | XF); - F |= (PC >> 8) & (YF | XF); - } -} - -/*************************************************************** - * CPDR - ***************************************************************/ -inline void z80_device::cpdr() -{ - cpd(); - if (BC != 0 && !(F & ZF)) - { - nomreq_addr(HL, 5); - PC -= 2; - WZ = PC + 1; - F &= ~(YF | XF); - F |= (PC >> 8) & (YF | XF); - } -} - -/*************************************************************** - * INDR - ***************************************************************/ -inline void z80_device::indr() -{ - const u8 data = ind(); - if (B != 0) - { - nomreq_addr(HL, 5); - PC -= 2; - WZ = PC + 1; - block_io_interrupted_flags(data); - } -} - -/*************************************************************** - * OTDR - ***************************************************************/ -inline void z80_device::otdr() -{ - const u8 data = outd(); - if (B != 0) - { - nomreq_addr(BC, 5); - PC -= 2; - WZ = PC + 1; - block_io_interrupted_flags(data); + F ^=(SZP[B & 0x07] ^ PF) & PF; } } /*************************************************************** * EI ***************************************************************/ -inline void z80_device::ei() +void z80_device::ei() { m_iff1 = m_iff2 = 1; m_after_ei = true; } -inline void z80_device::set_f(u8 f) +void z80_device::set_f(u8 f) { - m_qtemp = 0; + QT = 0; F = f; } -inline void z80_device::illegal_1() +void z80_device::illegal_1() { LOGUNDOC("ill. opcode $%02x $%02x ($%04x)\n", m_opcodes.read_byte(translate_memory_address((PCD - 1) & 0xffff)), m_opcodes.read_byte(translate_memory_address(PCD)), PCD - 1); } -inline void z80_device::illegal_2() +void z80_device::illegal_2() { LOGUNDOC("ill. opcode $ed $%02x\n", m_opcodes.read_byte(translate_memory_address((PCD - 1) & 0xffff))); } -/********************************************************** - * opcodes with CB prefix - * rotate, shift and bit operations - **********************************************************/ -OP(cb,00) { B = rlc(B); } /* RLC B */ -OP(cb,01) { C = rlc(C); } /* RLC C */ -OP(cb,02) { D = rlc(D); } /* RLC D */ -OP(cb,03) { E = rlc(E); } /* RLC E */ -OP(cb,04) { H = rlc(H); } /* RLC H */ -OP(cb,05) { L = rlc(L); } /* RLC L */ -OP(cb,06) { wm(HL, rlc(rm_reg(HL)));} /* RLC (HL) */ -OP(cb,07) { A = rlc(A); } /* RLC A */ - -OP(cb,08) { B = rrc(B); } /* RRC B */ -OP(cb,09) { C = rrc(C); } /* RRC C */ -OP(cb,0a) { D = rrc(D); } /* RRC D */ -OP(cb,0b) { E = rrc(E); } /* RRC E */ -OP(cb,0c) { H = rrc(H); } /* RRC H */ -OP(cb,0d) { L = rrc(L); } /* RRC L */ -OP(cb,0e) { wm(HL, rrc(rm_reg(HL)));} /* RRC (HL) */ -OP(cb,0f) { A = rrc(A); } /* RRC A */ - -OP(cb,10) { B = rl(B); } /* RL B */ -OP(cb,11) { C = rl(C); } /* RL C */ -OP(cb,12) { D = rl(D); } /* RL D */ -OP(cb,13) { E = rl(E); } /* RL E */ -OP(cb,14) { H = rl(H); } /* RL H */ -OP(cb,15) { L = rl(L); } /* RL L */ -OP(cb,16) { wm(HL, rl(rm_reg(HL))); } /* RL (HL) */ -OP(cb,17) { A = rl(A); } /* RL A */ - -OP(cb,18) { B = rr(B); } /* RR B */ -OP(cb,19) { C = rr(C); } /* RR C */ -OP(cb,1a) { D = rr(D); } /* RR D */ -OP(cb,1b) { E = rr(E); } /* RR E */ -OP(cb,1c) { H = rr(H); } /* RR H */ -OP(cb,1d) { L = rr(L); } /* RR L */ -OP(cb,1e) { wm(HL, rr(rm_reg(HL))); } /* RR (HL) */ -OP(cb,1f) { A = rr(A); } /* RR A */ - -OP(cb,20) { B = sla(B); } /* SLA B */ -OP(cb,21) { C = sla(C); } /* SLA C */ -OP(cb,22) { D = sla(D); } /* SLA D */ -OP(cb,23) { E = sla(E); } /* SLA E */ -OP(cb,24) { H = sla(H); } /* SLA H */ -OP(cb,25) { L = sla(L); } /* SLA L */ -OP(cb,26) { wm(HL, sla(rm_reg(HL)));} /* SLA (HL) */ -OP(cb,27) { A = sla(A); } /* SLA A */ - -OP(cb,28) { B = sra(B); } /* SRA B */ -OP(cb,29) { C = sra(C); } /* SRA C */ -OP(cb,2a) { D = sra(D); } /* SRA D */ -OP(cb,2b) { E = sra(E); } /* SRA E */ -OP(cb,2c) { H = sra(H); } /* SRA H */ -OP(cb,2d) { L = sra(L); } /* SRA L */ -OP(cb,2e) { wm(HL, sra(rm_reg(HL)));} /* SRA (HL) */ -OP(cb,2f) { A = sra(A); } /* SRA A */ - -OP(cb,30) { B = sll(B); } /* SLL B */ -OP(cb,31) { C = sll(C); } /* SLL C */ -OP(cb,32) { D = sll(D); } /* SLL D */ -OP(cb,33) { E = sll(E); } /* SLL E */ -OP(cb,34) { H = sll(H); } /* SLL H */ -OP(cb,35) { L = sll(L); } /* SLL L */ -OP(cb,36) { wm(HL, sll(rm_reg(HL)));} /* SLL (HL) */ -OP(cb,37) { A = sll(A); } /* SLL A */ - -OP(cb,38) { B = srl(B); } /* SRL B */ -OP(cb,39) { C = srl(C); } /* SRL C */ -OP(cb,3a) { D = srl(D); } /* SRL D */ -OP(cb,3b) { E = srl(E); } /* SRL E */ -OP(cb,3c) { H = srl(H); } /* SRL H */ -OP(cb,3d) { L = srl(L); } /* SRL L */ -OP(cb,3e) { wm(HL, srl(rm_reg(HL)));} /* SRL (HL) */ -OP(cb,3f) { A = srl(A); } /* SRL A */ - -OP(cb,40) { bit(0, B); } /* BIT 0,B */ -OP(cb,41) { bit(0, C); } /* BIT 0,C */ -OP(cb,42) { bit(0, D); } /* BIT 0,D */ -OP(cb,43) { bit(0, E); } /* BIT 0,E */ -OP(cb,44) { bit(0, H); } /* BIT 0,H */ -OP(cb,45) { bit(0, L); } /* BIT 0,L */ -OP(cb,46) { bit_hl(0, rm_reg(HL)); } /* BIT 0,(HL) */ -OP(cb,47) { bit(0, A); } /* BIT 0,A */ - -OP(cb,48) { bit(1, B); } /* BIT 1,B */ -OP(cb,49) { bit(1, C); } /* BIT 1,C */ -OP(cb,4a) { bit(1, D); } /* BIT 1,D */ -OP(cb,4b) { bit(1, E); } /* BIT 1,E */ -OP(cb,4c) { bit(1, H); } /* BIT 1,H */ -OP(cb,4d) { bit(1, L); } /* BIT 1,L */ -OP(cb,4e) { bit_hl(1, rm_reg(HL)); } /* BIT 1,(HL) */ -OP(cb,4f) { bit(1, A); } /* BIT 1,A */ - -OP(cb,50) { bit(2, B); } /* BIT 2,B */ -OP(cb,51) { bit(2, C); } /* BIT 2,C */ -OP(cb,52) { bit(2, D); } /* BIT 2,D */ -OP(cb,53) { bit(2, E); } /* BIT 2,E */ -OP(cb,54) { bit(2, H); } /* BIT 2,H */ -OP(cb,55) { bit(2, L); } /* BIT 2,L */ -OP(cb,56) { bit_hl(2, rm_reg(HL)); } /* BIT 2,(HL) */ -OP(cb,57) { bit(2, A); } /* BIT 2,A */ - -OP(cb,58) { bit(3, B); } /* BIT 3,B */ -OP(cb,59) { bit(3, C); } /* BIT 3,C */ -OP(cb,5a) { bit(3, D); } /* BIT 3,D */ -OP(cb,5b) { bit(3, E); } /* BIT 3,E */ -OP(cb,5c) { bit(3, H); } /* BIT 3,H */ -OP(cb,5d) { bit(3, L); } /* BIT 3,L */ -OP(cb,5e) { bit_hl(3, rm_reg(HL)); } /* BIT 3,(HL) */ -OP(cb,5f) { bit(3, A); } /* BIT 3,A */ - -OP(cb,60) { bit(4, B); } /* BIT 4,B */ -OP(cb,61) { bit(4, C); } /* BIT 4,C */ -OP(cb,62) { bit(4, D); } /* BIT 4,D */ -OP(cb,63) { bit(4, E); } /* BIT 4,E */ -OP(cb,64) { bit(4, H); } /* BIT 4,H */ -OP(cb,65) { bit(4, L); } /* BIT 4,L */ -OP(cb,66) { bit_hl(4, rm_reg(HL)); } /* BIT 4,(HL) */ -OP(cb,67) { bit(4, A); } /* BIT 4,A */ - -OP(cb,68) { bit(5, B); } /* BIT 5,B */ -OP(cb,69) { bit(5, C); } /* BIT 5,C */ -OP(cb,6a) { bit(5, D); } /* BIT 5,D */ -OP(cb,6b) { bit(5, E); } /* BIT 5,E */ -OP(cb,6c) { bit(5, H); } /* BIT 5,H */ -OP(cb,6d) { bit(5, L); } /* BIT 5,L */ -OP(cb,6e) { bit_hl(5, rm_reg(HL)); } /* BIT 5,(HL) */ -OP(cb,6f) { bit(5, A); } /* BIT 5,A */ - -OP(cb,70) { bit(6, B); } /* BIT 6,B */ -OP(cb,71) { bit(6, C); } /* BIT 6,C */ -OP(cb,72) { bit(6, D); } /* BIT 6,D */ -OP(cb,73) { bit(6, E); } /* BIT 6,E */ -OP(cb,74) { bit(6, H); } /* BIT 6,H */ -OP(cb,75) { bit(6, L); } /* BIT 6,L */ -OP(cb,76) { bit_hl(6, rm_reg(HL)); } /* BIT 6,(HL) */ -OP(cb,77) { bit(6, A); } /* BIT 6,A */ - -OP(cb,78) { bit(7, B); } /* BIT 7,B */ -OP(cb,79) { bit(7, C); } /* BIT 7,C */ -OP(cb,7a) { bit(7, D); } /* BIT 7,D */ -OP(cb,7b) { bit(7, E); } /* BIT 7,E */ -OP(cb,7c) { bit(7, H); } /* BIT 7,H */ -OP(cb,7d) { bit(7, L); } /* BIT 7,L */ -OP(cb,7e) { bit_hl(7, rm_reg(HL)); } /* BIT 7,(HL) */ -OP(cb,7f) { bit(7, A); } /* BIT 7,A */ - -OP(cb,80) { B = res(0, B); } /* RES 0,B */ -OP(cb,81) { C = res(0, C); } /* RES 0,C */ -OP(cb,82) { D = res(0, D); } /* RES 0,D */ -OP(cb,83) { E = res(0, E); } /* RES 0,E */ -OP(cb,84) { H = res(0, H); } /* RES 0,H */ -OP(cb,85) { L = res(0, L); } /* RES 0,L */ -OP(cb,86) { wm(HL, res(0, rm_reg(HL))); } /* RES 0,(HL) */ -OP(cb,87) { A = res(0, A); } /* RES 0,A */ - -OP(cb,88) { B = res(1, B); } /* RES 1,B */ -OP(cb,89) { C = res(1, C); } /* RES 1,C */ -OP(cb,8a) { D = res(1, D); } /* RES 1,D */ -OP(cb,8b) { E = res(1, E); } /* RES 1,E */ -OP(cb,8c) { H = res(1, H); } /* RES 1,H */ -OP(cb,8d) { L = res(1, L); } /* RES 1,L */ -OP(cb,8e) { wm(HL, res(1, rm_reg(HL))); } /* RES 1,(HL) */ -OP(cb,8f) { A = res(1, A); } /* RES 1,A */ - -OP(cb,90) { B = res(2, B); } /* RES 2,B */ -OP(cb,91) { C = res(2, C); } /* RES 2,C */ -OP(cb,92) { D = res(2, D); } /* RES 2,D */ -OP(cb,93) { E = res(2, E); } /* RES 2,E */ -OP(cb,94) { H = res(2, H); } /* RES 2,H */ -OP(cb,95) { L = res(2, L); } /* RES 2,L */ -OP(cb,96) { wm(HL, res(2, rm_reg(HL))); } /* RES 2,(HL) */ -OP(cb,97) { A = res(2, A); } /* RES 2,A */ - -OP(cb,98) { B = res(3, B); } /* RES 3,B */ -OP(cb,99) { C = res(3, C); } /* RES 3,C */ -OP(cb,9a) { D = res(3, D); } /* RES 3,D */ -OP(cb,9b) { E = res(3, E); } /* RES 3,E */ -OP(cb,9c) { H = res(3, H); } /* RES 3,H */ -OP(cb,9d) { L = res(3, L); } /* RES 3,L */ -OP(cb,9e) { wm(HL, res(3, rm_reg(HL))); } /* RES 3,(HL) */ -OP(cb,9f) { A = res(3, A); } /* RES 3,A */ - -OP(cb,a0) { B = res(4, B); } /* RES 4,B */ -OP(cb,a1) { C = res(4, C); } /* RES 4,C */ -OP(cb,a2) { D = res(4, D); } /* RES 4,D */ -OP(cb,a3) { E = res(4, E); } /* RES 4,E */ -OP(cb,a4) { H = res(4, H); } /* RES 4,H */ -OP(cb,a5) { L = res(4, L); } /* RES 4,L */ -OP(cb,a6) {wm(HL, res(4, rm_reg(HL))); } /* RES 4,(HL) */ -OP(cb,a7) { A = res(4, A); } /* RES 4,A */ - -OP(cb,a8) { B = res(5, B); } /* RES 5,B */ -OP(cb,a9) { C = res(5, C); } /* RES 5,C */ -OP(cb,aa) { D = res(5, D); } /* RES 5,D */ -OP(cb,ab) { E = res(5, E); } /* RES 5,E */ -OP(cb,ac) { H = res(5, H); } /* RES 5,H */ -OP(cb,ad) { L = res(5, L); } /* RES 5,L */ -OP(cb,ae) { wm(HL, res(5, rm_reg(HL))); } /* RES 5,(HL) */ -OP(cb,af) { A = res(5, A); } /* RES 5,A */ - -OP(cb,b0) { B = res(6, B); } /* RES 6,B */ -OP(cb,b1) { C = res(6, C); } /* RES 6,C */ -OP(cb,b2) { D = res(6, D); } /* RES 6,D */ -OP(cb,b3) { E = res(6, E); } /* RES 6,E */ -OP(cb,b4) { H = res(6, H); } /* RES 6,H */ -OP(cb,b5) { L = res(6, L); } /* RES 6,L */ -OP(cb,b6) { wm(HL, res(6, rm_reg(HL))); } /* RES 6,(HL) */ -OP(cb,b7) { A = res(6, A); } /* RES 6,A */ - -OP(cb,b8) { B = res(7, B); } /* RES 7,B */ -OP(cb,b9) { C = res(7, C); } /* RES 7,C */ -OP(cb,ba) { D = res(7, D); } /* RES 7,D */ -OP(cb,bb) { E = res(7, E); } /* RES 7,E */ -OP(cb,bc) { H = res(7, H); } /* RES 7,H */ -OP(cb,bd) { L = res(7, L); } /* RES 7,L */ -OP(cb,be) { wm(HL, res(7, rm_reg(HL))); } /* RES 7,(HL) */ -OP(cb,bf) { A = res(7, A); } /* RES 7,A */ - -OP(cb,c0) { B = set(0, B); } /* SET 0,B */ -OP(cb,c1) { C = set(0, C); } /* SET 0,C */ -OP(cb,c2) { D = set(0, D); } /* SET 0,D */ -OP(cb,c3) { E = set(0, E); } /* SET 0,E */ -OP(cb,c4) { H = set(0, H); } /* SET 0,H */ -OP(cb,c5) { L = set(0, L); } /* SET 0,L */ -OP(cb,c6) { wm(HL, set(0, rm_reg(HL))); } /* SET 0,(HL) */ -OP(cb,c7) { A = set(0, A); } /* SET 0,A */ - -OP(cb,c8) { B = set(1, B); } /* SET 1,B */ -OP(cb,c9) { C = set(1, C); } /* SET 1,C */ -OP(cb,ca) { D = set(1, D); } /* SET 1,D */ -OP(cb,cb) { E = set(1, E); } /* SET 1,E */ -OP(cb,cc) { H = set(1, H); } /* SET 1,H */ -OP(cb,cd) { L = set(1, L); } /* SET 1,L */ -OP(cb,ce) { wm(HL, set(1, rm_reg(HL))); } /* SET 1,(HL) */ -OP(cb,cf) { A = set(1, A); } /* SET 1,A */ - -OP(cb,d0) { B = set(2, B); } /* SET 2,B */ -OP(cb,d1) { C = set(2, C); } /* SET 2,C */ -OP(cb,d2) { D = set(2, D); } /* SET 2,D */ -OP(cb,d3) { E = set(2, E); } /* SET 2,E */ -OP(cb,d4) { H = set(2, H); } /* SET 2,H */ -OP(cb,d5) { L = set(2, L); } /* SET 2,L */ -OP(cb,d6) { wm(HL, set(2, rm_reg(HL))); } /* SET 2,(HL) */ -OP(cb,d7) { A = set(2, A); } /* SET 2,A */ - -OP(cb,d8) { B = set(3, B); } /* SET 3,B */ -OP(cb,d9) { C = set(3, C); } /* SET 3,C */ -OP(cb,da) { D = set(3, D); } /* SET 3,D */ -OP(cb,db) { E = set(3, E); } /* SET 3,E */ -OP(cb,dc) { H = set(3, H); } /* SET 3,H */ -OP(cb,dd) { L = set(3, L); } /* SET 3,L */ -OP(cb,de) { wm(HL, set(3, rm_reg(HL))); } /* SET 3,(HL) */ -OP(cb,df) { A = set(3, A); } /* SET 3,A */ - -OP(cb,e0) { B = set(4, B); } /* SET 4,B */ -OP(cb,e1) { C = set(4, C); } /* SET 4,C */ -OP(cb,e2) { D = set(4, D); } /* SET 4,D */ -OP(cb,e3) { E = set(4, E); } /* SET 4,E */ -OP(cb,e4) { H = set(4, H); } /* SET 4,H */ -OP(cb,e5) { L = set(4, L); } /* SET 4,L */ -OP(cb,e6) { wm(HL, set(4, rm_reg(HL))); } /* SET 4,(HL) */ -OP(cb,e7) { A = set(4, A); } /* SET 4,A */ - -OP(cb,e8) { B = set(5, B); } /* SET 5,B */ -OP(cb,e9) { C = set(5, C); } /* SET 5,C */ -OP(cb,ea) { D = set(5, D); } /* SET 5,D */ -OP(cb,eb) { E = set(5, E); } /* SET 5,E */ -OP(cb,ec) { H = set(5, H); } /* SET 5,H */ -OP(cb,ed) { L = set(5, L); } /* SET 5,L */ -OP(cb,ee) { wm(HL, set(5, rm_reg(HL))); } /* SET 5,(HL) */ -OP(cb,ef) { A = set(5, A); } /* SET 5,A */ - -OP(cb,f0) { B = set(6, B); } /* SET 6,B */ -OP(cb,f1) { C = set(6, C); } /* SET 6,C */ -OP(cb,f2) { D = set(6, D); } /* SET 6,D */ -OP(cb,f3) { E = set(6, E); } /* SET 6,E */ -OP(cb,f4) { H = set(6, H); } /* SET 6,H */ -OP(cb,f5) { L = set(6, L); } /* SET 6,L */ -OP(cb,f6) { wm(HL, set(6, rm_reg(HL))); } /* SET 6,(HL) */ -OP(cb,f7) { A = set(6, A); } /* SET 6,A */ - -OP(cb,f8) { B = set(7, B); } /* SET 7,B */ -OP(cb,f9) { C = set(7, C); } /* SET 7,C */ -OP(cb,fa) { D = set(7, D); } /* SET 7,D */ -OP(cb,fb) { E = set(7, E); } /* SET 7,E */ -OP(cb,fc) { H = set(7, H); } /* SET 7,H */ -OP(cb,fd) { L = set(7, L); } /* SET 7,L */ -OP(cb,fe) { wm(HL, set(7, rm_reg(HL))); } /* SET 7,(HL) */ -OP(cb,ff) { A = set(7, A); } /* SET 7,A */ - - -/********************************************************** -* opcodes with DD/FD CB prefix -* rotate, shift and bit operations with (IX+o) -**********************************************************/ -OP(xycb,00) { B = rlc(rm_reg(m_ea)); wm(m_ea, B); } /* RLC B=(XY+o) */ -OP(xycb,01) { C = rlc(rm_reg(m_ea)); wm(m_ea, C); } /* RLC C=(XY+o) */ -OP(xycb,02) { D = rlc(rm_reg(m_ea)); wm(m_ea, D); } /* RLC D=(XY+o) */ -OP(xycb,03) { E = rlc(rm_reg(m_ea)); wm(m_ea, E); } /* RLC E=(XY+o) */ -OP(xycb,04) { H = rlc(rm_reg(m_ea)); wm(m_ea, H); } /* RLC H=(XY+o) */ -OP(xycb,05) { L = rlc(rm_reg(m_ea)); wm(m_ea, L); } /* RLC L=(XY+o) */ -OP(xycb,06) { wm(m_ea, rlc(rm_reg(m_ea))); } /* RLC (XY+o) */ -OP(xycb,07) { A = rlc(rm_reg(m_ea)); wm(m_ea, A); } /* RLC A=(XY+o) */ - -OP(xycb,08) { B = rrc(rm_reg(m_ea)); wm(m_ea, B); } /* RRC B=(XY+o) */ -OP(xycb,09) { C = rrc(rm_reg(m_ea)); wm(m_ea, C); } /* RRC C=(XY+o) */ -OP(xycb,0a) { D = rrc(rm_reg(m_ea)); wm(m_ea, D); } /* RRC D=(XY+o) */ -OP(xycb,0b) { E = rrc(rm_reg(m_ea)); wm(m_ea, E); } /* RRC E=(XY+o) */ -OP(xycb,0c) { H = rrc(rm_reg(m_ea)); wm(m_ea, H); } /* RRC H=(XY+o) */ -OP(xycb,0d) { L = rrc(rm_reg(m_ea)); wm(m_ea, L); } /* RRC L=(XY+o) */ -OP(xycb,0e) { wm(m_ea,rrc(rm_reg(m_ea))); } /* RRC (XY+o) */ -OP(xycb,0f) { A = rrc(rm_reg(m_ea)); wm(m_ea, A); } /* RRC A=(XY+o) */ - -OP(xycb,10) { B = rl(rm_reg(m_ea)); wm(m_ea, B); } /* RL B=(XY+o) */ -OP(xycb,11) { C = rl(rm_reg(m_ea)); wm(m_ea, C); } /* RL C=(XY+o) */ -OP(xycb,12) { D = rl(rm_reg(m_ea)); wm(m_ea, D); } /* RL D=(XY+o) */ -OP(xycb,13) { E = rl(rm_reg(m_ea)); wm(m_ea, E); } /* RL E=(XY+o) */ -OP(xycb,14) { H = rl(rm_reg(m_ea)); wm(m_ea, H); } /* RL H=(XY+o) */ -OP(xycb,15) { L = rl(rm_reg(m_ea)); wm(m_ea, L); } /* RL L=(XY+o) */ -OP(xycb,16) { wm(m_ea,rl(rm_reg(m_ea))); } /* RL (XY+o) */ -OP(xycb,17) { A = rl(rm_reg(m_ea)); wm(m_ea, A); } /* RL A=(XY+o) */ - -OP(xycb,18) { B = rr(rm_reg(m_ea)); wm(m_ea, B); } /* RR B=(XY+o) */ -OP(xycb,19) { C = rr(rm_reg(m_ea)); wm(m_ea, C); } /* RR C=(XY+o) */ -OP(xycb,1a) { D = rr(rm_reg(m_ea)); wm(m_ea, D); } /* RR D=(XY+o) */ -OP(xycb,1b) { E = rr(rm_reg(m_ea)); wm(m_ea, E); } /* RR E=(XY+o) */ -OP(xycb,1c) { H = rr(rm_reg(m_ea)); wm(m_ea, H); } /* RR H=(XY+o) */ -OP(xycb,1d) { L = rr(rm_reg(m_ea)); wm(m_ea, L); } /* RR L=(XY+o) */ -OP(xycb,1e) { wm(m_ea, rr(rm_reg(m_ea))); } /* RR (XY+o) */ -OP(xycb,1f) { A = rr(rm_reg(m_ea)); wm(m_ea, A); } /* RR A=(XY+o) */ - -OP(xycb,20) { B = sla(rm_reg(m_ea)); wm(m_ea, B); } /* SLA B=(XY+o) */ -OP(xycb,21) { C = sla(rm_reg(m_ea)); wm(m_ea, C); } /* SLA C=(XY+o) */ -OP(xycb,22) { D = sla(rm_reg(m_ea)); wm(m_ea, D); } /* SLA D=(XY+o) */ -OP(xycb,23) { E = sla(rm_reg(m_ea)); wm(m_ea, E); } /* SLA E=(XY+o) */ -OP(xycb,24) { H = sla(rm_reg(m_ea)); wm(m_ea, H); } /* SLA H=(XY+o) */ -OP(xycb,25) { L = sla(rm_reg(m_ea)); wm(m_ea, L); } /* SLA L=(XY+o) */ -OP(xycb,26) { wm(m_ea, sla(rm_reg(m_ea))); } /* SLA (XY+o) */ -OP(xycb,27) { A = sla(rm_reg(m_ea)); wm(m_ea, A); } /* SLA A=(XY+o) */ - -OP(xycb,28) { B = sra(rm_reg(m_ea)); wm(m_ea, B); } /* SRA B=(XY+o) */ -OP(xycb,29) { C = sra(rm_reg(m_ea)); wm(m_ea, C); } /* SRA C=(XY+o) */ -OP(xycb,2a) { D = sra(rm_reg(m_ea)); wm(m_ea, D); } /* SRA D=(XY+o) */ -OP(xycb,2b) { E = sra(rm_reg(m_ea)); wm(m_ea, E); } /* SRA E=(XY+o) */ -OP(xycb,2c) { H = sra(rm_reg(m_ea)); wm(m_ea, H); } /* SRA H=(XY+o) */ -OP(xycb,2d) { L = sra(rm_reg(m_ea)); wm(m_ea, L); } /* SRA L=(XY+o) */ -OP(xycb,2e) { wm(m_ea, sra(rm_reg(m_ea))); } /* SRA (XY+o) */ -OP(xycb,2f) { A = sra(rm_reg(m_ea)); wm(m_ea, A); } /* SRA A=(XY+o) */ - -OP(xycb,30) { B = sll(rm_reg(m_ea)); wm(m_ea, B); } /* SLL B=(XY+o) */ -OP(xycb,31) { C = sll(rm_reg(m_ea)); wm(m_ea, C); } /* SLL C=(XY+o) */ -OP(xycb,32) { D = sll(rm_reg(m_ea)); wm(m_ea, D); } /* SLL D=(XY+o) */ -OP(xycb,33) { E = sll(rm_reg(m_ea)); wm(m_ea, E); } /* SLL E=(XY+o) */ -OP(xycb,34) { H = sll(rm_reg(m_ea)); wm(m_ea, H); } /* SLL H=(XY+o) */ -OP(xycb,35) { L = sll(rm_reg(m_ea)); wm(m_ea, L); } /* SLL L=(XY+o) */ -OP(xycb,36) { wm(m_ea, sll(rm_reg(m_ea))); } /* SLL (XY+o) */ -OP(xycb,37) { A = sll(rm_reg(m_ea)); wm(m_ea, A); } /* SLL A=(XY+o) */ - -OP(xycb,38) { B = srl(rm_reg(m_ea)); wm(m_ea, B); } /* SRL B=(XY+o) */ -OP(xycb,39) { C = srl(rm_reg(m_ea)); wm(m_ea, C); } /* SRL C=(XY+o) */ -OP(xycb,3a) { D = srl(rm_reg(m_ea)); wm(m_ea, D); } /* SRL D=(XY+o) */ -OP(xycb,3b) { E = srl(rm_reg(m_ea)); wm(m_ea, E); } /* SRL E=(XY+o) */ -OP(xycb,3c) { H = srl(rm_reg(m_ea)); wm(m_ea, H); } /* SRL H=(XY+o) */ -OP(xycb,3d) { L = srl(rm_reg(m_ea)); wm(m_ea, L); } /* SRL L=(XY+o) */ -OP(xycb,3e) { wm(m_ea, srl(rm_reg(m_ea))); } /* SRL (XY+o) */ -OP(xycb,3f) { A = srl(rm_reg(m_ea)); wm(m_ea, A); } /* SRL A=(XY+o) */ - -OP(xycb,40) { xycb_46(); } /* BIT 0,(XY+o) */ -OP(xycb,41) { xycb_46(); } /* BIT 0,(XY+o) */ -OP(xycb,42) { xycb_46(); } /* BIT 0,(XY+o) */ -OP(xycb,43) { xycb_46(); } /* BIT 0,(XY+o) */ -OP(xycb,44) { xycb_46(); } /* BIT 0,(XY+o) */ -OP(xycb,45) { xycb_46(); } /* BIT 0,(XY+o) */ -OP(xycb,46) { bit_xy(0, rm_reg(m_ea)); } /* BIT 0,(XY+o) */ -OP(xycb,47) { xycb_46(); } /* BIT 0,(XY+o) */ - -OP(xycb,48) { xycb_4e(); } /* BIT 1,(XY+o) */ -OP(xycb,49) { xycb_4e(); } /* BIT 1,(XY+o) */ -OP(xycb,4a) { xycb_4e(); } /* BIT 1,(XY+o) */ -OP(xycb,4b) { xycb_4e(); } /* BIT 1,(XY+o) */ -OP(xycb,4c) { xycb_4e(); } /* BIT 1,(XY+o) */ -OP(xycb,4d) { xycb_4e(); } /* BIT 1,(XY+o) */ -OP(xycb,4e) { bit_xy(1, rm_reg(m_ea)); } /* BIT 1,(XY+o) */ -OP(xycb,4f) { xycb_4e(); } /* BIT 1,(XY+o) */ - -OP(xycb,50) { xycb_56(); } /* BIT 2,(XY+o) */ -OP(xycb,51) { xycb_56(); } /* BIT 2,(XY+o) */ -OP(xycb,52) { xycb_56(); } /* BIT 2,(XY+o) */ -OP(xycb,53) { xycb_56(); } /* BIT 2,(XY+o) */ -OP(xycb,54) { xycb_56(); } /* BIT 2,(XY+o) */ -OP(xycb,55) { xycb_56(); } /* BIT 2,(XY+o) */ -OP(xycb,56) { bit_xy(2, rm_reg(m_ea)); } /* BIT 2,(XY+o) */ -OP(xycb,57) { xycb_56(); } /* BIT 2,(XY+o) */ - -OP(xycb,58) { xycb_5e(); } /* BIT 3,(XY+o) */ -OP(xycb,59) { xycb_5e(); } /* BIT 3,(XY+o) */ -OP(xycb,5a) { xycb_5e(); } /* BIT 3,(XY+o) */ -OP(xycb,5b) { xycb_5e(); } /* BIT 3,(XY+o) */ -OP(xycb,5c) { xycb_5e(); } /* BIT 3,(XY+o) */ -OP(xycb,5d) { xycb_5e(); } /* BIT 3,(XY+o) */ -OP(xycb,5e) { bit_xy(3, rm_reg(m_ea)); } /* BIT 3,(XY+o) */ -OP(xycb,5f) { xycb_5e(); } /* BIT 3,(XY+o) */ - -OP(xycb,60) { xycb_66(); } /* BIT 4,(XY+o) */ -OP(xycb,61) { xycb_66(); } /* BIT 4,(XY+o) */ -OP(xycb,62) { xycb_66(); } /* BIT 4,(XY+o) */ -OP(xycb,63) { xycb_66(); } /* BIT 4,(XY+o) */ -OP(xycb,64) { xycb_66(); } /* BIT 4,(XY+o) */ -OP(xycb,65) { xycb_66(); } /* BIT 4,(XY+o) */ -OP(xycb,66) { bit_xy(4, rm_reg(m_ea)); } /* BIT 4,(XY+o) */ -OP(xycb,67) { xycb_66(); } /* BIT 4,(XY+o) */ - -OP(xycb,68) { xycb_6e(); } /* BIT 5,(XY+o) */ -OP(xycb,69) { xycb_6e(); } /* BIT 5,(XY+o) */ -OP(xycb,6a) { xycb_6e(); } /* BIT 5,(XY+o) */ -OP(xycb,6b) { xycb_6e(); } /* BIT 5,(XY+o) */ -OP(xycb,6c) { xycb_6e(); } /* BIT 5,(XY+o) */ -OP(xycb,6d) { xycb_6e(); } /* BIT 5,(XY+o) */ -OP(xycb,6e) { bit_xy(5, rm_reg(m_ea)); } /* BIT 5,(XY+o) */ -OP(xycb,6f) { xycb_6e(); } /* BIT 5,(XY+o) */ - -OP(xycb,70) { xycb_76(); } /* BIT 6,(XY+o) */ -OP(xycb,71) { xycb_76(); } /* BIT 6,(XY+o) */ -OP(xycb,72) { xycb_76(); } /* BIT 6,(XY+o) */ -OP(xycb,73) { xycb_76(); } /* BIT 6,(XY+o) */ -OP(xycb,74) { xycb_76(); } /* BIT 6,(XY+o) */ -OP(xycb,75) { xycb_76(); } /* BIT 6,(XY+o) */ -OP(xycb,76) { bit_xy(6, rm_reg(m_ea)); } /* BIT 6,(XY+o) */ -OP(xycb,77) { xycb_76(); } /* BIT 6,(XY+o) */ - -OP(xycb,78) { xycb_7e(); } /* BIT 7,(XY+o) */ -OP(xycb,79) { xycb_7e(); } /* BIT 7,(XY+o) */ -OP(xycb,7a) { xycb_7e(); } /* BIT 7,(XY+o) */ -OP(xycb,7b) { xycb_7e(); } /* BIT 7,(XY+o) */ -OP(xycb,7c) { xycb_7e(); } /* BIT 7,(XY+o) */ -OP(xycb,7d) { xycb_7e(); } /* BIT 7,(XY+o) */ -OP(xycb,7e) { bit_xy(7, rm_reg(m_ea)); } /* BIT 7,(XY+o) */ -OP(xycb,7f) { xycb_7e(); } /* BIT 7,(XY+o) */ - -OP(xycb,80) { B = res(0, rm_reg(m_ea)); wm(m_ea, B); } /* RES 0,B=(XY+o) */ -OP(xycb,81) { C = res(0, rm_reg(m_ea)); wm(m_ea, C); } /* RES 0,C=(XY+o) */ -OP(xycb,82) { D = res(0, rm_reg(m_ea)); wm(m_ea, D); } /* RES 0,D=(XY+o) */ -OP(xycb,83) { E = res(0, rm_reg(m_ea)); wm(m_ea, E); } /* RES 0,E=(XY+o) */ -OP(xycb,84) { H = res(0, rm_reg(m_ea)); wm(m_ea, H); } /* RES 0,H=(XY+o) */ -OP(xycb,85) { L = res(0, rm_reg(m_ea)); wm(m_ea, L); } /* RES 0,L=(XY+o) */ -OP(xycb,86) { wm(m_ea, res(0, rm_reg(m_ea))); } /* RES 0,(XY+o) */ -OP(xycb,87) { A = res(0, rm_reg(m_ea)); wm(m_ea, A); } /* RES 0,A=(XY+o) */ - -OP(xycb,88) { B = res(1, rm_reg(m_ea)); wm(m_ea, B); } /* RES 1,B=(XY+o) */ -OP(xycb,89) { C = res(1, rm_reg(m_ea)); wm(m_ea, C); } /* RES 1,C=(XY+o) */ -OP(xycb,8a) { D = res(1, rm_reg(m_ea)); wm(m_ea, D); } /* RES 1,D=(XY+o) */ -OP(xycb,8b) { E = res(1, rm_reg(m_ea)); wm(m_ea, E); } /* RES 1,E=(XY+o) */ -OP(xycb,8c) { H = res(1, rm_reg(m_ea)); wm(m_ea, H); } /* RES 1,H=(XY+o) */ -OP(xycb,8d) { L = res(1, rm_reg(m_ea)); wm(m_ea, L); } /* RES 1,L=(XY+o) */ -OP(xycb,8e) { wm(m_ea, res(1, rm_reg(m_ea))); } /* RES 1,(XY+o) */ -OP(xycb,8f) { A = res(1, rm_reg(m_ea)); wm(m_ea, A); } /* RES 1,A=(XY+o) */ - -OP(xycb,90) { B = res(2, rm_reg(m_ea)); wm(m_ea, B); } /* RES 2,B=(XY+o) */ -OP(xycb,91) { C = res(2, rm_reg(m_ea)); wm(m_ea, C); } /* RES 2,C=(XY+o) */ -OP(xycb,92) { D = res(2, rm_reg(m_ea)); wm(m_ea, D); } /* RES 2,D=(XY+o) */ -OP(xycb,93) { E = res(2, rm_reg(m_ea)); wm(m_ea, E); } /* RES 2,E=(XY+o) */ -OP(xycb,94) { H = res(2, rm_reg(m_ea)); wm(m_ea, H); } /* RES 2,H=(XY+o) */ -OP(xycb,95) { L = res(2, rm_reg(m_ea)); wm(m_ea, L); } /* RES 2,L=(XY+o) */ -OP(xycb,96) { wm(m_ea, res(2, rm_reg(m_ea))); } /* RES 2,(XY+o) */ -OP(xycb,97) { A = res(2, rm_reg(m_ea)); wm(m_ea, A); } /* RES 2,A=(XY+o) */ - -OP(xycb,98) { B = res(3, rm_reg(m_ea)); wm(m_ea, B); } /* RES 3,B=(XY+o) */ -OP(xycb,99) { C = res(3, rm_reg(m_ea)); wm(m_ea, C); } /* RES 3,C=(XY+o) */ -OP(xycb,9a) { D = res(3, rm_reg(m_ea)); wm(m_ea, D); } /* RES 3,D=(XY+o) */ -OP(xycb,9b) { E = res(3, rm_reg(m_ea)); wm(m_ea, E); } /* RES 3,E=(XY+o) */ -OP(xycb,9c) { H = res(3, rm_reg(m_ea)); wm(m_ea, H); } /* RES 3,H=(XY+o) */ -OP(xycb,9d) { L = res(3, rm_reg(m_ea)); wm(m_ea, L); } /* RES 3,L=(XY+o) */ -OP(xycb,9e) { wm(m_ea, res(3, rm_reg(m_ea))); } /* RES 3,(XY+o) */ -OP(xycb,9f) { A = res(3, rm_reg(m_ea)); wm(m_ea, A); } /* RES 3,A=(XY+o) */ - -OP(xycb,a0) { B = res(4, rm_reg(m_ea)); wm(m_ea, B); } /* RES 4,B=(XY+o) */ -OP(xycb,a1) { C = res(4, rm_reg(m_ea)); wm(m_ea, C); } /* RES 4,C=(XY+o) */ -OP(xycb,a2) { D = res(4, rm_reg(m_ea)); wm(m_ea, D); } /* RES 4,D=(XY+o) */ -OP(xycb,a3) { E = res(4, rm_reg(m_ea)); wm(m_ea, E); } /* RES 4,E=(XY+o) */ -OP(xycb,a4) { H = res(4, rm_reg(m_ea)); wm(m_ea, H); } /* RES 4,H=(XY+o) */ -OP(xycb,a5) { L = res(4, rm_reg(m_ea)); wm(m_ea, L); } /* RES 4,L=(XY+o) */ -OP(xycb,a6) { wm(m_ea, res(4, rm_reg(m_ea))); } /* RES 4,(XY+o) */ -OP(xycb,a7) { A = res(4, rm_reg(m_ea)); wm(m_ea, A); } /* RES 4,A=(XY+o) */ - -OP(xycb,a8) { B = res(5, rm_reg(m_ea)); wm(m_ea, B); } /* RES 5,B=(XY+o) */ -OP(xycb,a9) { C = res(5, rm_reg(m_ea)); wm(m_ea, C); } /* RES 5,C=(XY+o) */ -OP(xycb,aa) { D = res(5, rm_reg(m_ea)); wm(m_ea, D); } /* RES 5,D=(XY+o) */ -OP(xycb,ab) { E = res(5, rm_reg(m_ea)); wm(m_ea, E); } /* RES 5,E=(XY+o) */ -OP(xycb,ac) { H = res(5, rm_reg(m_ea)); wm(m_ea, H); } /* RES 5,H=(XY+o) */ -OP(xycb,ad) { L = res(5, rm_reg(m_ea)); wm(m_ea, L); } /* RES 5,L=(XY+o) */ -OP(xycb,ae) { wm(m_ea, res(5, rm_reg(m_ea))); } /* RES 5,(XY+o) */ -OP(xycb,af) { A = res(5, rm_reg(m_ea)); wm(m_ea, A); } /* RES 5,A=(XY+o) */ - -OP(xycb,b0) { B = res(6, rm_reg(m_ea)); wm(m_ea, B); } /* RES 6,B=(XY+o) */ -OP(xycb,b1) { C = res(6, rm_reg(m_ea)); wm(m_ea, C); } /* RES 6,C=(XY+o) */ -OP(xycb,b2) { D = res(6, rm_reg(m_ea)); wm(m_ea, D); } /* RES 6,D=(XY+o) */ -OP(xycb,b3) { E = res(6, rm_reg(m_ea)); wm(m_ea, E); } /* RES 6,E=(XY+o) */ -OP(xycb,b4) { H = res(6, rm_reg(m_ea)); wm(m_ea, H); } /* RES 6,H=(XY+o) */ -OP(xycb,b5) { L = res(6, rm_reg(m_ea)); wm(m_ea, L); } /* RES 6,L=(XY+o) */ -OP(xycb,b6) { wm(m_ea, res(6, rm_reg(m_ea))); } /* RES 6,(XY+o) */ -OP(xycb,b7) { A = res(6, rm_reg(m_ea)); wm(m_ea, A); } /* RES 6,A=(XY+o) */ - -OP(xycb,b8) { B = res(7, rm_reg(m_ea)); wm(m_ea, B); } /* RES 7,B=(XY+o) */ -OP(xycb,b9) { C = res(7, rm_reg(m_ea)); wm(m_ea, C); } /* RES 7,C=(XY+o) */ -OP(xycb,ba) { D = res(7, rm_reg(m_ea)); wm(m_ea, D); } /* RES 7,D=(XY+o) */ -OP(xycb,bb) { E = res(7, rm_reg(m_ea)); wm(m_ea, E); } /* RES 7,E=(XY+o) */ -OP(xycb,bc) { H = res(7, rm_reg(m_ea)); wm(m_ea, H); } /* RES 7,H=(XY+o) */ -OP(xycb,bd) { L = res(7, rm_reg(m_ea)); wm(m_ea, L); } /* RES 7,L=(XY+o) */ -OP(xycb,be) { wm(m_ea, res(7, rm_reg(m_ea))); } /* RES 7,(XY+o) */ -OP(xycb,bf) { A = res(7, rm_reg(m_ea)); wm(m_ea, A); } /* RES 7,A=(XY+o) */ - -OP(xycb,c0) { B = set(0, rm_reg(m_ea)); wm(m_ea, B); } /* SET 0,B=(XY+o) */ -OP(xycb,c1) { C = set(0, rm_reg(m_ea)); wm(m_ea, C); } /* SET 0,C=(XY+o) */ -OP(xycb,c2) { D = set(0, rm_reg(m_ea)); wm(m_ea, D); } /* SET 0,D=(XY+o) */ -OP(xycb,c3) { E = set(0, rm_reg(m_ea)); wm(m_ea, E); } /* SET 0,E=(XY+o) */ -OP(xycb,c4) { H = set(0, rm_reg(m_ea)); wm(m_ea, H); } /* SET 0,H=(XY+o) */ -OP(xycb,c5) { L = set(0, rm_reg(m_ea)); wm(m_ea, L); } /* SET 0,L=(XY+o) */ -OP(xycb,c6) { wm(m_ea, set(0, rm_reg(m_ea))); } /* SET 0,(XY+o) */ -OP(xycb,c7) { A = set(0, rm_reg(m_ea)); wm(m_ea, A); } /* SET 0,A=(XY+o) */ - -OP(xycb,c8) { B = set(1, rm_reg(m_ea)); wm(m_ea, B); } /* SET 1,B=(XY+o) */ -OP(xycb,c9) { C = set(1, rm_reg(m_ea)); wm(m_ea, C); } /* SET 1,C=(XY+o) */ -OP(xycb,ca) { D = set(1, rm_reg(m_ea)); wm(m_ea, D); } /* SET 1,D=(XY+o) */ -OP(xycb,cb) { E = set(1, rm_reg(m_ea)); wm(m_ea, E); } /* SET 1,E=(XY+o) */ -OP(xycb,cc) { H = set(1, rm_reg(m_ea)); wm(m_ea, H); } /* SET 1,H=(XY+o) */ -OP(xycb,cd) { L = set(1, rm_reg(m_ea)); wm(m_ea, L); } /* SET 1,L=(XY+o) */ -OP(xycb,ce) { wm(m_ea, set(1, rm_reg(m_ea))); } /* SET 1,(XY+o) */ -OP(xycb,cf) { A = set(1, rm_reg(m_ea)); wm(m_ea, A); } /* SET 1,A=(XY+o) */ - -OP(xycb,d0) { B = set(2, rm_reg(m_ea)); wm(m_ea, B); } /* SET 2,B=(XY+o) */ -OP(xycb,d1) { C = set(2, rm_reg(m_ea)); wm(m_ea, C); } /* SET 2,C=(XY+o) */ -OP(xycb,d2) { D = set(2, rm_reg(m_ea)); wm(m_ea, D); } /* SET 2,D=(XY+o) */ -OP(xycb,d3) { E = set(2, rm_reg(m_ea)); wm(m_ea, E); } /* SET 2,E=(XY+o) */ -OP(xycb,d4) { H = set(2, rm_reg(m_ea)); wm(m_ea, H); } /* SET 2,H=(XY+o) */ -OP(xycb,d5) { L = set(2, rm_reg(m_ea)); wm(m_ea, L); } /* SET 2,L=(XY+o) */ -OP(xycb,d6) { wm(m_ea, set(2, rm_reg(m_ea))); } /* SET 2,(XY+o) */ -OP(xycb,d7) { A = set(2, rm_reg(m_ea)); wm(m_ea, A); } /* SET 2,A=(XY+o) */ - -OP(xycb,d8) { B = set(3, rm_reg(m_ea)); wm(m_ea, B); } /* SET 3,B=(XY+o) */ -OP(xycb,d9) { C = set(3, rm_reg(m_ea)); wm(m_ea, C); } /* SET 3,C=(XY+o) */ -OP(xycb,da) { D = set(3, rm_reg(m_ea)); wm(m_ea, D); } /* SET 3,D=(XY+o) */ -OP(xycb,db) { E = set(3, rm_reg(m_ea)); wm(m_ea, E); } /* SET 3,E=(XY+o) */ -OP(xycb,dc) { H = set(3, rm_reg(m_ea)); wm(m_ea, H); } /* SET 3,H=(XY+o) */ -OP(xycb,dd) { L = set(3, rm_reg(m_ea)); wm(m_ea, L); } /* SET 3,L=(XY+o) */ -OP(xycb,de) { wm(m_ea, set(3, rm_reg(m_ea))); } /* SET 3,(XY+o) */ -OP(xycb,df) { A = set(3, rm_reg(m_ea)); wm(m_ea, A); } /* SET 3,A=(XY+o) */ - -OP(xycb,e0) { B = set(4, rm_reg(m_ea)); wm(m_ea, B); } /* SET 4,B=(XY+o) */ -OP(xycb,e1) { C = set(4, rm_reg(m_ea)); wm(m_ea, C); } /* SET 4,C=(XY+o) */ -OP(xycb,e2) { D = set(4, rm_reg(m_ea)); wm(m_ea, D); } /* SET 4,D=(XY+o) */ -OP(xycb,e3) { E = set(4, rm_reg(m_ea)); wm(m_ea, E); } /* SET 4,E=(XY+o) */ -OP(xycb,e4) { H = set(4, rm_reg(m_ea)); wm(m_ea, H); } /* SET 4,H=(XY+o) */ -OP(xycb,e5) { L = set(4, rm_reg(m_ea)); wm(m_ea, L); } /* SET 4,L=(XY+o) */ -OP(xycb,e6) { wm(m_ea, set(4, rm_reg(m_ea))); } /* SET 4,(XY+o) */ -OP(xycb,e7) { A = set(4, rm_reg(m_ea)); wm(m_ea, A); } /* SET 4,A=(XY+o) */ - -OP(xycb,e8) { B = set(5, rm_reg(m_ea)); wm(m_ea, B); } /* SET 5,B=(XY+o) */ -OP(xycb,e9) { C = set(5, rm_reg(m_ea)); wm(m_ea, C); } /* SET 5,C=(XY+o) */ -OP(xycb,ea) { D = set(5, rm_reg(m_ea)); wm(m_ea, D); } /* SET 5,D=(XY+o) */ -OP(xycb,eb) { E = set(5, rm_reg(m_ea)); wm(m_ea, E); } /* SET 5,E=(XY+o) */ -OP(xycb,ec) { H = set(5, rm_reg(m_ea)); wm(m_ea, H); } /* SET 5,H=(XY+o) */ -OP(xycb,ed) { L = set(5, rm_reg(m_ea)); wm(m_ea, L); } /* SET 5,L=(XY+o) */ -OP(xycb,ee) { wm(m_ea, set(5, rm_reg(m_ea))); } /* SET 5,(XY+o) */ -OP(xycb,ef) { A = set(5, rm_reg(m_ea)); wm(m_ea, A); } /* SET 5,A=(XY+o) */ - -OP(xycb,f0) { B = set(6, rm_reg(m_ea)); wm(m_ea, B); } /* SET 6,B=(XY+o) */ -OP(xycb,f1) { C = set(6, rm_reg(m_ea)); wm(m_ea, C); } /* SET 6,C=(XY+o) */ -OP(xycb,f2) { D = set(6, rm_reg(m_ea)); wm(m_ea, D); } /* SET 6,D=(XY+o) */ -OP(xycb,f3) { E = set(6, rm_reg(m_ea)); wm(m_ea, E); } /* SET 6,E=(XY+o) */ -OP(xycb,f4) { H = set(6, rm_reg(m_ea)); wm(m_ea, H); } /* SET 6,H=(XY+o) */ -OP(xycb,f5) { L = set(6, rm_reg(m_ea)); wm(m_ea, L); } /* SET 6,L=(XY+o) */ -OP(xycb,f6) { wm(m_ea, set(6, rm_reg(m_ea))); } /* SET 6,(XY+o) */ -OP(xycb,f7) { A = set(6, rm_reg(m_ea)); wm(m_ea, A); } /* SET 6,A=(XY+o) */ - -OP(xycb,f8) { B = set(7, rm_reg(m_ea)); wm(m_ea, B); } /* SET 7,B=(XY+o) */ -OP(xycb,f9) { C = set(7, rm_reg(m_ea)); wm(m_ea, C); } /* SET 7,C=(XY+o) */ -OP(xycb,fa) { D = set(7, rm_reg(m_ea)); wm(m_ea, D); } /* SET 7,D=(XY+o) */ -OP(xycb,fb) { E = set(7, rm_reg(m_ea)); wm(m_ea, E); } /* SET 7,E=(XY+o) */ -OP(xycb,fc) { H = set(7, rm_reg(m_ea)); wm(m_ea, H); } /* SET 7,H=(XY+o) */ -OP(xycb,fd) { L = set(7, rm_reg(m_ea)); wm(m_ea, L); } /* SET 7,L=(XY+o) */ -OP(xycb,fe) { wm(m_ea, set(7, rm_reg(m_ea))); } /* SET 7,(XY+o) */ -OP(xycb,ff) { A = set(7, rm_reg(m_ea)); wm(m_ea, A); } /* SET 7,A=(XY+o) */ - - -/********************************************************** - * IX register related opcodes (DD prefix) - **********************************************************/ -OP(dd,00) { illegal_1(); op_00(); } /* DB DD */ -OP(dd,01) { illegal_1(); op_01(); } /* DB DD */ -OP(dd,02) { illegal_1(); op_02(); } /* DB DD */ -OP(dd,03) { illegal_1(); op_03(); } /* DB DD */ -OP(dd,04) { illegal_1(); op_04(); } /* DB DD */ -OP(dd,05) { illegal_1(); op_05(); } /* DB DD */ -OP(dd,06) { illegal_1(); op_06(); } /* DB DD */ -OP(dd,07) { illegal_1(); op_07(); } /* DB DD */ - -OP(dd,08) { illegal_1(); op_08(); } /* DB DD */ -OP(dd,09) { add16(m_ix, m_bc); } /* ADD IX,BC */ -OP(dd,0a) { illegal_1(); op_0a(); } /* DB DD */ -OP(dd,0b) { illegal_1(); op_0b(); } /* DB DD */ -OP(dd,0c) { illegal_1(); op_0c(); } /* DB DD */ -OP(dd,0d) { illegal_1(); op_0d(); } /* DB DD */ -OP(dd,0e) { illegal_1(); op_0e(); } /* DB DD */ -OP(dd,0f) { illegal_1(); op_0f(); } /* DB DD */ - -OP(dd,10) { illegal_1(); op_10(); } /* DB DD */ -OP(dd,11) { illegal_1(); op_11(); } /* DB DD */ -OP(dd,12) { illegal_1(); op_12(); } /* DB DD */ -OP(dd,13) { illegal_1(); op_13(); } /* DB DD */ -OP(dd,14) { illegal_1(); op_14(); } /* DB DD */ -OP(dd,15) { illegal_1(); op_15(); } /* DB DD */ -OP(dd,16) { illegal_1(); op_16(); } /* DB DD */ -OP(dd,17) { illegal_1(); op_17(); } /* DB DD */ - -OP(dd,18) { illegal_1(); op_18(); } /* DB DD */ -OP(dd,19) { add16(m_ix, m_de); } /* ADD IX,DE */ -OP(dd,1a) { illegal_1(); op_1a(); } /* DB DD */ -OP(dd,1b) { illegal_1(); op_1b(); } /* DB DD */ -OP(dd,1c) { illegal_1(); op_1c(); } /* DB DD */ -OP(dd,1d) { illegal_1(); op_1d(); } /* DB DD */ -OP(dd,1e) { illegal_1(); op_1e(); } /* DB DD */ -OP(dd,1f) { illegal_1(); op_1f(); } /* DB DD */ - -OP(dd,20) { illegal_1(); op_20(); } /* DB DD */ -OP(dd,21) { IX = arg16(); } /* LD IX,w */ -OP(dd,22) { m_ea = arg16(); wm16(m_ea, m_ix); WZ = m_ea + 1; } /* LD (w),IX */ -OP(dd,23) { nomreq_ir(2); IX++; } /* INC IX */ -OP(dd,24) { HX = inc(HX); } /* INC HX */ -OP(dd,25) { HX = dec(HX); } /* DEC HX */ -OP(dd,26) { HX = arg(); } /* LD HX,n */ -OP(dd,27) { illegal_1(); op_27(); } /* DB DD */ - -OP(dd,28) { illegal_1(); op_28(); } /* DB DD */ -OP(dd,29) { add16(m_ix, m_ix); } /* ADD IX,IX */ -OP(dd,2a) { m_ea = arg16(); rm16(m_ea, m_ix); WZ = m_ea + 1; } /* LD IX,(w) */ -OP(dd,2b) { nomreq_ir(2); IX--; } /* DEC IX */ -OP(dd,2c) { LX = inc(LX); } /* INC LX */ -OP(dd,2d) { LX = dec(LX); } /* DEC LX */ -OP(dd,2e) { LX = arg(); } /* LD LX,n */ -OP(dd,2f) { illegal_1(); op_2f(); } /* DB DD */ - -OP(dd,30) { illegal_1(); op_30(); } /* DB DD */ -OP(dd,31) { illegal_1(); op_31(); } /* DB DD */ -OP(dd,32) { illegal_1(); op_32(); } /* DB DD */ -OP(dd,33) { illegal_1(); op_33(); } /* DB DD */ -OP(dd,34) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, inc(rm_reg(m_ea))); } /* INC (IX+o) */ -OP(dd,35) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, dec(rm_reg(m_ea))); } /* DEC (IX+o) */ -OP(dd,36) { eax(); u8 a = arg(); nomreq_addr(PCD-1, 2); wm(m_ea, a); } /* LD (IX+o),n */ -OP(dd,37) { illegal_1(); op_37(); } /* DB DD */ - -OP(dd,38) { illegal_1(); op_38(); } /* DB DD */ -OP(dd,39) { add16(m_ix, m_sp); } /* ADD IX,SP */ -OP(dd,3a) { illegal_1(); op_3a(); } /* DB DD */ -OP(dd,3b) { illegal_1(); op_3b(); } /* DB DD */ -OP(dd,3c) { illegal_1(); op_3c(); } /* DB DD */ -OP(dd,3d) { illegal_1(); op_3d(); } /* DB DD */ -OP(dd,3e) { illegal_1(); op_3e(); } /* DB DD */ -OP(dd,3f) { illegal_1(); op_3f(); } /* DB DD */ - -OP(dd,40) { illegal_1(); op_40(); } /* DB DD */ -OP(dd,41) { illegal_1(); op_41(); } /* DB DD */ -OP(dd,42) { illegal_1(); op_42(); } /* DB DD */ -OP(dd,43) { illegal_1(); op_43(); } /* DB DD */ -OP(dd,44) { B = HX; } /* LD B,HX */ -OP(dd,45) { B = LX; } /* LD B,LX */ -OP(dd,46) { eax(); nomreq_addr(PCD-1, 5); B = rm(m_ea); } /* LD B,(IX+o) */ -OP(dd,47) { illegal_1(); op_47(); } /* DB DD */ - -OP(dd,48) { illegal_1(); op_48(); } /* DB DD */ -OP(dd,49) { illegal_1(); op_49(); } /* DB DD */ -OP(dd,4a) { illegal_1(); op_4a(); } /* DB DD */ -OP(dd,4b) { illegal_1(); op_4b(); } /* DB DD */ -OP(dd,4c) { C = HX; } /* LD C,HX */ -OP(dd,4d) { C = LX; } /* LD C,LX */ -OP(dd,4e) { eax(); nomreq_addr(PCD-1, 5); C = rm(m_ea); } /* LD C,(IX+o) */ -OP(dd,4f) { illegal_1(); op_4f(); } /* DB DD */ - -OP(dd,50) { illegal_1(); op_50(); } /* DB DD */ -OP(dd,51) { illegal_1(); op_51(); } /* DB DD */ -OP(dd,52) { illegal_1(); op_52(); } /* DB DD */ -OP(dd,53) { illegal_1(); op_53(); } /* DB DD */ -OP(dd,54) { D = HX; } /* LD D,HX */ -OP(dd,55) { D = LX; } /* LD D,LX */ -OP(dd,56) { eax(); nomreq_addr(PCD-1, 5); D = rm(m_ea); } /* LD D,(IX+o) */ -OP(dd,57) { illegal_1(); op_57(); } /* DB DD */ - -OP(dd,58) { illegal_1(); op_58(); } /* DB DD */ -OP(dd,59) { illegal_1(); op_59(); } /* DB DD */ -OP(dd,5a) { illegal_1(); op_5a(); } /* DB DD */ -OP(dd,5b) { illegal_1(); op_5b(); } /* DB DD */ -OP(dd,5c) { E = HX; } /* LD E,HX */ -OP(dd,5d) { E = LX; } /* LD E,LX */ -OP(dd,5e) { eax(); nomreq_addr(PCD-1, 5); E = rm(m_ea); } /* LD E,(IX+o) */ -OP(dd,5f) { illegal_1(); op_5f(); } /* DB DD */ - -OP(dd,60) { HX = B; } /* LD HX,B */ -OP(dd,61) { HX = C; } /* LD HX,C */ -OP(dd,62) { HX = D; } /* LD HX,D */ -OP(dd,63) { HX = E; } /* LD HX,E */ -OP(dd,64) { } /* LD HX,HX */ -OP(dd,65) { HX = LX; } /* LD HX,LX */ -OP(dd,66) { eax(); nomreq_addr(PCD-1, 5); H = rm(m_ea); } /* LD H,(IX+o) */ -OP(dd,67) { HX = A; } /* LD HX,A */ - -OP(dd,68) { LX = B; } /* LD LX,B */ -OP(dd,69) { LX = C; } /* LD LX,C */ -OP(dd,6a) { LX = D; } /* LD LX,D */ -OP(dd,6b) { LX = E; } /* LD LX,E */ -OP(dd,6c) { LX = HX; } /* LD LX,HX */ -OP(dd,6d) { } /* LD LX,LX */ -OP(dd,6e) { eax(); nomreq_addr(PCD-1, 5); L = rm(m_ea); } /* LD L,(IX+o) */ -OP(dd,6f) { LX = A; } /* LD LX,A */ - -OP(dd,70) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, B); } /* LD (IX+o),B */ -OP(dd,71) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, C); } /* LD (IX+o),C */ -OP(dd,72) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, D); } /* LD (IX+o),D */ -OP(dd,73) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, E); } /* LD (IX+o),E */ -OP(dd,74) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, H); } /* LD (IX+o),H */ -OP(dd,75) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, L); } /* LD (IX+o),L */ -OP(dd,76) { illegal_1(); op_76(); } /* DB DD */ -OP(dd,77) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, A); } /* LD (IX+o),A */ - -OP(dd,78) { illegal_1(); op_78(); } /* DB DD */ -OP(dd,79) { illegal_1(); op_79(); } /* DB DD */ -OP(dd,7a) { illegal_1(); op_7a(); } /* DB DD */ -OP(dd,7b) { illegal_1(); op_7b(); } /* DB DD */ -OP(dd,7c) { A = HX; } /* LD A,HX */ -OP(dd,7d) { A = LX; } /* LD A,LX */ -OP(dd,7e) { eax(); nomreq_addr(PCD-1, 5); A = rm(m_ea); } /* LD A,(IX+o) */ -OP(dd,7f) { illegal_1(); op_7f(); } /* DB DD */ - -OP(dd,80) { illegal_1(); op_80(); } /* DB DD */ -OP(dd,81) { illegal_1(); op_81(); } /* DB DD */ -OP(dd,82) { illegal_1(); op_82(); } /* DB DD */ -OP(dd,83) { illegal_1(); op_83(); } /* DB DD */ -OP(dd,84) { add_a(HX); } /* ADD A,HX */ -OP(dd,85) { add_a(LX); } /* ADD A,LX */ -OP(dd,86) { eax(); nomreq_addr(PCD-1, 5); add_a(rm(m_ea)); } /* ADD A,(IX+o) */ -OP(dd,87) { illegal_1(); op_87(); } /* DB DD */ - -OP(dd,88) { illegal_1(); op_88(); } /* DB DD */ -OP(dd,89) { illegal_1(); op_89(); } /* DB DD */ -OP(dd,8a) { illegal_1(); op_8a(); } /* DB DD */ -OP(dd,8b) { illegal_1(); op_8b(); } /* DB DD */ -OP(dd,8c) { adc_a(HX); } /* ADC A,HX */ -OP(dd,8d) { adc_a(LX); } /* ADC A,LX */ -OP(dd,8e) { eax(); nomreq_addr(PCD-1, 5); adc_a(rm(m_ea)); } /* ADC A,(IX+o) */ -OP(dd,8f) { illegal_1(); op_8f(); } /* DB DD */ - -OP(dd,90) { illegal_1(); op_90(); } /* DB DD */ -OP(dd,91) { illegal_1(); op_91(); } /* DB DD */ -OP(dd,92) { illegal_1(); op_92(); } /* DB DD */ -OP(dd,93) { illegal_1(); op_93(); } /* DB DD */ -OP(dd,94) { sub(HX); } /* SUB HX */ -OP(dd,95) { sub(LX); } /* SUB LX */ -OP(dd,96) { eax(); nomreq_addr(PCD-1, 5); sub(rm(m_ea)); } /* SUB (IX+o) */ -OP(dd,97) { illegal_1(); op_97(); } /* DB DD */ - -OP(dd,98) { illegal_1(); op_98(); } /* DB DD */ -OP(dd,99) { illegal_1(); op_99(); } /* DB DD */ -OP(dd,9a) { illegal_1(); op_9a(); } /* DB DD */ -OP(dd,9b) { illegal_1(); op_9b(); } /* DB DD */ -OP(dd,9c) { sbc_a(HX); } /* SBC A,HX */ -OP(dd,9d) { sbc_a(LX); } /* SBC A,LX */ -OP(dd,9e) { eax(); nomreq_addr(PCD-1, 5); sbc_a(rm(m_ea)); } /* SBC A,(IX+o) */ -OP(dd,9f) { illegal_1(); op_9f(); } /* DB DD */ - -OP(dd,a0) { illegal_1(); op_a0(); } /* DB DD */ -OP(dd,a1) { illegal_1(); op_a1(); } /* DB DD */ -OP(dd,a2) { illegal_1(); op_a2(); } /* DB DD */ -OP(dd,a3) { illegal_1(); op_a3(); } /* DB DD */ -OP(dd,a4) { and_a(HX); } /* AND HX */ -OP(dd,a5) { and_a(LX); } /* AND LX */ -OP(dd,a6) { eax(); nomreq_addr(PCD-1, 5); and_a(rm(m_ea)); } /* AND (IX+o) */ -OP(dd,a7) { illegal_1(); op_a7(); } /* DB DD */ - -OP(dd,a8) { illegal_1(); op_a8(); } /* DB DD */ -OP(dd,a9) { illegal_1(); op_a9(); } /* DB DD */ -OP(dd,aa) { illegal_1(); op_aa(); } /* DB DD */ -OP(dd,ab) { illegal_1(); op_ab(); } /* DB DD */ -OP(dd,ac) { xor_a(HX); } /* XOR HX */ -OP(dd,ad) { xor_a(LX); } /* XOR LX */ -OP(dd,ae) { eax(); nomreq_addr(PCD-1, 5); xor_a(rm(m_ea)); } /* XOR (IX+o) */ -OP(dd,af) { illegal_1(); op_af(); } /* DB DD */ - -OP(dd,b0) { illegal_1(); op_b0(); } /* DB DD */ -OP(dd,b1) { illegal_1(); op_b1(); } /* DB DD */ -OP(dd,b2) { illegal_1(); op_b2(); } /* DB DD */ -OP(dd,b3) { illegal_1(); op_b3(); } /* DB DD */ -OP(dd,b4) { or_a(HX); } /* OR HX */ -OP(dd,b5) { or_a(LX); } /* OR LX */ -OP(dd,b6) { eax(); nomreq_addr(PCD-1, 5); or_a(rm(m_ea)); } /* OR (IX+o) */ -OP(dd,b7) { illegal_1(); op_b7(); } /* DB DD */ - -OP(dd,b8) { illegal_1(); op_b8(); } /* DB DD */ -OP(dd,b9) { illegal_1(); op_b9(); } /* DB DD */ -OP(dd,ba) { illegal_1(); op_ba(); } /* DB DD */ -OP(dd,bb) { illegal_1(); op_bb(); } /* DB DD */ -OP(dd,bc) { cp(HX); } /* CP HX */ -OP(dd,bd) { cp(LX); } /* CP LX */ -OP(dd,be) { eax(); nomreq_addr(PCD-1, 5); cp(rm(m_ea)); } /* CP (IX+o) */ -OP(dd,bf) { illegal_1(); op_bf(); } /* DB DD */ - -OP(dd,c0) { illegal_1(); op_c0(); } /* DB DD */ -OP(dd,c1) { illegal_1(); op_c1(); } /* DB DD */ -OP(dd,c2) { illegal_1(); op_c2(); } /* DB DD */ -OP(dd,c3) { illegal_1(); op_c3(); } /* DB DD */ -OP(dd,c4) { illegal_1(); op_c4(); } /* DB DD */ -OP(dd,c5) { illegal_1(); op_c5(); } /* DB DD */ -OP(dd,c6) { illegal_1(); op_c6(); } /* DB DD */ -OP(dd,c7) { illegal_1(); op_c7(); } /* DB DD */ - -OP(dd,c8) { illegal_1(); op_c8(); } /* DB DD */ -OP(dd,c9) { illegal_1(); op_c9(); } /* DB DD */ -OP(dd,ca) { illegal_1(); op_ca(); } /* DB DD */ -OP(dd,cb) { eax(); u8 a = arg(); nomreq_addr(PCD-1, 2); EXEC(xycb, a); } /* ** DD CB xx */ -OP(dd,cc) { illegal_1(); op_cc(); } /* DB DD */ -OP(dd,cd) { illegal_1(); op_cd(); } /* DB DD */ -OP(dd,ce) { illegal_1(); op_ce(); } /* DB DD */ -OP(dd,cf) { illegal_1(); op_cf(); } /* DB DD */ - -OP(dd,d0) { illegal_1(); op_d0(); } /* DB DD */ -OP(dd,d1) { illegal_1(); op_d1(); } /* DB DD */ -OP(dd,d2) { illegal_1(); op_d2(); } /* DB DD */ -OP(dd,d3) { illegal_1(); op_d3(); } /* DB DD */ -OP(dd,d4) { illegal_1(); op_d4(); } /* DB DD */ -OP(dd,d5) { illegal_1(); op_d5(); } /* DB DD */ -OP(dd,d6) { illegal_1(); op_d6(); } /* DB DD */ -OP(dd,d7) { illegal_1(); op_d7(); } /* DB DD */ - -OP(dd,d8) { illegal_1(); op_d8(); } /* DB DD */ -OP(dd,d9) { illegal_1(); op_d9(); } /* DB DD */ -OP(dd,da) { illegal_1(); op_da(); } /* DB DD */ -OP(dd,db) { illegal_1(); op_db(); } /* DB DD */ -OP(dd,dc) { illegal_1(); op_dc(); } /* DB DD */ -OP(dd,dd) { illegal_1(); op_dd(); } /* DB DD */ -OP(dd,de) { illegal_1(); op_de(); } /* DB DD */ -OP(dd,df) { illegal_1(); op_df(); } /* DB DD */ - -OP(dd,e0) { illegal_1(); op_e0(); } /* DB DD */ -OP(dd,e1) { pop(m_ix); } /* POP IX */ -OP(dd,e2) { illegal_1(); op_e2(); } /* DB DD */ -OP(dd,e3) { ex_sp(m_ix); } /* EX (SP),IX */ -OP(dd,e4) { illegal_1(); op_e4(); } /* DB DD */ -OP(dd,e5) { push(m_ix); } /* PUSH IX */ -OP(dd,e6) { illegal_1(); op_e6(); } /* DB DD */ -OP(dd,e7) { illegal_1(); op_e7(); } /* DB DD */ - -OP(dd,e8) { illegal_1(); op_e8(); } /* DB DD */ -OP(dd,e9) { PC = IX; } /* JP (IX) */ -OP(dd,ea) { illegal_1(); op_ea(); } /* DB DD */ -OP(dd,eb) { illegal_1(); op_eb(); } /* DB DD */ -OP(dd,ec) { illegal_1(); op_ec(); } /* DB DD */ -OP(dd,ed) { illegal_1(); op_ed(); } /* DB DD */ -OP(dd,ee) { illegal_1(); op_ee(); } /* DB DD */ -OP(dd,ef) { illegal_1(); op_ef(); } /* DB DD */ - -OP(dd,f0) { illegal_1(); op_f0(); } /* DB DD */ -OP(dd,f1) { illegal_1(); op_f1(); } /* DB DD */ -OP(dd,f2) { illegal_1(); op_f2(); } /* DB DD */ -OP(dd,f3) { illegal_1(); op_f3(); } /* DB DD */ -OP(dd,f4) { illegal_1(); op_f4(); } /* DB DD */ -OP(dd,f5) { illegal_1(); op_f5(); } /* DB DD */ -OP(dd,f6) { illegal_1(); op_f6(); } /* DB DD */ -OP(dd,f7) { illegal_1(); op_f7(); } /* DB DD */ - -OP(dd,f8) { illegal_1(); op_f8(); } /* DB DD */ -OP(dd,f9) { nomreq_ir(2); SP = IX; } /* LD SP,IX */ -OP(dd,fa) { illegal_1(); op_fa(); } /* DB DD */ -OP(dd,fb) { illegal_1(); op_fb(); } /* DB DD */ -OP(dd,fc) { illegal_1(); op_fc(); } /* DB DD */ -OP(dd,fd) { illegal_1(); op_fd(); } /* DB DD */ -OP(dd,fe) { illegal_1(); op_fe(); } /* DB DD */ -OP(dd,ff) { illegal_1(); op_ff(); } /* DB DD */ - -/********************************************************** - * IY register related opcodes (FD prefix) - **********************************************************/ -OP(fd,00) { illegal_1(); op_00(); } /* DB FD */ -OP(fd,01) { illegal_1(); op_01(); } /* DB FD */ -OP(fd,02) { illegal_1(); op_02(); } /* DB FD */ -OP(fd,03) { illegal_1(); op_03(); } /* DB FD */ -OP(fd,04) { illegal_1(); op_04(); } /* DB FD */ -OP(fd,05) { illegal_1(); op_05(); } /* DB FD */ -OP(fd,06) { illegal_1(); op_06(); } /* DB FD */ -OP(fd,07) { illegal_1(); op_07(); } /* DB FD */ - -OP(fd,08) { illegal_1(); op_08(); } /* DB FD */ -OP(fd,09) { add16(m_iy, m_bc); } /* ADD IY,BC */ -OP(fd,0a) { illegal_1(); op_0a(); } /* DB FD */ -OP(fd,0b) { illegal_1(); op_0b(); } /* DB FD */ -OP(fd,0c) { illegal_1(); op_0c(); } /* DB FD */ -OP(fd,0d) { illegal_1(); op_0d(); } /* DB FD */ -OP(fd,0e) { illegal_1(); op_0e(); } /* DB FD */ -OP(fd,0f) { illegal_1(); op_0f(); } /* DB FD */ - -OP(fd,10) { illegal_1(); op_10(); } /* DB FD */ -OP(fd,11) { illegal_1(); op_11(); } /* DB FD */ -OP(fd,12) { illegal_1(); op_12(); } /* DB FD */ -OP(fd,13) { illegal_1(); op_13(); } /* DB FD */ -OP(fd,14) { illegal_1(); op_14(); } /* DB FD */ -OP(fd,15) { illegal_1(); op_15(); } /* DB FD */ -OP(fd,16) { illegal_1(); op_16(); } /* DB FD */ -OP(fd,17) { illegal_1(); op_17(); } /* DB FD */ - -OP(fd,18) { illegal_1(); op_18(); } /* DB FD */ -OP(fd,19) { add16(m_iy, m_de); } /* ADD IY,DE */ -OP(fd,1a) { illegal_1(); op_1a(); } /* DB FD */ -OP(fd,1b) { illegal_1(); op_1b(); } /* DB FD */ -OP(fd,1c) { illegal_1(); op_1c(); } /* DB FD */ -OP(fd,1d) { illegal_1(); op_1d(); } /* DB FD */ -OP(fd,1e) { illegal_1(); op_1e(); } /* DB FD */ -OP(fd,1f) { illegal_1(); op_1f(); } /* DB FD */ - -OP(fd,20) { illegal_1(); op_20(); } /* DB FD */ -OP(fd,21) { IY = arg16(); } /* LD IY,w */ -OP(fd,22) { m_ea = arg16(); wm16(m_ea, m_iy); WZ = m_ea + 1; } /* LD (w),IY */ -OP(fd,23) { nomreq_ir(2); IY++; } /* INC IY */ -OP(fd,24) { HY = inc(HY); } /* INC HY */ -OP(fd,25) { HY = dec(HY); } /* DEC HY */ -OP(fd,26) { HY = arg(); } /* LD HY,n */ -OP(fd,27) { illegal_1(); op_27(); } /* DB FD */ - -OP(fd,28) { illegal_1(); op_28(); } /* DB FD */ -OP(fd,29) { add16(m_iy, m_iy); } /* ADD IY,IY */ -OP(fd,2a) { m_ea = arg16(); rm16(m_ea, m_iy); WZ = m_ea + 1; } /* LD IY,(w) */ -OP(fd,2b) { nomreq_ir(2); IY--; } /* DEC IY */ -OP(fd,2c) { LY = inc(LY); } /* INC LY */ -OP(fd,2d) { LY = dec(LY); } /* DEC LY */ -OP(fd,2e) { LY = arg(); } /* LD LY,n */ -OP(fd,2f) { illegal_1(); op_2f(); } /* DB FD */ - -OP(fd,30) { illegal_1(); op_30(); } /* DB FD */ -OP(fd,31) { illegal_1(); op_31(); } /* DB FD */ -OP(fd,32) { illegal_1(); op_32(); } /* DB FD */ -OP(fd,33) { illegal_1(); op_33(); } /* DB FD */ -OP(fd,34) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, inc(rm_reg(m_ea))); } /* INC (IY+o) */ -OP(fd,35) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, dec(rm_reg(m_ea))); } /* DEC (IY+o) */ -OP(fd,36) { eay(); u8 a = arg(); nomreq_addr(PCD-1, 2); wm(m_ea, a); } /* LD (IY+o),n */ -OP(fd,37) { illegal_1(); op_37(); } /* DB FD */ - -OP(fd,38) { illegal_1(); op_38(); } /* DB FD */ -OP(fd,39) { add16(m_iy, m_sp); } /* ADD IY,SP */ -OP(fd,3a) { illegal_1(); op_3a(); } /* DB FD */ -OP(fd,3b) { illegal_1(); op_3b(); } /* DB FD */ -OP(fd,3c) { illegal_1(); op_3c(); } /* DB FD */ -OP(fd,3d) { illegal_1(); op_3d(); } /* DB FD */ -OP(fd,3e) { illegal_1(); op_3e(); } /* DB FD */ -OP(fd,3f) { illegal_1(); op_3f(); } /* DB FD */ - -OP(fd,40) { illegal_1(); op_40(); } /* DB FD */ -OP(fd,41) { illegal_1(); op_41(); } /* DB FD */ -OP(fd,42) { illegal_1(); op_42(); } /* DB FD */ -OP(fd,43) { illegal_1(); op_43(); } /* DB FD */ -OP(fd,44) { B = HY; } /* LD B,HY */ -OP(fd,45) { B = LY; } /* LD B,LY */ -OP(fd,46) { eay(); nomreq_addr(PCD-1, 5); B = rm(m_ea); } /* LD B,(IY+o) */ -OP(fd,47) { illegal_1(); op_47(); } /* DB FD */ - -OP(fd,48) { illegal_1(); op_48(); } /* DB FD */ -OP(fd,49) { illegal_1(); op_49(); } /* DB FD */ -OP(fd,4a) { illegal_1(); op_4a(); } /* DB FD */ -OP(fd,4b) { illegal_1(); op_4b(); } /* DB FD */ -OP(fd,4c) { C = HY; } /* LD C,HY */ -OP(fd,4d) { C = LY; } /* LD C,LY */ -OP(fd,4e) { eay(); nomreq_addr(PCD-1, 5); C = rm(m_ea); } /* LD C,(IY+o) */ -OP(fd,4f) { illegal_1(); op_4f(); } /* DB FD */ - -OP(fd,50) { illegal_1(); op_50(); } /* DB FD */ -OP(fd,51) { illegal_1(); op_51(); } /* DB FD */ -OP(fd,52) { illegal_1(); op_52(); } /* DB FD */ -OP(fd,53) { illegal_1(); op_53(); } /* DB FD */ -OP(fd,54) { D = HY; } /* LD D,HY */ -OP(fd,55) { D = LY; } /* LD D,LY */ -OP(fd,56) { eay(); nomreq_addr(PCD-1, 5); D = rm(m_ea); } /* LD D,(IY+o) */ -OP(fd,57) { illegal_1(); op_57(); } /* DB FD */ - -OP(fd,58) { illegal_1(); op_58(); } /* DB FD */ -OP(fd,59) { illegal_1(); op_59(); } /* DB FD */ -OP(fd,5a) { illegal_1(); op_5a(); } /* DB FD */ -OP(fd,5b) { illegal_1(); op_5b(); } /* DB FD */ -OP(fd,5c) { E = HY; } /* LD E,HY */ -OP(fd,5d) { E = LY; } /* LD E,LY */ -OP(fd,5e) { eay(); nomreq_addr(PCD-1, 5); E = rm(m_ea); } /* LD E,(IY+o) */ -OP(fd,5f) { illegal_1(); op_5f(); } /* DB FD */ - -OP(fd,60) { HY = B; } /* LD HY,B */ -OP(fd,61) { HY = C; } /* LD HY,C */ -OP(fd,62) { HY = D; } /* LD HY,D */ -OP(fd,63) { HY = E; } /* LD HY,E */ -OP(fd,64) { } /* LD HY,HY */ -OP(fd,65) { HY = LY; } /* LD HY,LY */ -OP(fd,66) { eay(); nomreq_addr(PCD-1, 5); H = rm(m_ea); } /* LD H,(IY+o) */ -OP(fd,67) { HY = A; } /* LD HY,A */ - -OP(fd,68) { LY = B; } /* LD LY,B */ -OP(fd,69) { LY = C; } /* LD LY,C */ -OP(fd,6a) { LY = D; } /* LD LY,D */ -OP(fd,6b) { LY = E; } /* LD LY,E */ -OP(fd,6c) { LY = HY; } /* LD LY,HY */ -OP(fd,6d) { } /* LD LY,LY */ -OP(fd,6e) { eay(); nomreq_addr(PCD-1, 5); L = rm(m_ea); } /* LD L,(IY+o) */ -OP(fd,6f) { LY = A; } /* LD LY,A */ - -OP(fd,70) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, B); } /* LD (IY+o),B */ -OP(fd,71) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, C); } /* LD (IY+o),C */ -OP(fd,72) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, D); } /* LD (IY+o),D */ -OP(fd,73) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, E); } /* LD (IY+o),E */ -OP(fd,74) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, H); } /* LD (IY+o),H */ -OP(fd,75) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, L); } /* LD (IY+o),L */ -OP(fd,76) { illegal_1(); op_76(); } /* DB FD */ -OP(fd,77) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, A); } /* LD (IY+o),A */ - -OP(fd,78) { illegal_1(); op_78(); } /* DB FD */ -OP(fd,79) { illegal_1(); op_79(); } /* DB FD */ -OP(fd,7a) { illegal_1(); op_7a(); } /* DB FD */ -OP(fd,7b) { illegal_1(); op_7b(); } /* DB FD */ -OP(fd,7c) { A = HY; } /* LD A,HY */ -OP(fd,7d) { A = LY; } /* LD A,LY */ -OP(fd,7e) { eay(); nomreq_addr(PCD-1, 5); A = rm(m_ea); } /* LD A,(IY+o) */ -OP(fd,7f) { illegal_1(); op_7f(); } /* DB FD */ - -OP(fd,80) { illegal_1(); op_80(); } /* DB FD */ -OP(fd,81) { illegal_1(); op_81(); } /* DB FD */ -OP(fd,82) { illegal_1(); op_82(); } /* DB FD */ -OP(fd,83) { illegal_1(); op_83(); } /* DB FD */ -OP(fd,84) { add_a(HY); } /* ADD A,HY */ -OP(fd,85) { add_a(LY); } /* ADD A,LY */ -OP(fd,86) { eay(); nomreq_addr(PCD-1, 5); add_a(rm(m_ea)); } /* ADD A,(IY+o) */ -OP(fd,87) { illegal_1(); op_87(); } /* DB FD */ - -OP(fd,88) { illegal_1(); op_88(); } /* DB FD */ -OP(fd,89) { illegal_1(); op_89(); } /* DB FD */ -OP(fd,8a) { illegal_1(); op_8a(); } /* DB FD */ -OP(fd,8b) { illegal_1(); op_8b(); } /* DB FD */ -OP(fd,8c) { adc_a(HY); } /* ADC A,HY */ -OP(fd,8d) { adc_a(LY); } /* ADC A,LY */ -OP(fd,8e) { eay(); nomreq_addr(PCD-1, 5); adc_a(rm(m_ea)); } /* ADC A,(IY+o) */ -OP(fd,8f) { illegal_1(); op_8f(); } /* DB FD */ - -OP(fd,90) { illegal_1(); op_90(); } /* DB FD */ -OP(fd,91) { illegal_1(); op_91(); } /* DB FD */ -OP(fd,92) { illegal_1(); op_92(); } /* DB FD */ -OP(fd,93) { illegal_1(); op_93(); } /* DB FD */ -OP(fd,94) { sub(HY); } /* SUB HY */ -OP(fd,95) { sub(LY); } /* SUB LY */ -OP(fd,96) { eay(); nomreq_addr(PCD-1, 5); sub(rm(m_ea)); } /* SUB (IY+o) */ -OP(fd,97) { illegal_1(); op_97(); } /* DB FD */ - -OP(fd,98) { illegal_1(); op_98(); } /* DB FD */ -OP(fd,99) { illegal_1(); op_99(); } /* DB FD */ -OP(fd,9a) { illegal_1(); op_9a(); } /* DB FD */ -OP(fd,9b) { illegal_1(); op_9b(); } /* DB FD */ -OP(fd,9c) { sbc_a(HY); } /* SBC A,HY */ -OP(fd,9d) { sbc_a(LY); } /* SBC A,LY */ -OP(fd,9e) { eay(); nomreq_addr(PCD-1, 5); sbc_a(rm(m_ea)); } /* SBC A,(IY+o) */ -OP(fd,9f) { illegal_1(); op_9f(); } /* DB FD */ - -OP(fd,a0) { illegal_1(); op_a0(); } /* DB FD */ -OP(fd,a1) { illegal_1(); op_a1(); } /* DB FD */ -OP(fd,a2) { illegal_1(); op_a2(); } /* DB FD */ -OP(fd,a3) { illegal_1(); op_a3(); } /* DB FD */ -OP(fd,a4) { and_a(HY); } /* AND HY */ -OP(fd,a5) { and_a(LY); } /* AND LY */ -OP(fd,a6) { eay(); nomreq_addr(PCD-1, 5); and_a(rm(m_ea)); } /* AND (IY+o) */ -OP(fd,a7) { illegal_1(); op_a7(); } /* DB FD */ - -OP(fd,a8) { illegal_1(); op_a8(); } /* DB FD */ -OP(fd,a9) { illegal_1(); op_a9(); } /* DB FD */ -OP(fd,aa) { illegal_1(); op_aa(); } /* DB FD */ -OP(fd,ab) { illegal_1(); op_ab(); } /* DB FD */ -OP(fd,ac) { xor_a(HY); } /* XOR HY */ -OP(fd,ad) { xor_a(LY); } /* XOR LY */ -OP(fd,ae) { eay(); nomreq_addr(PCD-1, 5); xor_a(rm(m_ea)); } /* XOR (IY+o) */ -OP(fd,af) { illegal_1(); op_af(); } /* DB FD */ - -OP(fd,b0) { illegal_1(); op_b0(); } /* DB FD */ -OP(fd,b1) { illegal_1(); op_b1(); } /* DB FD */ -OP(fd,b2) { illegal_1(); op_b2(); } /* DB FD */ -OP(fd,b3) { illegal_1(); op_b3(); } /* DB FD */ -OP(fd,b4) { or_a(HY); } /* OR HY */ -OP(fd,b5) { or_a(LY); } /* OR LY */ -OP(fd,b6) { eay(); nomreq_addr(PCD-1, 5); or_a(rm(m_ea)); } /* OR (IY+o) */ -OP(fd,b7) { illegal_1(); op_b7(); } /* DB FD */ - -OP(fd,b8) { illegal_1(); op_b8(); } /* DB FD */ -OP(fd,b9) { illegal_1(); op_b9(); } /* DB FD */ -OP(fd,ba) { illegal_1(); op_ba(); } /* DB FD */ -OP(fd,bb) { illegal_1(); op_bb(); } /* DB FD */ -OP(fd,bc) { cp(HY); } /* CP HY */ -OP(fd,bd) { cp(LY); } /* CP LY */ -OP(fd,be) { eay(); nomreq_addr(PCD-1, 5); cp(rm(m_ea)); } /* CP (IY+o) */ -OP(fd,bf) { illegal_1(); op_bf(); } /* DB FD */ - -OP(fd,c0) { illegal_1(); op_c0(); } /* DB FD */ -OP(fd,c1) { illegal_1(); op_c1(); } /* DB FD */ -OP(fd,c2) { illegal_1(); op_c2(); } /* DB FD */ -OP(fd,c3) { illegal_1(); op_c3(); } /* DB FD */ -OP(fd,c4) { illegal_1(); op_c4(); } /* DB FD */ -OP(fd,c5) { illegal_1(); op_c5(); } /* DB FD */ -OP(fd,c6) { illegal_1(); op_c6(); } /* DB FD */ -OP(fd,c7) { illegal_1(); op_c7(); } /* DB FD */ - -OP(fd,c8) { illegal_1(); op_c8(); } /* DB FD */ -OP(fd,c9) { illegal_1(); op_c9(); } /* DB FD */ -OP(fd,ca) { illegal_1(); op_ca(); } /* DB FD */ -OP(fd,cb) { eay(); u8 a = arg(); nomreq_addr(PCD-1, 2); EXEC(xycb, a); } /* ** FD CB xx */ -OP(fd,cc) { illegal_1(); op_cc(); } /* DB FD */ -OP(fd,cd) { illegal_1(); op_cd(); } /* DB FD */ -OP(fd,ce) { illegal_1(); op_ce(); } /* DB FD */ -OP(fd,cf) { illegal_1(); op_cf(); } /* DB FD */ - -OP(fd,d0) { illegal_1(); op_d0(); } /* DB FD */ -OP(fd,d1) { illegal_1(); op_d1(); } /* DB FD */ -OP(fd,d2) { illegal_1(); op_d2(); } /* DB FD */ -OP(fd,d3) { illegal_1(); op_d3(); } /* DB FD */ -OP(fd,d4) { illegal_1(); op_d4(); } /* DB FD */ -OP(fd,d5) { illegal_1(); op_d5(); } /* DB FD */ -OP(fd,d6) { illegal_1(); op_d6(); } /* DB FD */ -OP(fd,d7) { illegal_1(); op_d7(); } /* DB FD */ - -OP(fd,d8) { illegal_1(); op_d8(); } /* DB FD */ -OP(fd,d9) { illegal_1(); op_d9(); } /* DB FD */ -OP(fd,da) { illegal_1(); op_da(); } /* DB FD */ -OP(fd,db) { illegal_1(); op_db(); } /* DB FD */ -OP(fd,dc) { illegal_1(); op_dc(); } /* DB FD */ -OP(fd,dd) { illegal_1(); op_dd(); } /* DB FD */ -OP(fd,de) { illegal_1(); op_de(); } /* DB FD */ -OP(fd,df) { illegal_1(); op_df(); } /* DB FD */ - -OP(fd,e0) { illegal_1(); op_e0(); } /* DB FD */ -OP(fd,e1) { pop(m_iy); } /* POP IY */ -OP(fd,e2) { illegal_1(); op_e2(); } /* DB FD */ -OP(fd,e3) { ex_sp(m_iy); } /* EX (SP),IY */ -OP(fd,e4) { illegal_1(); op_e4(); } /* DB FD */ -OP(fd,e5) { push(m_iy); } /* PUSH IY */ -OP(fd,e6) { illegal_1(); op_e6(); } /* DB FD */ -OP(fd,e7) { illegal_1(); op_e7(); } /* DB FD */ - -OP(fd,e8) { illegal_1(); op_e8(); } /* DB FD */ -OP(fd,e9) { PC = IY; } /* JP (IY) */ -OP(fd,ea) { illegal_1(); op_ea(); } /* DB FD */ -OP(fd,eb) { illegal_1(); op_eb(); } /* DB FD */ -OP(fd,ec) { illegal_1(); op_ec(); } /* DB FD */ -OP(fd,ed) { illegal_1(); op_ed(); } /* DB FD */ -OP(fd,ee) { illegal_1(); op_ee(); } /* DB FD */ -OP(fd,ef) { illegal_1(); op_ef(); } /* DB FD */ - -OP(fd,f0) { illegal_1(); op_f0(); } /* DB FD */ -OP(fd,f1) { illegal_1(); op_f1(); } /* DB FD */ -OP(fd,f2) { illegal_1(); op_f2(); } /* DB FD */ -OP(fd,f3) { illegal_1(); op_f3(); } /* DB FD */ -OP(fd,f4) { illegal_1(); op_f4(); } /* DB FD */ -OP(fd,f5) { illegal_1(); op_f5(); } /* DB FD */ -OP(fd,f6) { illegal_1(); op_f6(); } /* DB FD */ -OP(fd,f7) { illegal_1(); op_f7(); } /* DB FD */ - -OP(fd,f8) { illegal_1(); op_f8(); } /* DB FD */ -OP(fd,f9) { nomreq_ir(2); SP = IY; } /* LD SP,IY */ -OP(fd,fa) { illegal_1(); op_fa(); } /* DB FD */ -OP(fd,fb) { illegal_1(); op_fb(); } /* DB FD */ -OP(fd,fc) { illegal_1(); op_fc(); } /* DB FD */ -OP(fd,fd) { illegal_1(); op_fd(); } /* DB FD */ -OP(fd,fe) { illegal_1(); op_fe(); } /* DB FD */ -OP(fd,ff) { illegal_1(); op_ff(); } /* DB FD */ - - -/********************************************************** - * special opcodes (ED prefix) - **********************************************************/ -OP(ed,00) { illegal_2(); } /* DB ED */ -OP(ed,01) { illegal_2(); } /* DB ED */ -OP(ed,02) { illegal_2(); } /* DB ED */ -OP(ed,03) { illegal_2(); } /* DB ED */ -OP(ed,04) { illegal_2(); } /* DB ED */ -OP(ed,05) { illegal_2(); } /* DB ED */ -OP(ed,06) { illegal_2(); } /* DB ED */ -OP(ed,07) { illegal_2(); } /* DB ED */ - -OP(ed,08) { illegal_2(); } /* DB ED */ -OP(ed,09) { illegal_2(); } /* DB ED */ -OP(ed,0a) { illegal_2(); } /* DB ED */ -OP(ed,0b) { illegal_2(); } /* DB ED */ -OP(ed,0c) { illegal_2(); } /* DB ED */ -OP(ed,0d) { illegal_2(); } /* DB ED */ -OP(ed,0e) { illegal_2(); } /* DB ED */ -OP(ed,0f) { illegal_2(); } /* DB ED */ - -OP(ed,10) { illegal_2(); } /* DB ED */ -OP(ed,11) { illegal_2(); } /* DB ED */ -OP(ed,12) { illegal_2(); } /* DB ED */ -OP(ed,13) { illegal_2(); } /* DB ED */ -OP(ed,14) { illegal_2(); } /* DB ED */ -OP(ed,15) { illegal_2(); } /* DB ED */ -OP(ed,16) { illegal_2(); } /* DB ED */ -OP(ed,17) { illegal_2(); } /* DB ED */ - -OP(ed,18) { illegal_2(); } /* DB ED */ -OP(ed,19) { illegal_2(); } /* DB ED */ -OP(ed,1a) { illegal_2(); } /* DB ED */ -OP(ed,1b) { illegal_2(); } /* DB ED */ -OP(ed,1c) { illegal_2(); } /* DB ED */ -OP(ed,1d) { illegal_2(); } /* DB ED */ -OP(ed,1e) { illegal_2(); } /* DB ED */ -OP(ed,1f) { illegal_2(); } /* DB ED */ - -OP(ed,20) { illegal_2(); } /* DB ED */ -OP(ed,21) { illegal_2(); } /* DB ED */ -OP(ed,22) { illegal_2(); } /* DB ED */ -OP(ed,23) { illegal_2(); } /* DB ED */ -OP(ed,24) { illegal_2(); } /* DB ED */ -OP(ed,25) { illegal_2(); } /* DB ED */ -OP(ed,26) { illegal_2(); } /* DB ED */ -OP(ed,27) { illegal_2(); } /* DB ED */ - -OP(ed,28) { illegal_2(); } /* DB ED */ -OP(ed,29) { illegal_2(); } /* DB ED */ -OP(ed,2a) { illegal_2(); } /* DB ED */ -OP(ed,2b) { illegal_2(); } /* DB ED */ -OP(ed,2c) { illegal_2(); } /* DB ED */ -OP(ed,2d) { illegal_2(); } /* DB ED */ -OP(ed,2e) { illegal_2(); } /* DB ED */ -OP(ed,2f) { illegal_2(); } /* DB ED */ - -OP(ed,30) { illegal_2(); } /* DB ED */ -OP(ed,31) { illegal_2(); } /* DB ED */ -OP(ed,32) { illegal_2(); } /* DB ED */ -OP(ed,33) { illegal_2(); } /* DB ED */ -OP(ed,34) { illegal_2(); } /* DB ED */ -OP(ed,35) { illegal_2(); } /* DB ED */ -OP(ed,36) { illegal_2(); } /* DB ED */ -OP(ed,37) { illegal_2(); } /* DB ED */ - -OP(ed,38) { illegal_2(); } /* DB ED */ -OP(ed,39) { illegal_2(); } /* DB ED */ -OP(ed,3a) { illegal_2(); } /* DB ED */ -OP(ed,3b) { illegal_2(); } /* DB ED */ -OP(ed,3c) { illegal_2(); } /* DB ED */ -OP(ed,3d) { illegal_2(); } /* DB ED */ -OP(ed,3e) { illegal_2(); } /* DB ED */ -OP(ed,3f) { illegal_2(); } /* DB ED */ - -OP(ed,40) { B = in(BC); set_f((F & CF) | SZP[B]); WZ = BC + 1; } /* IN B,(C) */ -OP(ed,41) { out(BC, B); WZ = BC + 1; } /* OUT (C),B */ -OP(ed,42) { sbc_hl(m_bc); } /* SBC HL,BC */ -OP(ed,43) { m_ea = arg16(); wm16(m_ea, m_bc); WZ = m_ea + 1; } /* LD (w),BC */ -OP(ed,44) { neg(); } /* NEG */ -OP(ed,45) { retn(); } /* RETN */ -OP(ed,46) { m_im = 0; } /* IM 0 */ -OP(ed,47) { ld_i_a(); } /* LD i,A */ - -OP(ed,48) { C = in(BC); set_f((F & CF) | SZP[C]); WZ = BC + 1; } /* IN C,(C) */ -OP(ed,49) { out(BC, C); WZ = BC + 1; } /* OUT (C),C */ -OP(ed,4a) { adc_hl(m_bc); } /* ADC HL,BC */ -OP(ed,4b) { m_ea = arg16(); rm16(m_ea, m_bc); WZ = m_ea + 1; } /* LD BC,(w) */ -OP(ed,4c) { neg(); } /* NEG */ -OP(ed,4d) { reti(); } /* RETI */ -OP(ed,4e) { m_im = 0; } /* IM 0 */ -OP(ed,4f) { ld_r_a(); } /* LD r,A */ - -OP(ed,50) { D = in(BC); set_f((F & CF) | SZP[D]); WZ = BC + 1; } /* IN D,(C) */ -OP(ed,51) { out(BC, D); WZ = BC + 1; } /* OUT (C),D */ -OP(ed,52) { sbc_hl(m_de); } /* SBC HL,DE */ -OP(ed,53) { m_ea = arg16(); wm16(m_ea, m_de); WZ = m_ea + 1; } /* LD (w),DE */ -OP(ed,54) { neg(); } /* NEG */ -OP(ed,55) { retn(); } /* RETN */ -OP(ed,56) { m_im = 1; } /* IM 1 */ -OP(ed,57) { ld_a_i(); } /* LD A,i */ - -OP(ed,58) { E = in(BC); set_f((F & CF) | SZP[E]); WZ = BC + 1; } /* IN E,(C) */ -OP(ed,59) { out(BC, E); WZ = BC + 1; } /* OUT (C),E */ -OP(ed,5a) { adc_hl(m_de); } /* ADC HL,DE */ -OP(ed,5b) { m_ea = arg16(); rm16(m_ea, m_de); WZ = m_ea + 1; } /* LD DE,(w) */ -OP(ed,5c) { neg(); } /* NEG */ -OP(ed,5d) { reti(); } /* RETI */ -OP(ed,5e) { m_im = 2; } /* IM 2 */ -OP(ed,5f) { ld_a_r(); } /* LD A,r */ - -OP(ed,60) { H = in(BC); set_f((F & CF) | SZP[H]); WZ = BC + 1; } /* IN H,(C) */ -OP(ed,61) { out(BC, H); WZ = BC + 1; } /* OUT (C),H */ -OP(ed,62) { sbc_hl(m_hl); } /* SBC HL,HL */ -OP(ed,63) { m_ea = arg16(); wm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD (w),HL */ -OP(ed,64) { neg(); } /* NEG */ -OP(ed,65) { retn(); } /* RETN */ -OP(ed,66) { m_im = 0; } /* IM 0 */ -OP(ed,67) { rrd(); } /* RRD (HL) */ - -OP(ed,68) { L = in(BC); set_f((F & CF) | SZP[L]); WZ = BC + 1; } /* IN L,(C) */ -OP(ed,69) { out(BC, L); WZ = BC + 1; } /* OUT (C),L */ -OP(ed,6a) { adc_hl(m_hl); } /* ADC HL,HL */ -OP(ed,6b) { m_ea = arg16(); rm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD HL,(w) */ -OP(ed,6c) { neg(); } /* NEG */ -OP(ed,6d) { reti(); } /* RETI */ -OP(ed,6e) { m_im = 0; } /* IM 0 */ -OP(ed,6f) { rld(); } /* RLD (HL) */ - -OP(ed,70) { u8 res = in(BC); set_f((F & CF) | SZP[res]); WZ = BC + 1; } /* IN 0,(C) */ -OP(ed,71) { out(BC, 0); WZ = BC + 1; } /* OUT (C),0 */ -OP(ed,72) { sbc_hl(m_sp); } /* SBC HL,SP */ -OP(ed,73) { m_ea = arg16(); wm16(m_ea, m_sp); WZ = m_ea + 1; } /* LD (w),SP */ -OP(ed,74) { neg(); } /* NEG */ -OP(ed,75) { retn(); } /* RETN */ -OP(ed,76) { m_im = 1; } /* IM 1 */ -OP(ed,77) { illegal_2(); } /* DB ED,77 */ - -OP(ed,78) { A = in(BC); set_f((F & CF) | SZP[A]); WZ = BC + 1; } /* IN A,(C) */ -OP(ed,79) { out(BC, A); WZ = BC + 1; } /* OUT (C),A */ -OP(ed,7a) { adc_hl(m_sp); } /* ADC HL,SP */ -OP(ed,7b) { m_ea = arg16(); rm16(m_ea, m_sp); WZ = m_ea + 1; } /* LD SP,(w) */ -OP(ed,7c) { neg(); } /* NEG */ -OP(ed,7d) { reti(); } /* RETI */ -OP(ed,7e) { m_im = 2; } /* IM 2 */ -OP(ed,7f) { illegal_2(); } /* DB ED,7F */ - -OP(ed,80) { illegal_2(); } /* DB ED */ -OP(ed,81) { illegal_2(); } /* DB ED */ -OP(ed,82) { illegal_2(); } /* DB ED */ -OP(ed,83) { illegal_2(); } /* DB ED */ -OP(ed,84) { illegal_2(); } /* DB ED */ -OP(ed,85) { illegal_2(); } /* DB ED */ -OP(ed,86) { illegal_2(); } /* DB ED */ -OP(ed,87) { illegal_2(); } /* DB ED */ - -OP(ed,88) { illegal_2(); } /* DB ED */ -OP(ed,89) { illegal_2(); } /* DB ED */ -OP(ed,8a) { illegal_2(); } /* DB ED */ -OP(ed,8b) { illegal_2(); } /* DB ED */ -OP(ed,8c) { illegal_2(); } /* DB ED */ -OP(ed,8d) { illegal_2(); } /* DB ED */ -OP(ed,8e) { illegal_2(); } /* DB ED */ -OP(ed,8f) { illegal_2(); } /* DB ED */ - -OP(ed,90) { illegal_2(); } /* DB ED */ -OP(ed,91) { illegal_2(); } /* DB ED */ -OP(ed,92) { illegal_2(); } /* DB ED */ -OP(ed,93) { illegal_2(); } /* DB ED */ -OP(ed,94) { illegal_2(); } /* DB ED */ -OP(ed,95) { illegal_2(); } /* DB ED */ -OP(ed,96) { illegal_2(); } /* DB ED */ -OP(ed,97) { illegal_2(); } /* DB ED */ - -OP(ed,98) { illegal_2(); } /* DB ED */ -OP(ed,99) { illegal_2(); } /* DB ED */ -OP(ed,9a) { illegal_2(); } /* DB ED */ -OP(ed,9b) { illegal_2(); } /* DB ED */ -OP(ed,9c) { illegal_2(); } /* DB ED */ -OP(ed,9d) { illegal_2(); } /* DB ED */ -OP(ed,9e) { illegal_2(); } /* DB ED */ -OP(ed,9f) { illegal_2(); } /* DB ED */ - -OP(ed,a0) { ldi(); } /* LDI */ -OP(ed,a1) { cpi(); } /* CPI */ -OP(ed,a2) { ini(); } /* INI */ -OP(ed,a3) { outi(); } /* OUTI */ -OP(ed,a4) { illegal_2(); } /* DB ED */ -OP(ed,a5) { illegal_2(); } /* DB ED */ -OP(ed,a6) { illegal_2(); } /* DB ED */ -OP(ed,a7) { illegal_2(); } /* DB ED */ - -OP(ed,a8) { ldd(); } /* LDD */ -OP(ed,a9) { cpd(); } /* CPD */ -OP(ed,aa) { ind(); } /* IND */ -OP(ed,ab) { outd(); } /* OUTD */ -OP(ed,ac) { illegal_2(); } /* DB ED */ -OP(ed,ad) { illegal_2(); } /* DB ED */ -OP(ed,ae) { illegal_2(); } /* DB ED */ -OP(ed,af) { illegal_2(); } /* DB ED */ - -OP(ed,b0) { ldir(); } /* LDIR */ -OP(ed,b1) { cpir(); } /* CPIR */ -OP(ed,b2) { inir(); } /* INIR */ -OP(ed,b3) { otir(); } /* OTIR */ -OP(ed,b4) { illegal_2(); } /* DB ED */ -OP(ed,b5) { illegal_2(); } /* DB ED */ -OP(ed,b6) { illegal_2(); } /* DB ED */ -OP(ed,b7) { illegal_2(); } /* DB ED */ - -OP(ed,b8) { lddr(); } /* LDDR */ -OP(ed,b9) { cpdr(); } /* CPDR */ -OP(ed,ba) { indr(); } /* INDR */ -OP(ed,bb) { otdr(); } /* OTDR */ -OP(ed,bc) { illegal_2(); } /* DB ED */ -OP(ed,bd) { illegal_2(); } /* DB ED */ -OP(ed,be) { illegal_2(); } /* DB ED */ -OP(ed,bf) { illegal_2(); } /* DB ED */ - -OP(ed,c0) { illegal_2(); } /* DB ED */ -OP(ed,c1) { illegal_2(); } /* DB ED */ -OP(ed,c2) { illegal_2(); } /* DB ED */ -OP(ed,c3) { illegal_2(); } /* DB ED */ -OP(ed,c4) { illegal_2(); } /* DB ED */ -OP(ed,c5) { illegal_2(); } /* DB ED */ -OP(ed,c6) { illegal_2(); } /* DB ED */ -OP(ed,c7) { illegal_2(); } /* DB ED */ - -OP(ed,c8) { illegal_2(); } /* DB ED */ -OP(ed,c9) { illegal_2(); } /* DB ED */ -OP(ed,ca) { illegal_2(); } /* DB ED */ -OP(ed,cb) { illegal_2(); } /* DB ED */ -OP(ed,cc) { illegal_2(); } /* DB ED */ -OP(ed,cd) { illegal_2(); } /* DB ED */ -OP(ed,ce) { illegal_2(); } /* DB ED */ -OP(ed,cf) { illegal_2(); } /* DB ED */ - -OP(ed,d0) { illegal_2(); } /* DB ED */ -OP(ed,d1) { illegal_2(); } /* DB ED */ -OP(ed,d2) { illegal_2(); } /* DB ED */ -OP(ed,d3) { illegal_2(); } /* DB ED */ -OP(ed,d4) { illegal_2(); } /* DB ED */ -OP(ed,d5) { illegal_2(); } /* DB ED */ -OP(ed,d6) { illegal_2(); } /* DB ED */ -OP(ed,d7) { illegal_2(); } /* DB ED */ - -OP(ed,d8) { illegal_2(); } /* DB ED */ -OP(ed,d9) { illegal_2(); } /* DB ED */ -OP(ed,da) { illegal_2(); } /* DB ED */ -OP(ed,db) { illegal_2(); } /* DB ED */ -OP(ed,dc) { illegal_2(); } /* DB ED */ -OP(ed,dd) { illegal_2(); } /* DB ED */ -OP(ed,de) { illegal_2(); } /* DB ED */ -OP(ed,df) { illegal_2(); } /* DB ED */ - -OP(ed,e0) { illegal_2(); } /* DB ED */ -OP(ed,e1) { illegal_2(); } /* DB ED */ -OP(ed,e2) { illegal_2(); } /* DB ED */ -OP(ed,e3) { illegal_2(); } /* DB ED */ -OP(ed,e4) { illegal_2(); } /* DB ED */ -OP(ed,e5) { illegal_2(); } /* DB ED */ -OP(ed,e6) { illegal_2(); } /* DB ED */ -OP(ed,e7) { illegal_2(); } /* DB ED */ - -OP(ed,e8) { illegal_2(); } /* DB ED */ -OP(ed,e9) { illegal_2(); } /* DB ED */ -OP(ed,ea) { illegal_2(); } /* DB ED */ -OP(ed,eb) { illegal_2(); } /* DB ED */ -OP(ed,ec) { illegal_2(); } /* DB ED */ -OP(ed,ed) { illegal_2(); } /* DB ED */ -OP(ed,ee) { illegal_2(); } /* DB ED */ -OP(ed,ef) { illegal_2(); } /* DB ED */ - -OP(ed,f0) { illegal_2(); } /* DB ED */ -OP(ed,f1) { illegal_2(); } /* DB ED */ -OP(ed,f2) { illegal_2(); } /* DB ED */ -OP(ed,f3) { illegal_2(); } /* DB ED */ -OP(ed,f4) { illegal_2(); } /* DB ED */ -OP(ed,f5) { illegal_2(); } /* DB ED */ -OP(ed,f6) { illegal_2(); } /* DB ED */ -OP(ed,f7) { illegal_2(); } /* DB ED */ - -OP(ed,f8) { illegal_2(); } /* DB ED */ -OP(ed,f9) { illegal_2(); } /* DB ED */ -OP(ed,fa) { illegal_2(); } /* DB ED */ -OP(ed,fb) { illegal_2(); } /* DB ED */ -OP(ed,fc) { illegal_2(); } /* DB ED */ -OP(ed,fd) { illegal_2(); } /* DB ED */ -OP(ed,fe) { illegal_2(); } /* DB ED */ -OP(ed,ff) { illegal_2(); } /* DB ED */ - - -/********************************************************** - * main opcodes - **********************************************************/ -OP(op,00) { } /* NOP */ -OP(op,01) { BC = arg16(); } /* LD BC,w */ -OP(op,02) { wm(BC,A); WZ_L = (BC + 1) & 0xFF; WZ_H = A; } /* LD (BC),A */ -OP(op,03) { nomreq_ir(2); BC++; } /* INC BC */ -OP(op,04) { B = inc(B); } /* INC B */ -OP(op,05) { B = dec(B); } /* DEC B */ -OP(op,06) { B = arg(); } /* LD B,n */ -OP(op,07) { rlca(); } /* RLCA */ - -OP(op,08) { using std::swap; swap(m_af, m_af2); } /* EX AF,AF' */ -OP(op,09) { add16(m_hl, m_bc); } /* ADD HL,BC */ -OP(op,0a) { A = rm(BC); WZ=BC+1; } /* LD A,(BC) */ -OP(op,0b) { nomreq_ir(2); BC--; } /* DEC BC */ -OP(op,0c) { C = inc(C); } /* INC C */ -OP(op,0d) { C = dec(C); } /* DEC C */ -OP(op,0e) { C = arg(); } /* LD C,n */ -OP(op,0f) { rrca(); } /* RRCA */ - -OP(op,10) { nomreq_ir(1); B--; jr_cond(B, 0x10); } /* DJNZ o */ -OP(op,11) { DE = arg16(); } /* LD DE,w */ -OP(op,12) { wm(DE,A); WZ_L = (DE + 1) & 0xFF; WZ_H = A; } /* LD (DE),A */ -OP(op,13) { nomreq_ir(2); DE++; } /* INC DE */ -OP(op,14) { D = inc(D); } /* INC D */ -OP(op,15) { D = dec(D); } /* DEC D */ -OP(op,16) { D = arg(); } /* LD D,n */ -OP(op,17) { rla(); } /* RLA */ - -OP(op,18) { jr(); } /* JR o */ -OP(op,19) { add16(m_hl, m_de); } /* ADD HL,DE */ -OP(op,1a) { A = rm(DE); WZ = DE + 1; } /* LD A,(DE) */ -OP(op,1b) { nomreq_ir(2); DE--; } /* DEC DE */ -OP(op,1c) { E = inc(E); } /* INC E */ -OP(op,1d) { E = dec(E); } /* DEC E */ -OP(op,1e) { E = arg(); } /* LD E,n */ -OP(op,1f) { rra(); } /* RRA */ - -OP(op,20) { jr_cond(!(F & ZF), 0x20); } /* JR NZ,o */ -OP(op,21) { HL = arg16(); } /* LD HL,w */ -OP(op,22) { m_ea = arg16(); wm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD (w),HL */ -OP(op,23) { nomreq_ir(2); HL++; } /* INC HL */ -OP(op,24) { H = inc(H); } /* INC H */ -OP(op,25) { H = dec(H); } /* DEC H */ -OP(op,26) { H = arg(); } /* LD H,n */ -OP(op,27) { daa(); } /* DAA */ - -OP(op,28) { jr_cond(F & ZF, 0x28); } /* JR Z,o */ -OP(op,29) { add16(m_hl, m_hl); } /* ADD HL,HL */ -OP(op,2a) { m_ea = arg16(); rm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD HL,(w) */ -OP(op,2b) { nomreq_ir(2); HL--; } /* DEC HL */ -OP(op,2c) { L = inc(L); } /* INC L */ -OP(op,2d) { L = dec(L); } /* DEC L */ -OP(op,2e) { L = arg(); } /* LD L,n */ -OP(op,2f) { A ^= 0xff; set_f((F & (SF | ZF | PF | CF)) | HF | NF | (A & (YF | XF))); } /* CPL */ - -OP(op,30) { jr_cond(!(F & CF), 0x30); } /* JR NC,o */ -OP(op,31) { SP = arg16(); } /* LD SP,w */ -OP(op,32) { m_ea = arg16(); wm(m_ea, A); WZ_L = (m_ea + 1) & 0xFF; WZ_H = A; } /* LD (w),A */ -OP(op,33) { nomreq_ir(2); SP++; } /* INC SP */ -OP(op,34) { wm(HL, inc(rm_reg(HL))); } /* INC (HL) */ -OP(op,35) { wm(HL, dec(rm_reg(HL))); } /* DEC (HL) */ -OP(op,36) { wm(HL, arg()); } /* LD (HL),n */ -OP(op,37) { set_f((F & (SF | ZF | PF)) | CF | (((F & Q) | A) & (YF | XF))); } /* SCF */ - -OP(op,38) { jr_cond(F & CF, 0x38); } /* JR C,o */ -OP(op,39) { add16(m_hl, m_sp); } /* ADD HL,SP */ -OP(op,3a) { m_ea = arg16(); A = rm(m_ea); WZ = m_ea + 1; } /* LD A,(w) */ -OP(op,3b) { nomreq_ir(2); SP--; } /* DEC SP */ -OP(op,3c) { A = inc(A); } /* INC A */ -OP(op,3d) { A = dec(A); } /* DEC A */ -OP(op,3e) { A = arg(); } /* LD A,n */ -OP(op,3f) { set_f(((F & (SF | ZF | PF | CF)) ^ CF) | ((F & CF) << 4) | (((F & Q) | A) & (YF | XF))); } /* CCF */ - -OP(op,40) { } /* LD B,B */ -OP(op,41) { B = C; } /* LD B,C */ -OP(op,42) { B = D; } /* LD B,D */ -OP(op,43) { B = E; } /* LD B,E */ -OP(op,44) { B = H; } /* LD B,H */ -OP(op,45) { B = L; } /* LD B,L */ -OP(op,46) { B = rm(HL); } /* LD B,(HL) */ -OP(op,47) { B = A; } /* LD B,A */ - -OP(op,48) { C = B; } /* LD C,B */ -OP(op,49) { } /* LD C,C */ -OP(op,4a) { C = D; } /* LD C,D */ -OP(op,4b) { C = E; } /* LD C,E */ -OP(op,4c) { C = H; } /* LD C,H */ -OP(op,4d) { C = L; } /* LD C,L */ -OP(op,4e) { C = rm(HL); } /* LD C,(HL) */ -OP(op,4f) { C = A; } /* LD C,A */ - -OP(op,50) { D = B; } /* LD D,B */ -OP(op,51) { D = C; } /* LD D,C */ -OP(op,52) { } /* LD D,D */ -OP(op,53) { D = E; } /* LD D,E */ -OP(op,54) { D = H; } /* LD D,H */ -OP(op,55) { D = L; } /* LD D,L */ -OP(op,56) { D = rm(HL); } /* LD D,(HL) */ -OP(op,57) { D = A; } /* LD D,A */ - -OP(op,58) { E = B; } /* LD E,B */ -OP(op,59) { E = C; } /* LD E,C */ -OP(op,5a) { E = D; } /* LD E,D */ -OP(op,5b) { } /* LD E,E */ -OP(op,5c) { E = H; } /* LD E,H */ -OP(op,5d) { E = L; } /* LD E,L */ -OP(op,5e) { E = rm(HL); } /* LD E,(HL) */ -OP(op,5f) { E = A; } /* LD E,A */ - -OP(op,60) { H = B; } /* LD H,B */ -OP(op,61) { H = C; } /* LD H,C */ -OP(op,62) { H = D; } /* LD H,D */ -OP(op,63) { H = E; } /* LD H,E */ -OP(op,64) { } /* LD H,H */ -OP(op,65) { H = L; } /* LD H,L */ -OP(op,66) { H = rm(HL); } /* LD H,(HL) */ -OP(op,67) { H = A; } /* LD H,A */ - -OP(op,68) { L = B; } /* LD L,B */ -OP(op,69) { L = C; } /* LD L,C */ -OP(op,6a) { L = D; } /* LD L,D */ -OP(op,6b) { L = E; } /* LD L,E */ -OP(op,6c) { L = H; } /* LD L,H */ -OP(op,6d) { } /* LD L,L */ -OP(op,6e) { L = rm(HL); } /* LD L,(HL) */ -OP(op,6f) { L = A; } /* LD L,A */ - -OP(op,70) { wm(HL, B); } /* LD (HL),B */ -OP(op,71) { wm(HL, C); } /* LD (HL),C */ -OP(op,72) { wm(HL, D); } /* LD (HL),D */ -OP(op,73) { wm(HL, E); } /* LD (HL),E */ -OP(op,74) { wm(HL, H); } /* LD (HL),H */ -OP(op,75) { wm(HL, L); } /* LD (HL),L */ -OP(op,76) { halt(); } /* HALT */ -OP(op,77) { wm(HL, A); } /* LD (HL),A */ - -OP(op,78) { A = B; } /* LD A,B */ -OP(op,79) { A = C; } /* LD A,C */ -OP(op,7a) { A = D; } /* LD A,D */ -OP(op,7b) { A = E; } /* LD A,E */ -OP(op,7c) { A = H; } /* LD A,H */ -OP(op,7d) { A = L; } /* LD A,L */ -OP(op,7e) { A = rm(HL); } /* LD A,(HL) */ -OP(op,7f) { } /* LD A,A */ - -OP(op,80) { add_a(B); } /* ADD A,B */ -OP(op,81) { add_a(C); } /* ADD A,C */ -OP(op,82) { add_a(D); } /* ADD A,D */ -OP(op,83) { add_a(E); } /* ADD A,E */ -OP(op,84) { add_a(H); } /* ADD A,H */ -OP(op,85) { add_a(L); } /* ADD A,L */ -OP(op,86) { add_a(rm(HL)); } /* ADD A,(HL) */ -OP(op,87) { add_a(A); } /* ADD A,A */ - -OP(op,88) { adc_a(B); } /* ADC A,B */ -OP(op,89) { adc_a(C); } /* ADC A,C */ -OP(op,8a) { adc_a(D); } /* ADC A,D */ -OP(op,8b) { adc_a(E); } /* ADC A,E */ -OP(op,8c) { adc_a(H); } /* ADC A,H */ -OP(op,8d) { adc_a(L); } /* ADC A,L */ -OP(op,8e) { adc_a(rm(HL)); } /* ADC A,(HL) */ -OP(op,8f) { adc_a(A); } /* ADC A,A */ - -OP(op,90) { sub(B); } /* SUB B */ -OP(op,91) { sub(C); } /* SUB C */ -OP(op,92) { sub(D); } /* SUB D */ -OP(op,93) { sub(E); } /* SUB E */ -OP(op,94) { sub(H); } /* SUB H */ -OP(op,95) { sub(L); } /* SUB L */ -OP(op,96) { sub(rm(HL)); } /* SUB (HL) */ -OP(op,97) { sub(A); } /* SUB A */ - -OP(op,98) { sbc_a(B); } /* SBC A,B */ -OP(op,99) { sbc_a(C); } /* SBC A,C */ -OP(op,9a) { sbc_a(D); } /* SBC A,D */ -OP(op,9b) { sbc_a(E); } /* SBC A,E */ -OP(op,9c) { sbc_a(H); } /* SBC A,H */ -OP(op,9d) { sbc_a(L); } /* SBC A,L */ -OP(op,9e) { sbc_a(rm(HL)); } /* SBC A,(HL) */ -OP(op,9f) { sbc_a(A); } /* SBC A,A */ - -OP(op,a0) { and_a(B); } /* AND B */ -OP(op,a1) { and_a(C); } /* AND C */ -OP(op,a2) { and_a(D); } /* AND D */ -OP(op,a3) { and_a(E); } /* AND E */ -OP(op,a4) { and_a(H); } /* AND H */ -OP(op,a5) { and_a(L); } /* AND L */ -OP(op,a6) { and_a(rm(HL)); } /* AND (HL) */ -OP(op,a7) { and_a(A); } /* AND A */ - -OP(op,a8) { xor_a(B); } /* XOR B */ -OP(op,a9) { xor_a(C); } /* XOR C */ -OP(op,aa) { xor_a(D); } /* XOR D */ -OP(op,ab) { xor_a(E); } /* XOR E */ -OP(op,ac) { xor_a(H); } /* XOR H */ -OP(op,ad) { xor_a(L); } /* XOR L */ -OP(op,ae) { xor_a(rm(HL)); } /* XOR (HL) */ -OP(op,af) { xor_a(A); } /* XOR A */ - -OP(op,b0) { or_a(B); } /* OR B */ -OP(op,b1) { or_a(C); } /* OR C */ -OP(op,b2) { or_a(D); } /* OR D */ -OP(op,b3) { or_a(E); } /* OR E */ -OP(op,b4) { or_a(H); } /* OR H */ -OP(op,b5) { or_a(L); } /* OR L */ -OP(op,b6) { or_a(rm(HL)); } /* OR (HL) */ -OP(op,b7) { or_a(A); } /* OR A */ - -OP(op,b8) { cp(B); } /* CP B */ -OP(op,b9) { cp(C); } /* CP C */ -OP(op,ba) { cp(D); } /* CP D */ -OP(op,bb) { cp(E); } /* CP E */ -OP(op,bc) { cp(H); } /* CP H */ -OP(op,bd) { cp(L); } /* CP L */ -OP(op,be) { cp(rm(HL)); } /* CP (HL) */ -OP(op,bf) { cp(A); } /* CP A */ - -OP(op,c0) { ret_cond(!(F & ZF), 0xc0); } /* RET NZ */ -OP(op,c1) { pop(m_bc); } /* POP BC */ -OP(op,c2) { jp_cond(!(F & ZF)); } /* JP NZ,a */ -OP(op,c3) { jp(); } /* JP a */ -OP(op,c4) { call_cond(!(F & ZF), 0xc4); } /* CALL NZ,a */ -OP(op,c5) { push(m_bc); } /* PUSH BC */ -OP(op,c6) { add_a(arg()); } /* ADD A,n */ -OP(op,c7) { rst(0x00); } /* RST 0 */ - -OP(op,c8) { ret_cond(F & ZF, 0xc8); } /* RET Z */ -OP(op,c9) { pop(m_pc); WZ = PCD; } /* RET */ -OP(op,ca) { jp_cond(F & ZF); } /* JP Z,a */ -OP(op,cb) { EXEC(cb, rop()); } /* **** CB xx */ -OP(op,cc) { call_cond(F & ZF, 0xcc); } /* CALL Z,a */ -OP(op,cd) { call(); } /* CALL a */ -OP(op,ce) { adc_a(arg()); } /* ADC A,n */ -OP(op,cf) { rst(0x08); } /* RST 1 */ - -OP(op,d0) { ret_cond(!(F & CF), 0xd0); } /* RET NC */ -OP(op,d1) { pop(m_de); } /* POP DE */ -OP(op,d2) { jp_cond(!(F & CF)); } /* JP NC,a */ -OP(op,d3) { unsigned n = arg() | (A << 8); out(n, A); WZ_L = ((n & 0xff) + 1) & 0xff; WZ_H = A; } /* OUT (n),A */ -OP(op,d4) { call_cond(!(F & CF), 0xd4); } /* CALL NC,a */ -OP(op,d5) { push(m_de); } /* PUSH DE */ -OP(op,d6) { sub(arg()); } /* SUB n */ -OP(op,d7) { rst(0x10); } /* RST 2 */ - -OP(op,d8) { ret_cond(F & CF, 0xd8); } /* RET C */ -OP(op,d9) { exx(); } /* EXX */ -OP(op,da) { jp_cond(F & CF); } /* JP C,a */ -OP(op,db) { unsigned n = arg() | (A << 8); A = in(n); WZ = n + 1; } /* IN A,(n) */ -OP(op,dc) { call_cond(F & CF, 0xdc); } /* CALL C,a */ -OP(op,dd) { EXEC(dd, rop()); } /* **** DD xx */ -OP(op,de) { sbc_a(arg()); } /* SBC A,n */ -OP(op,df) { rst(0x18); } /* RST 3 */ - -OP(op,e0) { ret_cond(!(F & PF), 0xe0); } /* RET PO */ -OP(op,e1) { pop(m_hl); } /* POP HL */ -OP(op,e2) { jp_cond(!(F & PF)); } /* JP PO,a */ -OP(op,e3) { ex_sp(m_hl); } /* EX HL,(SP) */ -OP(op,e4) { call_cond(!(F & PF), 0xe4); } /* CALL PO,a */ -OP(op,e5) { push(m_hl); } /* PUSH HL */ -OP(op,e6) { and_a(arg()); } /* AND n */ -OP(op,e7) { rst(0x20); } /* RST 4 */ - -OP(op,e8) { ret_cond(F & PF, 0xe8); } /* RET PE */ -OP(op,e9) { PC = HL; } /* JP (HL) */ -OP(op,ea) { jp_cond(F & PF); } /* JP PE,a */ -OP(op,eb) { using std::swap; swap(DE, HL); } /* EX DE,HL */ -OP(op,ec) { call_cond(F & PF, 0xec); } /* CALL PE,a */ -OP(op,ed) { EXEC(ed, rop()); } /* **** ED xx */ -OP(op,ee) { xor_a(arg()); } /* XOR n */ -OP(op,ef) { rst(0x28); } /* RST 5 */ - -OP(op,f0) { ret_cond(!(F & SF), 0xf0); } /* RET P */ -OP(op,f1) { pop(m_af); } /* POP AF */ -OP(op,f2) { jp_cond(!(F & SF)); } /* JP P,a */ -OP(op,f3) { m_iff1 = m_iff2 = 0; } /* DI */ -OP(op,f4) { call_cond(!(F & SF), 0xf4); } /* CALL P,a */ -OP(op,f5) { push(m_af); } /* PUSH AF */ -OP(op,f6) { or_a(arg()); } /* OR n */ -OP(op,f7) { rst(0x30); } /* RST 6 */ - -OP(op,f8) { ret_cond(F & SF, 0xf8); } /* RET M */ -OP(op,f9) { nomreq_ir(2); SP = HL; } /* LD SP,HL */ -OP(op,fa) { jp_cond(F & SF); } /* JP M,a */ -OP(op,fb) { ei(); } /* EI */ -OP(op,fc) { call_cond(F & SF, 0xfc); } /* CALL M,a */ -OP(op,fd) { EXEC(fd, rop()); } /* **** FD xx */ -OP(op,fe) { cp(arg()); } /* CP n */ -OP(op,ff) { rst(0x38); } /* RST 7 */ - - -void z80_device::take_nmi() -{ - // Check if processor was halted - leave_halt(); - -#if HAS_LDAIR_QUIRK - // reset parity flag after LD A,I or LD A,R - if (m_after_ldair) F &= ~PF; -#endif - - m_iff1 = 0; - m_r++; - - T(5); - wm16_sp(m_pc); - PCD = 0x0066; - WZ = PCD; - m_nmi_pending = false; -} - -void z80_device::take_interrupt() -{ - // check if processor was halted - leave_halt(); - - // clear both interrupt flip flops - m_iff1 = m_iff2 = 0; - - // say hi - // Not precise in all cases. z80 must finish current instruction (NOP) to reach this state - in such case frame timings are shifter from cb event if calulated based on it. - m_irqack_cb(true); - m_r++; - - // fetch the IRQ vector - device_z80daisy_interface *intf = daisy_get_irq_device(); - int irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w.l); - LOGINT("single INT irq_vector $%02x\n", irq_vector); - - // 'interrupt latency' cycles - T(2); - - // Interrupt mode 2. Call [i:databyte] - if (m_im == 2) - { - // Zilog's datasheet claims that "the least-significant bit must be a zero." - // However, experiments have confirmed that IM 2 vectors do not have to be - // even, and all 8 bits will be used; even $FF is handled normally. - // CALL opcode timing - T(5); - wm16_sp(m_pc); - irq_vector = (irq_vector & 0xff) | (m_i << 8); - rm16(irq_vector, m_pc); - LOGINT("IM2 [$%04x] = $%04x\n", irq_vector, PCD); - } - else if (m_im == 1) - { - // Interrupt mode 1. RST 38h - LOGINT("'%s' IM1 $0038\n", tag()); - // RST $38 - T(5); - wm16_sp(m_pc); - PCD = 0x0038; - } - else - { - /* Interrupt mode 0. We check for CALL and JP instructions, - if neither of these were found we assume a 1 byte opcode - was placed on the databus */ - LOGINT("IM0 $%04x\n", irq_vector); - - // check for nop - if (irq_vector != 0x00) - { - switch (irq_vector & 0xff0000) - { - case 0xcd0000: // call - // CALL $xxxx cycles - T(11); - wm16_sp(m_pc); - PCD = irq_vector & 0xffff; - break; - case 0xc30000: // jump - // JP $xxxx cycles - T(10); - PCD = irq_vector & 0xffff; - break; - default: // rst (or other opcodes?) - if (irq_vector == 0xfb) - { - // EI - T(4); - ei(); - } - else if ((irq_vector & 0xc7) == 0xc7) - { - // RST $xx cycles - T(5); - wm16_sp(m_pc); - PCD = irq_vector & 0x0038; - } - else - logerror("take_interrupt: unexpected opcode in im0 mode: 0x%02x\n", irq_vector); - break; - } - } - } - WZ = PCD; - -#if HAS_LDAIR_QUIRK - // reset parity flag after LD A,I or LD A,R - if (m_after_ldair) F &= ~PF; -#endif -} - -void z80_device::nomreq_ir(s8 cycles) -{ - nomreq_addr((m_i << 8) | (m_r2 & 0x80) | (m_r & 0x7f), cycles); -} - -void z80_device::nomreq_addr(u16 addr, s8 cycles) -{ - while (cycles--) - { - m_nomreq_cb(addr, 0x00, 0xff); - T(1); - } -} - -void nsc800_device::take_interrupt_nsc800() -{ - // Check if processor was halted - leave_halt(); - - // Clear both interrupt flip flops - m_iff1 = m_iff2 = 0; - - // 'interrupt latency' cycles - T(7); - if (m_nsc800_irq_state[NSC800_RSTA]) - { - wm16_sp(m_pc); - PCD = 0x003c; - } - else if (m_nsc800_irq_state[NSC800_RSTB]) - { - wm16_sp(m_pc); - PCD = 0x0034; - } - else if (m_nsc800_irq_state[NSC800_RSTC]) - { - wm16_sp(m_pc); - PCD = 0x002c; - } - else - { - T(2 * m_memrq_cycles); - } - - WZ = PCD; - -#if HAS_LDAIR_QUIRK - // reset parity flag after LD A,I or LD A,R - if (m_after_ldair) F &= ~PF; -#endif -} - /**************************************************************************** * Processor initialization ****************************************************************************/ @@ -3449,6 +770,11 @@ void z80_device::device_start() save_item(NAME(m_busrq_state)); save_item(NAME(m_after_ei)); save_item(NAME(m_after_ldair)); + save_item(NAME(m_ref)); + save_item(NAME(m_tmp_irq_vector)); + save_item(NAME(m_shared_addr.w)); + save_item(NAME(m_shared_data.w)); + save_item(NAME(m_shared_data2.w)); // Reset registers to their initial values PRVPC = 0; @@ -3537,6 +863,7 @@ void z80_device::device_reset() { leave_halt(); + m_ref = 0xffff00; PC = 0x0000; m_i = 0; m_r = 0; @@ -3556,9 +883,42 @@ void nsc800_device::device_reset() memset(m_nsc800_irq_state, 0, sizeof(m_nsc800_irq_state)); } -inline void z80_device::execute_cycles(u8 icount) +bool z80_device::check_icount(u8 to_step, int icount_saved, bool redonable) +{ + if ((m_icount < 0) && redonable && access_to_be_redone()) + { + m_icount = icount_saved; + m_ref = (m_ref & 0xffff00) | (to_step - 1); + m_redone = true; + return true; + } + if (m_wait_state) + { + m_icount = 0; + } + if (m_icount <= 0) + { + m_ref = (m_ref & 0xffff00) | to_step; + return true; + } + + return false; +} + +void z80_device::do_rop() +{ + #include "cpu/z80/z80_rop.hxx" +} + +void z80_device::do_op() +{ + #include "cpu/z80/z80.hxx" + m_ref = 0xffff00; +} + +void nsc800_device::do_rop() { - m_icount -= icount; + #include "cpu/z80/z80_ncs800rop.hxx" } /**************************************************************************** @@ -3566,42 +926,35 @@ inline void z80_device::execute_cycles(u8 icount) ****************************************************************************/ void z80_device::execute_run() { - do + if (m_wait_state) + { + m_icount = 0; // stalled + return; + } + + m_redone = false; + while (m_icount > 0 && !m_redone) { - if (m_wait_state) + if (m_ref >= 0xffff00) { - // stalled - m_icount = 0; - return; + do_rop(); + if (m_icount > 0 && !m_redone) + { + if (m_halt) + { + PC--; + m_ref = 0xffff00; + } else { + m_ref = (0x00 << 16) | (TDAT8 << 8); + do_op(); + } + } } - - // check for interrupts before each instruction - check_interrupts(); - - m_after_ei = false; - m_after_ldair = false; - - PRVPC = PCD; - debugger_instruction_hook(PCD); - - u8 opcode = rop(); - - // when in HALT state, the fetched opcode is not dispatched (aka a NOP) - if (m_halt) + else { - PC--; - opcode = 0; + do_op(); } - EXEC(op, opcode); - } while (m_icount > 0); -} - -void z80_device::check_interrupts() -{ - if (m_nmi_pending) - take_nmi(); - else if (m_irq_state != CLEAR_LINE && m_iff1 && !m_after_ei) - take_interrupt(); + } } void z80_device::execute_set_input(int inputnum, int state) @@ -3637,16 +990,6 @@ void z80_device::execute_set_input(int inputnum, int state) } } -void nsc800_device::check_interrupts() -{ - if (m_nmi_pending) - take_nmi(); - else if ((m_nsc800_irq_state[NSC800_RSTA] != CLEAR_LINE || m_nsc800_irq_state[NSC800_RSTB] != CLEAR_LINE || m_nsc800_irq_state[NSC800_RSTC] != CLEAR_LINE) && m_iff1 && !m_after_ei) - take_interrupt_nsc800(); - else if (m_irq_state != CLEAR_LINE && m_iff1 && !m_after_ei) - take_interrupt(); -} - void nsc800_device::execute_set_input(int inputnum, int state) { switch (inputnum) @@ -3733,7 +1076,8 @@ std::unique_ptr z80_device::create_disassembler() return std::make_unique(); } -z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : z80_device(mconfig, Z80, tag, owner, clock) +z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : z80_device(mconfig, Z80, tag, owner, clock) { } diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h index db38863f84c..02e19958704 100644 --- a/src/devices/cpu/z80/z80.h +++ b/src/devices/cpu/z80/z80.h @@ -49,10 +49,11 @@ class z80_device : public cpu_device, public z80_daisy_chain_interface // device_t implementation virtual void device_validity_check(validity_checker &valid) const override; - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; // device_execute_interface implementation + virtual bool cpu_is_interruptible() const override { return true; } virtual u32 execute_min_cycles() const noexcept override { return 2; } virtual u32 execute_max_cycles() const noexcept override { return 16; } virtual u32 execute_input_lines() const noexcept override { return 4; } @@ -73,122 +74,17 @@ class z80_device : public cpu_device, public z80_daisy_chain_interface // device_disasm_interface implementation virtual std::unique_ptr create_disassembler() override; -#undef PROTOTYPES -#define PROTOTYPES(prefix) \ - void prefix##_00(); void prefix##_01(); void prefix##_02(); void prefix##_03(); \ - void prefix##_04(); void prefix##_05(); void prefix##_06(); void prefix##_07(); \ - void prefix##_08(); void prefix##_09(); void prefix##_0a(); void prefix##_0b(); \ - void prefix##_0c(); void prefix##_0d(); void prefix##_0e(); void prefix##_0f(); \ - void prefix##_10(); void prefix##_11(); void prefix##_12(); void prefix##_13(); \ - void prefix##_14(); void prefix##_15(); void prefix##_16(); void prefix##_17(); \ - void prefix##_18(); void prefix##_19(); void prefix##_1a(); void prefix##_1b(); \ - void prefix##_1c(); void prefix##_1d(); void prefix##_1e(); void prefix##_1f(); \ - void prefix##_20(); void prefix##_21(); void prefix##_22(); void prefix##_23(); \ - void prefix##_24(); void prefix##_25(); void prefix##_26(); void prefix##_27(); \ - void prefix##_28(); void prefix##_29(); void prefix##_2a(); void prefix##_2b(); \ - void prefix##_2c(); void prefix##_2d(); void prefix##_2e(); void prefix##_2f(); \ - void prefix##_30(); void prefix##_31(); void prefix##_32(); void prefix##_33(); \ - void prefix##_34(); void prefix##_35(); void prefix##_36(); void prefix##_37(); \ - void prefix##_38(); void prefix##_39(); void prefix##_3a(); void prefix##_3b(); \ - void prefix##_3c(); void prefix##_3d(); void prefix##_3e(); void prefix##_3f(); \ - void prefix##_40(); void prefix##_41(); void prefix##_42(); void prefix##_43(); \ - void prefix##_44(); void prefix##_45(); void prefix##_46(); void prefix##_47(); \ - void prefix##_48(); void prefix##_49(); void prefix##_4a(); void prefix##_4b(); \ - void prefix##_4c(); void prefix##_4d(); void prefix##_4e(); void prefix##_4f(); \ - void prefix##_50(); void prefix##_51(); void prefix##_52(); void prefix##_53(); \ - void prefix##_54(); void prefix##_55(); void prefix##_56(); void prefix##_57(); \ - void prefix##_58(); void prefix##_59(); void prefix##_5a(); void prefix##_5b(); \ - void prefix##_5c(); void prefix##_5d(); void prefix##_5e(); void prefix##_5f(); \ - void prefix##_60(); void prefix##_61(); void prefix##_62(); void prefix##_63(); \ - void prefix##_64(); void prefix##_65(); void prefix##_66(); void prefix##_67(); \ - void prefix##_68(); void prefix##_69(); void prefix##_6a(); void prefix##_6b(); \ - void prefix##_6c(); void prefix##_6d(); void prefix##_6e(); void prefix##_6f(); \ - void prefix##_70(); void prefix##_71(); void prefix##_72(); void prefix##_73(); \ - void prefix##_74(); void prefix##_75(); void prefix##_76(); void prefix##_77(); \ - void prefix##_78(); void prefix##_79(); void prefix##_7a(); void prefix##_7b(); \ - void prefix##_7c(); void prefix##_7d(); void prefix##_7e(); void prefix##_7f(); \ - void prefix##_80(); void prefix##_81(); void prefix##_82(); void prefix##_83(); \ - void prefix##_84(); void prefix##_85(); void prefix##_86(); void prefix##_87(); \ - void prefix##_88(); void prefix##_89(); void prefix##_8a(); void prefix##_8b(); \ - void prefix##_8c(); void prefix##_8d(); void prefix##_8e(); void prefix##_8f(); \ - void prefix##_90(); void prefix##_91(); void prefix##_92(); void prefix##_93(); \ - void prefix##_94(); void prefix##_95(); void prefix##_96(); void prefix##_97(); \ - void prefix##_98(); void prefix##_99(); void prefix##_9a(); void prefix##_9b(); \ - void prefix##_9c(); void prefix##_9d(); void prefix##_9e(); void prefix##_9f(); \ - void prefix##_a0(); void prefix##_a1(); void prefix##_a2(); void prefix##_a3(); \ - void prefix##_a4(); void prefix##_a5(); void prefix##_a6(); void prefix##_a7(); \ - void prefix##_a8(); void prefix##_a9(); void prefix##_aa(); void prefix##_ab(); \ - void prefix##_ac(); void prefix##_ad(); void prefix##_ae(); void prefix##_af(); \ - void prefix##_b0(); void prefix##_b1(); void prefix##_b2(); void prefix##_b3(); \ - void prefix##_b4(); void prefix##_b5(); void prefix##_b6(); void prefix##_b7(); \ - void prefix##_b8(); void prefix##_b9(); void prefix##_ba(); void prefix##_bb(); \ - void prefix##_bc(); void prefix##_bd(); void prefix##_be(); void prefix##_bf(); \ - void prefix##_c0(); void prefix##_c1(); void prefix##_c2(); void prefix##_c3(); \ - void prefix##_c4(); void prefix##_c5(); void prefix##_c6(); void prefix##_c7(); \ - void prefix##_c8(); void prefix##_c9(); void prefix##_ca(); void prefix##_cb(); \ - void prefix##_cc(); void prefix##_cd(); void prefix##_ce(); void prefix##_cf(); \ - void prefix##_d0(); void prefix##_d1(); void prefix##_d2(); void prefix##_d3(); \ - void prefix##_d4(); void prefix##_d5(); void prefix##_d6(); void prefix##_d7(); \ - void prefix##_d8(); void prefix##_d9(); void prefix##_da(); void prefix##_db(); \ - void prefix##_dc(); void prefix##_dd(); void prefix##_de(); void prefix##_df(); \ - void prefix##_e0(); void prefix##_e1(); void prefix##_e2(); void prefix##_e3(); \ - void prefix##_e4(); void prefix##_e5(); void prefix##_e6(); void prefix##_e7(); \ - void prefix##_e8(); void prefix##_e9(); void prefix##_ea(); void prefix##_eb(); \ - void prefix##_ec(); void prefix##_ed(); void prefix##_ee(); void prefix##_ef(); \ - void prefix##_f0(); void prefix##_f1(); void prefix##_f2(); void prefix##_f3(); \ - void prefix##_f4(); void prefix##_f5(); void prefix##_f6(); void prefix##_f7(); \ - void prefix##_f8(); void prefix##_f9(); void prefix##_fa(); void prefix##_fb(); \ - void prefix##_fc(); void prefix##_fd(); void prefix##_fe(); void prefix##_ff(); - - PROTOTYPES(op) - PROTOTYPES(cb) - PROTOTYPES(dd) - PROTOTYPES(ed) - PROTOTYPES(fd) - PROTOTYPES(xycb) - void illegal_1(); void illegal_2(); void halt(); void leave_halt(); - u8 in(u16 port); - void out(u16 port, u8 value); - u8 rm(u16 addr); - u8 rm_reg(u16 addr); - void rm16(u16 addr, PAIR &r); - void wm(u16 addr, u8 value); - void wm16(u16 addr, PAIR &r); - void wm16_sp(PAIR &r); - u8 rop(); - u8 arg(); - u16 arg16(); - void eax(); - void eay(); - void pop(PAIR &r); - void push(PAIR &r); - void jp(void); - void jp_cond(bool cond); - void jr(); - void jr_cond(bool cond, u8 opcode); - void call(); - void call_cond(bool cond, u8 opcode); - void ret_cond(bool cond, u8 opcode); - void retn(); - void reti(); - void ld_r_a(); - void ld_a_r(); - void ld_i_a(); - void ld_a_i(); - void rst(u16 addr); - u8 inc(u8 value); - u8 dec(u8 value); + void inc(u8 &r); + void dec(u8 &r); void rlca(); void rrca(); void rla(); void rra(); - void rrd(); - void rld(); void add_a(u8 value); void adc_a(u8 value); void sub(u8 value); @@ -200,10 +96,6 @@ class z80_device : public cpu_device, public z80_daisy_chain_interface void xor_a(u8 value); void cp(u8 value); void exx(); - void ex_sp(PAIR &r); - void add16(PAIR &dr, PAIR &sr); - void adc_hl(PAIR &r); - void sbc_hl(PAIR &r); u8 rlc(u8 value); u8 rrc(u8 value); u8 rl(u8 value); @@ -217,32 +109,13 @@ class z80_device : public cpu_device, public z80_daisy_chain_interface void bit_xy(int bit, u8 value); u8 res(int bit, u8 value); u8 set(int bit, u8 value); - void ldi(); - void cpi(); - u8 ini(); - u8 outi(); - void ldd(); - void cpd(); - u8 ind(); - u8 outd(); - void ldir(); - void cpir(); - void inir(); - void otir(); - void lddr(); - void cpdr(); - void indr(); - void otdr(); void ei(); void set_f(u8 f); - void block_io_interrupted_flags(u8 data); + void block_io_interrupted_flags(); - void execute_cycles(u8 icount); - virtual void check_interrupts(); - void take_interrupt(); - void take_nmi(); - void nomreq_ir(s8 cycles); - void nomreq_addr(u16 addr, s8 cycles); + virtual void do_rop(); + virtual void do_op(); + bool check_icount(u8 to_step, int icount_saved, bool redonable); virtual u8 data_read(u16 addr); virtual void data_write(u16 addr, u8 value); @@ -296,8 +169,14 @@ class z80_device : public cpu_device, public z80_daisy_chain_interface u32 m_ea; int m_icount; + int m_tmp_irq_vector; + PAIR16 m_shared_addr; + PAIR16 m_shared_data; + PAIR16 m_shared_data2; u8 m_rtemp; + bool m_redone; + u32 m_ref; u8 m_m1_cycles; u8 m_memrq_cycles; u8 m_iorq_cycles; @@ -312,15 +191,14 @@ class nsc800_device : public z80_device protected: // device_t implementation - virtual void device_start() override; - virtual void device_reset() override; + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; // device_execute_interface implementation virtual u32 execute_input_lines() const noexcept override { return 7; } virtual void execute_set_input(int inputnum, int state) override; - virtual void check_interrupts() override; - void take_interrupt_nsc800(); + virtual void do_rop() override; u8 m_nsc800_irq_state[4]; // state of NSC800 restart interrupts A, B, C }; diff --git a/src/devices/cpu/z80/z80.lst b/src/devices/cpu/z80/z80.lst new file mode 100644 index 00000000000..173c2903614 --- /dev/null +++ b/src/devices/cpu/z80/z80.lst @@ -0,0 +1,6645 @@ +# license:BSD-3-Clause +# copyright-holders:Juergen Buchmueller, Andrei I. Holub +########################################################## +# macros +########################################################## +macro nomreq_addr + m_nomreq_cb(TADR, 0x00, 0xff); + + 1 + +macro nomreq_ir %cycles + TADR = (m_i << 8) | (m_r2 & 0x80) | (m_r & 0x7f); + %cycles * call nomreq_addr + +macro in + m_iorq_cycles !! TDAT8 = m_io.read_interruptible(TADR); + +macro out + m_iorq_cycles !! m_io.write_interruptible(TADR, TDAT8); + +macro rm + m_memrq_cycles !! TDAT8 = data_read(TADR); + +macro rm_reg + call rm + call nomreq_addr + +macro rm16 + call rm + TDAT_H = TDAT_L; TADR++; + call rm + using std::swap; std::swap(TDAT_H, TDAT_L); + +macro wm + m_memrq_cycles !! data_write(TADR, TDAT8); + +macro wm16 + call wm + TADR++; TDAT8 = TDAT_H; + call wm + +macro wm16_sp + SP--; + m_memrq_cycles !! data_write(SPD, TDAT_H); + SP--; + m_memrq_cycles !! data_write(SPD, TDAT_L); + +macro rop + m_m1_cycles-2 !! TDAT8 = opcode_read(); + m_refresh_cb((I << 8) | (R2 & 0x80) | (R & 0x7f), 0x00, 0xff); + + 2 + PC++; R++; Q = QT; QT = YF | XF; + +macro arg + m_memrq_cycles !! TDAT8 = arg_read(); + PC++; + +macro arg16 + call arg + TDAT_H = TDAT_L; + call arg + using std::swap; swap(TDAT_H, TDAT_L); + +macro eax + call arg + m_ea = (u32)(u16)(IX + (s8)TDAT8); WZ = m_ea; + +macro eay + call arg + m_ea = (u32)(u16)(IY + (s8)TDAT8); WZ = m_ea; + +macro pop + m_memrq_cycles !! TDAT_L = data_read(SPD); + SP++; + m_memrq_cycles !! TDAT_H = data_read(SPD); + SP++; + +macro push + call nomreq_ir 1 + call wm16_sp + +macro jp + call arg16 + PCD = TDAT; WZ = PC; + +macro jp_cond + if (TDAT8) { + call arg16 + PC = TDAT; WZ = PCD; + } else { + // implicit do PC += 2 + call arg16 + WZ = TDAT; + } + +macro jr + call arg + TADR = PCD-1; + 5 * call nomreq_addr + PC += (s8)TDAT8; WZ = PC; + +macro jr_cond + if (TDAT8) { + call jr + } else { + call arg + } + +macro arg16_call + call arg16 + m_ea = TDAT; TADR = PCD-1; + call nomreq_addr + WZ = m_ea; TDAT = PC; + call wm16_sp + PCD = m_ea; + +macro call_cond + if (TDAT8) { + call arg16_call + } else { + call arg16 + WZ = TDAT; + } + +macro ret_cond + call nomreq_ir 1 + if (TDAT8) { + call pop + PC = TDAT; WZ = PC; + } + +macro retn + call pop + PC = TDAT; LOGINT("RETN m_iff1:%d m_iff2:%d\n", m_iff1, m_iff2); WZ = PC; m_iff1 = m_iff2; + +macro reti + call pop + PC = TDAT; WZ = PC; m_iff1 = m_iff2; daisy_call_reti_device(); + +macro ld_r_a + call nomreq_ir 1 + m_r = A; m_r2 = A & 0x80; // keep bit 7 of r + +macro ld_a_r + call nomreq_ir 1 + A = (m_r & 0x7f) | m_r2; set_f((F & CF) | SZ[A] | (m_iff2 << 2)); m_after_ldair = true; + +macro ld_i_a + call nomreq_ir 1 + m_i = A; + +macro ld_a_i + call nomreq_ir 1 + A = m_i; set_f((F & CF) | SZ[A] | (m_iff2 << 2)); m_after_ldair = true; + +macro rst addr + TDAT = PC; + call push + PC = addr; WZ = PC; + +macro rrd + TADR = HL; + call rm + WZ = HL+1; + 4 * call nomreq_addr + TDAT_H = TDAT8; TDAT8 = (TDAT8 >> 4) | (A << 4); + call wm + A = (A & 0xf0) | (TDAT_H & 0x0f); set_f((F & CF) | SZP[A]); + +macro rld + TADR = HL; + call rm + WZ = HL+1; + 4 * call nomreq_addr + TDAT_H = TDAT8; TDAT8 = (TDAT8 << 4) | (A & 0x0f); + call wm + A = (A & 0xf0) | (TDAT_H >> 4); set_f((F & CF) | SZP[A]); + +macro ex_sp + TDAT2 = TDAT; + call pop + TADR = SP-1; + call nomreq_addr + using std::swap; std::swap(TDAT, TDAT2); + call wm16_sp + TADR = SP; + 2 * call nomreq_addr + using std::swap; std::swap(TDAT, TDAT2); WZ = TDAT; + +macro add16 + call nomreq_ir 7 + { u32 res = TDAT + TDAT2; WZ = TDAT + 1; set_f((F & (SF | ZF | VF)) | (((TDAT ^ res ^ TDAT2) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (YF | XF))); TDAT = (u16)res; } + +macro adc_hl + call nomreq_ir 7 + { u32 res = HLD + TDAT + (F & CF); WZ = HL + 1; set_f((((HLD ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HLD ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13)); HL = (u16)res; } + +macro sbc_hl + call nomreq_ir 7 + { u32 res = HLD - TDAT - (F & CF); WZ = HL + 1; set_f((((HLD ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HLD) & (HLD ^ res) &0x8000) >> 13)); HL = (u16)res; } + +macro ldi + TADR = HL; + call rm + TADR = DE; + call wm + 2 * call nomreq_addr + set_f(F & (SF | ZF | CF)); if ((A + TDAT8) & 0x02) F |= YF; if ((A + TDAT8) & 0x08) F |= XF; HL++; DE++; BC--; if(BC) F |= VF; + +macro cpi + TADR = HL; + call rm + 5 * call nomreq_addr + { u8 res = A - TDAT8; WZ++; HL++; BC--; set_f((F & CF) | (SZ[res]&~(YF|XF)) | ((A^TDAT8^res)&HF) | NF); if (F & HF) res -= 1; if (res & 0x02) F |= YF; if (res & 0x08) F |= XF; if (BC) F |= VF; } + +macro ini + call nomreq_ir 1 + TADR = BC; + call in + WZ = BC + 1; B--; TADR = HL; + call wm + { HL++; set_f(SZ[B]); unsigned t = (unsigned)((C + 1) & 0xff) + (unsigned)TDAT8; if (TDAT8 & SF) F |= NF; if (t & 0x100) F |= HF | CF; F |= SZP[(u8)(t & 0x07) ^ B] & PF; } + +macro outi + call nomreq_ir 1 + TADR = HL; + call rm + B--; WZ = BC + 1; TADR = BC; + call out + { HL++; set_f(SZ[B]); unsigned t = (unsigned)L + (unsigned)TDAT8; if (TDAT8 & SF) F |= NF; if (t & 0x100) F |= HF | CF; F |= SZP[(u8)(t & 0x07) ^ B] & PF; } + +macro ldd + TADR = HL; + call rm + TADR = DE; + call wm + 2 * call nomreq_addr + { set_f(F & (SF | ZF | CF)); if ((A + TDAT8) & 0x02) F |= YF; if ((A + TDAT8) & 0x08) F |= XF; HL--; DE--; BC--; if (BC) F |= VF; } + +macro cpd + TADR = HL; + call rm + TADR = HL; + 5 * call nomreq_addr + { u8 res = A - TDAT8; WZ--; HL--; BC--; set_f((F & CF) | (SZ[res]&~(YF|XF)) | ((A^TDAT8^res)&HF) | NF); if (F & HF) res -= 1; if (res & 0x02) F |= YF; if (res & 0x08) F |= XF; if (BC) F |= VF; } + +macro ind + call nomreq_ir 1 + TADR = BC; + call in + WZ = BC - 1; B--; TADR = HL; + call wm + { HL--; set_f(SZ[B]); unsigned t = ((unsigned)(C - 1) & 0xff) + (unsigned)TDAT8; if (TDAT8 & SF) F |= NF; if (t & 0x100) F |= HF | CF; F |= SZP[(u8)(t & 0x07) ^ B] & PF; } + +macro outd + call nomreq_ir 1 + TADR = HL; + call rm + B--; WZ = BC - 1; TADR = BC; + call out + { HL--; set_f(SZ[B]); unsigned t = (unsigned)L + (unsigned)TDAT8; if (TDAT8 & SF) F |= NF; if (t & 0x100) F |= HF | CF; F |= SZP[(u8)(t & 0x07) ^ B] & PF; } + +macro ldir + call ldi + if (BC != 0) { + TADR = DE; + 5 * call nomreq_addr + PC -= 2; WZ = PC + 1; F &= ~(YF | XF); F |= (PC >> 8) & (YF | XF); + } + +macro cpir + call cpi + if (BC != 0 && !(F & ZF)) { + TADR = HL; + 5 * call nomreq_addr + PC -= 2; WZ = PC + 1; F &= ~(YF | XF); F |= (PC >> 8) & (YF | XF); + } + +macro inir + call ini + if (B != 0) { + TADR = HL; + 5 * call nomreq_addr + PC -= 2; block_io_interrupted_flags(); + } + +macro otir + call outi + if (B != 0) { + TADR = BC; + 5 * call nomreq_addr + PC -= 2; block_io_interrupted_flags(); + } + +macro lddr + call ldd + if (BC != 0) { + TADR = DE; + 5 * call nomreq_addr + PC -= 2; WZ = PC + 1; F &= ~(YF | XF); F |= (PC >> 8) & (YF | XF); + } + +macro cpdr + call cpd + if (BC != 0 && !(F & ZF)) { + TADR = HL; + 5 * call nomreq_addr + PC -= 2; WZ = PC + 1; F &= ~(YF | XF); F |= (PC >> 8) & (YF | XF); + } + +macro indr + call ind + if (B != 0) { + TADR = HL; + 5 * call nomreq_addr + PC -= 2; block_io_interrupted_flags(); + } + +macro otdr + call outd + if (B != 0) { + TADR = BC; + 5 * call nomreq_addr + PC -= 2; block_io_interrupted_flags(); + } + +macro jump %opcode + m_ref = 0x%opcode00; + if (true) return; + +macro jump_prefixed %prefix + m_ref = (%prefix << 16) | (TDAT8 << 8); + if (true) return; + +macro take_nmi + // Check if processor was halted + leave_halt(); + #if HAS_LDAIR_QUIRK + // reset parity flag after LD A,I or LD A,R + if (m_after_ldair) F &= ~PF; + #endif + m_iff1 = 0; + m_r++; + + 5 + TDAT = PC; + call wm16_sp + PCD = 0x0066; + WZ = PCD; + m_nmi_pending = false; + +macro take_interrupt + // check if processor was halted + leave_halt(); + // clear both interrupt flip flops + m_iff1 = m_iff2 = 0; + // say hi + // Not precise in all cases. z80 must finish current instruction (NOP) to reach this state - in such case frame timings are shifter from cb event if calculated based on it. + m_irqack_cb(true); + m_r++; + { + // fetch the IRQ vector + device_z80daisy_interface *intf = daisy_get_irq_device(); + m_tmp_irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w.l); + LOGINT("single INT m_tmp_irq_vector $%02x\n", m_tmp_irq_vector); + } + // 'interrupt latency' cycles + + 2 + // Interrupt mode 2. Call [i:databyte] + if (m_im == 2) { + // Zilog's datasheet claims that "the least-significant bit must be a zero." + // However, experiments have confirmed that IM 2 vectors do not have to be + // even, and all 8 bits will be used; even $FF is handled normally. + // CALL opcode timing + + 5 + TDAT = PC; + call wm16_sp + m_tmp_irq_vector = (m_tmp_irq_vector & 0xff) | (m_i << 8); + TADR = m_tmp_irq_vector; + call rm16 + PCD = TDAT; + LOGINT("IM2 [$%04x] = $%04x\n", m_tmp_irq_vector, PCD); + } else if (m_im == 1) { + // Interrupt mode 1. RST 38h + LOGINT("'%s' IM1 $0038\n", tag()); + // RST $38 + + 5 + TDAT = PC; + call wm16_sp + PCD = 0x0038; + } else { + /* Interrupt mode 0. We check for CALL and JP instructions, + if neither of these were found we assume a 1 byte opcode + was placed on the databus */ + LOGINT("IM0 $%04x\n", m_tmp_irq_vector); + + // check for nop + if (m_tmp_irq_vector != 0x00) { + if ((m_tmp_irq_vector & 0xff0000) == 0xcd0000) { + // CALL $xxxx cycles + + 11 + TDAT = PC; + call wm16_sp + PCD = m_tmp_irq_vector & 0xffff; + } else if ((m_tmp_irq_vector & 0xff0000) == 0xc30000) { + // JP $xxxx cycles + + 10 + PCD = m_tmp_irq_vector & 0xffff; + } else if (m_tmp_irq_vector == 0xfb) { + // rst (or other opcodes?) + + 4 + ei(); + } else if ((m_tmp_irq_vector & 0xc7) == 0xc7) { + // RST $xx cycles + + 5 + TDAT = PC; + call wm16_sp + PCD = m_tmp_irq_vector & 0x0038; + } else { + logerror("take_interrupt: unexpected opcode in im0 mode: 0x%02x\n", m_tmp_irq_vector); + } + } + } + WZ = PCD; + #if HAS_LDAIR_QUIRK + // reset parity flag after LD A,I or LD A,R + if (m_after_ldair) F &= ~PF; + #endif + +macro check_interrupts + if (m_nmi_pending) { + call take_nmi + } else if (m_irq_state != CLEAR_LINE && m_iff1 && !m_after_ei) { + call take_interrupt + } + +macro nsc800_take_interrupt + // Check if processor was halted + leave_halt(); + // Clear both interrupt flip flops + m_iff1 = m_iff2 = 0; + // 'interrupt latency' cycles + + 7 + if (m_nsc800_irq_state[NSC800_RSTA]) { + TDAT = PC; + call wm16_sp + PCD = 0x003c; + } else if (m_nsc800_irq_state[NSC800_RSTB]) { + TDAT = PC; + call wm16_sp + PCD = 0x0034; + } else if (m_nsc800_irq_state[NSC800_RSTC]) { + TDAT = PC; + call wm16_sp + PCD = 0x002c; + } else { + + 2 * m_memrq_cycles + ; + } + WZ = PCD; + #if HAS_LDAIR_QUIRK + // reset parity flag after LD A,I or LD A,R + if (m_after_ldair) F &= ~PF; + #endif + +macro ncs800_check_interrupts + if (m_nmi_pending) { + call take_nmi + } else if ((m_nsc800_irq_state[NSC800_RSTA] != CLEAR_LINE || m_nsc800_irq_state[NSC800_RSTB] != CLEAR_LINE || m_nsc800_irq_state[NSC800_RSTC] != CLEAR_LINE) && m_iff1 && !m_after_ei) { + call nsc800_take_interrupt + } else if (m_irq_state != CLEAR_LINE && m_iff1 && !m_after_ei) { + call take_interrupt + } + + +########################################################## +# ROP +########################################################## +rop:ffff + call check_interrupts + m_after_ei = false; + m_after_ldair = false; + PRVPC = PCD; + debugger_instruction_hook(PCD); + call rop + +ncs800rop:ffff + call ncs800_check_interrupts + m_after_ei = false; + m_after_ldair = false; + PRVPC = PCD; + debugger_instruction_hook(PCD); + call rop + + +########################################################## +# opcodes with CB prefix +# rotate, shift and bit operations +########################################################## +cb00 # RLC B + B = rlc(B); + +cb01 # RLC C + C = rlc(C); + +cb02 # RLC D + D = rlc(D); + +cb03 # RLC E + E = rlc(E); + +cb04 # RLC H + H = rlc(H); + +cb05 # RLC L + L = rlc(L); + +cb06 # RLC (HL) + TADR = HL; + call rm_reg + TDAT8 = rlc(TDAT8); + call wm + +cb07 # RLC A + A = rlc(A); + +cb08 # RRC B + B = rrc(B); + +cb09 # RRC C + C = rrc(C); + +cb0a # RRC D + D = rrc(D); + +cb0b # RRC E + E = rrc(E); + +cb0c # RRC H + H = rrc(H); + +cb0d # RRC L + L = rrc(L); + +cb0e # RRC (HL) + TADR = HL; + call rm_reg + TDAT8 = rrc(TDAT8); + call wm + +cb0f # RRC A + A = rrc(A); + +cb10 # RL B + B = rl(B); + +cb11 # RL C + C = rl(C); + +cb12 # RL D + D = rl(D); + +cb13 # RL E + E = rl(E); + +cb14 # RL H + H = rl(H); + +cb15 # RL L + L = rl(L); + +cb16 # RL (HL) + TADR = HL; + call rm_reg + TDAT8 = rl(TDAT8); + call wm + +cb17 # RL A + A = rl(A); + +cb18 # RR B + B = rr(B); + +cb19 # RR C + C = rr(C); + +cb1a # RR D + D = rr(D); + +cb1b # RR E + E = rr(E); + +cb1c # RR H + H = rr(H); + +cb1d # RR L + L = rr(L); + +cb1e # RR (HL) + TADR = HL; + call rm_reg + TDAT8 = rr(TDAT8); + call wm + +cb1f # RR A + A = rr(A); + +cb20 # SLA B + B = sla(B); + +cb21 # SLA C + C = sla(C); + +cb22 # SLA D + D = sla(D); + +cb23 # SLA E + E = sla(E); + +cb24 # SLA H + H = sla(H); + +cb25 # SLA L + L = sla(L); + +cb26 # SLA (HL) + TADR = HL; + call rm_reg + TDAT8 = sla(TDAT8); + call wm + +cb27 # SLA A + A = sla(A); + +cb28 # SRA B + B = sra(B); + +cb29 # SRA C + C = sra(C); + +cb2a # SRA D + D = sra(D); + +cb2b # SRA E + E = sra(E); + +cb2c # SRA H + H = sra(H); + +cb2d # SRA L + L = sra(L); + +cb2e # SRA (HL) + TADR = HL; + call rm_reg + TDAT8 = sra(TDAT8); + call wm + +cb2f # SRA A + A = sra(A); + +cb30 # SLL B + B = sll(B); + +cb31 # SLL C + C = sll(C); + +cb32 # SLL D + D = sll(D); + +cb33 # SLL E + E = sll(E); + +cb34 # SLL H + H = sll(H); + +cb35 # SLL L + L = sll(L); + +cb36 # SLL (HL) + TADR = HL; + call rm_reg + TDAT8 = sll(TDAT8); + call wm + +cb37 # SLL A + A = sll(A); + +cb38 # SRL B + B = srl(B); + +cb39 # SRL C + C = srl(C); + +cb3a # SRL D + D = srl(D); + +cb3b # SRL E + E = srl(E); + +cb3c # SRL H + H = srl(H); + +cb3d # SRL L + L = srl(L); + +cb3e # SRL (HL) + TADR = HL; + call rm_reg + TDAT8 = srl(TDAT8); + call wm + +cb3f # SRL A + A = srl(A); + +cb40 # BIT 0,B + bit(0, B); + +cb41 # BIT 0,C + bit(0, C); + +cb42 # BIT 0,D + bit(0, D); + +cb43 # BIT 0,E + bit(0, E); + +cb44 # BIT 0,H + bit(0, H); + +cb45 # BIT 0,L + bit(0, L); + +cb46 # BIT 0,(HL) + TADR = HL; + call rm_reg + bit_hl(0, TDAT8); + +cb47 # BIT 0,A + bit(0, A); + +cb48 # BIT 1,B + bit(1, B); + +cb49 # BIT 1,C + bit(1, C); + +cb4a # BIT 1,D + bit(1, D); + +cb4b # BIT 1,E + bit(1, E); + +cb4c # BIT 1,H + bit(1, H); + +cb4d # BIT 1,L + bit(1, L); + +cb4e # BIT 1,(HL) + TADR = HL; + call rm_reg + bit_hl(1, TDAT8); + +cb4f # BIT 1,A + bit(1, A); + +cb50 # BIT 2,B + bit(2, B); + +cb51 # BIT 2,C + bit(2, C); + +cb52 # BIT 2,D + bit(2, D); + +cb53 # BIT 2,E + bit(2, E); + +cb54 # BIT 2,H + bit(2, H); + +cb55 # BIT 2,L + bit(2, L); + +cb56 # BIT 2,(HL) + TADR = HL; + call rm_reg + bit_hl(2, TDAT8); + +cb57 # BIT 2,A + bit(2, A); + +cb58 # BIT 3,B + bit(3, B); + +cb59 # BIT 3,C + bit(3, C); + +cb5a # BIT 3,D + bit(3, D); + +cb5b # BIT 3,E + bit(3, E); + +cb5c # BIT 3,H + bit(3, H); + +cb5d # BIT 3,L + bit(3, L); + +cb5e # BIT 3,(HL) + TADR = HL; + call rm_reg + bit_hl(3, TDAT8); + +cb5f # BIT 3,A + bit(3, A); + +cb60 # BIT 4,B + bit(4, B); + +cb61 # BIT 4,C + bit(4, C); + +cb62 # BIT 4,D + bit(4, D); + +cb63 # BIT 4,E + bit(4, E); + +cb64 # BIT 4,H + bit(4, H); + +cb65 # BIT 4,L + bit(4, L); + +cb66 # BIT 4,(HL) + TADR = HL; + call rm_reg + bit_hl(4, TDAT8); + +cb67 # BIT 4,A + bit(4, A); + +cb68 # BIT 5,B + bit(5, B); + +cb69 # BIT 5,C + bit(5, C); + +cb6a # BIT 5,D + bit(5, D); + +cb6b # BIT 5,E + bit(5, E); + +cb6c # BIT 5,H + bit(5, H); + +cb6d # BIT 5,L + bit(5, L); + +cb6e # BIT 5,(HL) + TADR = HL; + call rm_reg + bit_hl(5, TDAT8); + +cb6f # BIT 5,A + bit(5, A); + +cb70 # BIT 6,B + bit(6, B); + +cb71 # BIT 6,C + bit(6, C); + +cb72 # BIT 6,D + bit(6, D); + +cb73 # BIT 6,E + bit(6, E); + +cb74 # BIT 6,H + bit(6, H); + +cb75 # BIT 6,L + bit(6, L); + +cb76 # BIT 6,(HL) + TADR = HL; + call rm_reg + bit_hl(6, TDAT8); + +cb77 # BIT 6,A + bit(6, A); + +cb78 # BIT 7,B + bit(7, B); + +cb79 # BIT 7,C + bit(7, C); + +cb7a # BIT 7,D + bit(7, D); + +cb7b # BIT 7,E + bit(7, E); + +cb7c # BIT 7,H + bit(7, H); + +cb7d # BIT 7,L + bit(7, L); + +cb7e # BIT 7,(HL) + TADR = HL; + call rm_reg + bit_hl(7, TDAT8); + +cb7f # BIT 7,A + bit(7, A); + +cb80 # RES 0,B + B = res(0, B); + +cb81 # RES 0,C + C = res(0, C); + +cb82 # RES 0,D + D = res(0, D); + +cb83 # RES 0,E + E = res(0, E); + +cb84 # RES 0,H + H = res(0, H); + +cb85 # RES 0,L + L = res(0, L); + +cb86 # RES 0,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(0, TDAT8); + call wm + +cb87 # RES 0,A + A = res(0, A); + +cb88 # RES 1,B + B = res(1, B); + +cb89 # RES 1,C + C = res(1, C); + +cb8a # RES 1,D + D = res(1, D); + +cb8b # RES 1,E + E = res(1, E); + +cb8c # RES 1,H + H = res(1, H); + +cb8d # RES 1,L + L = res(1, L); + +cb8e # RES 1,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(1, TDAT8); + call wm + +cb8f # RES 1,A + A = res(1, A); + +cb90 # RES 2,B + B = res(2, B); + +cb91 # RES 2,C + C = res(2, C); + +cb92 # RES 2,D + D = res(2, D); + +cb93 # RES 2,E + E = res(2, E); + +cb94 # RES 2,H + H = res(2, H); + +cb95 # RES 2,L + L = res(2, L); + +cb96 # RES 2,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(2, TDAT8); + call wm + +cb97 # RES 2,A + A = res(2, A); + +cb98 # RES 3,B + B = res(3, B); + +cb99 # RES 3,C + C = res(3, C); + +cb9a # RES 3,D + D = res(3, D); + +cb9b # RES 3,E + E = res(3, E); + +cb9c # RES 3,H + H = res(3, H); + +cb9d # RES 3,L + L = res(3, L); + +cb9e # RES 3,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(3, TDAT8); + call wm + +cb9f # RES 3,A + A = res(3, A); + +cba0 # RES 4,B + B = res(4, B); + +cba1 # RES 4,C + C = res(4, C); + +cba2 # RES 4,D + D = res(4, D); + +cba3 # RES 4,E + E = res(4, E); + +cba4 # RES 4,H + H = res(4, H); + +cba5 # RES 4,L + L = res(4, L); + +cba6 # RES 4,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(4, TDAT8); + call wm + +cba7 # RES 4,A + A = res(4, A); + +cba8 # RES 5,B + B = res(5, B); + +cba9 # RES 5,C + C = res(5, C); + +cbaa # RES 5,D + D = res(5, D); + +cbab # RES 5,E + E = res(5, E); + +cbac # RES 5,H + H = res(5, H); + +cbad # RES 5,L + L = res(5, L); + +cbae # RES 5,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(5, TDAT8); + call wm + +cbaf # RES 5,A + A = res(5, A); + +cbb0 # RES 6,B + B = res(6, B); + +cbb1 # RES 6,C + C = res(6, C); + +cbb2 # RES 6,D + D = res(6, D); + +cbb3 # RES 6,E + E = res(6, E); + +cbb4 # RES 6,H + H = res(6, H); + +cbb5 # RES 6,L + L = res(6, L); + +cbb6 # RES 6,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(6, TDAT8); + call wm + +cbb7 # RES 6,A + A = res(6, A); + +cbb8 # RES 7,B + B = res(7, B); + +cbb9 # RES 7,C + C = res(7, C); + +cbba # RES 7,D + D = res(7, D); + +cbbb # RES 7,E + E = res(7, E); + +cbbc # RES 7,H + H = res(7, H); + +cbbd # RES 7,L + L = res(7, L); + +cbbe # RES 7,(HL) + TADR = HL; + call rm_reg + TDAT8 = res(7, TDAT8); + call wm + +cbbf # RES 7,A + A = res(7, A); + +cbc0 # SET 0,B + B = set(0, B); + +cbc1 # SET 0,C + C = set(0, C); + +cbc2 # SET 0,D + D = set(0, D); + +cbc3 # SET 0,E + E = set(0, E); + +cbc4 # SET 0,H + H = set(0, H); + +cbc5 # SET 0,L + L = set(0, L); + +cbc6 # SET 0,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(0, TDAT8); + call wm + +cbc7 # SET 0,A + A = set(0, A); + +cbc8 # SET 1,B + B = set(1, B); + +cbc9 # SET 1,C + C = set(1, C); + +cbca # SET 1,D + D = set(1, D); + +cbcb # SET 1,E + E = set(1, E); + +cbcc # SET 1,H + H = set(1, H); + +cbcd # SET 1,L + L = set(1, L); + +cbce # SET 1,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(1, TDAT8); + call wm + +cbcf # SET 1,A + A = set(1, A); + +cbd0 # SET 2,B + B = set(2, B); + +cbd1 # SET 2,C + C = set(2, C); + +cbd2 # SET 2,D + D = set(2, D); + +cbd3 # SET 2,E + E = set(2, E); + +cbd4 # SET 2,H + H = set(2, H); + +cbd5 # SET 2,L + L = set(2, L); + +cbd6 # SET 2,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(2, TDAT8); + call wm + +cbd7 # SET 2,A + A = set(2, A); + +cbd8 # SET 3,B + B = set(3, B); + +cbd9 # SET 3,C + C = set(3, C); + +cbda # SET 3,D + D = set(3, D); + +cbdb # SET 3,E + E = set(3, E); + +cbdc # SET 3,H + H = set(3, H); + +cbdd # SET 3,L + L = set(3, L); + +cbde # SET 3,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(3, TDAT8); + call wm + +cbdf # SET 3,A + A = set(3, A); + +cbe0 # SET 4,B + B = set(4, B); + +cbe1 # SET 4,C + C = set(4, C); + +cbe2 # SET 4,D + D = set(4, D); + +cbe3 # SET 4,E + E = set(4, E); + +cbe4 # SET 4,H + H = set(4, H); + +cbe5 # SET 4,L + L = set(4, L); + +cbe6 # SET 4,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(4, TDAT8); + call wm + +cbe7 # SET 4,A + A = set(4, A); + +cbe8 # SET 5,B + B = set(5, B); + +cbe9 # SET 5,C + C = set(5, C); + +cbea # SET 5,D + D = set(5, D); + +cbeb # SET 5,E + E = set(5, E); + +cbec # SET 5,H + H = set(5, H); + +cbed # SET 5,L + L = set(5, L); + +cbee # SET 5,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(5, TDAT8); + call wm + +cbef # SET 5,A + A = set(5, A); + +cbf0 # SET 6,B + B = set(6, B); + +cbf1 # SET 6,C + C = set(6, C); + +cbf2 # SET 6,D + D = set(6, D); + +cbf3 # SET 6,E + E = set(6, E); + +cbf4 # SET 6,H + H = set(6, H); + +cbf5 # SET 6,L + L = set(6, L); + +cbf6 # SET 6,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(6, TDAT8); + call wm + +cbf7 # SET 6,A + A = set(6, A); + +cbf8 # SET 7,B + B = set(7, B); + +cbf9 # SET 7,C + C = set(7, C); + +cbfa # SET 7,D + D = set(7, D); + +cbfb # SET 7,E + E = set(7, E); + +cbfc # SET 7,H + H = set(7, H); + +cbfd # SET 7,L + L = set(7, L); + +cbfe # SET 7,(HL) + TADR = HL; + call rm_reg + TDAT8 = set(7, TDAT8); + call wm + +cbff # SET 7,A + A = set(7, A); + + +########################################################## +# opcodes with DD/FD CB prefix +# rotate, shift and bit operations with (IX+o) +########################################################## +fe00 # RLC B = (XY+o) + TADR = m_ea; + call rm_reg + B = rlc(TDAT8); TDAT8 = B; + call wm + +fe01 # RLC C = (XY+o) + TADR = m_ea; + call rm_reg + C = rlc(TDAT8); TDAT8 = C; + call wm + +fe02 # RLC D = (XY+o) + TADR = m_ea; + call rm_reg + D = rlc(TDAT8); TDAT8 = D; + call wm + +fe03 # RLC E = (XY+o) + TADR = m_ea; + call rm_reg + E = rlc(TDAT8); TDAT8 = E; + call wm + +fe04 # RLC H = (XY+o) + TADR = m_ea; + call rm_reg + H = rlc(TDAT8); TDAT8 = H; + call wm + +fe05 # RLC L = (XY+o) + TADR = m_ea; + call rm_reg + L = rlc(TDAT8); TDAT8 = L; + call wm + +fe06 # RLC (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = rlc(TDAT8); + call wm + +fe07 # RLC A = (XY+o) + TADR = m_ea; + call rm_reg + A = rlc(TDAT8); TDAT8 = A; + call wm + +fe08 # RRC B = (XY+o) + TADR = m_ea; + call rm_reg + B = rrc(TDAT8); TDAT8 = B; + call wm + +fe09 # RRC C = (XY+o) + TADR = m_ea; + call rm_reg + C = rrc(TDAT8); TDAT8 = C; + call wm + +fe0a # RRC D = (XY+o) + TADR = m_ea; + call rm_reg + D = rrc(TDAT8); TDAT8 = D; + call wm + +fe0b # RRC E = (XY+o) + TADR = m_ea; + call rm_reg + E = rrc(TDAT8); TDAT8 = E; + call wm + +fe0c # RRC H = (XY+o) + TADR = m_ea; + call rm_reg + H = rrc(TDAT8); TDAT8 = H; + call wm + +fe0d # RRC L = (XY+o) + TADR = m_ea; + call rm_reg + L = rrc(TDAT8); TDAT8 = L; + call wm + +fe0e # RRC (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = rrc(TDAT8); + call wm + +fe0f # RRC A = (XY+o) + TADR = m_ea; + call rm_reg + A = rrc(TDAT8); TDAT8 = A; + call wm + +fe10 # RL B = (XY+o) + TADR = m_ea; + call rm_reg + B = rl(TDAT8); TDAT8 = B; + call wm + +fe11 # RL C = (XY+o) + TADR = m_ea; + call rm_reg + C = rl(TDAT8); TDAT8 = C; + call wm + +fe12 # RL D = (XY+o) + TADR = m_ea; + call rm_reg + D = rl(TDAT8); TDAT8 = D; + call wm + +fe13 # RL E = (XY+o) + TADR = m_ea; + call rm_reg + E = rl(TDAT8); TDAT8 = E; + call wm + +fe14 # RL H = (XY+o) + TADR = m_ea; + call rm_reg + H = rl(TDAT8); TDAT8 = H; + call wm + +fe15 # RL L = (XY+o) + TADR = m_ea; + call rm_reg + L = rl(TDAT8); TDAT8 = L; + call wm + +fe16 # RL (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = rl(TDAT8); + call wm + +fe17 # RL A = (XY+o) + TADR = m_ea; + call rm_reg + A = rl(TDAT8); TDAT8 = A; + call wm + +fe18 # RR B = (XY+o) + TADR = m_ea; + call rm_reg + B = rr(TDAT8); TDAT8 = B; + call wm + +fe19 # RR C = (XY+o) + TADR = m_ea; + call rm_reg + C = rr(TDAT8); TDAT8 = C; + call wm + +fe1a # RR D = (XY+o) + TADR = m_ea; + call rm_reg + D = rr(TDAT8); TDAT8 = D; + call wm + +fe1b # RR E = (XY+o) + TADR = m_ea; + call rm_reg + E = rr(TDAT8); TDAT8 = E; + call wm + +fe1c # RR H = (XY+o) + TADR = m_ea; + call rm_reg + H = rr(TDAT8); TDAT8 = H; + call wm + +fe1d # RR L = (XY+o) + TADR = m_ea; + call rm_reg + L = rr(TDAT8); TDAT8 = L; + call wm + +fe1e # RR (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = rr(TDAT8); + call wm + +fe1f # RR A = (XY+o) + TADR = m_ea; + call rm_reg + A = rr(TDAT8); TDAT8 = A; + call wm + +fe20 # SLA B = (XY+o) + TADR = m_ea; + call rm_reg + B = sla(TDAT8); TDAT8 = B; + call wm + +fe21 # SLA C = (XY+o) + TADR = m_ea; + call rm_reg + C = sla(TDAT8); TDAT8 = C; + call wm + +fe22 # SLA D = (XY+o) + TADR = m_ea; + call rm_reg + D = sla(TDAT8); TDAT8 = D; + call wm + +fe23 # SLA E = (XY+o) + TADR = m_ea; + call rm_reg + E = sla(TDAT8); TDAT8 = E; + call wm + +fe24 # SLA H = (XY+o) + TADR = m_ea; + call rm_reg + H = sla(TDAT8); TDAT8 = H; + call wm + +fe25 # SLA L = (XY+o) + TADR = m_ea; + call rm_reg + L = sla(TDAT8); TDAT8 = L; + call wm + +fe26 # SLA (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = sla(TDAT8); + call wm + +fe27 # SLA A = (XY+o) + TADR = m_ea; + call rm_reg + A = sla(TDAT8); TDAT8 = A; + call wm + +fe28 # SRA B = (XY+o) + TADR = m_ea; + call rm_reg + B = sra(TDAT8); TDAT8 = B; + call wm + +fe29 # SRA C = (XY+o) + TADR = m_ea; + call rm_reg + C = sra(TDAT8); TDAT8 = C; + call wm + +fe2a # SRA D = (XY+o) + TADR = m_ea; + call rm_reg + D = sra(TDAT8); TDAT8 = D; + call wm + +fe2b # SRA E = (XY+o) + TADR = m_ea; + call rm_reg + E = sra(TDAT8); TDAT8 = E; + call wm + +fe2c # SRA H = (XY+o) + TADR = m_ea; + call rm_reg + H = sra(TDAT8); TDAT8 = H; + call wm + +fe2d # SRA L = (XY+o) + TADR = m_ea; + call rm_reg + L = sra(TDAT8); TDAT8 = L; + call wm + +fe2e # SRA (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = sra(TDAT8); + call wm + +fe2f # SRA A = (XY+o) + TADR = m_ea; + call rm_reg + A = sra(TDAT8); TDAT8 = A; + call wm + +fe30 # SLL B = (XY+o) + TADR = m_ea; + call rm_reg + B = sll(TDAT8); TDAT8 = B; + call wm + +fe31 # SLL C = (XY+o) + TADR = m_ea; + call rm_reg + C = sll(TDAT8); TDAT8 = C; + call wm + +fe32 # SLL D = (XY+o) + TADR = m_ea; + call rm_reg + D = sll(TDAT8); TDAT8 = D; + call wm + +fe33 # SLL E = (XY+o) + TADR = m_ea; + call rm_reg + E = sll(TDAT8); TDAT8 = E; + call wm + +fe34 # SLL H = (XY+o) + TADR = m_ea; + call rm_reg + H = sll(TDAT8); TDAT8 = H; + call wm + +fe35 # SLL L = (XY+o) + TADR = m_ea; + call rm_reg + L = sll(TDAT8); TDAT8 = L; + call wm + +fe36 # SLL (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = sll(TDAT8); + call wm + +fe37 # SLL A = (XY+o) + TADR = m_ea; + call rm_reg + A = sll(TDAT8); TDAT8 = A; + call wm + +fe38 # SRL B = (XY+o) + TADR = m_ea; + call rm_reg + B = srl(TDAT8); TDAT8 = B; + call wm + +fe39 # SRL C = (XY+o) + TADR = m_ea; + call rm_reg + C = srl(TDAT8); TDAT8 = C; + call wm + +fe3a # SRL D = (XY+o) + TADR = m_ea; + call rm_reg + D = srl(TDAT8); TDAT8 = D; + call wm + +fe3b # SRL E = (XY+o) + TADR = m_ea; + call rm_reg + E = srl(TDAT8); TDAT8 = E; + call wm + +fe3c # SRL H = (XY+o) + TADR = m_ea; + call rm_reg + H = srl(TDAT8); TDAT8 = H; + call wm + +fe3d # SRL L = (XY+o) + TADR = m_ea; + call rm_reg + L = srl(TDAT8); TDAT8 = L; + call wm + +fe3e # SRL (XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = srl(TDAT8); + call wm + +fe3f # SRL A = (XY+o) + TADR = m_ea; + call rm_reg + A = srl(TDAT8); TDAT8 = A; + call wm + +fe40 # BIT 0,(XY+o) + call jump fe46 + +fe41 # BIT 0,(XY+o) + call jump fe46 + +fe42 # BIT 0,(XY+o) + call jump fe46 + +fe43 # BIT 0,(XY+o) + call jump fe46 + +fe44 # BIT 0,(XY+o) + call jump fe46 + +fe45 # BIT 0,(XY+o) + call jump fe46 + +fe46 # BIT 0,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(0, TDAT8); + +fe47 # BIT 0,(XY+o) + call jump fe46 + +fe48 # BIT 1,(XY+o) + call jump fe4e + +fe49 # BIT 1,(XY+o) + call jump fe4e + +fe4a # BIT 1,(XY+o) + call jump fe4e + +fe4b # BIT 1,(XY+o) + call jump fe4e + +fe4c # BIT 1,(XY+o) + call jump fe4e + +fe4d # BIT 1,(XY+o) + call jump fe4e + +fe4e # BIT 1,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(1, TDAT8); + +fe4f # BIT 1,(XY+o) + call jump fe4e + +fe50 # BIT 2,(XY+o) + call jump fe56 + +fe51 # BIT 2,(XY+o) + call jump fe56 + +fe52 # BIT 2,(XY+o) + call jump fe56 + +fe53 # BIT 2,(XY+o) + call jump fe56 + +fe54 # BIT 2,(XY+o) + call jump fe56 + +fe55 # BIT 2,(XY+o) + call jump fe56 + +fe56 # BIT 2,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(2, TDAT8); + +fe57 # BIT 2,(XY+o) + call jump fe56 + +fe58 # BIT 3,(XY+o) + call jump fe5e + +fe59 # BIT 3,(XY+o) + call jump fe5e + +fe5a # BIT 3,(XY+o) + call jump fe5e + +fe5b # BIT 3,(XY+o) + call jump fe5e + +fe5c # BIT 3,(XY+o) + call jump fe5e + +fe5d # BIT 3,(XY+o) + call jump fe5e + +fe5e # BIT 3,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(3, TDAT8); + +fe5f # BIT 3,(XY+o) + call jump fe5e + +fe60 # BIT 4,(XY+o) + call jump fe66 + +fe61 # BIT 4,(XY+o) + call jump fe66 + +fe62 # BIT 4,(XY+o) + call jump fe66 + +fe63 # BIT 4,(XY+o) + call jump fe66 + +fe64 # BIT 4,(XY+o) + call jump fe66 + +fe65 # BIT 4,(XY+o) + call jump fe66 + +fe66 # BIT 4,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(4, TDAT8); + +fe67 # BIT 4,(XY+o) + call jump fe66 + +fe68 # BIT 5,(XY+o) + call jump fe6e + +fe69 # BIT 5,(XY+o) + call jump fe6e + +fe6a # BIT 5,(XY+o) + call jump fe6e + +fe6b # BIT 5,(XY+o) + call jump fe6e + +fe6c # BIT 5,(XY+o) + call jump fe6e + +fe6d # BIT 5,(XY+o) + call jump fe6e + +fe6e # BIT 5,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(5, TDAT8); + +fe6f # BIT 5,(XY+o) + call jump fe6e + +fe70 # BIT 6,(XY+o) + call jump fe76 + +fe71 # BIT 6,(XY+o) + call jump fe76 + +fe72 # BIT 6,(XY+o) + call jump fe76 + +fe73 # BIT 6,(XY+o) + call jump fe76 + +fe74 # BIT 6,(XY+o) + call jump fe76 + +fe75 # BIT 6,(XY+o) + call jump fe76 + +fe76 # BIT 6,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(6, TDAT8); + +fe77 # BIT 6,(XY+o) + call jump fe76 + +fe78 # BIT 7,(XY+o) + call jump fe7e + +fe79 # BIT 7,(XY+o) + call jump fe7e + +fe7a # BIT 7,(XY+o) + call jump fe7e + +fe7b # BIT 7,(XY+o) + call jump fe7e + +fe7c # BIT 7,(XY+o) + call jump fe7e + +fe7d # BIT 7,(XY+o) + call jump fe7e + +fe7e # BIT 7,(XY+o) + TADR = m_ea; + call rm_reg + bit_xy(7, TDAT8); + +fe7f # BIT 7,(XY+o) + call jump fe7e + +fe80 # RES 0,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(0, TDAT8); TDAT8 = B; + call wm + +fe81 # RES 0,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(0, TDAT8); TDAT8 = C; + call wm + +fe82 # RES 0,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(0, TDAT8); TDAT8 = D; + call wm + +fe83 # RES 0,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(0, TDAT8); TDAT8 = E; + call wm + +fe84 # RES 0,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(0, TDAT8); TDAT8 = H; + call wm + +fe85 # RES 0,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(0, TDAT8); TDAT8 = L; + call wm + +fe86 # RES 0,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(0, TDAT8); + call wm + +fe87 # RES 0,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(0, TDAT8); TDAT8 = A; + call wm + +fe88 # RES 1,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(1, TDAT8); TDAT8 = B; + call wm + +fe89 # RES 1,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(1, TDAT8); TDAT8 = C; + call wm + +fe8a # RES 1,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(1, TDAT8); TDAT8 = D; + call wm + +fe8b # RES 1,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(1, TDAT8); TDAT8 = E; + call wm + +fe8c # RES 1,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(1, TDAT8); TDAT8 = H; + call wm + +fe8d # RES 1,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(1, TDAT8); TDAT8 = L; + call wm + +fe8e # RES 1,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(1, TDAT8); + call wm + +fe8f # RES 1,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(1, TDAT8); TDAT8 = A; + call wm + +fe90 # RES 2,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(2, TDAT8); TDAT8 = B; + call wm + +fe91 # RES 2,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(2, TDAT8); TDAT8 = C; + call wm + +fe92 # RES 2,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(2, TDAT8); TDAT8 = D; + call wm + +fe93 # RES 2,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(2, TDAT8); TDAT8 = E; + call wm + +fe94 # RES 2,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(2, TDAT8); TDAT8 = H; + call wm + +fe95 # RES 2,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(2, TDAT8); TDAT8 = L; + call wm + +fe96 # RES 2,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(2, TDAT8); + call wm + +fe97 # RES 2,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(2, TDAT8); TDAT8 = A; + call wm + +fe98 # RES 3,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(3, TDAT8); TDAT8 = B; + call wm + +fe99 # RES 3,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(3, TDAT8); TDAT8 = C; + call wm + +fe9a # RES 3,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(3, TDAT8); TDAT8 = D; + call wm + +fe9b # RES 3,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(3, TDAT8); TDAT8 = E; + call wm + +fe9c # RES 3,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(3, TDAT8); TDAT8 = H; + call wm + +fe9d # RES 3,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(3, TDAT8); TDAT8 = L; + call wm + +fe9e # RES 3,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(3, TDAT8); + call wm + +fe9f # RES 3,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(3, TDAT8); TDAT8 = A; + call wm + +fea0 # RES 4,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(4, TDAT8); TDAT8 = B; + call wm + +fea1 # RES 4,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(4, TDAT8); TDAT8 = C; + call wm + +fea2 # RES 4,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(4, TDAT8); TDAT8 = D; + call wm + +fea3 # RES 4,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(4, TDAT8); TDAT8 = E; + call wm + +fea4 # RES 4,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(4, TDAT8); TDAT8 = H; + call wm + +fea5 # RES 4,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(4, TDAT8); TDAT8 = L; + call wm + +fea6 # RES 4,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(4, TDAT8); + call wm + +fea7 # RES 4,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(4, TDAT8); TDAT8 = A; + call wm + +fea8 # RES 5,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(5, TDAT8); TDAT8 = B; + call wm + +fea9 # RES 5,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(5, TDAT8); TDAT8 = C; + call wm + +feaa # RES 5,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(5, TDAT8); TDAT8 = D; + call wm + +feab # RES 5,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(5, TDAT8); TDAT8 = E; + call wm + +feac # RES 5,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(5, TDAT8); TDAT8 = H; + call wm + +fead # RES 5,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(5, TDAT8); TDAT8 = L; + call wm + +feae # RES 5,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(5, TDAT8); + call wm + +feaf # RES 5,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(5, TDAT8); TDAT8 = A; + call wm + +feb0 # RES 6,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(6, TDAT8); TDAT8 = B; + call wm + +feb1 # RES 6,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(6, TDAT8); TDAT8 = C; + call wm + +feb2 # RES 6,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(6, TDAT8); TDAT8 = D; + call wm + +feb3 # RES 6,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(6, TDAT8); TDAT8 = E; + call wm + +feb4 # RES 6,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(6, TDAT8); TDAT8 = H; + call wm + +feb5 # RES 6,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(6, TDAT8); TDAT8 = L; + call wm + +feb6 # RES 6,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(6, TDAT8); + call wm + +feb7 # RES 6,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(6, TDAT8); TDAT8 = A; + call wm + +feb8 # RES 7,B = (XY+o) + TADR = m_ea; + call rm_reg + B = res(7, TDAT8); TDAT8 = B; + call wm + +feb9 # RES 7,C = (XY+o) + TADR = m_ea; + call rm_reg + C = res(7, TDAT8); TDAT8 = C; + call wm + +feba # RES 7,D = (XY+o) + TADR = m_ea; + call rm_reg + D = res(7, TDAT8); TDAT8 = D; + call wm + +febb # RES 7,E = (XY+o) + TADR = m_ea; + call rm_reg + E = res(7, TDAT8); TDAT8 = E; + call wm + +febc # RES 7,H = (XY+o) + TADR = m_ea; + call rm_reg + H = res(7, TDAT8); TDAT8 = H; + call wm + +febd # RES 7,L = (XY+o) + TADR = m_ea; + call rm_reg + L = res(7, TDAT8); TDAT8 = L; + call wm + +febe # RES 7,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = res(7, TDAT8); + call wm + +febf # RES 7,A = (XY+o) + TADR = m_ea; + call rm_reg + A = res(7, TDAT8); TDAT8 = A; + call wm + +fec0 # SET 0,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(0, TDAT8); TDAT8 = B; + call wm + +fec1 # SET 0,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(0, TDAT8); TDAT8 = C; + call wm + +fec2 # SET 0,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(0, TDAT8); TDAT8 = D; + call wm + +fec3 # SET 0,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(0, TDAT8); TDAT8 = E; + call wm + +fec4 # SET 0,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(0, TDAT8); TDAT8 = H; + call wm + +fec5 # SET 0,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(0, TDAT8); TDAT8 = L; + call wm + +fec6 # SET 0,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(0, TDAT8); + call wm + +fec7 # SET 0,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(0, TDAT8); TDAT8 = A; + call wm + +fec8 # SET 1,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(1, TDAT8); TDAT8 = B; + call wm + +fec9 # SET 1,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(1, TDAT8); TDAT8 = C; + call wm + +feca # SET 1,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(1, TDAT8); TDAT8 = D; + call wm + +fecb # SET 1,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(1, TDAT8); TDAT8 = E; + call wm + +fecc # SET 1,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(1, TDAT8); TDAT8 = H; + call wm + +fecd # SET 1,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(1, TDAT8); TDAT8 = L; + call wm + +fece # SET 1,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(1, TDAT8); + call wm + +fecf # SET 1,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(1, TDAT8); TDAT8 = A; + call wm + +fed0 # SET 2,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(2, TDAT8); TDAT8 = B; + call wm + +fed1 # SET 2,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(2, TDAT8); TDAT8 = C; + call wm + +fed2 # SET 2,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(2, TDAT8); TDAT8 = D; + call wm + +fed3 # SET 2,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(2, TDAT8); TDAT8 = E; + call wm + +fed4 # SET 2,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(2, TDAT8); TDAT8 = H; + call wm + +fed5 # SET 2,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(2, TDAT8); TDAT8 = L; + call wm + +fed6 # SET 2,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(2, TDAT8); + call wm + +fed7 # SET 2,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(2, TDAT8); TDAT8 = A; + call wm + +fed8 # SET 3,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(3, TDAT8); TDAT8 = B; + call wm + +fed9 # SET 3,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(3, TDAT8); TDAT8 = C; + call wm + +feda # SET 3,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(3, TDAT8); TDAT8 = D; + call wm + +fedb # SET 3,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(3, TDAT8); TDAT8 = E; + call wm + +fedc # SET 3,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(3, TDAT8); TDAT8 = H; + call wm + +fedd # SET 3,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(3, TDAT8); TDAT8 = L; + call wm + +fede # SET 3,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(3, TDAT8); + call wm + +fedf # SET 3,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(3, TDAT8); TDAT8 = A; + call wm + +fee0 # SET 4,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(4, TDAT8); TDAT8 = B; + call wm + +fee1 # SET 4,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(4, TDAT8); TDAT8 = C; + call wm + +fee2 # SET 4,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(4, TDAT8); TDAT8 = D; + call wm + +fee3 # SET 4,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(4, TDAT8); TDAT8 = E; + call wm + +fee4 # SET 4,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(4, TDAT8); TDAT8 = H; + call wm + +fee5 # SET 4,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(4, TDAT8); TDAT8 = L; + call wm + +fee6 # SET 4,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(4, TDAT8); + call wm + +fee7 # SET 4,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(4, TDAT8); TDAT8 = A; + call wm + +fee8 # SET 5,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(5, TDAT8); TDAT8 = B; + call wm + +fee9 # SET 5,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(5, TDAT8); TDAT8 = C; + call wm + +feea # SET 5,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(5, TDAT8); TDAT8 = D; + call wm + +feeb # SET 5,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(5, TDAT8); TDAT8 = E; + call wm + +feec # SET 5,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(5, TDAT8); TDAT8 = H; + call wm + +feed # SET 5,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(5, TDAT8); TDAT8 = L; + call wm + +feee # SET 5,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(5, TDAT8); + call wm + +feef # SET 5,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(5, TDAT8); TDAT8 = A; + call wm + +fef0 # SET 6,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(6, TDAT8); TDAT8 = B; + call wm + +fef1 # SET 6,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(6, TDAT8); TDAT8 = C; + call wm + +fef2 # SET 6,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(6, TDAT8); TDAT8 = D; + call wm + +fef3 # SET 6,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(6, TDAT8); TDAT8 = E; + call wm + +fef4 # SET 6,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(6, TDAT8); TDAT8 = H; + call wm + +fef5 # SET 6,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(6, TDAT8); TDAT8 = L; + call wm + +fef6 # SET 6,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(6, TDAT8); + call wm + +fef7 # SET 6,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(6, TDAT8); TDAT8 = A; + call wm + +fef8 # SET 7,B = (XY+o) + TADR = m_ea; + call rm_reg + B = set(7, TDAT8); TDAT8 = B; + call wm + +fef9 # SET 7,C = (XY+o) + TADR = m_ea; + call rm_reg + C = set(7, TDAT8); TDAT8 = C; + call wm + +fefa # SET 7,D = (XY+o) + TADR = m_ea; + call rm_reg + D = set(7, TDAT8); TDAT8 = D; + call wm + +fefb # SET 7,E = (XY+o) + TADR = m_ea; + call rm_reg + E = set(7, TDAT8); TDAT8 = E; + call wm + +fefc # SET 7,H = (XY+o) + TADR = m_ea; + call rm_reg + H = set(7, TDAT8); TDAT8 = H; + call wm + +fefd # SET 7,L = (XY+o) + TADR = m_ea; + call rm_reg + L = set(7, TDAT8); TDAT8 = L; + call wm + +fefe # SET 7,(XY+o) + TADR = m_ea; + call rm_reg + TDAT8 = set(7, TDAT8); + call wm + +feff # SET 7,A = (XY+o) + TADR = m_ea; + call rm_reg + A = set(7, TDAT8); TDAT8 = A; + call wm + + +########################################################## +# IX register related opcodes (DD prefix) +########################################################## +dd00 # DB DD + illegal_1(); + call jump 0000 + +dd01 # DB DD + illegal_1(); + call jump 0001 + +dd02 # DB DD + illegal_1(); + call jump 0002 + +dd03 # DB DD + illegal_1(); + call jump 0003 + +dd04 # DB DD + illegal_1(); + call jump 0004 + +dd05 # DB DD + illegal_1(); + call jump 0005 + +dd06 # DB DD + illegal_1(); + call jump 0006 + +dd07 # DB DD + illegal_1(); + call jump 0007 + +dd08 # DB DD + illegal_1(); + call jump 0008 + +dd09 # ADD IX,BC + TDAT = IX; TDAT2 = BC; + call add16 + IX = TDAT; + +dd0a # DB DD + illegal_1(); + call jump 000a + +dd0b # DB DD + illegal_1(); + call jump 000b + +dd0c # DB DD + illegal_1(); + call jump 000c + +dd0d # DB DD + illegal_1(); + call jump 000d + +dd0e # DB DD + illegal_1(); + call jump 000e + +dd0f # DB DD + illegal_1(); + call jump 000f + +dd10 # DB DD + illegal_1(); + call jump 0010 + +dd11 # DB DD + illegal_1(); + call jump 0011 + +dd12 # DB DD + illegal_1(); + call jump 0012 + +dd13 # DB DD + illegal_1(); + call jump 0013 + +dd14 # DB DD + illegal_1(); + call jump 0014 + +dd15 # DB DD + illegal_1(); + call jump 0015 + +dd16 # DB DD + illegal_1(); + call jump 0016 + +dd17 # DB DD + illegal_1(); + call jump 0017 + +dd18 # DB DD + illegal_1(); + call jump 0018 + +dd19 # ADD IX,DE + TDAT = IX; TDAT2 = DE; + call add16 + IX = TDAT; + +dd1a # DB DD + illegal_1(); + call jump 001a + +dd1b # DB DD + illegal_1(); + call jump 001b + +dd1c # DB DD + illegal_1(); + call jump 001c + +dd1d # DB DD + illegal_1(); + call jump 001d + +dd1e # DB DD + illegal_1(); + call jump 001e + +dd1f # DB DD + illegal_1(); + call jump 001f + +dd20 # DB DD + illegal_1(); + call jump 0020 + +dd21 # LD IX,w + call arg16 + IX = TDAT; + +dd22 # LD (w),IX + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT = IX; + call wm16 + WZ = m_ea + 1; + +dd23 # INC IX + call nomreq_ir 2 + IX++; + +dd24 # INC HX + inc(HX); + +dd25 # DEC HX + dec(HX); + +dd26 # LD HX,n + call arg + HX = TDAT8; + +dd27 # DB DD + illegal_1(); + call jump 0027 + +dd28 # DB DD + illegal_1(); + call jump 0028 + +dd29 # ADD IX,IX + TDAT = IX; TDAT2 = IX; + call add16 + IX = TDAT; + +dd2a # LD IX,(w) + call arg16 + m_ea = TDAT; TADR = m_ea; + call rm16 + IX = TDAT; WZ = m_ea + 1; + +dd2b # DEC IX + call nomreq_ir 2 + IX--; + +dd2c # INC LX + inc(LX); + +dd2d # DEC LX + dec(LX); + +dd2e # LD LX,n + call arg + LX = TDAT8; + +dd2f # DB DD + illegal_1(); + call jump 002f + +dd30 # DB DD + illegal_1(); + call jump 0030 + +dd31 # DB DD + illegal_1(); + call jump 0031 + +dd32 # DB DD + illegal_1(); + call jump 0032 + +dd33 # DB DD + illegal_1(); + call jump 0033 + +dd34 # INC (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm_reg + inc(TDAT8); + call wm + +dd35 # DEC (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm_reg + dec(TDAT8); + call wm + +dd36 # LD (IX+o),n + call eax + call arg + TADR = PCD-1; + 2 * call nomreq_addr + TADR = m_ea; + call wm + +dd37 # DB DD + illegal_1(); + call jump 0037 + +dd38 # DB DD + illegal_1(); + call jump 0038 + +dd39 # ADD IX,SP + TDAT = IX; TDAT2 = SP; + call add16 + IX = TDAT; + +dd3a # DB DD + illegal_1(); + call jump 003a + +dd3b # DB DD + illegal_1(); + call jump 003b + +dd3c # DB DD + illegal_1(); + call jump 003c + +dd3d # DB DD + illegal_1(); + call jump 003d + +dd3e # DB DD + illegal_1(); + call jump 003e + +dd3f # DB DD + illegal_1(); + call jump 003f + +dd40 # DB DD + illegal_1(); + call jump 0040 + +dd41 # DB DD + illegal_1(); + call jump 0041 + +dd42 # DB DD + illegal_1(); + call jump 0042 + +dd43 # DB DD + illegal_1(); + call jump 0043 + +dd44 # LD B,HX + B = HX; + +dd45 # LD B,LX + B = LX; + +dd46 # LD B,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + B = TDAT8; + +dd47 # DB DD + illegal_1(); + call jump 0047 + +dd48 # DB DD + illegal_1(); + call jump 0048 + +dd49 # DB DD + illegal_1(); + call jump 0049 + +dd4a # DB DD + illegal_1(); + call jump 004a + +dd4b # DB DD + illegal_1(); + call jump 004b + +dd4c # LD C,HX + C = HX; + +dd4d # LD C,LX + C = LX; + +dd4e # LD C,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + C = TDAT8; + +dd4f # DB DD + illegal_1(); + call jump 004f + +dd50 # DB DD + illegal_1(); + call jump 0050 + +dd51 # DB DD + illegal_1(); + call jump 0051 + +dd52 # DB DD + illegal_1(); + call jump 0052 + +dd53 # DB DD + illegal_1(); + call jump 0053 + +dd54 # LD D,HX + D = HX; + +dd55 # LD D,LX + D = LX; + +dd56 # LD D,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + D = TDAT8; + +dd57 # DB DD + illegal_1(); + call jump 0057 + +dd58 # DB DD + illegal_1(); + call jump 0058 + +dd59 # DB DD + illegal_1(); + call jump 0059 + +dd5a # DB DD + illegal_1(); + call jump 005a + +dd5b # DB DD + illegal_1(); + call jump 005b + +dd5c # LD E,HX + E = HX; + +dd5d # LD E,LX + E = LX; + +dd5e # LD E,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + E = TDAT8; + +dd5f # DB DD + illegal_1(); + call jump 005f + +dd60 # LD HX,B + HX = B; + +dd61 # LD HX,C + HX = C; + +dd62 # LD HX,D + HX = D; + +dd63 # LD HX,E + HX = E; + +dd64 # LD HX,HX + +dd65 # LD HX,LX + HX = LX; + +dd66 # LD H,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + H = TDAT8; + +dd67 # LD HX,A + HX = A; + +dd68 # LD LX,B + LX = B; + +dd69 # LD LX,C + LX = C; + +dd6a # LD LX,D + LX = D; + +dd6b # LD LX,E + LX = E; + +dd6c # LD LX,HX + LX = HX; + +dd6d # LD LX,LX + +dd6e # LD L,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + L = TDAT8; + +dd6f # LD LX,A + LX = A; + +dd70 # LD (IX+o),B + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = B; + call wm + +dd71 # LD (IX+o),C + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = C; + call wm + +dd72 # LD (IX+o),D + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = D; + call wm + +dd73 # LD (IX+o),E + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = E; + call wm + +dd74 # LD (IX+o),H + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = H; + call wm + +dd75 # LD (IX+o),L + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = L; + call wm + +dd76 # DB DD + illegal_1(); + call jump 0076 + +dd77 # LD (IX+o),A + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = A; + call wm + +dd78 # DB DD + illegal_1(); + call jump 0078 + +dd79 # DB DD + illegal_1(); + call jump 0079 + +dd7a # DB DD + illegal_1(); + call jump 007a + +dd7b # DB DD + illegal_1(); + call jump 007b + +dd7c # LD A,HX + A = HX; + +dd7d # LD A,LX + A = LX; + +dd7e # LD A,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + A = TDAT8; + +dd7f # DB DD + illegal_1(); + call jump 007f + +dd80 # DB DD + illegal_1(); + call jump 0080 + +dd81 # DB DD + illegal_1(); + call jump 0081 + +dd82 # DB DD + illegal_1(); + call jump 0082 + +dd83 # DB DD + illegal_1(); + call jump 0083 + +dd84 # ADD A,HX + add_a(HX); + +dd85 # ADD A,LX + add_a(LX); + +dd86 # ADD A,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + add_a(TDAT8); + +dd87 # DB DD + illegal_1(); + call jump 0087 + +dd88 # DB DD + illegal_1(); + call jump 0088 + +dd89 # DB DD + illegal_1(); + call jump 0089 + +dd8a # DB DD + illegal_1(); + call jump 008a + +dd8b # DB DD + illegal_1(); + call jump 008b + +dd8c # ADC A,HX + adc_a(HX); + +dd8d # ADC A,LX + adc_a(LX); + +dd8e # ADC A,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + adc_a(TDAT8); + +dd8f # DB DD + illegal_1(); + call jump 008f + +dd90 # DB DD + illegal_1(); + call jump 0090 + +dd91 # DB DD + illegal_1(); + call jump 0091 + +dd92 # DB DD + illegal_1(); + call jump 0092 + +dd93 # DB DD + illegal_1(); + call jump 0093 + +dd94 # SUB HX + sub(HX); + +dd95 # SUB LX + sub(LX); + +dd96 # SUB (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + sub(TDAT8); + +dd97 # DB DD + illegal_1(); + call jump 0097 + +dd98 # DB DD + illegal_1(); + call jump 0098 + +dd99 # DB DD + illegal_1(); + call jump 0099 + +dd9a # DB DD + illegal_1(); + call jump 009a + +dd9b # DB DD + illegal_1(); + call jump 009b + +dd9c # SBC A,HX + sbc_a(HX); + +dd9d # SBC A,LX + sbc_a(LX); + +dd9e # SBC A,(IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + sbc_a(TDAT8); + +dd9f # DB DD + illegal_1(); + call jump 009f + +dda0 # DB DD + illegal_1(); + call jump 00a0 + +dda1 # DB DD + illegal_1(); + call jump 00a1 + +dda2 # DB DD + illegal_1(); + call jump 00a2 + +dda3 # DB DD + illegal_1(); + call jump 00a3 + +dda4 # AND HX + and_a(HX); + +dda5 # AND LX + and_a(LX); + +dda6 # AND (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + and_a(TDAT8); + +dda7 # DB DD + illegal_1(); + call jump 00a7 + +dda8 # DB DD + illegal_1(); + call jump 00a8 + +dda9 # DB DD + illegal_1(); + call jump 00a9 + +ddaa # DB DD + illegal_1(); + call jump 00aa + +ddab # DB DD + illegal_1(); + call jump 00ab + +ddac # XOR HX + xor_a(HX); + +ddad # XOR LX + xor_a(LX); + +ddae # XOR (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + xor_a(TDAT8); + +ddaf # DB DD + illegal_1(); + call jump 00af + +ddb0 # DB DD + illegal_1(); + call jump 00b0 + +ddb1 # DB DD + illegal_1(); + call jump 00b1 + +ddb2 # DB DD + illegal_1(); + call jump 00b2 + +ddb3 # DB DD + illegal_1(); + call jump 00b3 + +ddb4 # OR HX + or_a(HX); + +ddb5 # OR LX + or_a(LX); + +ddb6 # OR (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + or_a(TDAT8); + +ddb7 # DB DD + illegal_1(); + call jump 00b7 + +ddb8 # DB DD + illegal_1(); + call jump 00b8 + +ddb9 # DB DD + illegal_1(); + call jump 00b9 + +ddba # DB DD + illegal_1(); + call jump 00ba + +ddbb # DB DD + illegal_1(); + call jump 00bb + +ddbc # CP HX + cp(HX); + +ddbd # CP LX + cp(LX); + +ddbe # CP (IX+o) + call eax + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + cp(TDAT8); + +ddbf # DB DD + illegal_1(); + call jump 00bf + +ddc0 # DB DD + illegal_1(); + call jump 00c0 + +ddc1 # DB DD + illegal_1(); + call jump 00c1 + +ddc2 # DB DD + illegal_1(); + call jump 00c2 + +ddc3 # DB DD + illegal_1(); + call jump 00c3 + +ddc4 # DB DD + illegal_1(); + call jump 00c4 + +ddc5 # DB DD + illegal_1(); + call jump 00c5 + +ddc6 # DB DD + illegal_1(); + call jump 00c6 + +ddc7 # DB DD + illegal_1(); + call jump 00c7 + +ddc8 # DB DD + illegal_1(); + call jump 00c8 + +ddc9 # DB DD + illegal_1(); + call jump 00c9 + +ddca # DB DD + illegal_1(); + call jump 00ca + +ddcb # ** DD CB xx + call eax + call arg + TADR = PCD-1; + 2 * call nomreq_addr + call jump_prefixed 0xfe + +ddcc # DB DD + illegal_1(); + call jump 00cc + +ddcd # DB DD + illegal_1(); + call jump 00cd + +ddce # DB DD + illegal_1(); + call jump 00ce + +ddcf # DB DD + illegal_1(); + call jump 00cf + +ddd0 # DB DD + illegal_1(); + call jump 00d0 + +ddd1 # DB DD + illegal_1(); + call jump 00d1 + +ddd2 # DB DD + illegal_1(); + call jump 00d2 + +ddd3 # DB DD + illegal_1(); + call jump 00d3 + +ddd4 # DB DD + illegal_1(); + call jump 00d4 + +ddd5 # DB DD + illegal_1(); + call jump 00d5 + +ddd6 # DB DD + illegal_1(); + call jump 00d6 + +ddd7 # DB DD + illegal_1(); + call jump 00d7 + +ddd8 # DB DD + illegal_1(); + call jump 00d8 + +ddd9 # DB DD + illegal_1(); + call jump 00d9 + +ddda # DB DD + illegal_1(); + call jump 00da + +dddb # DB DD + illegal_1(); + call jump 00db + +dddc # DB DD + illegal_1(); + call jump 00dc + +dddd # DB DD + illegal_1(); + call jump 00dd + +ddde # DB DD + illegal_1(); + call jump 00de + +dddf # DB DD + illegal_1(); + call jump 00df + +dde0 # DB DD + illegal_1(); + call jump 00e0 + +dde1 # POP IX + call pop + IX = TDAT; + +dde2 # DB DD + illegal_1(); + call jump 00e2 + +dde3 # EX (SP),IX + TDAT = IX; + call ex_sp + IX = TDAT; + +dde4 # DB DD + illegal_1(); + call jump 00e4 + +dde5 # PUSH IX + TDAT = IX; + call push + +dde6 # DB DD + illegal_1(); + call jump 00e6 + +dde7 # DB DD + illegal_1(); + call jump 00e7 + +dde8 # DB DD + illegal_1(); + call jump 00e8 + +dde9 # JP (IX) + PC = IX; + +ddea # DB DD + illegal_1(); + call jump 00ea + +ddeb # DB DD + illegal_1(); + call jump 00eb + +ddec # DB DD + illegal_1(); + call jump 00ec + +dded # DB DD + illegal_1(); + call jump 00ed + +ddee # DB DD + illegal_1(); + call jump 00ee + +ddef # DB DD + illegal_1(); + call jump 00ef + +ddf0 # DB DD + illegal_1(); + call jump 00f0 + +ddf1 # DB DD + illegal_1(); + call jump 00f1 + +ddf2 # DB DD + illegal_1(); + call jump 00f2 + +ddf3 # DB DD + illegal_1(); + call jump 00f3 + +ddf4 # DB DD + illegal_1(); + call jump 00f4 + +ddf5 # DB DD + illegal_1(); + call jump 00f5 + +ddf6 # DB DD + illegal_1(); + call jump 00f6 + +ddf7 # DB DD + illegal_1(); + call jump 00f7 + +ddf8 # DB DD + illegal_1(); + call jump 00f8 + +ddf9 # LD SP,IX + call nomreq_ir 2 + SP = IX; + +ddfa # DB DD + illegal_1(); + call jump 00fa + +ddfb # DB DD + illegal_1(); + call jump 00fb + +ddfc # DB DD + illegal_1(); + call jump 00fc + +ddfd # DB DD + illegal_1(); + call jump 00fd + +ddfe # DB DD + illegal_1(); + call jump 00fe + +ddff # DB DD + illegal_1(); + call jump 00ff + + +########################################################## +# IY register related opcodes (FD prefix) +########################################################## +fd00 # DB FD + illegal_1(); + call jump 0000 + +fd01 # DB FD + illegal_1(); + call jump 0001 + +fd02 # DB FD + illegal_1(); + call jump 0002 + +fd03 # DB FD + illegal_1(); + call jump 0003 + +fd04 # DB FD + illegal_1(); + call jump 0004 + +fd05 # DB FD + illegal_1(); + call jump 0005 + +fd06 # DB FD + illegal_1(); + call jump 0006 + +fd07 # DB FD + illegal_1(); + call jump 0007 + +fd08 # DB FD + illegal_1(); + call jump 0008 + +fd09 # ADD IY,BC + TDAT = IY; TDAT2 = BC; + call add16 + IY = TDAT; + +fd0a # DB FD + illegal_1(); + call jump 000a + +fd0b # DB FD + illegal_1(); + call jump 000b + +fd0c # DB FD + illegal_1(); + call jump 000c + +fd0d # DB FD + illegal_1(); + call jump 000d + +fd0e # DB FD + illegal_1(); + call jump 000e + +fd0f # DB FD + illegal_1(); + call jump 000f + +fd10 # DB FD + illegal_1(); + call jump 0010 + +fd11 # DB FD + illegal_1(); + call jump 0011 + +fd12 # DB FD + illegal_1(); + call jump 0012 + +fd13 # DB FD + illegal_1(); + call jump 0013 + +fd14 # DB FD + illegal_1(); + call jump 0014 + +fd15 # DB FD + illegal_1(); + call jump 0015 + +fd16 # DB FD + illegal_1(); + call jump 0016 + +fd17 # DB FD + illegal_1(); + call jump 0017 + +fd18 # DB FD + illegal_1(); + call jump 0018 + +fd19 # ADD IY,DE + TDAT = IY; TDAT2 = DE; + call add16 + IY = TDAT; + +fd1a # DB FD + illegal_1(); + call jump 001a + +fd1b # DB FD + illegal_1(); + call jump 001b + +fd1c # DB FD + illegal_1(); + call jump 001c + +fd1d # DB FD + illegal_1(); + call jump 001d + +fd1e # DB FD + illegal_1(); + call jump 001e + +fd1f # DB FD + illegal_1(); + call jump 001f + +fd20 # DB FD + illegal_1(); + call jump 0020 + +fd21 # LD IY,w + call arg16 + IY = TDAT; + +fd22 # LD (w),IY + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT = IY; + call wm16 + WZ = m_ea + 1; + +fd23 # INC IY + call nomreq_ir 2 + IY++; + +fd24 # INC HY + inc(HY); + +fd25 # DEC HY + dec(HY); + +fd26 # LD HY,n + call arg + HY = TDAT8; + +fd27 # DB FD + illegal_1(); + call jump 0027 + +fd28 # DB FD + illegal_1(); + call jump 0028 + +fd29 # ADD IY,IY + TDAT = IY; TDAT2 = IY; + call add16 + IY = TDAT; + +fd2a # LD IY,(w) + call arg16 + m_ea = TDAT; TADR = m_ea; + call rm16 + IY = TDAT; WZ = m_ea + 1; + +fd2b # DEC IY + call nomreq_ir 2 + IY--; + +fd2c # INC LY + inc(LY); + +fd2d # DEC LY + dec(LY); + +fd2e # LD LY,n + call arg + LY = TDAT8; + +fd2f # DB FD + illegal_1(); + call jump 002f + +fd30 # DB FD + illegal_1(); + call jump 0030 + +fd31 # DB FD + illegal_1(); + call jump 0031 + +fd32 # DB FD + illegal_1(); + call jump 0032 + +fd33 # DB FD + illegal_1(); + call jump 0033 + +fd34 # INC (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm_reg + inc(TDAT8); + call wm + +fd35 # DEC (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm_reg + dec(TDAT8); + call wm + +fd36 # LD (IY+o),n + call eay + call arg + TADR = PCD-1; + 2 * call nomreq_addr + TADR = m_ea; + call wm + +fd37 # DB FD + illegal_1(); + call jump 0037 + +fd38 # DB FD + illegal_1(); + call jump 0038 + +fd39 # ADD IY,SP + TDAT = IY; TDAT2 = SP; + call add16 + IY = TDAT; + +fd3a # DB FD + illegal_1(); + call jump 003a + +fd3b # DB FD + illegal_1(); + call jump 003b + +fd3c # DB FD + illegal_1(); + call jump 003c + +fd3d # DB FD + illegal_1(); + call jump 003d + +fd3e # DB FD + illegal_1(); + call jump 003e + +fd3f # DB FD + illegal_1(); + call jump 003f + +fd40 # DB FD + illegal_1(); + call jump 0040 + +fd41 # DB FD + illegal_1(); + call jump 0041 + +fd42 # DB FD + illegal_1(); + call jump 0042 + +fd43 # DB FD + illegal_1(); + call jump 0043 + +fd44 # LD B,HY + B = HY; + +fd45 # LD B,LY + B = LY; + +fd46 # LD B,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + B = TDAT8; + +fd47 # DB FD + illegal_1(); + call jump 0047 + +fd48 # DB FD + illegal_1(); + call jump 0048 + +fd49 # DB FD + illegal_1(); + call jump 0049 + +fd4a # DB FD + illegal_1(); + call jump 004a + +fd4b # DB FD + illegal_1(); + call jump 004b + +fd4c # LD C,HY + C = HY; + +fd4d # LD C,LY + C = LY; + +fd4e # LD C,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + C = TDAT8; + +fd4f # DB FD + illegal_1(); + call jump 004f + +fd50 # DB FD + illegal_1(); + call jump 0050 + +fd51 # DB FD + illegal_1(); + call jump 0051 + +fd52 # DB FD + illegal_1(); + call jump 0052 + +fd53 # DB FD + illegal_1(); + call jump 0053 + +fd54 # LD D,HY + D = HY; + +fd55 # LD D,LY + D = LY; + +fd56 # LD D,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + D = TDAT8; + +fd57 # DB FD + illegal_1(); + call jump 0057 + +fd58 # DB FD + illegal_1(); + call jump 0058 + +fd59 # DB FD + illegal_1(); + call jump 0059 + +fd5a # DB FD + illegal_1(); + call jump 005a + +fd5b # DB FD + illegal_1(); + call jump 005b + +fd5c # LD E,HY + E = HY; + +fd5d # LD E,LY + E = LY; + +fd5e # LD E,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + E = TDAT8; + +fd5f # DB FD + illegal_1(); + call jump 005f + +fd60 # LD HY,B + HY = B; + +fd61 # LD HY,C + HY = C; + +fd62 # LD HY,D + HY = D; + +fd63 # LD HY,E + HY = E; + +fd64 # LD HY,HY + +fd65 # LD HY,LY + HY = LY; + +fd66 # LD H,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + H = TDAT8; + +fd67 # LD HY,A + HY = A; + +fd68 # LD LY,B + LY = B; + +fd69 # LD LY,C + LY = C; + +fd6a # LD LY,D + LY = D; + +fd6b # LD LY,E + LY = E; + +fd6c # LD LY,HY + LY = HY; + +fd6d # LD LY,LY + +fd6e # LD L,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + L = TDAT8; + +fd6f # LD LY,A + LY = A; + +fd70 # LD (IY+o),B + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = B; + call wm + +fd71 # LD (IY+o),C + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = C; + call wm + +fd72 # LD (IY+o),D + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = D; + call wm + +fd73 # LD (IY+o),E + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = E; + call wm + +fd74 # LD (IY+o),H + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = H; + call wm + +fd75 # LD (IY+o),L + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = L; + call wm + +fd76 # DB FD + illegal_1(); + call jump 0076 + +fd77 # LD (IY+o),A + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; TDAT8 = A; + call wm + +fd78 # DB FD + illegal_1(); + call jump 0078 + +fd79 # DB FD + illegal_1(); + call jump 0079 + +fd7a # DB FD + illegal_1(); + call jump 007a + +fd7b # DB FD + illegal_1(); + call jump 007b + +fd7c # LD A,HY + A = HY; + +fd7d # LD A,LY + A = LY; + +fd7e # LD A,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + A = TDAT8; + +fd7f # DB FD + illegal_1(); + call jump 007f + +fd80 # DB FD + illegal_1(); + call jump 0080 + +fd81 # DB FD + illegal_1(); + call jump 0081 + +fd82 # DB FD + illegal_1(); + call jump 0082 + +fd83 # DB FD + illegal_1(); + call jump 0083 + +fd84 # ADD A,HY + add_a(HY); + +fd85 # ADD A,LY + add_a(LY); + +fd86 # ADD A,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + add_a(TDAT8); + +fd87 # DB FD + illegal_1(); + call jump 0087 + +fd88 # DB FD + illegal_1(); + call jump 0088 + +fd89 # DB FD + illegal_1(); + call jump 0089 + +fd8a # DB FD + illegal_1(); + call jump 008a + +fd8b # DB FD + illegal_1(); + call jump 008b + +fd8c # ADC A,HY + adc_a(HY); + +fd8d # ADC A,LY + adc_a(LY); + +fd8e # ADC A,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + adc_a(TDAT8); + +fd8f # DB FD + illegal_1(); + call jump 008f + +fd90 # DB FD + illegal_1(); + call jump 0090 + +fd91 # DB FD + illegal_1(); + call jump 0091 + +fd92 # DB FD + illegal_1(); + call jump 0092 + +fd93 # DB FD + illegal_1(); + call jump 0093 + +fd94 # SUB HY + sub(HY); + +fd95 # SUB LY + sub(LY); + +fd96 # SUB (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + sub(TDAT8); + +fd97 # DB FD + illegal_1(); + call jump 0097 + +fd98 # DB FD + illegal_1(); + call jump 0098 + +fd99 # DB FD + illegal_1(); + call jump 0099 + +fd9a # DB FD + illegal_1(); + call jump 009a + +fd9b # DB FD + illegal_1(); + call jump 009b + +fd9c # SBC A,HY + sbc_a(HY); + +fd9d # SBC A,LY + sbc_a(LY); + +fd9e # SBC A,(IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + sbc_a(TDAT8); + +fd9f # DB FD + illegal_1(); + call jump 009f + +fda0 # DB FD + illegal_1(); + call jump 00a0 + +fda1 # DB FD + illegal_1(); + call jump 00a1 + +fda2 # DB FD + illegal_1(); + call jump 00a2 + +fda3 # DB FD + illegal_1(); + call jump 00a3 + +fda4 # AND HY + and_a(HY); + +fda5 # AND LY + and_a(LY); + +fda6 # AND (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + and_a(TDAT8); + +fda7 # DB FD + illegal_1(); + call jump 00a7 + +fda8 # DB FD + illegal_1(); + call jump 00a8 + +fda9 # DB FD + illegal_1(); + call jump 00a9 + +fdaa # DB FD + illegal_1(); + call jump 00aa + +fdab # DB FD + illegal_1(); + call jump 00ab + +fdac # XOR HY + xor_a(HY); + +fdad # XOR LY + xor_a(LY); + +fdae # XOR (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + xor_a(TDAT8); + +fdaf # DB FD + illegal_1(); + call jump 00af + +fdb0 # DB FD + illegal_1(); + call jump 00b0 + +fdb1 # DB FD + illegal_1(); + call jump 00b1 + +fdb2 # DB FD + illegal_1(); + call jump 00b2 + +fdb3 # DB FD + illegal_1(); + call jump 00b3 + +fdb4 # OR HY + or_a(HY); + +fdb5 # OR LY + or_a(LY); + +fdb6 # OR (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + or_a(TDAT8); + +fdb7 # DB FD + illegal_1(); + call jump 00b7 + +fdb8 # DB FD + illegal_1(); + call jump 00b8 + +fdb9 # DB FD + illegal_1(); + call jump 00b9 + +fdba # DB FD + illegal_1(); + call jump 00ba + +fdbb # DB FD + illegal_1(); + call jump 00bb + +fdbc # CP HY + cp(HY); + +fdbd # CP LY + cp(LY); + +fdbe # CP (IY+o) + call eay + TADR = PCD-1; + 5 * call nomreq_addr + TADR = m_ea; + call rm + cp(TDAT8); + +fdbf # DB FD + illegal_1(); + call jump 00bf + +fdc0 # DB FD + illegal_1(); + call jump 00c0 + +fdc1 # DB FD + illegal_1(); + call jump 00c1 + +fdc2 # DB FD + illegal_1(); + call jump 00c2 + +fdc3 # DB FD + illegal_1(); + call jump 00c3 + +fdc4 # DB FD + illegal_1(); + call jump 00c4 + +fdc5 # DB FD + illegal_1(); + call jump 00c5 + +fdc6 # DB FD + illegal_1(); + call jump 00c6 + +fdc7 # DB FD + illegal_1(); + call jump 00c7 + +fdc8 # DB FD + illegal_1(); + call jump 00c8 + +fdc9 # DB FD + illegal_1(); + call jump 00c9 + +fdca # DB FD + illegal_1(); + call jump 00ca + +fdcb # ** FD CB xx + call eay + call arg + TADR = PCD-1; + 2 * call nomreq_addr + call jump_prefixed 0xfe + +fdcc # DB FD + illegal_1(); + call jump 00cc + +fdcd # DB FD + illegal_1(); + call jump 00cd + +fdce # DB FD + illegal_1(); + call jump 00ce + +fdcf # DB FD + illegal_1(); + call jump 00cf + +fdd0 # DB FD + illegal_1(); + call jump 00d0 + +fdd1 # DB FD + illegal_1(); + call jump 00d1 + +fdd2 # DB FD + illegal_1(); + call jump 00d2 + +fdd3 # DB FD + illegal_1(); + call jump 00d3 + +fdd4 # DB FD + illegal_1(); + call jump 00d4 + +fdd5 # DB FD + illegal_1(); + call jump 00d5 + +fdd6 # DB FD + illegal_1(); + call jump 00d6 + +fdd7 # DB FD + illegal_1(); + call jump 00d7 + +fdd8 # DB FD + illegal_1(); + call jump 00d8 + +fdd9 # DB FD + illegal_1(); + call jump 00d9 + +fdda # DB FD + illegal_1(); + call jump 00da + +fddb # DB FD + illegal_1(); + call jump 00db + +fddc # DB FD + illegal_1(); + call jump 00dc + +fddd # DB FD + illegal_1(); + call jump 00dd + +fdde # DB FD + illegal_1(); + call jump 00de + +fddf # DB FD + illegal_1(); + call jump 00df + +fde0 # DB FD + illegal_1(); + call jump 00e0 + +fde1 # POP IY + call pop + IY = TDAT; + +fde2 # DB FD + illegal_1(); + call jump 00e2 + +fde3 # EX (SP),IY + TDAT = IY; + call ex_sp + IY = TDAT; + +fde4 # DB FD + illegal_1(); + call jump 00e4 + +fde5 # PUSH IY + TDAT = IY; + call push + +fde6 # DB FD + illegal_1(); + call jump 00e6 + +fde7 # DB FD + illegal_1(); + call jump 00e7 + +fde8 # DB FD + illegal_1(); + call jump 00e8 + +fde9 # JP (IY) + PC = IY; + +fdea # DB FD + illegal_1(); + call jump 00ea + +fdeb # DB FD + illegal_1(); + call jump 00eb + +fdec # DB FD + illegal_1(); + call jump 00ec + +fded # DB FD + illegal_1(); + call jump 00ed + +fdee # DB FD + illegal_1(); + call jump 00ee + +fdef # DB FD + illegal_1(); + call jump 00ef + +fdf0 # DB FD + illegal_1(); + call jump 00f0 + +fdf1 # DB FD + illegal_1(); + call jump 00f1 + +fdf2 # DB FD + illegal_1(); + call jump 00f2 + +fdf3 # DB FD + illegal_1(); + call jump 00f3 + +fdf4 # DB FD + illegal_1(); + call jump 00f4 + +fdf5 # DB FD + illegal_1(); + call jump 00f5 + +fdf6 # DB FD + illegal_1(); + call jump 00f6 + +fdf7 # DB FD + illegal_1(); + call jump 00f7 + +fdf8 # DB FD + illegal_1(); + call jump 00f8 + +fdf9 # LD SP,IY + call nomreq_ir 2 + SP = IY; + +fdfa # DB FD + illegal_1(); + call jump 00fa + +fdfb # DB FD + illegal_1(); + call jump 00fb + +fdfc # DB FD + illegal_1(); + call jump 00fc + +fdfd # DB FD + illegal_1(); + call jump 00fd + +fdfe # DB FD + illegal_1(); + call jump 00fe + +fdff # DB FD + illegal_1(); + call jump 00ff + + +########################################################## +# special opcodes (ED prefix) +########################################################## +ed00 # DB ED + illegal_2(); + +ed01 # DB ED + illegal_2(); + +ed02 # DB ED + illegal_2(); + +ed03 # DB ED + illegal_2(); + +ed04 # DB ED + illegal_2(); + +ed05 # DB ED + illegal_2(); + +ed06 # DB ED + illegal_2(); + +ed07 # DB ED + illegal_2(); + +ed08 # DB ED + illegal_2(); + +ed09 # DB ED + illegal_2(); + +ed0a # DB ED + illegal_2(); + +ed0b # DB ED + illegal_2(); + +ed0c # DB ED + illegal_2(); + +ed0d # DB ED + illegal_2(); + +ed0e # DB ED + illegal_2(); + +ed0f # DB ED + illegal_2(); + +ed10 # DB ED + illegal_2(); + +ed11 # DB ED + illegal_2(); + +ed12 # DB ED + illegal_2(); + +ed13 # DB ED + illegal_2(); + +ed14 # DB ED + illegal_2(); + +ed15 # DB ED + illegal_2(); + +ed16 # DB ED + illegal_2(); + +ed17 # DB ED + illegal_2(); + +ed18 # DB ED + illegal_2(); + +ed19 # DB ED + illegal_2(); + +ed1a # DB ED + illegal_2(); + +ed1b # DB ED + illegal_2(); + +ed1c # DB ED + illegal_2(); + +ed1d # DB ED + illegal_2(); + +ed1e # DB ED + illegal_2(); + +ed1f # DB ED + illegal_2(); + +ed20 # DB ED + illegal_2(); + +ed21 # DB ED + illegal_2(); + +ed22 # DB ED + illegal_2(); + +ed23 # DB ED + illegal_2(); + +ed24 # DB ED + illegal_2(); + +ed25 # DB ED + illegal_2(); + +ed26 # DB ED + illegal_2(); + +ed27 # DB ED + illegal_2(); + +ed28 # DB ED + illegal_2(); + +ed29 # DB ED + illegal_2(); + +ed2a # DB ED + illegal_2(); + +ed2b # DB ED + illegal_2(); + +ed2c # DB ED + illegal_2(); + +ed2d # DB ED + illegal_2(); + +ed2e # DB ED + illegal_2(); + +ed2f # DB ED + illegal_2(); + +ed30 # DB ED + illegal_2(); + +ed31 # DB ED + illegal_2(); + +ed32 # DB ED + illegal_2(); + +ed33 # DB ED + illegal_2(); + +ed34 # DB ED + illegal_2(); + +ed35 # DB ED + illegal_2(); + +ed36 # DB ED + illegal_2(); + +ed37 # DB ED + illegal_2(); + +ed38 # DB ED + illegal_2(); + +ed39 # DB ED + illegal_2(); + +ed3a # DB ED + illegal_2(); + +ed3b # DB ED + illegal_2(); + +ed3c # DB ED + illegal_2(); + +ed3d # DB ED + illegal_2(); + +ed3e # DB ED + illegal_2(); + +ed3f # DB ED + illegal_2(); + +ed40 # IN B,(C) + TADR = BC; + call in + B = TDAT8; set_f((F & CF) | SZP[B]); WZ = TADR + 1; + +ed41 # OUT (C),B + TADR = BC; TDAT8 = B; + call out + WZ = TADR + 1; + +ed42 # SBC HL,BC + TDAT = BC; + call sbc_hl + +ed43 # LD (w),BC + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT = BC; + call wm16 + WZ = m_ea + 1; + +ed44 # NEG + neg(); + +ed45 # RETN + call retn + +ed46 # IM 0 + m_im = 0; + +ed47 # LD i,A + call ld_i_a + +ed48 # IN C,(C) + TADR = BC; + call in + C = TDAT8; set_f((F & CF) | SZP[C]); WZ = TADR + 1; + +ed49 # OUT (C),C + TADR = BC; TDAT8 = C; + call out + WZ = TADR + 1; + +ed4a # ADC HL,BC + TDAT = BC; + call adc_hl + +ed4b # LD BC,(w) + call arg16 + m_ea = TDAT; TADR = m_ea; + call rm16 + BC = TDAT; WZ = m_ea + 1; + +ed4c # NEG + neg(); + +ed4d # RETI + call reti + +ed4e # IM 0 + m_im = 0; + +ed4f # LD r,A + call ld_r_a + +ed50 # IN D,(C) + TADR = BC; + call in + D = TDAT8; set_f((F & CF) | SZP[D]); WZ = TADR + 1; + +ed51 # OUT (C),D + TADR = BC; TDAT8 = D; + call out + WZ = TADR + 1; + +ed52 # SBC HL,DE + TDAT = DE; + call sbc_hl + +ed53 # LD (w),DE + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT = DE; + call wm16 + WZ = m_ea + 1; + +ed54 # NEG + neg(); + +ed55 # RETN + call retn + +ed56 # IM 1 + m_im = 1; + +ed57 # LD A,i + call ld_a_i + +ed58 # IN E,(C) + TADR = BC; + call in + E = TDAT8; set_f((F & CF) | SZP[E]); WZ = TADR + 1; + +ed59 # OUT (C),E + TADR = BC; TDAT8 = E; + call out + WZ = TADR + 1; + +ed5a # ADC HL,DE + TDAT = DE; + call adc_hl + +ed5b # LD DE,(w) + call arg16 + m_ea = TDAT; TADR = m_ea; + call rm16 + DE = TDAT; WZ = m_ea + 1; + +ed5c # NEG + neg(); + +ed5d # RETI + call reti + +ed5e # IM 2 + m_im = 2; + +ed5f # LD A,r + call ld_a_r + +ed60 # IN H,(C) + TADR = BC; + call in + H = TDAT8; set_f((F & CF) | SZP[H]); WZ = TADR + 1; + +ed61 # OUT (C),H + TADR = BC; TDAT8 = H; + call out + WZ = TADR + 1; + +ed62 # SBC HL,HL + TDAT = HL; + call sbc_hl + +ed63 # LD (w),HL + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT = HL; + call wm16 + WZ = m_ea + 1; + +ed64 # NEG + neg(); + +ed65 # RETN + call retn + +ed66 # IM 0 + m_im = 0; + +ed67 # RRD (HL) + call rrd + +ed68 # IN L,(C) + TADR = BC; + call in + L = TDAT8; set_f((F & CF) | SZP[L]); WZ = TADR + 1; + +ed69 # OUT (C),L + TADR = BC; TDAT8 = L; + call out + WZ = TADR + 1; + +ed6a # ADC HL,HL + TDAT = HL; + call adc_hl + +ed6b # LD HL,(w) + call arg16 + m_ea = TDAT; TADR = m_ea; + call rm16 + HL = TDAT; WZ = m_ea + 1; + +ed6c # NEG + neg(); + +ed6d # RETI + call reti + +ed6e # IM 0 + m_im = 0; + +ed6f # RLD (HL) + call rld + +ed70 # IN 0,(C) + TADR = BC; + call in + set_f((F & CF) | SZP[TDAT8]); WZ = TADR + 1; + +ed71 # OUT (C),0 + TADR = BC; TDAT8 = 0; + call out + WZ = TADR + 1; + +ed72 # SBC HL,SP + TDAT = SP; + call sbc_hl + +ed73 # LD (w),SP + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT = SP; + call wm16 + WZ = m_ea + 1; + +ed74 # NEG + neg(); + +ed75 # RETN + call retn + +ed76 # IM 1 + m_im = 1; + +ed77 # DB ED,77 + illegal_2(); + +ed78 # IN A,(C) + TADR = BC; + call in + A = TDAT8; set_f((F & CF) | SZP[A]); WZ = TADR + 1; + +ed79 # OUT (C),A + TADR = BC; TDAT8 = A; + call out + WZ = TADR + 1; + +ed7a # ADC HL,SP + TDAT = SP; + call adc_hl + +ed7b # LD SP,(w) + call arg16 + m_ea = TDAT; TADR = m_ea; + call rm16 + SP = TDAT; WZ = m_ea + 1; + +ed7c # NEG + neg(); + +ed7d # RETI + call reti + +ed7e # IM 2 + m_im = 2; + +ed7f # DB ED,7F + illegal_2(); + +ed80 # DB ED + illegal_2(); + +ed81 # DB ED + illegal_2(); + +ed82 # DB ED + illegal_2(); + +ed83 # DB ED + illegal_2(); + +ed84 # DB ED + illegal_2(); + +ed85 # DB ED + illegal_2(); + +ed86 # DB ED + illegal_2(); + +ed87 # DB ED + illegal_2(); + +ed88 # DB ED + illegal_2(); + +ed89 # DB ED + illegal_2(); + +ed8a # DB ED + illegal_2(); + +ed8b # DB ED + illegal_2(); + +ed8c # DB ED + illegal_2(); + +ed8d # DB ED + illegal_2(); + +ed8e # DB ED + illegal_2(); + +ed8f # DB ED + illegal_2(); + +ed90 # DB ED + illegal_2(); + +ed91 # DB ED + illegal_2(); + +ed92 # DB ED + illegal_2(); + +ed93 # DB ED + illegal_2(); + +ed94 # DB ED + illegal_2(); + +ed95 # DB ED + illegal_2(); + +ed96 # DB ED + illegal_2(); + +ed97 # DB ED + illegal_2(); + +ed98 # DB ED + illegal_2(); + +ed99 # DB ED + illegal_2(); + +ed9a # DB ED + illegal_2(); + +ed9b # DB ED + illegal_2(); + +ed9c # DB ED + illegal_2(); + +ed9d # DB ED + illegal_2(); + +ed9e # DB ED + illegal_2(); + +ed9f # DB ED + illegal_2(); + +eda0 # LDI + call ldi + +eda1 # CPI + call cpi + +eda2 # INI + call ini + +eda3 # OUTI + call outi + +eda4 # DB ED + illegal_2(); + +eda5 # DB ED + illegal_2(); + +eda6 # DB ED + illegal_2(); + +eda7 # DB ED + illegal_2(); + +eda8 # LDD + call ldd + +eda9 # CPD + call cpd + +edaa # IND + call ind + +edab # OUTD + call outd + +edac # DB ED + illegal_2(); + +edad # DB ED + illegal_2(); + +edae # DB ED + illegal_2(); + +edaf # DB ED + illegal_2(); + +edb0 # LDIR + call ldir + +edb1 # CPIR + call cpir + +edb2 # INIR + call inir + +edb3 # OTIR + call otir + +edb4 # DB ED + illegal_2(); + +edb5 # DB ED + illegal_2(); + +edb6 # DB ED + illegal_2(); + +edb7 # DB ED + illegal_2(); + +edb8 # LDDR + call lddr + +edb9 # CPDR + call cpdr + +edba # INDR + call indr + +edbb # OTDR + call otdr + +edbc # DB ED + illegal_2(); + +edbd # DB ED + illegal_2(); + +edbe # DB ED + illegal_2(); + +edbf # DB ED + illegal_2(); + +edc0 # DB ED + illegal_2(); + +edc1 # DB ED + illegal_2(); + +edc2 # DB ED + illegal_2(); + +edc3 # DB ED + illegal_2(); + +edc4 # DB ED + illegal_2(); + +edc5 # DB ED + illegal_2(); + +edc6 # DB ED + illegal_2(); + +edc7 # DB ED + illegal_2(); + +edc8 # DB ED + illegal_2(); + +edc9 # DB ED + illegal_2(); + +edca # DB ED + illegal_2(); + +edcb # DB ED + illegal_2(); + +edcc # DB ED + illegal_2(); + +edcd # DB ED + illegal_2(); + +edce # DB ED + illegal_2(); + +edcf # DB ED + illegal_2(); + +edd0 # DB ED + illegal_2(); + +edd1 # DB ED + illegal_2(); + +edd2 # DB ED + illegal_2(); + +edd3 # DB ED + illegal_2(); + +edd4 # DB ED + illegal_2(); + +edd5 # DB ED + illegal_2(); + +edd6 # DB ED + illegal_2(); + +edd7 # DB ED + illegal_2(); + +edd8 # DB ED + illegal_2(); + +edd9 # DB ED + illegal_2(); + +edda # DB ED + illegal_2(); + +eddb # DB ED + illegal_2(); + +eddc # DB ED + illegal_2(); + +eddd # DB ED + illegal_2(); + +edde # DB ED + illegal_2(); + +eddf # DB ED + illegal_2(); + +ede0 # DB ED + illegal_2(); + +ede1 # DB ED + illegal_2(); + +ede2 # DB ED + illegal_2(); + +ede3 # DB ED + illegal_2(); + +ede4 # DB ED + illegal_2(); + +ede5 # DB ED + illegal_2(); + +ede6 # DB ED + illegal_2(); + +ede7 # DB ED + illegal_2(); + +ede8 # DB ED + illegal_2(); + +ede9 # DB ED + illegal_2(); + +edea # DB ED + illegal_2(); + +edeb # DB ED + illegal_2(); + +edec # DB ED + illegal_2(); + +eded # DB ED + illegal_2(); + +edee # DB ED + illegal_2(); + +edef # DB ED + illegal_2(); + +edf0 # DB ED + illegal_2(); + +edf1 # DB ED + illegal_2(); + +edf2 # DB ED + illegal_2(); + +edf3 # DB ED + illegal_2(); + +edf4 # DB ED + illegal_2(); + +edf5 # DB ED + illegal_2(); + +edf6 # DB ED + illegal_2(); + +edf7 # DB ED + illegal_2(); + +edf8 # DB ED + illegal_2(); + +edf9 # DB ED + illegal_2(); + +edfa # DB ED + illegal_2(); + +edfb # DB ED + illegal_2(); + +edfc # DB ED + illegal_2(); + +edfd # DB ED + illegal_2(); + +edfe # DB ED + illegal_2(); + +edff # DB ED + illegal_2(); + + +########################################################## +# main opcodes +########################################################## +0000 # NOP + +0001 # LD BC,w + call arg16 + BC = TDAT; + +0002 # LD (BC),A + TADR = BC; TDAT8 = A; + call wm + WZ_L = (BC + 1) & 0xFF; WZ_H = A; + +0003 # INC BC + call nomreq_ir 2 + BC++; + +0004 # INC B + inc(B); + +0005 # DEC B + dec(B); + +0006 # LD B,n + call arg + B = TDAT8; + +0007 # RLCA + rlca(); + +0008 # EX AF,AF' + using std::swap; swap(m_af, m_af2); + +0009 # ADD HL,BC + TDAT = HL; TDAT2 = BC; + call add16 + HL = TDAT; + +000a # LD A,(BC) + TADR = BC; + call rm + A = TDAT8; WZ = BC+1; + +000b # DEC BC + call nomreq_ir 2 + BC--; + +000c # INC C + inc(C); + +000d # DEC C + dec(C); + +000e # LD C,n + call arg + C = TDAT8; + +000f # RRCA + rrca(); + +0010 # DJNZ o + call nomreq_ir 1 + TDAT8 = --B; + call jr_cond + +0011 # LD DE,w + call arg16 + DE = TDAT; + +0012 # LD (DE),A + TADR = DE; TDAT8 = A; + call wm + WZ_L = (DE + 1) & 0xFF; WZ_H = A; + +0013 # INC DE + call nomreq_ir 2 + DE++; + +0014 # INC D + inc(D); + +0015 # DEC D + dec(D); + +0016 # LD D,n + call arg + D = TDAT8; + +0017 # RLA + rla(); + +0018 # JR o + call jr + +0019 # ADD HL,DE + TDAT = HL; TDAT2 = DE; + call add16 + HL = TDAT; + +001a # LD A,(DE) + TADR = DE; + call rm + A = TDAT8; WZ = DE + 1; + +001b # DEC DE + call nomreq_ir 2 + DE--; + +001c # INC E + inc(E); + +001d # DEC E + dec(E); + +001e # LD E,n + call arg + E = TDAT8; + +001f # RRA + rra(); + +0020 # JR NZ,o + TDAT8 = !(F & ZF); + call jr_cond + +0021 # LD HL,w + call arg16 + HL = TDAT; + +0022 # LD (w),HL + call arg16 + m_ea = TDAT; TADR = TDAT; TDAT = HL; + call wm16 + WZ = m_ea + 1; + +0023 # INC HL + call nomreq_ir 2 + HL++; + +0024 # INC H + inc(H); + +0025 # DEC H + dec(H); + +0026 # LD H,n + call arg + H = TDAT8; + +0027 # DAA + daa(); + +0028 # JR Z,o + TDAT8 = F & ZF; + call jr_cond + +0029 # ADD HL,HL + TDAT = HL; TDAT2 = HL; + call add16 + HL = TDAT; + +002a # LD HL,(w) + call arg16 + m_ea = TDAT; TADR = TDAT; + call rm16 + HL = TDAT; WZ = m_ea + 1; + +002b # DEC HL + call nomreq_ir 2 + HL--; + +002c # INC L + inc(L); + +002d # DEC L + dec(L); + +002e # LD L,n + call arg + L = TDAT8; + +002f # CPL + A ^= 0xff; set_f((F & (SF | ZF | PF | CF)) | HF | NF | (A & (YF | XF))); + +0030 # JR NC,o + TDAT8 = !(F & CF); + call jr_cond + +0031 # LD SP,w + call arg16 + SP = TDAT; + +0032 # LD (w),A + call arg16 + m_ea = TDAT; TADR = m_ea; TDAT8 = A; + call wm + WZ_L = (m_ea + 1) & 0xFF; WZ_H = A; + +0033 # INC SP + call nomreq_ir 2 + SP++; + +0034 # INC (HL) + TADR = HL; + call rm_reg + inc(TDAT8); + call wm + +0035 # DEC (HL) + TADR = HL; + call rm_reg + dec(TDAT8); + call wm + +0036 # LD (HL),n + call arg + TADR = HL; + call wm + +0037 # SCF + set_f((F & (SF | ZF | PF)) | CF | (((F & Q) | A) & (YF | XF))); + +0038 # JR C,o + TDAT8 = F & CF; + call jr_cond + +0039 # ADD HL,SP + TDAT = HL; TDAT2 = SP; + call add16 + HL = TDAT; + +003a # LD A,(w) + call arg16 + m_ea = TDAT; TADR = TDAT; + call rm + A = TDAT8; WZ = m_ea + 1; + +003b # DEC SP + call nomreq_ir 2 + SP--; + +003c # INC A + inc(A); + +003d # DEC A + dec(A); + +003e # LD A,n + call arg + A = TDAT8; + +003f # CCF + set_f(((F & (SF | ZF | PF | CF)) ^ CF) | ((F & CF) << 4) | (((F & Q) | A) & (YF | XF))); + +0040 # LD B,B + +0041 # LD B,C + B = C; + +0042 # LD B,D + B = D; + +0043 # LD B,E + B = E; + +0044 # LD B,H + B = H; + +0045 # LD B,L + B = L; + +0046 # LD B,(HL) + TADR = HL; + call rm + B = TDAT8; + +0047 # LD B,A + B = A; + +0048 # LD C,B + C = B; + +0049 # LD C,C + +004a # LD C,D + C = D; + +004b # LD C,E + C = E; + +004c # LD C,H + C = H; + +004d # LD C,L + C = L; + +004e # LD C,(HL) + TADR = HL; + call rm + C = TDAT8; + +004f # LD C,A + C = A; + +0050 # LD D,B + D = B; + +0051 # LD D,C + D = C; + +0052 # LD D,D + +0053 # LD D,E + D = E; + +0054 # LD D,H + D = H; + +0055 # LD D,L + D = L; + +0056 # LD D,(HL) + TADR = HL; + call rm + D = TDAT8; + +0057 # LD D,A + D = A; + +0058 # LD E,B + E = B; + +0059 # LD E,C + E = C; + +005a # LD E,D + E = D; + +005b # LD E,E + +005c # LD E,H + E = H; + +005d # LD E,L + E = L; + +005e # LD E,(HL) + TADR = HL; + call rm + E = TDAT8; + +005f # LD E,A + E = A; + +0060 # LD H,B + H = B; + +0061 # LD H,C + H = C; + +0062 # LD H,D + H = D; + +0063 # LD H,E + H = E; + +0064 # LD H,H + +0065 # LD H,L + H = L; + +0066 # LD H,(HL) + TADR = HL; + call rm + H = TDAT8; + +0067 # LD H,A + H = A; + +0068 # LD L,B + L = B; + +0069 # LD L,C + L = C; + +006a # LD L,D + L = D; + +006b # LD L,E + L = E; + +006c # LD L,H + L = H; + +006d # LD L,L + +006e # LD L,(HL) + TADR = HL; + call rm + L = TDAT8; + +006f # LD L,A + L = A; + +0070 # LD (HL),B + TADR = HL; TDAT = B; + call wm + +0071 # LD (HL),C + TADR = HL; TDAT = C; + call wm + +0072 # LD (HL),D + TADR = HL; TDAT = D; + call wm + +0073 # LD (HL),E + TADR = HL; TDAT = E; + call wm + +0074 # LD (HL),H + TADR = HL; TDAT = H; + call wm + +0075 # LD (HL),L + TADR = HL; TDAT = L; + call wm + +0076 # HALT + halt(); + +0077 # LD (HL),A + TADR = HL; TDAT = A; + call wm + +0078 # LD A,B + A = B; + +0079 # LD A,C + A = C; + +007a # LD A,D + A = D; + +007b # LD A,E + A = E; + +007c # LD A,H + A = H; + +007d # LD A,L + A = L; + +007e # LD A,(HL) + TADR = HL; + call rm + A = TDAT8; + +007f # LD A,A + +0080 # ADD A,B + add_a(B); + +0081 # ADD A,C + add_a(C); + +0082 # ADD A,D + add_a(D); + +0083 # ADD A,E + add_a(E); + +0084 # ADD A,H + add_a(H); + +0085 # ADD A,L + add_a(L); + +0086 # ADD A,(HL) + TADR = HL; + call rm + add_a(TDAT8); + +0087 # ADD A,A + add_a(A); + +0088 # ADC A,B + adc_a(B); + +0089 # ADC A,C + adc_a(C); + +008a # ADC A,D + adc_a(D); + +008b # ADC A,E + adc_a(E); + +008c # ADC A,H + adc_a(H); + +008d # ADC A,L + adc_a(L); + +008e # ADC A,(HL) + TADR = HL; + call rm + adc_a(TDAT8); + +008f # ADC A,A + adc_a(A); + +0090 # SUB B + sub(B); + +0091 # SUB C + sub(C); + +0092 # SUB D + sub(D); + +0093 # SUB E + sub(E); + +0094 # SUB H + sub(H); + +0095 # SUB L + sub(L); + +0096 # SUB (HL) + TADR = HL; + call rm + sub(TDAT8); + +0097 # SUB A + sub(A); + +0098 # SBC A,B + sbc_a(B); + +0099 # SBC A,C + sbc_a(C); + +009a # SBC A,D + sbc_a(D); + +009b # SBC A,E + sbc_a(E); + +009c # SBC A,H + sbc_a(H); + +009d # SBC A,L + sbc_a(L); + +009e # SBC A,(HL) + TADR = HL; + call rm + sbc_a(TDAT8); + +009f # SBC A,A + sbc_a(A); + +00a0 # AND B + and_a(B); + +00a1 # AND C + and_a(C); + +00a2 # AND D + and_a(D); + +00a3 # AND E + and_a(E); + +00a4 # AND H + and_a(H); + +00a5 # AND L + and_a(L); + +00a6 # AND (HL) + TADR = HL; + call rm + and_a(TDAT8); + +00a7 # AND A + and_a(A); + +00a8 # XOR B + xor_a(B); + +00a9 # XOR C + xor_a(C); + +00aa # XOR D + xor_a(D); + +00ab # XOR E + xor_a(E); + +00ac # XOR H + xor_a(H); + +00ad # XOR L + xor_a(L); + +00ae # XOR (HL) + TADR = HL; + call rm + xor_a(TDAT8); + +00af # XOR A + xor_a(A); + +00b0 # OR B + or_a(B); + +00b1 # OR C + or_a(C); + +00b2 # OR D + or_a(D); + +00b3 # OR E + or_a(E); + +00b4 # OR H + or_a(H); + +00b5 # OR L + or_a(L); + +00b6 # OR (HL) + TADR = HL; + call rm + or_a(TDAT8); + +00b7 # OR A + or_a(A); + +00b8 # CP B + cp(B); + +00b9 # CP C + cp(C); + +00ba # CP D + cp(D); + +00bb # CP E + cp(E); + +00bc # CP H + cp(H); + +00bd # CP L + cp(L); + +00be # CP (HL) + TADR = HL; + call rm + cp(TDAT8); + +00bf # CP A + cp(A); + +00c0 # RET NZ + TDAT8 = !(F & ZF); + call ret_cond + +00c1 # POP BC + call pop + BC = TDAT; + +00c2 # JP NZ,a + TDAT8 = !(F & ZF); + call jp_cond + +00c3 # JP a + call jp + +00c4 # CALL NZ,a + TDAT8 = !(F & ZF); + call call_cond + +00c5 # PUSH BC + TDAT = BC; + call push + +00c6 # ADD A,n + call arg + add_a(TDAT8); + +00c7 # RST 0 + call rst 0x00 + +00c8 # RET Z + TDAT8 = (F & ZF); + call ret_cond + +00c9 # RET + call pop + PC = TDAT; WZ = PCD; + +00ca # JP Z,a + TDAT8 = F & ZF; + call jp_cond + +00cb # **** CB xx + call rop + call jump_prefixed 0xcb + +00cc # CALL Z,a + TDAT8 = F & ZF; + call call_cond + +00cd # CALL a + call arg16_call + +00ce # ADC A,n + call arg + adc_a(TDAT8); + +00cf # RST 1 + call rst 0x08 + +00d0 # RET NC + TDAT8 = !(F & CF); + call ret_cond + +00d1 # POP DE + call pop + DE = TDAT; + +00d2 # JP NC,a + TDAT8 = !(F & CF); + call jp_cond + +00d3 # OUT (n),A + call arg + TADR = TDAT8 | (A << 8); TDAT = A; + call out + WZ_L = ((TADR & 0xff) + 1) & 0xff; WZ_H = A; + +00d4 # CALL NC,a + TDAT8 = !(F & CF); + call call_cond + +00d5 # PUSH DE + TDAT = DE; + call push + +00d6 # SUB n + call arg + sub(TDAT8); + +00d7 # RST 2 + call rst 0x10 + +00d8 # RET C + TDAT8 = (F & CF); + call ret_cond + +00d9 # EXX + exx(); + +00da # JP C,a + TDAT8 = F & CF; + call jp_cond + +00db # IN A,(n) + call arg + TADR = TDAT8 | (A << 8); + call in + A = TDAT8; WZ = TADR + 1; + +00dc # CALL C,a + TDAT8 = F & CF; + call call_cond + +00dd # **** DD xx + call rop + call jump_prefixed 0xdd + +00de # SBC A,n + call arg + sbc_a(TDAT8); + +00df # RST 3 + call rst 0x18 + +00e0 # RET PO + TDAT8 = !(F & PF); + call ret_cond + +00e1 # POP HL + call pop + HL = TDAT; + +00e2 # JP PO,a + TDAT8 = !(F & PF); + call jp_cond + +00e3 # EX HL,(SP) + TDAT = HL; + call ex_sp + HL = TDAT; + +00e4 # CALL PO,a + TDAT8 = !(F & PF); + call call_cond + +00e5 # PUSH HL + TDAT = HL; + call push + +00e6 # AND n + call arg + and_a(TDAT8); + +00e7 # RST 4 + call rst 0x20 + +00e8 # RET PE + TDAT8 = (F & PF); + call ret_cond + +00e9 # JP (HL) + PC = HL; + +00ea # JP PE,a + TDAT8 = F & PF; + call jp_cond + +00eb # EX DE,HL + using std::swap; swap(DE, HL); + +00ec # CALL PE,a + TDAT8 = F & PF; + call call_cond + +00ed # **** ED xx + call rop + call jump_prefixed 0xed + +00ee # XOR n + call arg + xor_a(TDAT8); + +00ef # RST 5 + call rst 0x28 + +00f0 # RET P + TDAT8 = !(F & SF); + call ret_cond + +00f1 # POP AF + call pop + AF = TDAT; + +00f2 # JP P,a + TDAT8 = !(F & SF); + call jp_cond + +00f3 # DI + m_iff1 = m_iff2 = 0; + +00f4 # CALL P,a + TDAT8 = !(F & SF); + call call_cond + +00f5 # PUSH AF + TDAT = AF; + call push + +00f6 # OR n + call arg + or_a(TDAT8); + +00f7 # RST 6 + call rst 0x30 + +00f8 # RET M + TDAT8 = (F & SF); + call ret_cond + +00f9 # LD SP,HL + call nomreq_ir 2 + SP = HL; + +00fa # JP M,a + TDAT8 = F & SF; + call jp_cond + +00fb # EI + ei(); + +00fc # CALL M,a + TDAT8 = F & SF; + call call_cond + +00fd # **** FD xx + call rop + call jump_prefixed 0xfd + +00fe # CP n + call arg + cp(TDAT8); + +00ff # RST 7 + call rst 0x38 diff --git a/src/devices/cpu/z80/z80make.py b/src/devices/cpu/z80/z80make.py new file mode 100644 index 00000000000..41154f736ee --- /dev/null +++ b/src/devices/cpu/z80/z80make.py @@ -0,0 +1,241 @@ +#!/usr/bin/python +# license:BSD-3-Clause +# copyright-holders:Andre I. Holub +from __future__ import print_function + +USAGE = """ +Usage: +%s [type] z80.lst z80.inc +""" +import sys + +class IndStr: + def __init__(self, src, indent = None): + self.str = src.strip() + self.indent = indent + if not indent: + self.indent = src[:len(src) - len(src.lstrip())] + + def line(self): + return self.str + + def get_indent(self): + return self.indent + + def is_comment(self): + return self.str.startswith("#") and not self.str.startswith("#if") and not self.str.startswith("#endif") + + def is_blank(self): + return not self.str + + def has_indent(self): + return self.indent != '' + + def replace(self, new): + self.str = new + + def replace(self, old, new): + return IndStr(self.str.replace(old, new), self.indent) + + def with_str(self, new_str): + return IndStr(new_str, self.indent) + + def split(self): + return self.str.split() + + def print(self, str, f): + print("\t\t%s%s" % (self.indent, str), file=f) + + + +class Opcode: + def __init__(self, code): + self.code = code + self.source = [] + + def add_source_lines(self, lines): + self.source.extend(lines) + + def save_dasm(self, f): + code = self.code + has_steps = len(self.source) > 1 + if has_steps: + print("\t\tswitch (u8(m_ref))", file=f) + print("\t\t{", file=f) + print("\t\tcase 0x00:", file=f) + step = 0 + for i in range(0, len(self.source)): + il = self.source[i] + line = il.line() + tokens = line.split() + if tokens[0] == '+': + il.print("m_icount -= %s;" % (" ".join(tokens[1:])), f) + step += 1 + to_step = "0x%s" % (hex(256 + step)[3:]) + il.print("if (check_icount(%s, 0, false)) return;" % (to_step), f) + print("\t\t[[fallthrough]];", file=f) + print("\t\tcase %s:" % (to_step), file=f) + elif (len(tokens) > 2 and tokens[1] == "!!"): + print("\t\t[[fallthrough]];", file=f) + step += 1; + print("\t\tcase 0x%s:" % (hex(256 + step)[3:]), file=f) + il.print("{", f) + il.print("\tconst int icount = m_icount;", f) + il.print("\t%s" % " ".join(tokens[2:]), f) + il.print("\tm_icount -= %s;" % (tokens[0]), f) + step += 1 + to_step = "0x%s" % (hex(256 + step)[3:]) + il.print("\tif (check_icount(%s, icount, true)) return;" % (to_step), f) + il.print("}", f) + print("\t\t[[fallthrough]];", file=f) + print("\t\tcase %s:" % (to_step), file=f) + else: + il.print("%s" % line, f) + if has_steps: + print("\t\tbreak;\n", file=f) + print("\t\t}", file=f) + +class Macro: + def __init__(self, name, arg_name = None): + self.name = name + self.source = [] + self.arg_name = arg_name + + def apply(self, arg): + if self.arg_name is not None: + return [ r.replace(self.arg_name, arg) for r in self.source ] + else: + return self.source + + def add_source_lines(self, lines): + self.source.extend(lines) + +class OpcodeList: + def __init__(self, gen, fname): + self.gen = gen + self.opcode_info = [] + self.macros = {} + + try: + f = open(fname, "r") + except Exception: + err = sys.exc_info()[1] + sys.stderr.write("Cannot read opcodes file %s [%s]\n" % (fname, err)) + sys.exit(1) + + inf = None + for ln in f: + line = IndStr(ln) + # Skip comments except macros + if line.is_comment() or line.is_blank(): + continue + if line.has_indent(): + if inf is not None: + if isinstance(inf, Macro): + inf.add_source_lines([line]) + else: + inf.add_source_lines(self.pre_process(line)) + else: + # New opcode + tokens = line.split() + if tokens[0] == "macro": + name = tokens[1] + arg_name = None + if len(tokens) > 2: + arg_name = tokens[2] + inf = Macro(name, arg_name) + if name in self.macros: + sys.stderr.write("Replacing macro: %s\n" % name) + self.macros[name] = inf + else: + ntokens = tokens[0].split(":") + if len(ntokens) == 2: + inf = Opcode(ntokens[1]) + if ntokens[0] == self.gen: + self.opcode_info.append(inf) + else: + inf = Opcode(ntokens[0]) + if None == self.gen: + self.opcode_info.append(inf) + + def pre_process(self, iline): + out = [] + line = iline.str + line_toc = line.split() + times = 1 + if len(line_toc) > 2 and line_toc[1] == "*": + times = int(line_toc[0]) + line_toc = line_toc[2:] + line = " ".join(line_toc) + for i in range(times): + if line_toc[0] == 'call': + name = line_toc[1] + arg = None + if len(line_toc) > 2: + arg = line_toc[2] + if name in self.macros: + macro = self.macros[name] + ([out.extend(self.pre_process(il)) for il in macro.apply(arg)]) + else: + sys.stderr.write("Macro not found %s\n" % name) + out.append(iline.with_str("... %s" % name)) + else: + out.append(iline.with_str(line)) + return out + + def save_exec(self, f): + prefix = None + print("switch (u8(m_ref >> 16)) // prefix", file=f) + print("{", file=f) + for opc in self.opcode_info: + if (opc.code[:2]) != prefix: + if prefix is not None: + print("\n\t}", file=f) + print("\tbreak;", file=f) + print("", file=f) + print("}", file=f) + print("break; // prefix: 0x%s" % (prefix), file=f) + print("", file=f) + prefix = opc.code[:2] + print("case 0x%s:" % (opc.code[:2]), file=f) + print("{", file=f) + print("\tswitch (u8(m_ref >> 8)) // opcode", file=f) + print("\t{", file=f) + print("\tcase 0x%s:" % (opc.code[2:]), file=f) + #print("\t{", file=f) + opc.save_dasm(f) + #print("\t}", file=f) + print("\tbreak;", file=f) + print("", file=f) + print("\t} // switch opcode", file=f) + print("}", file=f) + print("break; // prefix: 0x%s" % (prefix), file=f) + print("", file=f) + print("} // switch prefix", file=f) + +def main(argv): + if len(argv) != 3 and len(argv) != 4: + print(USAGE % argv[0]) + return 1 + + fidx = 1 + gen = None + if len(argv) == 4: + gen = argv[1] + fidx = 2 + + opcodes = OpcodeList(gen, argv[fidx]) + + try: + f = open(argv[fidx + 1], "w") + except Exception: + err = sys.exc_info()[fidx] + sys.stderr.write("cannot write file %s [%s]\n" % (argv[fidx + 1], err)) + sys.exit(1) + + opcodes.save_exec(f) + f.close() + +# ====================================================================== +if __name__ == "__main__": + sys.exit(main(sys.argv)) diff --git a/src/devices/imagedev/floppy.cpp b/src/devices/imagedev/floppy.cpp index ccec735ece2..cc51835bf4c 100644 --- a/src/devices/imagedev/floppy.cpp +++ b/src/devices/imagedev/floppy.cpp @@ -33,6 +33,8 @@ #include "util/ioprocsfilter.h" #include "util/zippath.h" +#include + /* Debugging flags. Set to 0 or 1. */ @@ -1081,25 +1083,6 @@ uint32_t floppy_image_device::hash32(uint32_t a) const return a; } -int floppy_image_device::find_index(uint32_t position, const std::vector &buf)const -{ - int spos = (buf.size() >> 1)-1; - int step; - for(step=1; step>= 1; - - for(;;) { - if(spos >= int(buf.size()) || (spos > 0 && (buf[spos] & floppy_image::TIME_MASK) > position)) { - spos -= step; - step >>= 1; - } else if(spos < 0 || (spos < int(buf.size())-1 && (buf[spos+1] & floppy_image::TIME_MASK) <= position)) { - spos += step; - step >>= 1; - } else - return spos; - } -} - uint32_t floppy_image_device::find_position(attotime &base, const attotime &when) { base = m_revolution_start_time; @@ -1170,16 +1153,18 @@ void floppy_image_device::cache_fill(const attotime &when) attotime base; uint32_t position = find_position(base, when); - int index = find_index(position, buf); + auto it = std::upper_bound( + buf.begin(), buf.end(), position, + [](uint32_t a, uint32_t b) { + return a < (b & floppy_image::TIME_MASK); + } + ); + + int index = int(it - buf.begin()) - 1; if(index == -1) { - // I suspect this should be an abort(), to check... - m_cache_start_time = attotime::zero; - m_cache_end_time = attotime::never; - m_cache_index = 0; - m_cache_entry = buf[0]; - cache_weakness_setup(); - return; + base -= m_rev_time; + index = buf.size() - 1; } for(;;) { diff --git a/src/devices/imagedev/floppy.h b/src/devices/imagedev/floppy.h index 55572333726..4a9b788b3ab 100644 --- a/src/devices/imagedev/floppy.h +++ b/src/devices/imagedev/floppy.h @@ -256,7 +256,6 @@ class floppy_image_device : public device_t, void check_led(); uint32_t find_position(attotime &base, const attotime &when); - int find_index(uint32_t position, const std::vector &buf) const; attotime position_to_time(const attotime &base, int position) const; void commit_image(); diff --git a/src/devices/machine/am79c90.cpp b/src/devices/machine/am79c90.cpp index 8c6a36221f3..7a7a6677474 100644 --- a/src/devices/machine/am79c90.cpp +++ b/src/devices/machine/am79c90.cpp @@ -125,14 +125,16 @@ void am7990_device_base::device_reset() void am7990_device_base::update_interrupts() { - if (m_csr[0] & CSR0_INTR) + if (m_csr[0] & CSR0_INEA) { - // assert intr if interrupts are enabled and not asserted - if ((m_csr[0] & CSR0_INEA) && m_intr_out_state) + // update intr + if (bool(m_csr[0] & CSR0_INTR) == m_intr_out_state) { m_intr_out_state = !m_intr_out_state; m_intr_out_cb(m_intr_out_state); - LOG("interrupt asserted\n"); + + if (!m_intr_out_state) + LOG("interrupt asserted\n"); } } else diff --git a/src/devices/machine/cxd1185.cpp b/src/devices/machine/cxd1185.cpp index 8b24126b662..12d1d0b73b3 100644 --- a/src/devices/machine/cxd1185.cpp +++ b/src/devices/machine/cxd1185.cpp @@ -261,6 +261,7 @@ void cxd1185_device::command_w(u8 data) m_command = data; m_status |= CIP; + m_last_dma_direction = DMA_NONE; switch (data & (CAT | CMD)) { @@ -304,11 +305,13 @@ void cxd1185_device::command_w(u8 data) LOGMASKED(LOG_CMD, "select target %d without atn\n", (m_scsi_id & TID) >> 5); m_status |= INIT; m_state = ARB_BUS_FREE; + m_last_dma_direction = (m_command & DMA) ? DMA_OUT : DMA_NONE; break; case 0x42: LOGMASKED(LOG_CMD, "select target %d with atn\n", (m_scsi_id & TID) >> 5); m_status |= INIT; m_state = ARB_BUS_FREE; + m_last_dma_direction = (m_command & DMA) ? DMA_OUT : DMA_NONE; break; case 0x43: LOGMASKED(LOG_CMD, "enable selection/reselection\n"); break; case 0x44: LOGMASKED(LOG_CMD, "disable selection/reselection\n"); break; @@ -325,10 +328,12 @@ void cxd1185_device::command_w(u8 data) case 0xc0: LOGMASKED(LOG_CMD, "transfer information\n"); m_state = XFR_INFO; + m_last_dma_direction = (m_command & DMA) ? ((scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT) : DMA_NONE; break; case 0xc1: LOGMASKED(LOG_CMD, "transfer pad\n"); m_state = XFR_INFO; + m_last_dma_direction = (m_command & DMA) ? ((scsi_bus->ctrl_r() & S_INP) ? DMA_IN : DMA_OUT) : DMA_NONE; break; case 0xc2: LOGMASKED(LOG_CMD, "deassert ack\n"); @@ -616,6 +621,11 @@ int cxd1185_device::state_step() // assert ACK scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK); + + // If this is a DMA command and we have data now, assert DRQ so host can start transferring + // (also handles transfers in the case where the counter is not aligned with the expected bytes read) + if (m_command & DMA) + set_drq(true); } else { @@ -649,7 +659,8 @@ int cxd1185_device::state_step() // check if target changed phase if (m_int_req[1] & PHC) { - if (m_command & DMA) + // Lower DRQ unless FIFO still has valid data that the host machine can read out + if ((m_command & DMA) && m_fifo.empty()) set_drq(false); m_state = XFR_INFO_DONE; @@ -831,12 +842,21 @@ void cxd1185_device::int_check() { bool irq_asserted = false; + // When SPHI is set during DMA data in, phase change interrupts are deferred until the DMA transfer is complete + // This will be recalculated at that time once the FIFO is empty + uint8_t int_req1 = m_int_req[1]; + if ((m_mode & SPHI) && !m_fifo.empty() && (m_last_dma_direction == DMA_IN) && (int_req1 & PHC)) + { + LOGMASKED(LOG_INT, "SPHI active, suppressing PHC interrupt\n"); + int_req1 &= ~PHC; + } + // update mirq - if (m_int_req[0] || m_int_req[1]) + if (m_int_req[0] || int_req1) { m_status |= MIRQ; - irq_asserted = (m_int_req[0] & m_int_auth[0]) || (m_int_req[1] & m_int_auth[1]); + irq_asserted = (m_int_req[0] & m_int_auth[0]) || (int_req1 & m_int_auth[1]); } else m_status &= ~MIRQ; diff --git a/src/devices/machine/cxd1185.h b/src/devices/machine/cxd1185.h index f1d6732b26d..7fa3f21d7ea 100644 --- a/src/devices/machine/cxd1185.h +++ b/src/devices/machine/cxd1185.h @@ -111,6 +111,13 @@ class cxd1185_device } m_state; + enum dma_direction : u8 + { + DMA_NONE, + DMA_IN, + DMA_OUT + }; + // internal state bool m_irq_asserted; bool m_drq_asserted; @@ -118,6 +125,7 @@ class cxd1185_device bool m_pio_data_mode; bool m_pio_ctrl_mode; u32 m_scsi_ctrl_state; + dma_direction m_last_dma_direction; enum status_mask : u8 { diff --git a/src/devices/machine/mb3773.cpp b/src/devices/machine/mb3773.cpp index 50ea4ed4e39..126d1e0a62c 100644 --- a/src/devices/machine/mb3773.cpp +++ b/src/devices/machine/mb3773.cpp @@ -58,7 +58,7 @@ void mb3773_device::device_reset() TIMER_CALLBACK_MEMBER(mb3773_device::watchdog_expired) { - logerror("Reset caused by watchdog\n"); + logerror("watchdog_expired: reset issued\n"); #if WATCHDOG_DEBUG machine().debug_break(); diff --git a/src/devices/machine/tms9914.cpp b/src/devices/machine/tms9914.cpp index ffab008c777..2d77f3dd1bd 100644 --- a/src/devices/machine/tms9914.cpp +++ b/src/devices/machine/tms9914.cpp @@ -543,44 +543,19 @@ void tms9914_device::device_reset() m_sic = false; m_sre = false; m_dai = false; - m_pts = false; m_stdl = false; m_shdw = false; m_vstdl = false; - m_int_line = false; + m_rsvd2 = false; + m_int_line = true; m_accrq_line = true; // Ensure change is propagated - m_dio = 0; m_reg_int0_status = 0; - m_reg_int0_mask = 0; m_reg_int1_status = 0; - m_reg_int1_mask = 0; - m_reg_address = 0; m_reg_serial_p = 0; m_reg_2nd_serial_p = 0; m_reg_parallel_p = 0; m_reg_2nd_parallel_p = 0; - m_reg_di = 0; - m_reg_do = 0; - m_reg_ulpa = false; - m_swrst = false; - m_hdfa = false; - m_hdfe = false; - m_rtl = false; - m_gts = false; - m_rpp = false; - m_sic = false; - m_sre = false; - m_dai = false; - m_pts = false; - m_stdl = false; - m_shdw = false; - m_vstdl = false; - m_rsvd2 = false; - - - std::fill(std::begin(m_ext_signals), std::end(m_ext_signals), false); - std::fill(std::begin(m_signals), std::end(m_signals), false); do_swrst(); update_fsm(); diff --git a/src/devices/machine/watchdog.cpp b/src/devices/machine/watchdog.cpp index ad0dba7b5be..ef6ba30f072 100644 --- a/src/devices/machine/watchdog.cpp +++ b/src/devices/machine/watchdog.cpp @@ -144,14 +144,7 @@ void watchdog_timer_device::watchdog_enable(int state) void watchdog_timer_device::watchdog_fired() { - logerror("Reset caused by the watchdog!!!\n"); - - bool verbose = machine().options().verbose(); -#ifdef MAME_DEBUG - verbose = true; -#endif - if (verbose) - popmessage("Reset caused by the watchdog!!!\n"); + logerror("watchdog_fired: reset issued\n"); machine().schedule_soft_reset(); } diff --git a/src/emu/debug/debugcmd.cpp b/src/emu/debug/debugcmd.cpp index ad463ace500..724102cb8ec 100644 --- a/src/emu/debug/debugcmd.cpp +++ b/src/emu/debug/debugcmd.cpp @@ -739,7 +739,8 @@ void debugger_commands::execute_tracesym(const std::vector &pa // build parameters for printf std::vector printf_params(params); - printf_params.insert(printf_params.begin(), format.str()); + auto const format_str = format.str(); // HACK: workaround for pre-C++20 str() + printf_params.insert(printf_params.begin(), format_str); // then do a printf std::ostringstream buffer; diff --git a/src/emu/emucore.h b/src/emu/emucore.h index ca54f5208cd..cfbefa52707 100644 --- a/src/emu/emucore.h +++ b/src/emu/emucore.h @@ -233,7 +233,7 @@ class emu_fatalerror : public emu_exception emu_fatalerror(util::format_argument_pack const &args); emu_fatalerror(int _exitcode, util::format_argument_pack const &args); - template + template >>> emu_fatalerror(Format &&fmt, Params &&... args) : emu_fatalerror(static_cast const &>(util::make_format_argument_pack(std::forward(fmt), std::forward(args)...))) { diff --git a/src/lib/util/ioprocs.cpp b/src/lib/util/ioprocs.cpp index 37a958713b3..a9a26ffd313 100644 --- a/src/lib/util/ioprocs.cpp +++ b/src/lib/util/ioprocs.cpp @@ -797,7 +797,7 @@ std::pair write(write_stream &stream, void co std::size_t written; std::error_condition err = stream.write_some(buffer, length, written); actual += written; - if (err && (std::errc::interrupted != err)) + if ((err || !actual) && (std::errc::interrupted != err)) return std::make_pair(err, actual); buffer = reinterpret_cast(buffer) + written; length -= written; diff --git a/src/mame/beehive/microb.cpp b/src/mame/beehive/microb.cpp index b01e0ae1c3a..27cb221046e 100644 --- a/src/mame/beehive/microb.cpp +++ b/src/mame/beehive/microb.cpp @@ -257,7 +257,7 @@ static INPUT_PORTS_START( microb ) PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("RShift") PORT_CODE(KEYCODE_RSHIFT) PORT_BIT(0x83, IP_ACTIVE_LOW, IPT_UNUSED) - // assumed to be dipswitches, purpose unknown, see code from 12D + // assumed to be dipswitches, purpose unknown, see code from 12D PORT_START("DIPS") PORT_DIPNAME( 0x01, 0x01, "Switch A") PORT_DIPLOCATION("SW1:1") PORT_DIPSETTING( 0x01, DEF_STR(Off)) @@ -388,5 +388,5 @@ ROM_END } // Anonymous namespace -// YEAR NAME PARENT COMPAT MACHINE INPU CLASS INIT COMPANY FULLNAME FLAGS +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS COMP( 1982, dm3270, 0, 0, microb, microb, microb_state, empty_init, "Beehive International", "DM3270 Control Unit Display Station", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/capcom/cps2.cpp b/src/mame/capcom/cps2.cpp index ad9a81d9352..e2f9f23af4f 100644 --- a/src/mame/capcom/cps2.cpp +++ b/src/mame/capcom/cps2.cpp @@ -12539,8 +12539,8 @@ GAME( 1993, ecofghtru1, ecofghtr, cps2, ecofghtr, cps2_state, init_ecofghtr GAME( 1993, uecology, ecofghtr, cps2, ecofghtr, cps2_state, init_ecofghtr, ROT0, "Capcom", "Ultimate Ecology (Japan 931203)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ecofghtra, ecofghtr, cps2, ecofghtr, cps2_state, init_ecofghtr, ROT0, "Capcom", "Eco Fighters (Asia 931203)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ecofghtrh, ecofghtr, cps2, ecofghtr, cps2_state, init_ecofghtr, ROT0, "Capcom", "Eco Fighters (Hispanic 931203)", MACHINE_SUPPORTS_SAVE ) -GAME( 1993, ddtod, 0, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (Europe 940412)", MACHINE_SUPPORTS_SAVE ) -GAME( 1993, ddtodr1, ddtod, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (Europe 940113)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, ddtod, 0, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (Europe 940412)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, ddtodr1, ddtod, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (Europe 940113)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ddtodu, ddtod, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (USA 940125)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ddtodur1, ddtod, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (USA 940113)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ddtodj, ddtod, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Tower of Doom (Japan 940412)", MACHINE_SUPPORTS_SAVE ) @@ -12559,12 +12559,12 @@ GAME( 1994, ssf2tur1, ssf2t, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1994, ssf2xj, ssf2t, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Super Street Fighter II X: Grand Master Challenge (Japan 940311)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ssf2xjr1, ssf2t, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Super Street Fighter II X: Grand Master Challenge (Japan 940223)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ssf2xjr1r, ssf2t, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Super Street Fighter II X: Grand Master Challenge (Japan 940223 rent version)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, avsp, 0, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Alien vs. Predator (Europe 940520)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, avsp, 0, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Alien vs. Predator (Europe 940520)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, avspu, avsp, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Alien vs. Predator (USA 940520)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, avspj, avsp, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Alien vs. Predator (Japan 940520)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, avspa, avsp, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Alien vs. Predator (Asia 940520)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, avsph, avsp, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Alien vs. Predator (Hispanic 940520)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, dstlk, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (Europe 940705)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, dstlk, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (Europe 940705)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dstlku, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (USA 940818)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dstlkur1, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (USA 940705)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dstlka, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Darkstalkers: The Night Warriors (Asia 940705)", MACHINE_SUPPORTS_SAVE ) @@ -12572,14 +12572,14 @@ GAME( 1994, dstlkh, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1994, vampj, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire: The Night Warriors (Japan 940705)", MACHINE_SUPPORTS_SAVE ) // Partial update set? Only rom 04 is "B" revision GAME( 1994, vampja, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire: The Night Warriors (Japan 940705 alt)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, vampjr1, dstlk, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire: The Night Warriors (Japan 940630)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, ringdest, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Ring of Destruction: Slammasters II (Europe 940902)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, ringdest, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Ring of Destruction: Slammasters II (Europe 940902)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ringdesta, ringdest, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Ring of Destruction: Slammasters II (Asia 940831)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ringdesth, ringdest, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Ring of Destruction: Slammasters II (Hispanic 940902)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ringdestb, ringdest, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Ring of Destruction: Slammasters II (Brazil 940902)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, smbomb, ringdest, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Super Muscle Bomber: The International Blowout (Japan 940831)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, smbombr1, ringdest, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Super Muscle Bomber: The International Blowout (Japan 940808)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, armwar, 0, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Europe 941024)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, armwarr1, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Europe 941011)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, armwar, 0, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Europe 941024)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, armwarr1, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Europe 941011)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, armwaru, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (USA 941024)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, armwaru1, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (USA 940920)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, armwarb, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Brazil 941024)", MACHINE_SUPPORTS_SAVE ) @@ -12587,8 +12587,8 @@ GAME( 1994, pgear, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, GAME( 1994, pgearr1, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Powered Gear: Strategic Variant Armor Equipment (Japan 940916)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, armwara, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Asia 941024)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, armwarar1, armwar, cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "Capcom", "Armored Warriors (Asia 940920)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, xmcota, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Europe 950331)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, xmcotar1, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Europe 950105)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, xmcota, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Europe 950331)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, xmcotar1, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Europe 950105)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, xmcotau, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (USA 950105)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, xmcotab, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Brazil 950331)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, xmcotah, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Hispanic 950331)", MACHINE_SUPPORTS_SAVE ) @@ -12601,7 +12601,7 @@ GAME( 1994, xmcotajr, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1994, xmcotaa, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Asia 950105)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, xmcotaar1, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Asia 941219)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, xmcotaar2, xmcota, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men: Children of the Atom (Asia 941217)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, nwarr, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Night Warriors: Darkstalkers' Revenge (Europe 950316)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, nwarr, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Night Warriors: Darkstalkers' Revenge (Europe 950316)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, nwarru, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Night Warriors: Darkstalkers' Revenge (USA 950406)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, nwarrh, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Night Warriors: Darkstalkers' Revenge (Hispanic 950403)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, nwarrb, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Night Warriors: Darkstalkers' Revenge (Brazil 950403)", MACHINE_SUPPORTS_SAVE ) @@ -12610,13 +12610,13 @@ GAME( 1995, vhuntj, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1995, vhuntjr1s, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950307 stop version)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, vhuntjr1, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950307)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, vhuntjr2, nwarr, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Hunter: Darkstalkers' Revenge (Japan 950302)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, cybots, 0, cps2, cybots, cps2_state, init_cps2, ROT0, "Capcom", "Cyberbots: Fullmetal Madness (Europe 950424)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, cybots, 0, cps2, cybots, cps2_state, init_cps2, ROT0, "Capcom", "Cyberbots: Fullmetal Madness (Europe 950424)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, cybotsu, cybots, cps2, cybots, cps2_state, init_cps2, ROT0, "Capcom", "Cyberbots: Fullmetal Madness (USA 950424)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, cybotsj, cybots, cps2, cybots, cps2_state, init_cps2, ROT0, "Capcom", "Cyberbots: Fullmetal Madness (Japan 950420)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, sfa, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950727)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, sfar1, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950718)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, sfar2, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950627)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, sfar3, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950605)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, sfa, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950727)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, sfar1, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950718)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, sfar2, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950627)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, sfar3, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (Europe 950605)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, sfau, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha: Warriors' Dreams (USA 950627)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, sfza, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Zero (Asia 950627)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, sfzar1, sfa, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Zero (Asia 950605)", MACHINE_SUPPORTS_SAVE ) @@ -12631,7 +12631,7 @@ GAME( 1995, mmancp2u, megaman, cps2, cps2_2p3b, cps2_state, init_cps2, GAME( 1995, mmancp2ur1, megaman, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Mega Man: The Power Battle (CPS2, USA 950926, SAMPLE Version)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mmancp2ur2, megaman, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Mega Man: The Power Battle (CPS2, USA 950925, SAMPLE Version)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, rmancp2j, megaman, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Rockman: The Power Battle (CPS2, Japan 950922)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, msh, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Europe 951024)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, msh, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Europe 951024)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mshu, msh, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (USA 951024)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mshj, msh, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Japan 951117)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mshjr1, msh, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Japan 951024)", MACHINE_SUPPORTS_SAVE ) @@ -12639,7 +12639,7 @@ GAME( 1995, msha, msh, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1995, mshh, msh, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Hispanic 951117)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mshb, msh, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Brazil 951117)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mshbr1, msh, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes (Brazil 951024)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, 19xx, 0, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Europe 960104)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, 19xx, 0, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Europe 960104)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, 19xxu, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (USA 951207)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, 19xxa, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Asia 960104)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, 19xxar1, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Asia 951207)", MACHINE_SUPPORTS_SAVE ) @@ -12648,10 +12648,10 @@ GAME( 1996, 19xxjr1, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, GAME( 1996, 19xxjr2, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Japan 951207)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, 19xxh, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Hispanic 951218)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, 19xxb, 19xx, cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "Capcom", "19XX: The War Against Destiny (Brazil 951218)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, ddsom, 0, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960619)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, ddsomr1, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960223)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, ddsomr2, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960209)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, ddsomr3, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960208)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, ddsom, 0, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960619)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, ddsomr1, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960223)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, ddsomr2, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960209)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, ddsomr3, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Europe 960208)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, ddsomu, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (USA 960619)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, ddsomur1, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (USA 960209)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, ddsomj, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Japan 960619)", MACHINE_SUPPORTS_SAVE ) @@ -12661,7 +12661,7 @@ GAME( 1996, ddsoma, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, GAME( 1996, ddsomar1, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Asia 960208)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, ddsomh, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Hispanic 960223)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, ddsomb, ddsom, cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "Capcom", "Dungeons & Dragons: Shadow over Mystara (Brazil 960223)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, sfa2, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 2 (Europe 960229)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, sfa2, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 2 (Europe 960229)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, sfa2u, sfa2, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 2 (USA 960430)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, sfa2ur1, sfa2, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 2 (USA 960306)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, sfz2j, sfa2, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Zero 2 (Japan 960430)", MACHINE_SUPPORTS_SAVE ) @@ -12676,7 +12676,7 @@ GAME( 1996, sfz2alr1, sfz2al, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1996, sfz2alj, sfz2al, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Zero 2 Alpha (Japan 960805)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, sfz2alh, sfz2al, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Zero 2 Alpha (Hispanic 960813)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, sfz2alb, sfz2al, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Zero 2 Alpha (Brazil 960813)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, spf2t, 0, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (Europe 960529)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, spf2t, 0, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (Europe 960529)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, spf2tu, spf2t, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (USA 960620)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, spf2xj, spf2t, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Capcom", "Super Puzzle Fighter II X (Japan 960531)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, spf2ta, spf2t, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (Asia 960529)", MACHINE_SUPPORTS_SAVE ) @@ -12686,8 +12686,8 @@ GAME( 1996, megaman2a, megaman2, cps2, cps2_2p3b, cps2_state, init_cps2, GAME( 1996, rockman2j, megaman2, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Rockman 2: The Power Fighters (Japan 960708)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, megaman2h, megaman2, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Mega Man 2: The Power Fighters (Hispanic 960712)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, qndream, 0, cps2, qndream, cps2_state, init_cps2, ROT0, "Capcom", "Quiz Nanairo Dreams: Nijiirochou no Kiseki (Japan 960826)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, xmvsf, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Europe 961004)", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, xmvsfr1, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Europe 960910)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, xmvsf, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Europe 961004)", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, xmvsfr1, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Europe 960910)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, xmvsfu, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (USA 961023)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, xmvsfur1, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (USA 961004)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, xmvsfur2, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (USA 960910)", MACHINE_SUPPORTS_SAVE ) @@ -12701,16 +12701,16 @@ GAME( 1996, xmvsfar2, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1996, xmvsfar3, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Asia 960910)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, xmvsfh, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Hispanic 961004)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, xmvsfb, xmvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "X-Men Vs. Street Fighter (Brazil 961023)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, batcir, 0, cps2, cps2_4p2b, cps2_state, init_cps2, ROT0, "Capcom", "Battle Circuit (Europe 970319)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, batcir, 0, cps2, cps2_4p2b, cps2_state, init_cps2, ROT0, "Capcom", "Battle Circuit (Europe 970319)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, batcira, batcir, cps2, cps2_4p2b, cps2_state, init_cps2, ROT0, "Capcom", "Battle Circuit (Asia 970319)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, batcirj, batcir, cps2, cps2_4p2b, cps2_state, init_cps2, ROT0, "Capcom", "Battle Circuit (Japan 970319)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, vsav, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (Europe 970519)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, vsav, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (Europe 970519)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsavu, vsav, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (USA 970519)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsavj, vsav, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (Japan 970519)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsava, vsav, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (Asia 970519)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsavh, vsav, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (Hispanic 970519)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsavb, vsav, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior: The Lord of Vampire (Brazil 970519)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, mshvsf, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (Europe 970625)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, mshvsf, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (Europe 970625)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, mshvsfu, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (USA 970827)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, mshvsfu1, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (USA 970625)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, mshvsfj, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (Japan 970707)", MACHINE_SUPPORTS_SAVE ) @@ -12721,8 +12721,8 @@ GAME( 1997, mshvsfa, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1997, mshvsfa1, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (Asia 970620)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, mshvsfb, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (Brazil 970827)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, mshvsfb1, mshvsf, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Super Heroes Vs. Street Fighter (Brazil 970625)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, csclub, 0, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Europe 971017)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, csclub1, csclub, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Europe 970722)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, csclub, 0, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Europe 971017)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, csclub1, csclub, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Europe 970722)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, cscluba, csclub, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Asia 970722)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, csclubj, csclub, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Japan 970722)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, csclubjy, csclub, cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "Capcom", "Capcom Sports Club (Japan 970722, yellow case)", MACHINE_SUPPORTS_SAVE ) @@ -12734,8 +12734,8 @@ GAME( 1997, sgemfh, sgemf, cps2, cps2_2p3b, cps2_state, init_cps2, GAME( 1997, vhunt2, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970929)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vhunt2r1, vhunt2, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970913)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsav2, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Vampire Savior 2: The Lord of Vampire (Japan 970913)", MACHINE_SUPPORTS_SAVE ) -GAME( 1998, mvsc, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Europe 980123)", MACHINE_SUPPORTS_SAVE ) -GAME( 1998, mvscr1, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Europe 980112)", MACHINE_SUPPORTS_SAVE ) +GAME( 1998, mvsc, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Europe 980123)", MACHINE_SUPPORTS_SAVE ) +GAME( 1998, mvscr1, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Europe 980112)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, mvscu, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, mvscur1, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (USA 971222)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, mvscj, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Japan 980123)", MACHINE_SUPPORTS_SAVE ) @@ -12745,7 +12745,7 @@ GAME( 1998, mvsca, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, GAME( 1998, mvscar1, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Asia 980112)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, mvsch, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Hispanic 980123)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, mvscb, mvsc, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Marvel Vs. Capcom: Clash of Super Heroes (Brazil 980123)", MACHINE_SUPPORTS_SAVE ) -GAME( 1998, sfa3, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 3 (Europe 980904)", MACHINE_SUPPORTS_SAVE ) +GAME( 1998, sfa3, 0, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 3 (Europe 980904)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, sfa3u, sfa3, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 3 (USA 980904)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, sfa3ur1, sfa3, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 3 (USA 980629)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, sfa3us, sfa3, cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "Capcom", "Street Fighter Alpha 3 (USA 980616, SAMPLE Version)", MACHINE_SUPPORTS_SAVE ) @@ -12776,22 +12776,22 @@ GAME( 2000, mmatrixj, mmatrix, cps2, cps2_2p1b, cps2_state, init_cps2, RO // Games released on CPS-2 hardware by Mitchell -GAME( 2000, mpang, 0, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (Europe 001010)", MACHINE_SUPPORTS_SAVE ) -GAME( 2000, mpangr1, mpang, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (Europe 000925)", MACHINE_SUPPORTS_SAVE ) +GAME( 2000, mpang, 0, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (Europe 001010)", MACHINE_SUPPORTS_SAVE ) +GAME( 2000, mpangr1, mpang, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (Europe 000925)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, mpangu, mpang, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (USA 001010)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, mpangj, mpang, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (Japan 001011)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, mpanga, mpang, cps2, cps2_2p1b, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Mighty! Pang (Asia 001010)", MACHINE_SUPPORTS_SAVE ) -GAME( 2001, pzloop2, 0, cps2, pzloop2, cps2_state, init_pzloop2, ROT0, "Mitchell (Capcom license)", "Puzz Loop 2 (Europe 010302)", MACHINE_SUPPORTS_SAVE ) +GAME( 2001, pzloop2, 0, cps2, pzloop2, cps2_state, init_pzloop2, ROT0, "Mitchell (Capcom license)", "Puzz Loop 2 (Europe 010302)", MACHINE_SUPPORTS_SAVE ) GAME( 2001, pzloop2j, pzloop2, cps2, pzloop2, cps2_state, init_pzloop2, ROT0, "Mitchell (Capcom license)", "Puzz Loop 2 (Japan 010226)", MACHINE_SUPPORTS_SAVE ) GAME( 2001, pzloop2jr1, pzloop2, cps2, pzloop2, cps2_state, init_pzloop2, ROT0, "Mitchell (Capcom license)", "Puzz Loop 2 (Japan 010205)", MACHINE_SUPPORTS_SAVE ) GAME( 2001, choko, 0, cps2, choko, cps2_state, init_cps2, ROT0, "Mitchell (Capcom license)", "Janpai Puzzle Choukou (Japan 010820)", MACHINE_SUPPORTS_SAVE ) // Games released on CPS-2 hardware by Eighting/Raizing -GAME( 2000, dimahoo, 0, cps2, cps2_2p3b, cps2_state, init_cps2, ROT270, "Eighting / Raizing (Capcom license)", "Dimahoo (Europe 000121)", MACHINE_SUPPORTS_SAVE ) +GAME( 2000, dimahoo, 0, cps2, cps2_2p3b, cps2_state, init_cps2, ROT270, "Eighting / Raizing (Capcom license)", "Dimahoo (Europe 000121)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, dimahoou, dimahoo, cps2, cps2_2p3b, cps2_state, init_cps2, ROT270, "Eighting / Raizing (Capcom license)", "Dimahoo (USA 000121)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, gmahou, dimahoo, cps2, cps2_2p3b, cps2_state, init_cps2, ROT270, "Eighting / Raizing (Capcom license)", "Great Mahou Daisakusen (Japan 000121)", MACHINE_SUPPORTS_SAVE ) -GAME( 2000, 1944, 0, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Eighting / Raizing (Capcom license)", "1944: The Loop Master (Europe 000620)", MACHINE_SUPPORTS_SAVE ) +GAME( 2000, 1944, 0, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Eighting / Raizing (Capcom license)", "1944: The Loop Master (Europe 000620)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, 1944j, 1944, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Eighting / Raizing (Capcom license)", "1944: The Loop Master (Japan 000620)", MACHINE_SUPPORTS_SAVE ) GAME( 2000, 1944u, 1944, cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "Eighting / Raizing (Capcom license)", "1944: The Loop Master (USA 000620)", MACHINE_SUPPORTS_SAVE ) @@ -12804,22 +12804,22 @@ GAME( 2001, progeara, progear, cps2, cps2_2p3b, cps2_state, init_cps2, RO // Phoenix bootleg sets -GAME( 1993, ddtodd, ddtod, dead_cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "bootleg", "Dungeons & Dragons: Tower of Doom (Europe 940412 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, ddtodd, ddtod, dead_cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "bootleg", "Dungeons & Dragons: Tower of Doom (Europe 940412 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ecofghtrd, ecofghtr, dead_cps2, ecofghtr, cps2_state, init_ecofghtr, ROT0, "bootleg", "Eco Fighters (World 931203 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ssf2ud, ssf2, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Super Street Fighter II: The New Challengers (USA 930911 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, ssf2tbd, ssf2, dead_cps2comm, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Super Street Fighter II: The Tournament Battle (World 931119 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, armwar1d, armwar, dead_cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "bootleg", "Armored Warriors (Europe 941011 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, avspd, avsp, dead_cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "bootleg", "Alien vs. Predator (Europe 940520 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, armwar1d, armwar, dead_cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "bootleg", "Armored Warriors (Europe 941011 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, avspd, avsp, dead_cps2, cps2_3p3b, cps2_state, init_cps2, ROT0, "bootleg", "Alien vs. Predator (Europe 940520 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, dstlku1d, dstlk, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Darkstalkers: The Night Warriors (USA 940705 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, ringdstd, ringdest, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Ring of Destruction: Slammasters II (Europe 940902 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, ringdstd, ringdest, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Ring of Destruction: Slammasters II (Europe 940902 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ssf2tad, ssf2t, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Super Street Fighter II Turbo (Asia 940223 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1994, ssf2xjr1d, ssf2t, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Super Street Fighter II X: Grand Master Challenge (Japan 940223 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1994, xmcotar1d, xmcota, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "X-Men: Children of the Atom (Europe 950105 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, xmcotar1d, xmcota, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "X-Men: Children of the Atom (Europe 950105 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, mshud, msh, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Marvel Super Heroes (USA 951024 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, cybotsud, cybots, dead_cps2, cybots, cps2_state, init_cps2, ROT0, "bootleg", "Cyberbots: Fullmetal Madness (USA 950424 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, cybotsjd, cybots, dead_cps2, cybots, cps2_state, init_cps2, ROT0, "bootleg", "Cyberbots: Fullmetal Madness (Japan 950424) (decrypted bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1995, nwarrud, nwarr, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Night Warriors: Darkstalkers' Revenge (USA 950406 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1995, sfad, sfa, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Street Fighter Alpha: Warriors' Dreams (Europe 950727 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1995, sfad, sfa, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Street Fighter Alpha: Warriors' Dreams (Europe 950727 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, 19xxd, 19xx, dead_cps2, cps2_2p2b, cps2_state, init_cps2, ROT270, "bootleg", "19XX: The War Against Destiny (USA 951207 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, ddsomud, ddsom, dead_cps2, cps2_4p4b, cps2_state, init_cps2, ROT0, "bootleg", "Dungeons & Dragons: Shadow over Mystara (USA 960619 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, gigaman2, megaman2, gigaman2, cps2_2p3b, cps2_state, init_gigaman2, ROT0, "bootleg", "Giga Man 2: The Power Fighters (bootleg of Mega Man 2: The Power Fighters)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) // Different layer offsets and sound system @@ -12830,11 +12830,11 @@ GAME( 1996, spf2td, spf2t, dead_cps2, cps2_2p2b, cps2_state, init_cps GAME( 1996, spf2xjd, spf2t, dead_cps2, cps2_2p2b, cps2_state, init_cps2, ROT0, "bootleg", "Super Puzzle Fighter II X (Japan 960531 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, sfz2ald, sfz2al, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Street Fighter Zero 2 Alpha (Asia 960826 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1996, xmvsfu1d, xmvsf, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "X-Men Vs. Street Fighter (USA 961004 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, batcird, batcir, dead_cps2, cps2_4p2b, cps2_state, init_cps2, ROT0, "bootleg", "Battle Circuit (Europe 970319 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, csclub1d, csclub, dead_cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "bootleg", "Capcom Sports Club (Europe 970722 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, batcird, batcir, dead_cps2, cps2_4p2b, cps2_state, init_cps2, ROT0, "bootleg", "Battle Circuit (Europe 970319 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, csclub1d, csclub, dead_cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "bootleg", "Capcom Sports Club (Europe 970722 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, mshvsfu1d, mshvsf, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Marvel Super Heroes Vs. Street Fighter (USA 970625 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, sgemfd, sgemf, dead_cps2, cps2_2p3b, cps2_state, init_cps2, ROT0, "bootleg", "Super Gem Fighter: Mini Mix (USA 970904 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) -GAME( 1997, vsavd, vsav, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Vampire Savior: The Lord of Vampire (Europe 970519 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) +GAME( 1997, vsavd, vsav, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Vampire Savior: The Lord of Vampire (Europe 970519 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vhunt2d, vhunt2, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Vampire Hunter 2: Darkstalkers Revenge (Japan 970913 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1997, vsav2d, vsav2, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Vampire Savior 2: The Lord of Vampire (Japan 970913 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, mvscud, mvsc, dead_cps2, cps2_2p6b, cps2_state, init_cps2, ROT0, "bootleg", "Marvel Vs. Capcom: Clash of Super Heroes (USA 980123 Phoenix Edition) (bootleg)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/chess/conchess.cpp b/src/mame/chess/conchess.cpp index d3c1421004c..741417a9741 100644 --- a/src/mame/chess/conchess.cpp +++ b/src/mame/chess/conchess.cpp @@ -328,14 +328,14 @@ ROM_START( conc ) // 2 bytes different (bookrom fix) ROM_LOAD("ccp2.f", 0xf000, 0x1000, CRC(7a04b000) SHA1(72d702b91adc643201ac6cea7aeb9394a3afc8be) ) // " ROM_END -ROM_START( conca ) // 6 EPROMs version also exists, same rom contents +ROM_START( conca ) // 6 EPROMs version also exists, same ROM contents ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASE00 ) - ROM_LOAD("c87011.b3", 0xa000, 0x2000, CRC(915e414c) SHA1(80c94712d1c79fa469576c37b80ab66f77c77cc4) ) - ROM_LOAD("c87010.b2", 0xc000, 0x2000, CRC(088c8737) SHA1(9f841b3c47de9ef1da8ce98c0a33a919cba873c6) ) - ROM_LOAD("c87009.b1", 0xe000, 0x2000, CRC(e1c648e2) SHA1(725a6ac1c69f788a7bba0573e5609b55b12899ac) ) + ROM_LOAD("c87011_ccp2ab.b3", 0xa000, 0x2000, CRC(915e414c) SHA1(80c94712d1c79fa469576c37b80ab66f77c77cc4) ) // C2C076 serial also seen, same ROM contents + ROM_LOAD("c87010_ccp2cd.b2", 0xc000, 0x2000, CRC(088c8737) SHA1(9f841b3c47de9ef1da8ce98c0a33a919cba873c6) ) + ROM_LOAD("c87009_ccp2ef.b1", 0xe000, 0x2000, CRC(e1c648e2) SHA1(725a6ac1c69f788a7bba0573e5609b55b12899ac) ) ROM_END -ROM_START( concgla ) // 8 EPROMs version also exists, same rom contents +ROM_START( concgla ) // 8 EPROMs version also exists, same ROM contents ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD("9128c-0133", 0x8000, 0x4000, CRC(a6ac88eb) SHA1(d1fcd990e5196c00210d380e0e04155a5ea19824) ) // GI 9128C ROM_LOAD("9128c-0134", 0xc000, 0x4000, CRC(b694a275) SHA1(e4e49379b4eb45402ca8bb82c20d0169db62ed7a) ) // " diff --git a/src/mame/chess/krypton_regency.cpp b/src/mame/chess/krypton_regency.cpp index 449dbc50888..d767a5d427b 100644 --- a/src/mame/chess/krypton_regency.cpp +++ b/src/mame/chess/krypton_regency.cpp @@ -8,6 +8,8 @@ Krypton Regency (model 933) It was manufactured by Timorite, Ltd. (Eric White's company), the chess engine is by Gyula Horváth, similar to the one in CXG Sphinx Legend. +To start a new game, keep holding the NEW GAME button until the display says HELLO. + Hardware notes (Systema Challenge fitted with Regency MCU): - PCB label: LCD CHESS 938, JAN.1994, REV.1, EB-093801-01 - Hitachi H8/3256 MCU, 20MHz XTAL diff --git a/src/mame/dataeast/boogwing.cpp b/src/mame/dataeast/boogwing.cpp index 021878d2625..5b1eec6a28e 100644 --- a/src/mame/dataeast/boogwing.cpp +++ b/src/mame/dataeast/boogwing.cpp @@ -644,7 +644,7 @@ void boogwing_state::init_boogwing() memcpy(dst, src, 0x100000); } -GAME( 1992, boogwing, 0, boogwing, boogwing, boogwing_state, init_boogwing, ROT0, "Data East Corporation", "Boogie Wings (Europe v1.5, 92.12.07)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1992, boogwing, 0, boogwing, boogwing, boogwing_state, init_boogwing, ROT0, "Data East Corporation", "Boogie Wings (Europe v1.5, 92.12.07)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1992, boogwingu, boogwing, boogwing, boogwing, boogwing_state, init_boogwing, ROT0, "Data East Corporation", "Boogie Wings (USA v1.7, 92.12.14)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1992, boogwinga, boogwing, boogwing, boogwing, boogwing_state, init_boogwing, ROT0, "Data East Corporation", "Boogie Wings (Asia v1.5, 92.12.07)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1992, ragtime, boogwing, boogwing, boogwing, boogwing_state, init_boogwing, ROT0, "Data East Corporation", "The Great Ragtime Show (Japan v1.5, 92.12.07)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/dataeast/chanbara.cpp b/src/mame/dataeast/chanbara.cpp index 0aa92b404f0..e15bfa418f5 100644 --- a/src/mame/dataeast/chanbara.cpp +++ b/src/mame/dataeast/chanbara.cpp @@ -485,4 +485,4 @@ void chanbara_state::init_chanbara() } // Anonymous namespace -GAME( 1985, chanbara, 0, chanbara, chanbara, chanbara_state, init_chanbara, ROT270, "Data East", "Chanbara", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL ) +GAME( 1985, chanbara, 0, chanbara, chanbara, chanbara_state, init_chanbara, ROT270, "Data East Corporation", "Chanbara (Japan)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL ) // title & flyer suggests "Chan Bara" but it's actually チャンバラ diff --git a/src/mame/dataeast/compgolf.cpp b/src/mame/dataeast/compgolf.cpp index 707524587e1..d25697e0eda 100644 --- a/src/mame/dataeast/compgolf.cpp +++ b/src/mame/dataeast/compgolf.cpp @@ -528,5 +528,5 @@ void compgolf_state::init_compgolf() * *************************************/ -GAME( 1986, compgolf, 0, compgolf, compgolf, compgolf_state, init_compgolf, ROT0, "Data East", "Competition Golf Final Round (revision 3)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, compgolfo, compgolf, compgolf, compgolf, compgolf_state, init_compgolf, ROT0, "Data East", "Competition Golf Final Round (Japan, old version)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, compgolf, 0, compgolf, compgolf, compgolf_state, init_compgolf, ROT0, "Data East Corporation", "Competition Golf Final Round (World?, revision 3)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, compgolfo, compgolf, compgolf, compgolf, compgolf_state, init_compgolf, ROT0, "Data East Corporation", "Competition Golf Final Round (Japan, old version)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/dataeast/metlclsh.cpp b/src/mame/dataeast/metlclsh.cpp index 0203fb6d065..47f30a8af61 100644 --- a/src/mame/dataeast/metlclsh.cpp +++ b/src/mame/dataeast/metlclsh.cpp @@ -742,4 +742,4 @@ ROM_END } // anonymous namespace -GAME( 1985, metlclsh, 0, metlclsh, metlclsh, metlclsh_state, empty_init, ROT0, "Data East", "Metal Clash (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, metlclsh, 0, metlclsh, metlclsh, metlclsh_state, empty_init, ROT0, "Data East Corporation", "Metal Clash (Japan)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/dataeast/pktgaldx.cpp b/src/mame/dataeast/pktgaldx.cpp index 6d01cdaa305..655ea7602bf 100644 --- a/src/mame/dataeast/pktgaldx.cpp +++ b/src/mame/dataeast/pktgaldx.cpp @@ -660,6 +660,6 @@ void pktgaldx_state::driver_init() GAME( 1992, pktgaldx, 0, pktgaldx, pktgaldx, pktgaldx_state, driver_init, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Europe v3.00)", MACHINE_SUPPORTS_SAVE ) -GAME( 1993, pktgaldxj, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, driver_init, ROT0, "Data East Corporation (Nihon System license)", "Pocket Gal Deluxe (Japan v3.00)", MACHINE_SUPPORTS_SAVE ) -GAME( 1992, pktgaldxa, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, driver_init, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Asia v3.00)", MACHINE_SUPPORTS_SAVE ) +GAME( 1993, pktgaldxj, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, driver_init, ROT0, "Data East Corporation (Nihon System license)", "Pocket Gal Deluxe (Japan v3.00)", MACHINE_SUPPORTS_SAVE ) +GAME( 1992, pktgaldxa, pktgaldx, pktgaldx, pktgaldx, pktgaldx_state, driver_init, ROT0, "Data East Corporation", "Pocket Gal Deluxe (Asia v3.00)", MACHINE_SUPPORTS_SAVE ) GAME( 1993, pktgaldxb, pktgaldx, pktgaldxb, pktgaldx, pktgaldxb_state, empty_init, ROT0, "bootleg (Data West)", "Pocket Gal Deluxe (Europe v3.00, bootleg)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/handheld/hh_sm510.cpp b/src/mame/handheld/hh_sm510.cpp index 17697fd0235..abbea8ca30c 100644 --- a/src/mame/handheld/hh_sm510.cpp +++ b/src/mame/handheld/hh_sm510.cpp @@ -4860,11 +4860,12 @@ ROM_END * Sharp SM510 under epoxy (die label CMS54C, KMS584) * lcd screen with custom segments, 1-bit sound - BTANB: At the basket, the ball goes missing sometimes for 1 frame, or - may show 2 balls at the same time. It's the same on the real handheld. - BTANB: players flicker (increasing LCD delay won't improve it much) - Another BTANB? If a period is over at the same time a defender on the - 2nd column grabs the ball, his arm won't be erased until it's redrawn. + BTANB: + - At the basket, the ball goes missing sometimes for 1 frame, or may show 2 balls + at the same time. It's the same on the real handheld. + - players flicker (increasing LCD delay won't improve it much) + - If a period is over at the same time a defender on the 2nd column grabs the ball, + his arm won't be erased until it's redrawn (BTANB not verified). *******************************************************************************/ @@ -9996,6 +9997,10 @@ ROM_END * Sharp SM510 under epoxy (die label MJ1) * lcd screen with custom segments, 1-bit sound + TODO or BTANB?: Energy and weapon power bars are swapped. Not verified on the + handheld. The manual does show them correctly, but looking at the LCD segment + ID groupings, the SVG is not wrong. + *******************************************************************************/ class topaliens_state : public hh_sm510_state diff --git a/src/mame/hp/hp98x6.cpp b/src/mame/hp/hp98x6.cpp new file mode 100644 index 00000000000..f8a176cf016 --- /dev/null +++ b/src/mame/hp/hp98x6.cpp @@ -0,0 +1,707 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi + +// ************************** +// Driver for HP 98x6 systems +// ************************** +// +// What's in for 9816: +// - 8MHz M68000 CPU +// - Boot ROM +// - Configurable amount of RAM +// - Text video with attributes +// - Graphic video +// - HPIB interface +// - RS232 interface +// - HLE of 8041 UPI +// - Large keyboard (98203B) +// - Knob +// - Beeper +// - ID PROM +// +// Main references: +// - Olivier De Smet's standalone emulator: +// https://sites.google.com/site/olivier2smet2/hp_projects/hp98x6 +// - Tony Duell's reverse engineered schematics (available @ hpmuseum.net) + +#include "emu.h" + +#include "hp98x6_upi.h" + +#include "bus/ieee488/ieee488.h" +#include "bus/rs232/rs232.h" +#include "cpu/m68000/m68000.h" +#include "machine/ins8250.h" +#include "machine/ram.h" +#include "machine/tms9914.h" +#include "video/mc6845.h" + +#include "emupal.h" +#include "screen.h" + +// Debugging +#define VERBOSE 0 +#include "logmacro.h" + +namespace { + +// CPU clock +constexpr auto CPU_CLOCK = 16_MHz_XTAL / 2; + +// Video dot clock +constexpr unsigned DOT_CLOCK = 19'988'000; + +// HPIB and UPI clock +constexpr auto HPIB_CLOCK = 10_MHz_XTAL / 2; + +// UART clock +constexpr auto UART_CLOCK = 2.4576_MHz_XTAL; + +// Bit manipulation +template constexpr T BIT_MASK(unsigned n) +{ + return (T)1U << n; +} + +template void BIT_CLR(T& w , unsigned n) +{ + w &= ~BIT_MASK(n); +} + +template void BIT_SET(T& w , unsigned n) +{ + w |= BIT_MASK(n); +} + +// +--------------+ +// | hp9816_state | +// +--------------+ +class hp9816_state : public driver_device +{ +public: + hp9816_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_cpu(*this, "cpu") + , m_ram(*this, RAM_TAG) + , m_crtc(*this, "crtc") + , m_palette(*this, "palette") + , m_screen(*this, "screen") + , m_upi(*this, "upi") + , m_hpib(*this, "hpib") + , m_uart(*this, "uart") + , m_rs232(*this, "rs232") + , m_sw2_dipswitches(*this, "sw2") + , m_sw3_dipswitches(*this, "sw3") + , m_chargen(*this, "chargen") + { + } + + void hp9816(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + + required_device m_cpu; + required_device m_ram; + required_device m_crtc; + required_device m_palette; + required_device m_screen; + required_device m_upi; + required_device m_hpib; + required_device m_uart; + required_device m_rs232; + required_ioport m_sw2_dipswitches; + required_ioport m_sw3_dipswitches; + + // Character generator + required_region_ptr m_chargen; + +private: + void cpu_mem_map(address_map &map); + void diag_led_w(uint8_t data); + uint16_t text_r(offs_t offset); + void text_w(offs_t offset, uint16_t data, uint16_t mem_mask); + uint16_t graphic_r(offs_t offset, uint16_t mem_mask); + void graphic_w(offs_t offset, uint16_t data, uint16_t mem_mask); + uint8_t hpib_r(offs_t offset); + void hpib_w(offs_t offset, uint8_t data); + void uart_reset(); + void uart_update_irq(); + uint8_t uart_r(offs_t offset); + void uart_w(offs_t offset, uint8_t data); + + MC6845_UPDATE_ROW(crtc_update_row); + + void cpu_reset_w(int state); + void hpib_irq_w(int state); + void upi_irq7_w(int state); + void uart_irq_w(int state); + + static constexpr unsigned TEXT_VRAM_SIZE = 2048; + uint16_t m_text_vram[ TEXT_VRAM_SIZE ]; + static constexpr unsigned GRAPHIC_VRAM_SIZE = 16384; + uint8_t m_graphic_vram[ GRAPHIC_VRAM_SIZE ]; + bool m_hsync_en; + bool m_graphic_en; + bool m_hpib_irq; + bool m_hpib_dma_en; + bool m_upi_irq7; + bool m_uart_int_en; + bool m_uart_irq; + bool m_uart_ocd3; + bool m_uart_ocd4; +}; + +void hp9816_state::hp9816(machine_config &config) +{ + M68000(config, m_cpu, CPU_CLOCK); + m_cpu->set_addrmap(AS_PROGRAM, &hp9816_state::cpu_mem_map); + m_cpu->reset_cb().set(FUNC(hp9816_state::cpu_reset_w)); + + RAM(config, m_ram).set_default_size("256K").set_extra_options("512K,1M"); + + SCREEN(config, m_screen, SCREEN_TYPE_RASTER, rgb_t::white()); + // Parameters for 50 Hz frame rate + m_screen->set_raw(DOT_CLOCK, 1040, 0, 800, 384, 0, 300); + m_screen->set_screen_update(m_crtc, FUNC(mc6845_device::screen_update)); + + PALETTE(config, m_palette, palette_device::MONOCHROME_HIGHLIGHT); + + MC6845(config, m_crtc, DOT_CLOCK / 10); + m_crtc->set_char_width(10); + m_crtc->set_screen(m_screen); + m_crtc->set_update_row_callback(FUNC(hp9816_state::crtc_update_row)); + m_crtc->set_show_border_area(false); + + HP98X6_UPI(config, m_upi, HPIB_CLOCK); + m_upi->irq1_write_cb().set_inputline(m_cpu, M68K_IRQ_1); + m_upi->irq7_write_cb().set(FUNC(hp9816_state::upi_irq7_w)); + + TMS9914(config, m_hpib, HPIB_CLOCK); + m_hpib->int_write_cb().set(FUNC(hp9816_state::hpib_irq_w)); + m_hpib->dio_read_cb().set(IEEE488_TAG, FUNC(ieee488_device::dio_r)); + m_hpib->dio_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_dio_w)); + m_hpib->eoi_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_eoi_w)); + m_hpib->dav_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_dav_w)); + m_hpib->nrfd_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_nrfd_w)); + m_hpib->ndac_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_ndac_w)); + m_hpib->ifc_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_ifc_w)); + m_hpib->srq_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_srq_w)); + m_hpib->atn_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_atn_w)); + m_hpib->ren_write_cb().set(IEEE488_TAG, FUNC(ieee488_device::host_ren_w)); + + ieee488_device &ieee(IEEE488(config, IEEE488_TAG)); + ieee.eoi_callback().set(m_hpib , FUNC(tms9914_device::eoi_w)); + ieee.dav_callback().set(m_hpib , FUNC(tms9914_device::dav_w)); + ieee.nrfd_callback().set(m_hpib , FUNC(tms9914_device::nrfd_w)); + ieee.ndac_callback().set(m_hpib , FUNC(tms9914_device::ndac_w)); + ieee.ifc_callback().set(m_hpib , FUNC(tms9914_device::ifc_w)); + ieee.srq_callback().set(m_hpib , FUNC(tms9914_device::srq_w)); + ieee.atn_callback().set(m_hpib , FUNC(tms9914_device::atn_w)); + ieee.ren_callback().set(m_hpib , FUNC(tms9914_device::ren_w)); + IEEE488_SLOT(config, "ieee_rem", 0, remote488_devices, nullptr); + + INS8250(config, m_uart, UART_CLOCK); + m_uart->out_int_callback().set(FUNC(hp9816_state::uart_irq_w)); + m_uart->out_tx_callback().set("rs232", FUNC(rs232_port_device::write_txd)); + m_uart->out_dtr_callback().set("rs232", FUNC(rs232_port_device::write_dtr)); + m_uart->out_rts_callback().set("rs232", FUNC(rs232_port_device::write_rts)); + m_uart->out_out1_callback().set("rs232", FUNC(rs232_port_device::write_spds)); + // OUT2 -> SRTS + + RS232_PORT(config, m_rs232, default_rs232_devices, nullptr); + m_rs232->rxd_handler().set(m_uart, FUNC(ins8250_device::rx_w)); + m_rs232->cts_handler().set(m_uart, FUNC(ins8250_device::cts_w)); + m_rs232->dsr_handler().set(m_uart, FUNC(ins8250_device::dsr_w)); + m_rs232->dcd_handler().set(m_uart, FUNC(ins8250_device::dcd_w)); + m_rs232->ri_handler().set(m_uart, FUNC(ins8250_device::ri_w)); +} + +void hp9816_state::machine_start() +{ + save_item(NAME(m_text_vram)); + save_item(NAME(m_graphic_vram)); + save_item(NAME(m_hsync_en)); + save_item(NAME(m_graphic_en)); + save_item(NAME(m_hpib_dma_en)); + save_item(NAME(m_uart_int_en)); + save_item(NAME(m_uart_ocd3)); + save_item(NAME(m_uart_ocd4)); + + m_cpu->space(AS_PROGRAM).install_ram(0x1000000 - m_ram->size(), 0xffffff, m_ram->pointer()); +} + +void hp9816_state::machine_reset() +{ + m_hsync_en = false; + m_graphic_en = false; + m_hpib_dma_en = false; + uart_reset(); + diag_led_w(0); +} + +void hp9816_state::cpu_mem_map(address_map &map) +{ + map.unmap_value_high(); + // Range DTACK Device + // ============================== + // 00'0000-00'ffff * Boot ROM + // 01'0000-01'ffff * Diagnostic LEDs (write only) + // 02'0000-3f'ffff * None + // 40'0000-40'ffff None + // 41'0000-41'ffff * Text video memory & 6845 (mirror of 51'0000) + // 42'0000-42'ffff * Keyboard UPI + // 43'0000-43'ffff * Graphic video memory (Mirror of 53'0000) + // 44'0000-46'ffff None + // 47'0000-47'ffff * HPIB + // 48'0000-50'ffff None + // 51'0000-51'ffff * Text video memory & 6845 + // 52'0000-52'ffff * Keyboard UPI (mirror of 42'0000) + // 53'0000-53'ffff * Graphic video memory + // 54'0000-56'ffff None + // 57'0000-57'ffff * HPIB (mirror of 47'0000) + // 58'0000-68'ffff None + // 69'0000-69'ffff * UART + // 6a'0000-fb'ffff None + // fx'0000-ff'ffff * RAM + map(0x000000, 0x00ffff).rom().region("cpu", 0); + map(0x010000, 0x01ffff).w(FUNC(hp9816_state::diag_led_w)).umask16(0x00ff); + map(0x020000, 0x3fffff).noprw(); + map(0x400000, 0x40ffff).rw(m_cpu, FUNC(m68000_device::berr_r), FUNC(m68000_device::berr_w)); + map(0x410000, 0x41ffff).mirror(0x100000).rw(FUNC(hp9816_state::text_r), FUNC(hp9816_state::text_w)); + map(0x420000, 0x42ffff).mirror(0x100000).mask(3).rw(m_upi, FUNC(hp98x6_upi_device::read), FUNC(hp98x6_upi_device::write)).umask16(0x00ff); + map(0x430000, 0x43ffff).mirror(0x100000).rw(FUNC(hp9816_state::graphic_r), FUNC(hp9816_state::graphic_w)); + map(0x440000, 0x46ffff).rw(m_cpu, FUNC(m68000_device::berr_r), FUNC(m68000_device::berr_w)); + map(0x470000, 0x47ffff).mirror(0x100000).rw(FUNC(hp9816_state::hpib_r), FUNC(hp9816_state::hpib_w)).umask16(0x00ff); + map(0x480000, 0x50ffff).rw(m_cpu, FUNC(m68000_device::berr_r), FUNC(m68000_device::berr_w)); + map(0x540000, 0x56ffff).rw(m_cpu, FUNC(m68000_device::berr_r), FUNC(m68000_device::berr_w)); + map(0x580000, 0x68ffff).rw(m_cpu, FUNC(m68000_device::berr_r), FUNC(m68000_device::berr_w)); + map(0x690000, 0x69ffff).rw(FUNC(hp9816_state::uart_r), FUNC(hp9816_state::uart_w)).umask16(0x00ff); + map(0x6a0000, 0xfbffff).rw(m_cpu, FUNC(m68000_device::berr_r), FUNC(m68000_device::berr_w)); +} + +void hp9816_state::diag_led_w(uint8_t data) +{ + LOG("LEDS=%02x %c%c%c%c %c%c%c%c\n" , + data, + BIT(data , 7) ? '.' : '*', + BIT(data , 6) ? '.' : '*', + BIT(data , 5) ? '.' : '*', + BIT(data , 4) ? '.' : '*', + BIT(data , 3) ? '.' : '*', + BIT(data , 2) ? '.' : '*', + BIT(data , 1) ? '.' : '*', + BIT(data , 0) ? '.' : '*'); +} + +uint16_t hp9816_state::text_r(offs_t offset) +{ + if (BIT(offset, 12)) { + return m_text_vram[ offset & (TEXT_VRAM_SIZE - 1) ]; + } else if (BIT(offset, 0)) { + return m_crtc->register_r(); + } else { + LOG("Reading from non-existing register of 6845!\n"); + return 0; + } +} + +void hp9816_state::text_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + if (BIT(offset, 12)) { + m_hsync_en = !BIT(offset, 14); + COMBINE_DATA(&m_text_vram[ offset & (TEXT_VRAM_SIZE - 1) ]); + } else if (ACCESSING_BITS_0_7) { + if (BIT(offset, 0)) { + m_crtc->register_w(uint8_t(data)); + } else { + m_crtc->address_w(uint8_t(data)); + } + } else { + LOG("Access to 6845 on top byte!\n"); + } +} + +uint16_t hp9816_state::graphic_r(offs_t offset, uint16_t mem_mask) +{ + m_graphic_en = !BIT(offset, 14); + + if (ACCESSING_BITS_0_7) { + return m_graphic_vram[ offset & (GRAPHIC_VRAM_SIZE - 1) ]; + } else { + return m_cpu->berr_r(); + } +} + +void hp9816_state::graphic_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + m_graphic_en = !BIT(offset, 14); + + if (ACCESSING_BITS_0_7) { + m_graphic_vram[ offset & (GRAPHIC_VRAM_SIZE - 1) ] = uint8_t(data); + } else { + return m_cpu->berr_w(0); + } +} + +uint8_t hp9816_state::hpib_r(offs_t offset) +{ + uint8_t res = 0; + + if (BIT(offset, 3)) { + res = m_hpib->read(offset & 7); + } else if (BIT(offset, 1)) { + if (BIT(m_sw3_dipswitches->read(), 6)) { + BIT_SET(res, 7); + } + if (!m_hpib->cont_r()) { + BIT_SET(res, 6); + } + if (m_upi_irq7) { + BIT_SET(res, 2); + } + if (BIT(m_sw3_dipswitches->read(), 7)) { + BIT_SET(res, 0); + } + } else { + if (BIT(m_sw3_dipswitches->read(), 5)) { + BIT_SET(res, 7); + } + if (m_hpib_irq) { + BIT_SET(res, 6); + } + BIT_SET(res, 2); + if (m_hpib_dma_en) { + BIT_SET(res, 0); + } + } + + return res; +} + +void hp9816_state::hpib_w(offs_t offset, uint8_t data) +{ + if (BIT(offset, 3)) { + m_hpib->write(offset & 7, data); + } else { + m_hpib_dma_en = BIT(data, 0); + } +} + +void hp9816_state::uart_reset() +{ + m_uart_int_en = false; + m_uart_ocd4 = false; + m_uart_ocd3 = false; + m_uart->reset(); + uart_update_irq(); +} + +void hp9816_state::uart_update_irq() +{ + m_cpu->set_input_line(M68K_IRQ_4, m_uart_irq && m_uart_int_en); +} + +uint8_t hp9816_state::uart_r(offs_t offset) +{ + uint8_t res = 0; + + if (BIT(offset, 3)) { + res = m_uart->ins8250_r(offset & 7); + } else { + switch (offset & 3) { + case 0: + if (BIT(m_sw3_dipswitches->read(), 4)) { + BIT_SET(res, 7); + } + BIT_SET(res, 1); + break; + case 1: + if (m_uart_int_en) { + BIT_SET(res, 7); + } + if (m_uart_irq) { + BIT_SET(res, 6); + } + BIT_SET(res, 4); + break; + case 2: + if (m_uart_ocd3) { + BIT_SET(res, 7); + } + if (m_uart_ocd4) { + BIT_SET(res, 6); + } + res |= (m_sw3_dipswitches->read() & 0x0f); + break; + case 3: + res = uint8_t(m_sw2_dipswitches->read()); + break; + } + } + + return res; +} + +void hp9816_state::uart_w(offs_t offset, uint8_t data) +{ + if (BIT(offset, 3)) { + m_uart->ins8250_w(offset & 7, data); + } else { + switch (offset & 3) { + case 0: + uart_reset(); + break; + case 1: + m_uart_int_en = BIT(data, 7); + uart_update_irq(); + break; + case 2: + m_uart_ocd3 = BIT(data, 7); + m_uart_ocd4 = BIT(data, 6); + break; + } + } +} + +MC6845_UPDATE_ROW(hp9816_state::crtc_update_row) +{ + if (m_hsync_en) { + const pen_t *pen = m_palette->pens(); + bool clen = (ma & 0x3800) != 0x2800; + bool glb_blink = (m_screen->frame_number() & 0x30) == 0; + + // Text video + for (int i = 0; i < x_count; i++) { + uint16_t char_attr = m_text_vram[ (ma + i) & (TEXT_VRAM_SIZE - 1) ]; + // | Bit(s) | Meaning | + // |--------+----------------------------| + // | 15 | Select alternate char. set | + // | 14..12 | N/U | + // | 11 | Half brightness | + // | 10 | Underline | + // | 9 | Blink | + // | 8 | Inverted | + // | 7..0 | Character code | + + bool half_bright = BIT(char_attr, 11); + bool underline; + bool blink = glb_blink && BIT(char_attr, 9); + bool invert; + uint16_t char_pixels; + bool cursor; + if (clen) { + unsigned chargen_addr = ra | ((char_attr & 0xff) << 4); + if (BIT(char_attr, 15)) { + BIT_SET(chargen_addr, 12); + } + char_pixels = uint16_t(m_chargen[ chargen_addr ]) << 1; + underline = BIT(char_attr, 10) && ra == 11; + invert = BIT(char_attr, 8); + cursor = cursor_x == i; + } else { + char_pixels = 0; + underline = false; + invert = false; + cursor = false; + } + + // Truth table of 1st video combiner + // + // | blink | cursor | underline | out | + // |-------+--------+-----------+----------| + // | 0 | 0 | 0 | chargen | + // | 0 | 0 | 1 | ~chargen | + // | 0 | 1 | 0 | ~chargen | + // | 0 | 1 | 1 | chargen | + // | 1 | 0 | 0 | 0 | + // | 1 | 0 | 1 | 0 | + // | 1 | 1 | 0 | ~0 | + // | 1 | 1 | 1 | ~0 | + if (blink) { + if (cursor) { + char_pixels = ~0; + } else { + char_pixels = 0; + } + } else if (cursor ^ underline) { + char_pixels = ~char_pixels; + } + + // Truth table of 2nd video combiner + // + // | half_bright | Graphic | invert | Text | out | + // |-------------+---------+--------+------+-----| + // | 0 | 0 | 0 | 0 | 0 | + // | 0 | 0 | 0 | 1 | 2 | + // | 0 | 0 | 1 | 0 | 2 | + // | 0 | 0 | 1 | 1 | 0 | + // | 0 | 1 | 0 | 0 | 2 | + // | 0 | 1 | 0 | 1 | 0 | + // | 0 | 1 | 1 | 0 | 0 | + // | 0 | 1 | 1 | 1 | 2 | + // | 1 | 0 | 0 | 0 | 0 | + // | 1 | 0 | 0 | 1 | 1 | + // | 1 | 0 | 1 | 0 | 1 | + // | 1 | 0 | 1 | 1 | 0 | + // | 1 | 1 | 0 | 0 | 2 | + // | 1 | 1 | 0 | 1 | 2 | + // | 1 | 1 | 1 | 0 | 2 | + // | 1 | 1 | 1 | 1 | 2 | + if (invert) { + char_pixels = ~char_pixels; + } + for (unsigned col = 0; col < 10; col++) { + bitmap.pix(y, i * 10 + col) = pen[ BIT(char_pixels, 9 - col) ? (half_bright ? 1 : 2) : 0 ]; + } + } + + // Graphic video + if (m_graphic_en) { + unsigned g_cols = unsigned(x_count) * 5; + // Hw only works correctly when x_count is 80 (-> 50 bytes per graphic line) + unsigned g_bytes_per_line = g_cols / 8; + unsigned g_addr = y * g_bytes_per_line; + for (unsigned i = 0; i < g_bytes_per_line; i++) { + uint8_t graph_pixels = m_graphic_vram[ (g_addr + i) & (GRAPHIC_VRAM_SIZE - 1) ]; + for (unsigned col = 0; col < 8; col++) { + if (BIT(graph_pixels, 7 - col)) { + // A graphic pixel covers 2 text pixels + // Also, the hw seems to offset graphic pixels 1 text pixel to the right + // Here this offset is not applied (as rightmost graphic pixel would be clipped) + unsigned x_pos = i * 16 + col * 2; + { + auto &pix = bitmap.pix(y, x_pos); + // Overlay rules (see 2nd video combiner table) + // + // | Text | Combined | + // | video | Video | + // |-------+----------| + // | 0 | 2 | + // | 1 | 2 | + // | 2 | 0 | + pix = pen[ (pix == pen[ 2 ]) ? 0 : 2 ]; + } + x_pos++; + { + auto &pix = bitmap.pix(y, x_pos); + pix = pen[ (pix == pen[ 2 ]) ? 0 : 2 ]; + } + } + } + } + } + } else { + bitmap.fill(rgb_t::black(), rectangle(0, unsigned(x_count) * 10 - 1, y, y)); + } +} + +void hp9816_state::cpu_reset_w(int state) +{ + if (state) { + LOG("RESET from CPU\n"); + m_upi->reset(); + m_hpib->reset(); + m_hpib_dma_en = false; + uart_reset(); + //m_crtc->reset(); + m_hsync_en = false; + m_graphic_en = false; + } +} + +void hp9816_state::hpib_irq_w(int state) +{ + m_hpib_irq = bool(state); + m_cpu->set_input_line(M68K_IRQ_3, state); +} + +void hp9816_state::upi_irq7_w(int state) +{ + m_upi_irq7 = bool(state); + m_cpu->set_input_line(M68K_IRQ_7, state); +} + +void hp9816_state::uart_irq_w(int state) +{ + m_uart_irq = bool(state); + uart_update_irq(); +} + +static INPUT_PORTS_START(hp9816) + PORT_START("sw2") + PORT_DIPNAME(0x30, 0x00, "Parity type") + PORT_DIPLOCATION("S2:4,3") + PORT_DIPSETTING(0x00, "Odd") + PORT_DIPSETTING(0x10, "Even") + PORT_DIPSETTING(0x20, "One") + PORT_DIPSETTING(0x30, "Zero") + PORT_DIPNAME(0x08, 0x00, "Parity enable") + PORT_DIPLOCATION("S2:5") + PORT_DIPSETTING(0x00, DEF_STR(Off)) + PORT_DIPSETTING(0x08, DEF_STR(On)) + PORT_DIPNAME(0x04, 0x00, "Stop bits") + PORT_DIPLOCATION("S2:6") + PORT_DIPSETTING(0x00, "1") + PORT_DIPSETTING(0x04, "2") + PORT_DIPNAME(0x03, 0x03, "Bits/char") + PORT_DIPLOCATION("S2:8,7") + PORT_DIPSETTING(0x00, "5") + PORT_DIPSETTING(0x01, "6") + PORT_DIPSETTING(0x02, "7") + PORT_DIPSETTING(0x03, "8") + + PORT_START("sw3") + PORT_DIPNAME(0x0f, 0x0a, "Baud rate") + PORT_DIPLOCATION("S3:4,3,2,1") + PORT_DIPSETTING(0x00, "50") + PORT_DIPSETTING(0x01, "75") + PORT_DIPSETTING(0x02, "110") + PORT_DIPSETTING(0x03, "134.5") + PORT_DIPSETTING(0x04, "150") + PORT_DIPSETTING(0x05, "200") + PORT_DIPSETTING(0x06, "300") + PORT_DIPSETTING(0x07, "600") + PORT_DIPSETTING(0x08, "1200") + PORT_DIPSETTING(0x09, "1800") + PORT_DIPSETTING(0x0a, "2400") + PORT_DIPSETTING(0x0b, "3600") + PORT_DIPSETTING(0x0c, "4800") + PORT_DIPSETTING(0x0d, "7200") + PORT_DIPSETTING(0x0e, "9600") + PORT_DIPSETTING(0x0f, "19200") + PORT_DIPNAME(0x10, 0x00, "Remote keyboard") + PORT_DIPLOCATION("S3:5") + PORT_DIPSETTING(0x00, DEF_STR(Off)) + PORT_DIPSETTING(0x10, DEF_STR(On)) + PORT_DIPNAME(0x20, 0x20, "Continuous self-test") + PORT_DIPLOCATION("S3:6") + PORT_DIPSETTING(0x00, DEF_STR(On)) + PORT_DIPSETTING(0x20, DEF_STR(Off)) + PORT_DIPNAME(0x40, 0x40, "HPIB Sys controller") + PORT_DIPLOCATION("S3:7") + PORT_DIPSETTING(0x00, DEF_STR(Off)) + PORT_DIPSETTING(0x40, DEF_STR(On)) + PORT_DIPNAME(0x80, 0x80, "CRT refresh rate") + PORT_DIPLOCATION("S3:8") + PORT_DIPSETTING(0x00, "50 Hz") + PORT_DIPSETTING(0x80, "60 Hz") + +INPUT_PORTS_END + +ROM_START(hp9816a) + ROM_REGION(0x2000, "chargen", 0) + ROM_LOAD("1818-3171.bin", 0, 0x2000, CRC(9cf4d4e1) SHA1(228484fd7ba7a4b59a051af083858383afe30179)) + + ROM_REGION(0x10000, "cpu", 0) + ROM_DEFAULT_BIOS("bios40") + ROM_SYSTEM_BIOS(0, "bios40", "BIOS v4.0") + ROMX_LOAD("rom40.bin", 0x0000, 0x10000, CRC(36005480) SHA1(645a077ffd95e4c31f05cd8bbd6e4554b12813f1), ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "bios30", "BIOS v3.0") + ROMX_LOAD("rom30.bin", 0x0000, 0x10000, CRC(05c07e75) SHA1(3066a65e6137482041f9a77d09ee2289fe0974aa), ROM_BIOS(1)) +ROM_END +} // anonymous namespace + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP(1982, hp9816a, 0, 0, hp9816, hp9816, hp9816_state,empty_init, "Hewlett-Packard", "HP 9816A", 0) diff --git a/src/mame/hp/hp98x6_upi.cpp b/src/mame/hp/hp98x6_upi.cpp new file mode 100644 index 00000000000..0b80475eb7f --- /dev/null +++ b/src/mame/hp/hp98x6_upi.cpp @@ -0,0 +1,1049 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi + +// **** High level emulation of 8041 UPI in HP98X6 systems **** +// +// Configuration jumpers I identified in RAM_POS_CFG_JUMPERS register: +// +// | Bit | Meaning | +// |------+---------------------------------------------------| +// | 7 | ID PROM is installed | +// | 6 | ? | +// | 5 | Enter key is named either "ENTER" or "RETURN" (?) | +// | 4..1 | ? | +// | 0 | Large (0) or small (1) keyboard | +// +// Sequence to read ID PROM: +// +// 68k UPI +// =========================================== +// Cmd C1 -> Set ID PROM address = 0 +// Cmd 01 -> Read PROM byte @00, address++ +// <- Byte @00 +// Cmd 01 -> Read PROM byte @01, address++ +// <- Byte @01 +// ... +// Cmd C0 -> Stop reading ID PROM +// +// TODO: +// - Find if FHS and delay timers are self canceling +// - Identify more configuration jumpers + +#include "emu.h" +#include "hp98x6_upi.h" + +// Debugging +#define VERBOSE 1 +#include "logmacro.h" + +// Bit manipulation +namespace { + template constexpr T BIT_MASK(unsigned n) + { + return (T)1U << n; + } + + template void BIT_CLR(T& w , unsigned n) + { + w &= ~BIT_MASK(n); + } + + template void BIT_SET(T& w , unsigned n) + { + w |= BIT_MASK(n); + } +} + +// Device type definition +DEFINE_DEVICE_TYPE(HP98X6_UPI, hp98x6_upi_device, "hp98x6_upi", "UPI of HP98x6 systems") + +// ID PROM for 9816A (it comes straight from O. De Smet's emulator) +static const uint8_t id_prom[] = { + 0x3e,0x38,0x00,0x32,0x30,0x31,0x30,0x41,0x30,0x30,0x30,0x30,0x30,0x30,0x39,0x38, + 0x31,0x36,0x41,0x20,0x20,0xff,0x01,0x02,0x03,0x04,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x00, + 0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, + 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff +}; + +// Positions in internal RAM +enum : uint8_t { + RAM_POS_0_R0, + RAM_POS_0_R1, + RAM_POS_0_R2_FLAGS1, + RAM_POS_0_R3_CURR_KEY, + RAM_POS_0_R4_FLAGS2, + RAM_POS_0_R5_FLAGS3, + RAM_POS_0_R6_ROLLOVER, + RAM_POS_0_R7_KEY_DOWN, + RAM_POS_RST_DEB_CNT = 0x10, + RAM_POS_CFG_JUMPERS, + RAM_POS_LNG_JUMPERS, + RAM_POS_OUT_BUFF_1, + RAM_POS_OUT_BUFF_2, + RAM_POS_OUT_BUFF_3, + RAM_POS_OUT_BUFF_4, + RAM_POS_OUT_BUFF_5, + RAM_POS_1_R0, + RAM_POS_1_R1, + RAM_POS_1_R2, + RAM_POS_1_R3_TIMER_STS, + RAM_POS_1_R4_RPG_COUNT, + RAM_POS_1_R5_W_PTR, + RAM_POS_1_R6_R_PTR, + RAM_POS_1_R7_6CTR, + RAM_POS_HIGH_RAM_START = 0x20, + RAM_POS_AR_WAIT = 0x20, + RAM_POS_AR_TIMER, + RAM_POS_AR_RATE, + RAM_POS_BEEP_TIMER, + RAM_POS_BEEP_FREQ, + RAM_POS_RPG_TIMER, + RAM_POS_RPG_INT_RATE, + RAM_POS_TIMER_INT, + RAM_POS_READING_PROM, // Not in HP doc, arbitrarily used for PROM reading + RAM_POS_PROM_ADDR, // Not in HP doc, arbitrarily used for PROM reading + RAM_POS_TOD_1 = 0x2d, + RAM_POS_TOD_2, + RAM_POS_TOD_3, + RAM_POS_DAY_1, + RAM_POS_DAY_2, + RAM_POS_FHS_1, + RAM_POS_FHS_2, + RAM_POS_MATCH_1, + RAM_POS_MATCH_2, + RAM_POS_MATCH_3, + RAM_POS_DELAY_1, + RAM_POS_DELAY_2, + RAM_POS_DELAY_3, + RAM_POS_CYCLE_1, + RAM_POS_CYCLE_2, + RAM_POS_CYCLE_3, + RAM_POS_CYCLE_SAVE_1, + RAM_POS_CYCLE_SAVE_2, + RAM_POS_CYCLE_SAVE_3 +}; + +// Clocks per 10 ms +constexpr unsigned CLOCKS_PER_10MS = 50000; + +// Delays (in device clocks) +// They are all multiples of 15 as that's the basic instruction cycle of 8041 +constexpr unsigned POR_DELAY1 = 105; +constexpr unsigned POR_DELAY2 = 100005; // This is a wild guess, real 8041 is mostly checksumming its ROM here +constexpr unsigned RESET_DELAY = 7500; +constexpr unsigned INPUT_DELAY = 495; // Sometimes 68k doesn't like instantaneous consumption of cmd/data bytes + +// Bits in status register +constexpr unsigned STATUS_F1_BIT = 3; +constexpr unsigned STATUS_F0_BIT = 2; +constexpr unsigned STATUS_IBF_BIT = 1; +constexpr unsigned STATUS_OBF_BIT = 0; +constexpr uint8_t ST_PSI = 0x10; +constexpr uint8_t ST_TIMER = 0x20; +constexpr uint8_t ST_REQUESTED_DATA = 0x40; +constexpr uint8_t ST_POST_OK = 0x70; +constexpr uint8_t ST_KEY = 0x80; +constexpr uint8_t ST_RPG = 0xc0; + +// Bits in RAM_POS_0_R2_FLAGS1 +constexpr uint8_t R2_FLAGS1_DEB_MASK = 0x07; +constexpr uint8_t R2_FLAGS1_DEB_INIT = 0x02; +constexpr unsigned R2_FLAGS1_FHS_BIT = 3; +constexpr unsigned R2_FLAGS1_CYCLE_BIT = 4; +constexpr unsigned R2_FLAGS1_DELAY_BIT = 5; +constexpr unsigned R2_FLAGS1_MATCH_BIT = 6; +constexpr unsigned R2_FLAGS1_BEEP_BIT = 7; + +// Bits in RAM_POS_0_R4_FLAGS2 +constexpr unsigned R4_FLAGS2_AR_BIT = 5; +constexpr unsigned R4_FLAGS2_FHS_MASK_BIT = 4; +constexpr unsigned R4_FLAGS2_PSI_MASK_BIT = 3; +constexpr unsigned R4_FLAGS2_TMR_MASK_BIT = 2; +constexpr unsigned R4_FLAGS2_RST_MASK_BIT = 1; +constexpr unsigned R4_FLAGS2_KEY_MASK_BIT = 0; + +// Bits in RAM_POS_0_R5_FLAGS3 +constexpr unsigned R5_FLAGS3_FHS_BIT = 7; +constexpr unsigned R5_FLAGS3_READ_BIT = 5; +constexpr unsigned R5_FLAGS3_RPG_BIT = 4; +constexpr unsigned R5_FLAGS3_USER_TMR_BIT = 3; +constexpr unsigned R5_FLAGS3_PSI_BIT = 2; +constexpr unsigned R5_FLAGS3_CTRL_UP_BIT = 1; +constexpr unsigned R5_FLAGS3_SHIFT_UP_BIT = 0; + +// Bits in RAM_POS_CFG_JUMPERS +constexpr unsigned CFG_JUMPERS_PROM_BIT = 7; + +// Bits in RAM_POS_1_R3_TIMER_STS +constexpr unsigned R3_TIMER_STS_MATCH_BIT = 7; +constexpr unsigned R3_TIMER_STS_DELAY_BIT = 6; +constexpr unsigned R3_TIMER_STS_CYCLE_BIT = 5; +constexpr uint8_t R3_TIMER_STS_INT_MASK = 0xe0; +constexpr uint8_t R3_TIMER_STS_MISSED_CYCLES_MASK = 0x1f; + +// Commands +constexpr uint8_t CMD_MASK = 0xe0; +constexpr uint8_t CMD_PARAM = 0x1f; +constexpr uint8_t CMD_RD_RAM_LOW = 0x00; +constexpr uint8_t CMD_RD_RAM_HIGH = 0x20; +constexpr uint8_t CMD_SET_INT_MASK = 0x40; +constexpr uint8_t CMD_WR_RAM_HIGH = 0xa0; +constexpr uint8_t CMD_RD_PROM_STOP = 0xc0; +constexpr uint8_t CMD_RD_PROM_START = 0xc1; + +// Scancode range +constexpr uint8_t SCANCODE_NONE = 0; +constexpr uint8_t MIN_SCANCODE = 0x18; +constexpr uint8_t MAX_SCANCODE = 0x7f; + +// Various constants +constexpr uint8_t POST_BYTE = 0x8e; +constexpr uint8_t TOD_1_ONE_DAY = 0; // One day is 0x83d600 (8'640'000) in TOD counts +constexpr uint8_t TOD_2_ONE_DAY = 0xd6; +constexpr uint8_t TOD_3_ONE_DAY = 0x83; +constexpr unsigned BEEP_SCALING = 15 * 64 * 64; +constexpr uint8_t PAUSE_SCANCODE = 0x38; // Reset is Shift+Pause + +hp98x6_upi_device::hp98x6_upi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +: device_t(mconfig, HP98X6_UPI, tag, owner, clock) + , m_keys(*this, "KEY%u", 0) + , m_shift(*this, "KEY_SHIFT") + , m_dial(*this, "DIAL") + , m_beep(*this, "beep") + , m_10ms_timer(*this, "timer") + , m_delay_timer(*this, "dly") + , m_input_delay_timer(*this, "inp_dly") + , m_irq1_write_func(*this) + , m_irq7_write_func(*this) +{ +} + +uint8_t hp98x6_upi_device::read(offs_t offset) +{ + uint8_t res; + + if (BIT(offset, 0)) { + res = m_status; + } else { + res = m_data_out; + BIT_CLR(m_status, STATUS_OBF_BIT); + m_irq1_write_func(false); + try_output(); + } + return res; +} + +void hp98x6_upi_device::write(offs_t offset, uint8_t data) +{ + m_data_in = data; + if (!BIT(m_status, STATUS_IBF_BIT)) { + m_ready = false; + m_input_delay_timer->adjust(clocks_to_attotime(INPUT_DELAY)); + BIT_SET(m_status, STATUS_IBF_BIT); + } + if (BIT(offset, 0)) { + BIT_SET(m_status, STATUS_F1_BIT); + } else { + BIT_CLR(m_status, STATUS_F1_BIT); + } +} + +void hp98x6_upi_device::device_add_mconfig(machine_config &config) +{ + // Beep + SPEAKER(config, "mono").front_center(); + BEEP(config, m_beep, 0).add_route(ALL_OUTPUTS, "mono", 1.00); + + TIMER(config, m_10ms_timer).configure_periodic(FUNC(hp98x6_upi_device::ten_ms), clocks_to_attotime(CLOCKS_PER_10MS)); + TIMER(config, m_delay_timer).configure_generic(FUNC(hp98x6_upi_device::delay)); + TIMER(config, m_input_delay_timer).configure_generic(FUNC(hp98x6_upi_device::input_delay)); +} + +#define IOP_MASK(x) BIT_MASK((x)) + +static INPUT_PORTS_START(hp98x6_upi_ports) + PORT_START("KEY0") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,1: N/U + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // 0,2: N/U + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_NAME("CAPS LOCK") // 0,3: Caps lock + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) PORT_NAME("k3") // 0,4: k3 + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("INSLN") // 0,5: Insln + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("EDIT") // 0,6: Edit + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("PAUSE") // 0,7: Pause + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) // 0,8: KP 1 + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) // 0,9: KP 7 + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') // 0,10: 1 + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(') // 0,11: 9 + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') // 0,12: , < + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // 0,13: Q + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') // 0,14: A + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') // 0,15: Z + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // 1,0: N/U + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // 1,1: N/U + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // 1,2: N/U + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // 1,3: Tab + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) PORT_NAME("k4") // 1,4: k4 + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("DELLN") // 1,5: Delln + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("ALPHA") // 1,6: Alpha + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_NAME("ENTER") PORT_CHAR(13) // 1,7: Enter + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) // 1,8: KP 2 + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) // 1,9: KP 8 + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@') // 1,10: 2 + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')') // 1,11: 0 + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') // 1,12: . + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // 1,13: W + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // 1,14: S + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // 1,15: X + + PORT_START("KEY1") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,1: N/U + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // 2,2: N/U + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("k0") // 2,3: k0 + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // 2,4: Down + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("RECALL") // 2,5: Recall + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("GRAPHICS") // 2,6: Graphics + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("CONTINUE") // 2,7: Continue + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) // 2,8: KP 3 + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) // 2,9: KP 9 + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') // 2,10: 3 + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') // 2,11: - + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') // 2,12: / + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') // 2,13: E + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') // 2,14: D + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') // 2,15: C + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,0: N/U + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,1: N/U + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // 3,2: N/U + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) PORT_NAME("k1") // 3,3: k1 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // 3,4: Up + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("INSCHR") // 3,5: Inschr + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("STEP") // 3,6: Step + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("EXECUTE") // 3,7: Execute + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) // 3,8: KP - + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) // 3,9: KP / + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 3,10: 4 + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') // 3,11: = + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') // 3,12: Space + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // 3,13: R + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') // 3,14: F + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') // 3,15: V + + PORT_START("KEY2") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,1: N/U + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // 4,2: N/U + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) PORT_NAME("k2") // 4,3: k2 + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) PORT_NAME("k8") // 4,4: k4 + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("DELCHR") // 4,5: Delchr + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("CLRLN") // 4,6: Clrln + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) // 4,7: KP 0 + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) // 4,8: KP 4 + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Keypad E") // 4,9: KP E + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') // 4,10: 5 + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // 4,11: [ + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') // 4,12: O + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') // 4,13: T + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') // 4,14: G + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') // 4,15: B + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,0: N/U + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,1: N/U + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // 5,2: N/U + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) PORT_NAME("k5") // 5,3: k5 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9)) PORT_NAME("k9") // 5,4: k9 + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_END) PORT_NAME("CLR TO END") // 5,5: Clr->endif + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("RESULT") // 5,6: Result + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) // 5,7: KP . + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) // 5,8: KP 5 + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Keypad (") // 5,9: KP ( + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^') // 5,10: 6 + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') // 5,11: ] + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') // 5,12: P + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') // 5,13: Y + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') // 5,14: H + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') // 5,15: N + + PORT_START("KEY3") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,0: N/U + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,1: N/U + PORT_BIT(IOP_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,2: N/U + PORT_BIT(IOP_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) PORT_NAME("k6") // 6,3: k6 + PORT_BIT(IOP_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // 6,4: Left + PORT_BIT(IOP_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // 6,5: Back space + PORT_BIT(IOP_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("PRT ALL") // 6,6: Prtall + PORT_BIT(IOP_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD)) // 6,7: KP , + PORT_BIT(IOP_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) // 6,8: KP 6 + PORT_BIT(IOP_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Keypad )") // 6,9: KP ) + PORT_BIT(IOP_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&') // 6,10: 7 + PORT_BIT(IOP_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') // 6,11: ; + PORT_BIT(IOP_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') // 6,12: K + PORT_BIT(IOP_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') // 6,13: U + PORT_BIT(IOP_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') // 6,14: J + PORT_BIT(IOP_MASK(15) , IP_ACTIVE_HIGH , IPT_UNUSED) // 6,15: N/U + PORT_BIT(IOP_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,0: N/U + PORT_BIT(IOP_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,1: N/U + PORT_BIT(IOP_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,2: N/U + PORT_BIT(IOP_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) PORT_NAME("k7") // 7,3: k7 + PORT_BIT(IOP_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // 7,4: Right + PORT_BIT(IOP_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("RUN") // 7,5: Run + PORT_BIT(IOP_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("CLR I/O") // 7,6: Clr I/O + PORT_BIT(IOP_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) // 7,7: KP + + PORT_BIT(IOP_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // 7,8: KP * + PORT_BIT(IOP_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Keypad ^") // 7.9: KP ^ + PORT_BIT(IOP_MASK(26) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*') // 7,10: 8 + PORT_BIT(IOP_MASK(27) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"') // 7,11: ' + PORT_BIT(IOP_MASK(28) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') // 7,12: L + PORT_BIT(IOP_MASK(29) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') // 7,13: I + PORT_BIT(IOP_MASK(30) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') // 7,14: M + PORT_BIT(IOP_MASK(31) , IP_ACTIVE_HIGH , IPT_UNUSED) // 7,15: N/U + + PORT_START("KEY_SHIFT") + PORT_BIT(IOP_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Left and right Shift + PORT_BIT(IOP_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // Control + + PORT_START("DIAL") + PORT_BIT(0xff, 0x00, IPT_DIAL) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) + +INPUT_PORTS_END + +ioport_constructor hp98x6_upi_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(hp98x6_upi_ports); +} + +void hp98x6_upi_device::device_start() +{ + save_item(NAME(m_ram)); + save_item(NAME(m_data_in)); + save_item(NAME(m_data_out)); + save_item(NAME(m_status)); + save_item(NAME(m_ready)); +} + +void hp98x6_upi_device::device_reset() +{ + m_irq1_write_func(true); + m_irq7_write_func(false); + + m_last_dial = m_dial->read(); + m_beep->set_state(0); + m_ram[ RAM_POS_0_R2_FLAGS1 ] = 0; + // Mask out all interrupts + m_ram[ RAM_POS_0_R4_FLAGS2 ] = + BIT_MASK(R4_FLAGS2_FHS_MASK_BIT) | + BIT_MASK(R4_FLAGS2_PSI_MASK_BIT) | + BIT_MASK(R4_FLAGS2_TMR_MASK_BIT) | + BIT_MASK(R4_FLAGS2_RST_MASK_BIT) | + BIT_MASK(R4_FLAGS2_KEY_MASK_BIT); + m_ram[ RAM_POS_0_R5_FLAGS3 ] = 0; + m_ram[ RAM_POS_0_R6_ROLLOVER ] = SCANCODE_NONE; + m_ram[ RAM_POS_0_R7_KEY_DOWN ] = SCANCODE_NONE; + // Assume RESET key is down + m_ram[ RAM_POS_RST_DEB_CNT ] = R2_FLAGS1_DEB_INIT; + // PROM is present + m_ram[ RAM_POS_CFG_JUMPERS ] = BIT_MASK(CFG_JUMPERS_PROM_BIT); + // Assume US English + m_ram[ RAM_POS_LNG_JUMPERS ] = 0; + m_ram[ RAM_POS_1_R3_TIMER_STS ] = 0; + m_ram[ RAM_POS_1_R4_RPG_COUNT ] = 0; + m_ram[ RAM_POS_1_R5_W_PTR ] = 0; + m_ram[ RAM_POS_READING_PROM ] = 0; + + // Note that RAM is not cleared to avoid losing TOD after an UPI reset + + m_status = 0; + m_ready = false; + m_fsm_state = FSM_ST::ST_POR_TEST1; + m_delay_timer->adjust(clocks_to_attotime(POR_DELAY1)); + m_input_delay_timer->reset(); +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp98x6_upi_device::ten_ms) +{ + ten_ms_update_key(); + ten_ms_update_dial(); + ten_ms_update_timers(); + ten_ms_update_beep(); + try_output(); +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp98x6_upi_device::delay) +{ + switch (m_fsm_state) { + case FSM_ST::ST_POR_TEST1: + m_irq1_write_func(false); + m_fsm_state = FSM_ST::ST_POR_TEST2; + m_delay_timer->adjust(clocks_to_attotime(POR_DELAY2)); + break; + + case FSM_ST::ST_POR_TEST2: + write_ob_st(POST_BYTE, ST_POST_OK); + m_fsm_state = FSM_ST::ST_IDLE; + update_fsm(); + break; + + case FSM_ST::ST_RESETTING: + // Send NMI to 68k + m_irq7_write_func(true); + // F0 = 0 means "NMI from RESET key" + BIT_CLR(m_status, STATUS_F0_BIT); + m_fsm_state = FSM_ST::ST_IDLE; + update_fsm(); + break; + + default: + break; + } +} + +TIMER_DEVICE_CALLBACK_MEMBER(hp98x6_upi_device::input_delay) +{ + m_ready = true; + update_fsm(); +} + +void hp98x6_upi_device::write_ob_st(uint8_t data, uint8_t st) +{ + LOG("UPI out %02x ST=%02x\n", data, st); + m_data_out = data; + BIT_SET(m_status, STATUS_OBF_BIT); + m_irq1_write_func(true); + m_status = (m_status & 0x0f) | (st & 0xf0); +} + +bool hp98x6_upi_device::read_ib(uint8_t &data) +{ + data = m_data_in; + bool res = BIT(m_status, STATUS_IBF_BIT); + BIT_CLR(m_status, STATUS_IBF_BIT); + return res; +} + +void hp98x6_upi_device::update_fsm() +{ + uint8_t in_data; + + // Check for incoming command or data + if (m_fsm_state == FSM_ST::ST_IDLE && + m_ready && + read_ib(in_data)) { + if (BIT(m_status, STATUS_F1_BIT)) { + // Command + LOG("UPI cmd %02x\n", in_data); + decode_cmd(in_data); + } else if (m_ram[ RAM_POS_1_R5_W_PTR ]) { + // Data + LOG("UPI data %02x\n", in_data); + uint8_t w_ptr = m_ram[ RAM_POS_1_R5_W_PTR ]; + if (w_ptr >= RAM_POS_TOD_1 && w_ptr <= RAM_POS_TOD_3) { + // Data written to TOD are summed in, not just stored + uint8_t inc[] = { 0, 0, 0 }; + inc[ w_ptr - RAM_POS_TOD_1 ] = in_data; + (void)add_to_ctr(RAM_POS_TOD_1, 3, inc); + } else { + m_ram[ w_ptr ] = in_data; + } + // Additional actions triggered by writing at the end of + // various counters + switch (w_ptr) { + case RAM_POS_BEEP_FREQ: + // Start/stop beep + if (in_data != 0) { + m_beep->set_clock((clock() * in_data) / BEEP_SCALING); + m_beep->set_state(1); + BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT); + } else { + m_beep->set_state(0); + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT); + } + break; + case RAM_POS_RPG_INT_RATE: + m_ram[ RAM_POS_RPG_TIMER ] = m_ram[ RAM_POS_RPG_INT_RATE ]; + break; + case RAM_POS_FHS_2: + BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT); + break; + case RAM_POS_MATCH_3: + BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT); + break; + case RAM_POS_DELAY_3: + BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_DELAY_BIT); + break; + case RAM_POS_CYCLE_3: + BIT_SET(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_CYCLE_BIT); + m_ram[ RAM_POS_CYCLE_SAVE_1 ] = m_ram[ RAM_POS_CYCLE_1 ]; + m_ram[ RAM_POS_CYCLE_SAVE_2 ] = m_ram[ RAM_POS_CYCLE_2 ]; + m_ram[ RAM_POS_CYCLE_SAVE_3 ] = m_ram[ RAM_POS_CYCLE_3 ]; + break; + } + + // Increment write pointer + w_ptr++; + if (w_ptr > 0x3f) { + LOG("Write pointer overflow\n"); + } else { + m_ram[ RAM_POS_1_R5_W_PTR ] = w_ptr; + } + } else { + // Not writing, data not expected + LOG("Unexpected data %02x\n", in_data); + } + // Try to send anything that's waiting to be sent + try_output(); + } +} + +void hp98x6_upi_device::decode_cmd(uint8_t cmd) +{ + // Not writing to RAM unless we get the write command + m_ram[ RAM_POS_1_R5_W_PTR ] = 0; + + // Decode command categories first + switch (cmd & CMD_MASK) { + case CMD_RD_RAM_LOW: + // 000x'xxxx + // Read low RAM + m_ram[ RAM_POS_1_R6_R_PTR ] = cmd & CMD_PARAM; + // Read from ID PROM when enabled + if (m_ram[ RAM_POS_READING_PROM ] && + m_ram[ RAM_POS_1_R6_R_PTR ] == RAM_POS_0_R1) { + m_ram[ RAM_POS_0_R1 ] = id_prom[ m_ram[ RAM_POS_PROM_ADDR ] ]; + LOG("PROM @%02x=%02x\n", m_ram[ RAM_POS_PROM_ADDR ], m_ram[ RAM_POS_0_R1 ]); + m_ram[ RAM_POS_PROM_ADDR ]++; + } + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_READ_BIT); + break; + case CMD_RD_RAM_HIGH: + // 001x'xxxx + // Read high RAM + { + unsigned idx = RAM_POS_HIGH_RAM_START - 4 + (cmd & CMD_PARAM); + m_ram[ RAM_POS_OUT_BUFF_1 ] = m_ram[ idx++ ]; + m_ram[ RAM_POS_OUT_BUFF_2 ] = m_ram[ idx++ ]; + m_ram[ RAM_POS_OUT_BUFF_3 ] = m_ram[ idx++ ]; + m_ram[ RAM_POS_OUT_BUFF_4 ] = m_ram[ idx++ ]; + m_ram[ RAM_POS_OUT_BUFF_5 ] = m_ram[ idx ]; + } + break; + case CMD_SET_INT_MASK: + // 010x'xxxx + // Set interrupt mask + m_ram[ RAM_POS_0_R4_FLAGS2 ] &= ~CMD_PARAM; + m_ram[ RAM_POS_0_R4_FLAGS2 ] |= (cmd & CMD_PARAM); + try_fhs_output(); + break; + case CMD_WR_RAM_HIGH: + // 101x'xxxx + // Write high RAM + m_ram[ RAM_POS_1_R5_W_PTR ] = RAM_POS_HIGH_RAM_START + (cmd & CMD_PARAM); + break; + default: + // Decode single commands + switch (cmd) { + case CMD_RD_PROM_START: + // 1100'0001 + // Start reading ID PROM + LOG("Start PROM read\n"); + m_ram[ RAM_POS_READING_PROM ] = 1; + m_ram[ RAM_POS_PROM_ADDR ] = 0; + break; + case CMD_RD_PROM_STOP: + // 1100'0000 + // Stop reading ID PROM + LOG("Stop PROM read\n"); + m_ram[ RAM_POS_READING_PROM ] = 0; + break; + default: + LOG("Unknown UPI cmd %02x\n", cmd); + break; + } + } + + // Then decode write commands that require additional actions + switch (m_ram[ RAM_POS_1_R5_W_PTR ]) { + case RAM_POS_TOD_1: + // Set time-of-day + m_ram[ RAM_POS_TOD_1 ] = 0; + m_ram[ RAM_POS_TOD_2 ] = 0; + m_ram[ RAM_POS_TOD_3 ] = 0; + break; + case RAM_POS_DAY_1 - 1: + // Set day + m_ram[ RAM_POS_1_R5_W_PTR ] = RAM_POS_DAY_1; + break; + case RAM_POS_FHS_1: + // Set FHS + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT); + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT); + m_irq7_write_func(false); + break; + case RAM_POS_MATCH_1: + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT); + BIT_CLR(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_MATCH_BIT); + if ((m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_INT_MASK) == 0) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + } + break; + case RAM_POS_DELAY_1: + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_DELAY_BIT); + BIT_CLR(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_DELAY_BIT); + if ((m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_INT_MASK) == 0) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + } + break; + case RAM_POS_CYCLE_1: + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_CYCLE_BIT); + m_ram[ RAM_POS_1_R3_TIMER_STS ] &= ~(R3_TIMER_STS_MISSED_CYCLES_MASK | + BIT_MASK(R3_TIMER_STS_CYCLE_BIT)); + if ((m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_INT_MASK) == 0) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + } + break; + } +} + +bool hp98x6_upi_device::add_to_ctr(unsigned ram_idx, unsigned len, const uint8_t *op) +{ + unsigned carry = 0; + + for (unsigned i = ram_idx; i < ram_idx + len; i++) { + unsigned sum = unsigned(m_ram[ i ]) + carry + *op++; + if (sum < 256) { + carry = 0; + m_ram[ i ] = uint8_t(sum); + } else { + carry = 1; + m_ram[ i ] = uint8_t(sum - 256); + } + } + + return bool(carry); +} + +void hp98x6_upi_device::ten_ms_update_key() +{ + // Acquire shift & control (note that bits in R5_FLAGS3 are inverted) + if (BIT(m_shift->read(), 0)) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT); + } else { + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT); + } + if (BIT(m_shift->read(), 1)) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_CTRL_UP_BIT); + } else { + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_CTRL_UP_BIT); + } + + // Scan keyboard + ioport_value keys[ 4 ]; + acquire_keys(keys); + + for (uint8_t idx = MIN_SCANCODE; idx <= MAX_SCANCODE; idx++) { + if (is_key_down(keys, idx)) { + // Check for RESET key combo + if (!BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT) && + idx == PAUSE_SCANCODE) { + if (m_ram[ RAM_POS_RST_DEB_CNT ] == 0 && + !BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_RST_MASK_BIT)) { + // RESET key pressed: start delay to interrupt 68k + LOG("Reset pressed\n"); + m_fsm_state = FSM_ST::ST_RESETTING; + m_delay_timer->adjust(clocks_to_attotime(RESET_DELAY)); + // Reset cancels FHS timer + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT); + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT); + } + m_ram[ RAM_POS_RST_DEB_CNT ] = R2_FLAGS1_DEB_INIT; + } else if (idx != m_ram[ RAM_POS_0_R7_KEY_DOWN ]) { + if (m_ram[ RAM_POS_0_R7_KEY_DOWN ] == SCANCODE_NONE) { + // New key is down + LOG("Key %02x\n", idx); + set_new_key(idx); + } else if (m_ram[ RAM_POS_0_R6_ROLLOVER ] == SCANCODE_NONE) { + // Save roll-over key + LOG("Rollover key %02x\n", idx); + m_ram[ RAM_POS_0_R6_ROLLOVER ] = idx; + } + } else { + // Key kept down, reload debounce counter + m_ram[ RAM_POS_0_R2_FLAGS1 ] = (m_ram[ RAM_POS_0_R2_FLAGS1 ] & ~R2_FLAGS1_DEB_MASK) | R2_FLAGS1_DEB_INIT; + } + } + } + + // Debounce RESET key + if (m_ram[ RAM_POS_RST_DEB_CNT ] != 0) { + m_ram[ RAM_POS_RST_DEB_CNT ]--; + } + + // Debounce, auto-repeat and roll-over + if (m_ram[ RAM_POS_0_R7_KEY_DOWN ] != SCANCODE_NONE) { + // Do debouncing + m_ram[ RAM_POS_0_R2_FLAGS1 ]--; + if ((m_ram[ RAM_POS_0_R2_FLAGS1 ] & R2_FLAGS1_DEB_MASK) != 0) { + // Key still down + m_ram[ RAM_POS_AR_TIMER ]++; + if (m_ram[ RAM_POS_AR_TIMER ] == 0) { + // Repeat key if A/R is enabled + m_ram[ RAM_POS_AR_TIMER ] = m_ram[ RAM_POS_AR_RATE ]; + if (m_ram[ RAM_POS_AR_RATE ]) { + LOG("A/R key %02x\n", m_ram[ RAM_POS_0_R7_KEY_DOWN ]); + BIT_SET(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT); + } + } + // Key is up & debounced, get roll-over key (if any) + } else if (m_ram[ RAM_POS_0_R6_ROLLOVER ] != SCANCODE_NONE) { + LOG("Shift rollover key %02x\n", m_ram[ RAM_POS_0_R6_ROLLOVER ]); + set_new_key(m_ram[ RAM_POS_0_R6_ROLLOVER ]); + m_ram[ RAM_POS_0_R6_ROLLOVER ] = SCANCODE_NONE; + } else { + m_ram[ RAM_POS_0_R7_KEY_DOWN ] = SCANCODE_NONE; + BIT_CLR(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT); + } + } +} + +void hp98x6_upi_device::ten_ms_update_dial() +{ + ioport_value dial = m_dial->read(); + if (dial != m_last_dial) { + uint8_t diff = uint8_t(m_last_dial) - uint8_t(dial); + int diff_int = int(diff); + // Sign extension + if (BIT(diff_int, 7)) { + diff_int -= 256; + } + LOG("DIAL %d\n", diff_int); + int pos = int(m_ram[ RAM_POS_1_R4_RPG_COUNT ]); + // Sign extension + if (BIT(pos, 7)) { + pos -= 256; + } + pos += diff_int; + // clamp pos between [-128 .. +127] + if (pos < -128) { + pos = -128; + } else if (pos > 127) { + pos = 127; + } + + m_ram[ RAM_POS_1_R4_RPG_COUNT ] = uint8_t(pos); + m_last_dial = dial; + } + + if (--m_ram[ RAM_POS_RPG_TIMER ] == 0) { + // Dial timer expired + m_ram[ RAM_POS_RPG_TIMER ] = m_ram[ RAM_POS_RPG_INT_RATE ]; + if (m_ram[ RAM_POS_1_R4_RPG_COUNT ]) { + // Time to send dial movement to 68k + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_RPG_BIT); + } + } +} + +void hp98x6_upi_device::ten_ms_update_timers() +{ + // 10-ms timer is up + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_PSI_BIT); + + // Advance TOD + uint8_t one[] = { 1, 0, 0 }; + (void)add_to_ctr(RAM_POS_TOD_1, 3, one); + // Check for one full day of counting + if (m_ram[ RAM_POS_TOD_3 ] > TOD_3_ONE_DAY || + (m_ram[ RAM_POS_TOD_3 ] == TOD_3_ONE_DAY && + (m_ram[ RAM_POS_TOD_2 ] > TOD_2_ONE_DAY || + (m_ram[ RAM_POS_TOD_2 ] == TOD_2_ONE_DAY && + m_ram[ RAM_POS_TOD_1 ] >= TOD_1_ONE_DAY)))) { + // Clear TOD and advance DAY counter + m_ram[ RAM_POS_TOD_1 ] = 0; + m_ram[ RAM_POS_TOD_2 ] = 0; + m_ram[ RAM_POS_TOD_3 ] = 0; + (void)add_to_ctr(RAM_POS_DAY_1, 2, one); + } + + // Check if "match" timer matches TOD + if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT) && + m_ram[ RAM_POS_TOD_1 ] == m_ram[ RAM_POS_MATCH_1 ] && + m_ram[ RAM_POS_TOD_2 ] == m_ram[ RAM_POS_MATCH_2 ] && + m_ram[ RAM_POS_TOD_3 ] == m_ram[ RAM_POS_MATCH_3 ]) { + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + BIT_SET(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_MATCH_BIT); + // Match timer is self-canceling + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_MATCH_BIT); + } + + // Update FHS timer + if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_FHS_BIT) && + add_to_ctr(RAM_POS_FHS_1, 2, one)) { + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT); + // Is the FHS timer self-canceling? + try_fhs_output(); + } + + // Update cyclic timer + if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_CYCLE_BIT) && + add_to_ctr(RAM_POS_CYCLE_1, 3, one)) { + if (BIT(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_CYCLE_BIT) && + (m_ram[ RAM_POS_1_R3_TIMER_STS ] & R3_TIMER_STS_MISSED_CYCLES_MASK) != R3_TIMER_STS_MISSED_CYCLES_MASK) { + // Increment number of missed cycle interrupts + m_ram[ RAM_POS_1_R3_TIMER_STS ]++; + } + BIT_SET(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_CYCLE_BIT); + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + // Reload timer + m_ram[ RAM_POS_CYCLE_1 ] = m_ram[ RAM_POS_CYCLE_SAVE_1 ]; + m_ram[ RAM_POS_CYCLE_2 ] = m_ram[ RAM_POS_CYCLE_SAVE_2 ]; + m_ram[ RAM_POS_CYCLE_3 ] = m_ram[ RAM_POS_CYCLE_SAVE_3 ]; + } + + // Update delay timer + if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_DELAY_BIT) && + add_to_ctr(RAM_POS_DELAY_1, 3, one)) { + BIT_SET(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + BIT_SET(m_ram[ RAM_POS_1_R3_TIMER_STS ], R3_TIMER_STS_DELAY_BIT); + // Is the delay timer self-canceling? + } +} + +void hp98x6_upi_device::ten_ms_update_beep() +{ + if (BIT(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT) && + ++m_ram[ RAM_POS_BEEP_TIMER ] == 0) { + m_beep->set_state(0); + BIT_CLR(m_ram[ RAM_POS_0_R2_FLAGS1 ], R2_FLAGS1_BEEP_BIT); + } +} + +void hp98x6_upi_device::set_new_key(uint8_t scancode) +{ + m_ram[ RAM_POS_0_R7_KEY_DOWN ] = scancode; + // Trigger output of key + BIT_SET(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT); + // Set A/R delay counter + m_ram[ RAM_POS_AR_TIMER ] = m_ram[ RAM_POS_AR_WAIT ]; + // Load debounce counter + m_ram[ RAM_POS_0_R2_FLAGS1 ] = (m_ram[ RAM_POS_0_R2_FLAGS1 ] & ~R2_FLAGS1_DEB_MASK) | R2_FLAGS1_DEB_INIT; +} + +void hp98x6_upi_device::acquire_keys(ioport_value input[ 4 ]) +{ + // Search for longest sequence among pressed keys + int max_len = 0; + unsigned n_pressed = 0; + for (unsigned i = 0; i < 4; i++) { + input[ i ] = m_keys[ i ]->read(); + auto w = input[ i ]; + while (w) { + auto mask = BIT_MASK(31 - count_leading_zeros_32(w)); + auto len = m_keys[ i ]->field(mask)->seq().length(); + if (len > max_len) { + max_len = len; + } + w &= ~mask; + n_pressed++; + } + } + // Filter out pressed keys with sequences shorter than the longest one + if (n_pressed > 1) { + for (unsigned i = 0; i < 4; i++) { + auto w = input[ i ]; + while (w) { + auto mask = BIT_MASK(31 - count_leading_zeros_32(w)); + auto len = m_keys[ i ]->field(mask)->seq().length(); + if (len < max_len) { + input[ i ] &= ~mask; + } + w &= ~mask; + } + } + } +} + +bool hp98x6_upi_device::is_key_down(const ioport_value input[ 4 ], uint8_t idx) +{ + unsigned row = idx % 8; + unsigned col = idx / 8; + return BIT(input[ row / 2 ], col + ((row & 1) << 4)); +} + +uint8_t hp98x6_upi_device::encode_shift_ctrl(uint8_t st) const +{ + if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_CTRL_UP_BIT)) { + BIT_SET(st, 5); + } + if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_SHIFT_UP_BIT)) { + BIT_SET(st, 4); + } + return st; +} + +void hp98x6_upi_device::try_output() +{ + if (!BIT(m_status, STATUS_OBF_BIT)) { + // Key + if (BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT) && + !BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_KEY_MASK_BIT)) { + uint8_t st = encode_shift_ctrl(ST_KEY); + write_ob_st(m_ram[ RAM_POS_0_R7_KEY_DOWN ], st); + BIT_CLR(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_AR_BIT); + // If key output is not possible now, autorepeat bit is not cleared + // to try again at a later time + } else { + // PSI and/or timers + bool psi = BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_PSI_BIT) && + !BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_PSI_MASK_BIT); + bool timer = BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT) && + !BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_TMR_MASK_BIT); + + if (psi || timer) { + uint8_t st = (psi ? ST_PSI : 0) | (timer ? ST_TIMER : 0); + write_ob_st(m_ram[ RAM_POS_1_R3_TIMER_STS ], st); + if (psi) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_PSI_BIT); + } + if (timer) { + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_USER_TMR_BIT); + m_ram[ RAM_POS_1_R3_TIMER_STS ] = 0; + } + } else if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_RPG_BIT) && + !BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_KEY_MASK_BIT)) { + // Dial position + uint8_t st = encode_shift_ctrl(ST_RPG); + write_ob_st(m_ram[ RAM_POS_1_R4_RPG_COUNT ], st); + m_ram[ RAM_POS_1_R4_RPG_COUNT ] = 0; + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_RPG_BIT); + } else if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_READ_BIT)) { + // Read data + write_ob_st(m_ram[ m_ram[ RAM_POS_1_R6_R_PTR ] ], ST_REQUESTED_DATA); + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_READ_BIT); + } + } + } +} + +void hp98x6_upi_device::try_fhs_output() +{ + // Check if FHS NMI interrupt is to be raised + if (BIT(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT) && + !BIT(m_ram[ RAM_POS_0_R4_FLAGS2 ], R4_FLAGS2_FHS_MASK_BIT)) { + LOG("NMI from FHS\n"); + BIT_CLR(m_ram[ RAM_POS_0_R5_FLAGS3 ], R5_FLAGS3_FHS_BIT); + // F0 = 1 means "NMI from FHS timer" + BIT_SET(m_status, STATUS_F0_BIT); + m_irq7_write_func(true); + } +} diff --git a/src/mame/hp/hp98x6_upi.h b/src/mame/hp/hp98x6_upi.h new file mode 100644 index 00000000000..ad70d0f5900 --- /dev/null +++ b/src/mame/hp/hp98x6_upi.h @@ -0,0 +1,93 @@ +// license:BSD-3-Clause +// copyright-holders:F. Ulivi + +// High level emulation of 8041 UPI in HP98X6 systems +// +// No known dump is available of this device +// +// A functional description is in this doc: +// HP-1980-Theory of operation-09826-66501 & 09826-66502 mother boards +// http://www.bitsavers.org/pdf/hp/9000_200/specs/A-09826-90315-1_9826_Mother_Board_Theory_of_Operation_Nov81.pdf + +#ifndef MAME_HP_HP98X6_UPI_H +#define MAME_HP_HP98X6_UPI_H + +#pragma once + +#include "machine/timer.h" +#include "sound/beep.h" +#include "speaker.h" + +class hp98x6_upi_device : public device_t +{ +public: + // construction/destruction + hp98x6_upi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + + uint8_t read(offs_t offset); + void write(offs_t offset, uint8_t data); + + // Set CB for IRQ1 signal + auto irq1_write_cb() { return m_irq1_write_func.bind(); } + // Set CB for IRQ7 signal + auto irq7_write_cb() { return m_irq7_write_func.bind(); } + +protected: + // device-level overrides + virtual void device_add_mconfig(machine_config &config) override; + virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + virtual void device_reset() override; + +private: + required_ioport_array<4> m_keys; + required_ioport m_shift; + required_ioport m_dial; + required_device m_beep; + required_device m_10ms_timer; + required_device m_delay_timer; + required_device m_input_delay_timer; + + devcb_write_line m_irq1_write_func; + devcb_write_line m_irq7_write_func; + uint8_t m_ram[ 64 ]; + uint8_t m_data_in; + uint8_t m_data_out; + uint8_t m_status; + bool m_ready; + ioport_value m_last_dial; + + enum class FSM_ST { + ST_IDLE, + ST_POR_TEST1, + ST_POR_TEST2, + ST_RESETTING + }; + + FSM_ST m_fsm_state; + + TIMER_DEVICE_CALLBACK_MEMBER(ten_ms); + TIMER_DEVICE_CALLBACK_MEMBER(delay); + TIMER_DEVICE_CALLBACK_MEMBER(input_delay); + + void write_ob_st(uint8_t data, uint8_t st); + bool read_ib(uint8_t &data); + void update_fsm(); + void decode_cmd(uint8_t cmd); + bool add_to_ctr(unsigned ram_idx, unsigned len, const uint8_t *op); + void ten_ms_update_key(); + void ten_ms_update_dial(); + void ten_ms_update_timers(); + void ten_ms_update_beep(); + void set_new_key(uint8_t scancode); + void acquire_keys(ioport_value input[ 4 ]); + bool is_key_down(const ioport_value input[ 4 ], uint8_t idx); + uint8_t encode_shift_ctrl(uint8_t st) const; + void try_output(); + void try_fhs_output(); +}; + +// device type definition +DECLARE_DEVICE_TYPE(HP98X6_UPI, hp98x6_upi_device) + +#endif /* MAME_HP_HP98X6_UPI_H */ diff --git a/src/mame/igs/pgm2.cpp b/src/mame/igs/pgm2.cpp index d9b84cccc4d..c95c1a1568b 100644 --- a/src/mame/igs/pgm2.cpp +++ b/src/mame/igs/pgm2.cpp @@ -1196,30 +1196,30 @@ ROM_END // Single board game (PCB-0779-00-JG) ROM_START( bubucar ) ROM_REGION( 0x04000, "maincpu", 0 ) - ROM_LOAD( "bu_bu_car-en_b5_internal_rom.u12", 0x00000000, 0x0004000, NO_DUMP ) + ROM_LOAD( "bu_bu_car-en_b5_internal_rom.u12", 0x0000000, 0x0004000, NO_DUMP ) ROM_REGION32_LE( 0x1000000, "mainrom", 0 ) - ROM_LOAD( "bubu-car-s1c0en_ev29lv160ab.u23", 0x00000000, 0x0200000, CRC(4c5009ef) SHA1(5b0c96d7bd1243523eb3670b7545cc7455b2d668) ) + ROM_LOAD( "bubu-car-s1c0en_ev29lv160ab.u23", 0x0000000, 0x0200000, CRC(4c5009ef) SHA1(5b0c96d7bd1243523eb3670b7545cc7455b2d668) ) - ROM_REGION( 0x200000, "tiles", ROMREGION_ERASE00 ) - ROM_LOAD( "jg_text.u31", 0x00000000, 0x0200000, NO_DUMP ) // EN29LV160AB-70TCP + ROM_REGION( 0x0200000, "tiles", ROMREGION_ERASE00 ) + ROM_LOAD( "jg_text.u31", 0x0000000, 0x0200000, CRC(aa6e8317) SHA1(b982873d0e2faefb89d263f945a5a3ba5f4efcd4) ) // EN29LV160AB-70TCP ROM_REGION( 0x2000000, "bgtile", ROMREGION_ERASE00 ) // BGL/BGH unpopulated (no background tilemap) - ROM_REGION( 0x08000000, "sprites_mask", 0 ) - ROM_LOAD32_WORD( "jg_map_bml.u38", 0x00000000, 0x4000000, NO_DUMP ) // K8Q2815UQB - ROM_LOAD32_WORD( "jg_map_bmh.u37", 0x00000002, 0x4000000, NO_DUMP ) // K8Q2815UQB + ROM_REGION( 0x2000000, "sprites_mask", 0 ) + ROM_LOAD32_WORD( "jg_map_bml.u38", 0x0000000, 0x1000000, CRC(c8c9fa6f) SHA1(22bf354f2ace9d3f05835525f24cc578feff6453) ) // K8Q2815UQB + ROM_LOAD32_WORD( "jg_map_bmh.u37", 0x0000002, 0x1000000, CRC(f9ba71fd) SHA1(79dc5ca48d1ba069b702a3854a28836040e981d0) ) // K8Q2815UQB - ROM_REGION( 0x20000000, "sprites_colour", 0 ) - ROM_LOAD32_WORD( "jg_cg_cgl.u19", 0x00000000, 0x4000000, NO_DUMP ) // K8Q2815UQB - ROM_LOAD32_WORD( "jg_cg_cgh.u20", 0x00000002, 0x4000000, NO_DUMP ) // K8Q2815UQB + ROM_REGION( 0x2000000, "sprites_colour", 0 ) + ROM_LOAD32_WORD( "jg_cg_cgl.u19", 0x0000000, 0x1000000, CRC(1d7ab9b2) SHA1(322d458f550ebe72b569efe1691aa8902de7a6d4) ) // K8Q2815UQB + ROM_LOAD32_WORD( "jg_cg_cgh.u20", 0x0000002, 0x1000000, CRC(2edeb815) SHA1(c9595108691586dfbb0b30bff9535f13e4c3afb3) ) // K8Q2815UQB - ROM_REGION( 0x08000000, "ymz774", ROMREGION_ERASEFF ) // YMZ774 - ROM_LOAD16_WORD_SWAP( "jg_wave.u18", 0x00000000, 0x4000000, NO_DUMP ) // K8Q2815UQB + ROM_REGION( 0x1000000, "ymz774", ROMREGION_ERASEFF ) // YMZ774 + ROM_LOAD16_WORD_SWAP( "jg_wave.u18", 0x0000000, 0x1000000, CRC(8ba99c0c) SHA1(5a7cccfae47eee5c9ea4c172f5126d514156f771) ) // K8Q2815UQB ROM_REGION( 0x10000, "sram", 0 ) - ROM_LOAD( "bubucar_en_sram", 0x00000000, 0x0010000, NO_DUMP ) + ROM_LOAD( "bubucar_en_sram", 0x0000000, 0x0010000, NO_DUMP ) ROM_END static void iga_u16_decode(u16 *rom, int len, int ixor) diff --git a/src/mame/kaneko/expro02.cpp b/src/mame/kaneko/expro02.cpp index 840ce4017a9..febb62eb1b5 100644 --- a/src/mame/kaneko/expro02.cpp +++ b/src/mame/kaneko/expro02.cpp @@ -916,17 +916,17 @@ uint8_t expro02_state::comad_okim6295_r() void expro02_state::expro02(machine_config &config) { + static constexpr XTAL CPU_CLOCK = XTAL(12'000'000); + static constexpr XTAL VDP_CLOCK = XTAL(16'000'000); + /* basic machine hardware */ - M68000(config, m_maincpu, 12_MHz_XTAL); + M68000(config, m_maincpu, CPU_CLOCK); m_maincpu->set_addrmap(AS_PROGRAM, &expro02_state::expro02_map); TIMER(config, "scantimer").configure_scanline(FUNC(expro02_state::scanline), "screen", 0, 1); /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(60); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */); - m_screen->set_size(256, 256); - m_screen->set_visarea(0, 256-1, 0, 256-32-1); + m_screen->set_raw(VDP_CLOCK / 3, 341, 0, 256, 262, 0, 224); // ~60 Hz m_screen->set_screen_update(FUNC(expro02_state::screen_update)); m_screen->set_palette(m_palette); @@ -952,7 +952,7 @@ void expro02_state::expro02(machine_config &config) /* sound hardware */ SPEAKER(config, "mono").front_center(); - okim6295_device &oki(OKIM6295(config, "oki", 12000000/6, okim6295_device::PIN7_LOW)); + okim6295_device &oki(OKIM6295(config, "oki", CPU_CLOCK / 6, okim6295_device::PIN7_LOW)); oki.set_addrmap(0, &expro02_state::oki_map); oki.add_route(ALL_OUTPUTS, "mono", 1.0); } @@ -971,7 +971,8 @@ void expro02_state::comad(machine_config &config) m_view2->set_invert_flip(1); m_view2->set_offset(-256, -216, 256, 224); - subdevice("watchdog")->set_time(attotime::from_seconds(0)); /* a guess, and certainly wrong */ + // FIXME: can't be 0 seconds + subdevice("watchdog")->set_time(attotime::from_seconds(0)); } void expro02_state::comad_noview2(machine_config &config) diff --git a/src/mame/konami/nemesis.cpp b/src/mame/konami/nemesis.cpp index e145f50744b..d0935523a43 100644 --- a/src/mame/konami/nemesis.cpp +++ b/src/mame/konami/nemesis.cpp @@ -2415,6 +2415,30 @@ ROM_START( salamandj ) ROM_LOAD( "587-c01.10a", 0x00000, 0x20000, CRC(09fe0632) SHA1(4c3b29c623d70bbe8a938a0beb4638912c46fb6a) ) /* Mask rom */ ROM_END +// Original Konami PCBs PWB (B) 201012A GX587 + GX400PWD(A)200204C +ROM_START( salamandt ) + ROM_REGION( 0x80000, "maincpu", 0 ) // Same program ROMs content as 'salamand', but with smaller ROMs + ROM_LOAD16_BYTE( "5_27512.18b", 0x00000, 0x10000, CRC(a42297f9) SHA1(7c974779e438eae649b39b36f6f6d24847099a6e) ) + ROM_LOAD16_BYTE( "6_27512.18c", 0x00001, 0x10000, CRC(f9130b0a) SHA1(925ea65c13fc87fc59f893cc0ead2c82fd0bed6f) ) + ROM_LOAD16_BYTE( "10_27512.17b", 0x40000, 0x10000, CRC(b83e8724) SHA1(69707a98ac3e15f240b24812ff639cafd99c306d) ) + ROM_LOAD16_BYTE( "4_27512.17c", 0x40001, 0x10000, CRC(a6ef6dc4) SHA1(639113b506fce4318d4b79efd8717232c31dd748) ) + ROM_LOAD16_BYTE( "9_27512.17b", 0x60000, 0x10000, CRC(b4d2fec9) SHA1(b095e003d86f6d5f486a1d9a4cf02572ff20edeb) ) + ROM_LOAD16_BYTE( "3_27512.17c", 0x60001, 0x10000, CRC(6ea59643) SHA1(cb2ba819a601eb417eb67d50568126269fa613a4) ) + + ROM_REGION( 0x10000, "audiocpu", 0 ) // 64k for sound + ROM_LOAD( "2_tmm24256ap.11j", 0x00000, 0x08000, CRC(7eb8bb88) SHA1(8eb3063b0f4b0775b80f25cc6588661c0e61227d) ) // Unique for this set + + ROM_REGION( 0x04000, "vlm", 0 ) // VLM5030 data + ROM_LOAD( "1_27128.8g", 0x00000, 0x04000, CRC(f9ac6b82) SHA1(3370fc3a7f82e922e19d54afb3bca7b07fa4aa9a) ) + + ROM_REGION( 0x20000, "k007232", 0 ) // 007232 data + ROM_LOAD( "8_27512.10a", 0x00000, 0x10000, CRC(cf477da4) SHA1(92867b3488228a802f0176139040c4eaf2b92700) ) + ROM_LOAD( "7_27512.10a", 0x10000, 0x10000, CRC(52384e79) SHA1(06d7003d8746287d95710dc6b52556aa642ccc83) ) + + ROM_REGION( 0x20, "pld", 0 ) + ROM_LOAD( "007366_pal8l14a.19d", 0x00000, 0x00020, CRC(77304735) SHA1(1f9dc7b78d4f7a40e7886d106d07b6349abaaa57) ) +ROM_END + ROM_START( lifefrce ) ROM_REGION( 0x80000, "maincpu", 0 ) ROM_LOAD16_BYTE( "587-l02.18b", 0x00000, 0x10000, CRC(4a44da18) SHA1(8e76bc2b9c48bfc65664fb6ee4d1d33622ee1eb8) ) @@ -2671,24 +2695,25 @@ ROM_END -GAME( 1985, nemesis, 0, nemesis, nemesis, nemesis_state, empty_init, ROT0, "Konami", "Nemesis (ROM version)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, nemesisuk, nemesis, nemesis, nemesuk, nemesis_state, empty_init, ROT0, "Konami", "Nemesis (World?, ROM version)", MACHINE_SUPPORTS_SAVE ) -GAMEL( 1985, konamigt, 0, konamigt, konamigt, nemesis_state, empty_init, ROT0, "Konami", "Konami GT", MACHINE_SUPPORTS_SAVE, layout_konamigt ) -GAME( 1985, rf2, konamigt, rf2_gx400, rf2, nemesis_state, empty_init, ROT0, "Konami", "Konami RF2 - Red Fighter", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, twinbee, 0, gx400, twinbee, nemesis_state, empty_init, ROT90, "Konami", "TwinBee (ROM version)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, gradius, nemesis, gx400, gradius, nemesis_state, empty_init, ROT0, "Konami", "Gradius (Japan, ROM version)", MACHINE_SUPPORTS_SAVE ) -GAME( 1985, gwarrior, 0, gx400, gwarrior, nemesis_state, empty_init, ROT0, "Konami", "Galactic Warriors", MACHINE_SUPPORTS_SAVE ) -GAME( 1986, salamand, 0, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami", "Salamander (version D)", MACHINE_SUPPORTS_SAVE ) -GAME( 1986, salamandj, salamand, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami", "Salamander (version J)", MACHINE_SUPPORTS_SAVE ) -GAME( 1986, lifefrce, salamand, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami", "Lifeforce (US)", MACHINE_SUPPORTS_SAVE ) -GAME( 1987, lifefrcej, salamand, salamand, lifefrcj, nemesis_state, empty_init, ROT0, "Konami", "Lifeforce (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1987, blkpnthr, 0, blkpnthr, blkpnthr, nemesis_state, empty_init, ROT0, "Konami", "Black Panther", MACHINE_SUPPORTS_SAVE ) -GAME( 1987, citybomb, 0, citybomb, citybomb, nemesis_state, empty_init, ROT270, "Konami", "City Bomber (World)", MACHINE_SUPPORTS_SAVE ) -GAME( 1987, citybombj, citybomb, citybomb, citybomb, nemesis_state, empty_init, ROT270, "Konami", "City Bomber (Japan)", MACHINE_SUPPORTS_SAVE ) -GAME( 1987, hcrash, 0, hcrash, hcrash, nemesis_state, empty_init, ROT0, "Konami", "Hyper Crash (version D)", MACHINE_SUPPORTS_SAVE ) -GAME( 1987, hcrashc, hcrash, hcrash, hcrash, nemesis_state, empty_init, ROT0, "Konami", "Hyper Crash (version C)", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, kittenk, 0, nyanpani, nyanpani, nemesis_state, empty_init, ROT0, "Konami", "Kitten Kaboodle", MACHINE_SUPPORTS_SAVE ) -GAME( 1988, nyanpani, kittenk, nyanpani, nyanpani, nemesis_state, empty_init, ROT0, "Konami", "Nyan Nyan Panic (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, nemesis, 0, nemesis, nemesis, nemesis_state, empty_init, ROT0, "Konami", "Nemesis (ROM version)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, nemesisuk, nemesis, nemesis, nemesuk, nemesis_state, empty_init, ROT0, "Konami", "Nemesis (World?, ROM version)", MACHINE_SUPPORTS_SAVE ) +GAMEL( 1985, konamigt, 0, konamigt, konamigt, nemesis_state, empty_init, ROT0, "Konami", "Konami GT", MACHINE_SUPPORTS_SAVE, layout_konamigt ) +GAME( 1985, rf2, konamigt, rf2_gx400, rf2, nemesis_state, empty_init, ROT0, "Konami", "Konami RF2 - Red Fighter", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, twinbee, 0, gx400, twinbee, nemesis_state, empty_init, ROT90, "Konami", "TwinBee (ROM version)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gradius, nemesis, gx400, gradius, nemesis_state, empty_init, ROT0, "Konami", "Gradius (Japan, ROM version)", MACHINE_SUPPORTS_SAVE ) +GAME( 1985, gwarrior, 0, gx400, gwarrior, nemesis_state, empty_init, ROT0, "Konami", "Galactic Warriors", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, salamand, 0, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami", "Salamander (version D)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, salamandj, salamand, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami", "Salamander (version J)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, salamandt, salamand, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami (Tecfri license)", "Salamander (Tecfri license)", MACHINE_SUPPORTS_SAVE ) +GAME( 1986, lifefrce, salamand, salamand, salamand, nemesis_state, empty_init, ROT0, "Konami", "Lifeforce (US)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, lifefrcej, salamand, salamand, lifefrcj, nemesis_state, empty_init, ROT0, "Konami", "Lifeforce (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, blkpnthr, 0, blkpnthr, blkpnthr, nemesis_state, empty_init, ROT0, "Konami", "Black Panther", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, citybomb, 0, citybomb, citybomb, nemesis_state, empty_init, ROT270, "Konami", "City Bomber (World)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, citybombj, citybomb, citybomb, citybomb, nemesis_state, empty_init, ROT270, "Konami", "City Bomber (Japan)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, hcrash, 0, hcrash, hcrash, nemesis_state, empty_init, ROT0, "Konami", "Hyper Crash (version D)", MACHINE_SUPPORTS_SAVE ) +GAME( 1987, hcrashc, hcrash, hcrash, hcrash, nemesis_state, empty_init, ROT0, "Konami", "Hyper Crash (version C)", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, kittenk, 0, nyanpani, nyanpani, nemesis_state, empty_init, ROT0, "Konami", "Kitten Kaboodle", MACHINE_SUPPORTS_SAVE ) +GAME( 1988, nyanpani, kittenk, nyanpani, nyanpani, nemesis_state, empty_init, ROT0, "Konami", "Nyan Nyan Panic (Japan)", MACHINE_SUPPORTS_SAVE ) /* diff --git a/src/mame/layout/krypton_regency.lay b/src/mame/layout/krypton_regency.lay index 1f543321d61..30d3402ba6e 100644 --- a/src/mame/layout/krypton_regency.lay +++ b/src/mame/layout/krypton_regency.lay @@ -352,7 +352,7 @@ authors:hap - + @@ -423,23 +423,23 @@ authors:hap - - - - - - - - - - - - + + + + + + + + + + + + - - + + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 094628cba26..279467379b1 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -19808,6 +19808,9 @@ hp9845b_de // hp9845c_de // hp9845t_de // +@source:hp/hp98x6.cpp +hp9816a // + @source:hp/hp9k.cpp hp9816 // @@ -24441,6 +24444,7 @@ nyanpani // GX712 (c) 1988 (Japan) rf2 // GX561 (c) 1985 salamand // GX587 (c) 1986 salamandj // GX587 (c) 1986 +salamandt // GX597 (c) 1986 (Tecfri) twinbee // GX412 (c) 1985 twinbeeb // Bubble System @@ -42254,6 +42258,9 @@ squale // @source:skeleton/sterz80.cpp tongzi +@source:skeleton/swunktarot.cpp +unktarot + @source:skeleton/swyft.cpp swyft // @@ -42848,6 +42855,7 @@ treamary wtrnymph // (c) 1996 Subsino xiaoao xplan // (c) 2006 Subsino +xreel xtrain // (c) 1999 Subsino @source:sun/sun1.cpp diff --git a/src/mame/misc/magicard.cpp b/src/mame/misc/magicard.cpp index 76ca3be02c7..3beab19dc5a 100644 --- a/src/mame/misc/magicard.cpp +++ b/src/mame/misc/magicard.cpp @@ -189,6 +189,7 @@ #include "emu.h" #include "cpu/pic16c5x/pic16c5x.h" +#include "cpu/pic16x8x/pic16x8x.h" #include "machine/ds1207.h" #include "machine/ds2401.h" #include "machine/i2cmem.h" @@ -552,6 +553,7 @@ void hotslots_state::hotslots_map_base(address_map &map) map(0x00416001, 0x00416001).w("ssg", FUNC(ymz284_device::data_w)); map(0x00417001, 0x00417001).w("ssg", FUNC(ymz284_device::address_w)); map(0x00418000, 0x00418020).rw("rtc", FUNC(rtc72421_device::read), FUNC(rtc72421_device::write)).umask16(0x00ff); + map(0x0041a000, 0x0041a001).nopw(); // supervisor? } void hotslots_state::hotslots_map(address_map &map) @@ -1101,6 +1103,11 @@ void hotslots_state::magicle(machine_config &config) { hotslots_base(config); + pic16f84_device &pic(PIC16F84(config, "pic16f84", 4000000)); + pic.set_config(0x3ffa); // No protect - No Watchdog - HS Clock + pic.read_b().set(FUNC(hotslots_state::pic_portb_r)); + pic.write_b().set(FUNC(hotslots_state::pic_portb_w)); + I2C_24C04(config, m_i2cmem).set_e0(1); } @@ -1650,6 +1657,9 @@ ROM_START( quingo ) ROM_REGION( 0x0200, "sereeprom", 0 ) // Serial EPROM ROM_LOAD16_WORD_SWAP("quingo_24c04a.bin", 0x0000, 0x0200, BAD_DUMP CRC(d5e82b49) SHA1(7dbdf7d539cbd59a3ac546b6f50861c4958abb3a) ) // all AA & 55 + + ROM_REGION16_LE( 0x4280, "pic16f84", 0 ) // borrowed from magicle to avoid I2C bus error + ROM_LOAD("magicle_5.03_pic16f84_code.bin", 0x0000, 0x0800, BAD_DUMP CRC(22965864) SHA1(c421a9e9fac7c9c5dc01adda620dc8f5f16d94ba) ) ROM_END /* @@ -1737,6 +1747,9 @@ ROM_START( bigdeal0 ) ROM_REGION( 0x0200, "sereeprom", 0 ) // Serial EPROM ROM_LOAD16_WORD_SWAP("big_deal_24c04a.bin", 0x0000, 0x0200, BAD_DUMP CRC(d5e82b49) SHA1(7dbdf7d539cbd59a3ac546b6f50861c4958abb3a) ) // all AA & 55 + + ROM_REGION16_LE( 0x4280, "pic16f84", 0 ) // borrowed from magicle to avoid I2C bus error + ROM_LOAD("magicle_5.03_pic16f84_code.bin", 0x0000, 0x0800, BAD_DUMP CRC(22965864) SHA1(c421a9e9fac7c9c5dc01adda620dc8f5f16d94ba) ) ROM_END /* @@ -1824,6 +1837,9 @@ ROM_START( belslots ) ROM_REGION( 0x0200, "sereeprom", 0 ) // Serial EPROM ROM_LOAD16_WORD_SWAP("bel_slots_exp_24c04a.bin", 0x0000, 0x0200, BAD_DUMP CRC(d5e82b49) SHA1(7dbdf7d539cbd59a3ac546b6f50861c4958abb3a) ) // all AA & 55 + + ROM_REGION16_LE( 0x4280, "pic16f84", 0 ) // borrowed from magicle to avoid I2C bus error + ROM_LOAD("magicle_5.03_pic16f84_code.bin", 0x0000, 0x0800, BAD_DUMP CRC(22965864) SHA1(c421a9e9fac7c9c5dc01adda620dc8f5f16d94ba) ) ROM_END /* diff --git a/src/mame/misc/tickee.cpp b/src/mame/misc/tickee.cpp index 0334b25825e..d3fe9044392 100644 --- a/src/mame/misc/tickee.cpp +++ b/src/mame/misc/tickee.cpp @@ -1204,13 +1204,13 @@ ROM_END * *************************************/ -GAME( 1994, tickee, 0, tickee, tickee, tickee_gun_state, empty_init, ROT0, "Raster Elite", "Tickee Tickats", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, ghoshunt, 0, ghoshunt, ghoshunt, tickee_gun_state, empty_init, ROT0, "Hanaho Games", "Ghost Hunter", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, tutstomb, 0, ghoshunt, ghoshunt, tickee_gun_state, empty_init, ROT0, "Island Design", "Tut's Tomb", MACHINE_SUPPORTS_SAVE ) +GAME( 1994, tickee, 0, tickee, tickee, tickee_gun_state, empty_init, ROT0, "Raster Elite", "Tickee Tickats", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, ghoshunt, 0, ghoshunt, ghoshunt, tickee_gun_state, empty_init, ROT0, "Hanaho Games", "Ghost Hunter", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, tutstomb, 0, ghoshunt, ghoshunt, tickee_gun_state, empty_init, ROT0, "Island Design", "Tut's Tomb", MACHINE_SUPPORTS_SAVE ) -GAME( 1996, mouseatk, 0, mouseatk, mouseatk, tickee_state, empty_init, ROT0, "ICE", "Mouse Attack", MACHINE_SUPPORTS_SAVE ) +GAME( 1996, mouseatk, 0, mouseatk, mouseatk, tickee_state, empty_init, ROT0, "ICE", "Mouse Attack", MACHINE_SUPPORTS_SAVE ) GAME( 1998, rapidfir, 0, rapidfir, rapidfir, tickee_gun_state, empty_init, ROT0, "Hanaho Games", "Rapid Fire (v1.1, Build 239)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, rapidfira, rapidfir, rapidfir, rapidfir, tickee_gun_state, empty_init, ROT0, "Hanaho Games", "Rapid Fire (v1.1, Build 238)", MACHINE_SUPPORTS_SAVE ) GAME( 1998, rapidfire, rapidfir, rapidfir, rapidfir, tickee_gun_state, empty_init, ROT0, "Hanaho Games", "Rapid Fire (v1.0, Build 236)", MACHINE_SUPPORTS_SAVE ) -GAME( 1999, maletmad, 0, maletmad, maletmad, tickee_gun_state, empty_init, ROT0, "Hanaho Games (Capcom license)", "Mallet Madness (v2.1)", MACHINE_SUPPORTS_SAVE ) +GAME( 1999, maletmad, 0, maletmad, maletmad, tickee_gun_state, empty_init, ROT0, "Hanaho Games (Capcom license)", "Mallet Madness (v2.1)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/nec/pc8801.cpp b/src/mame/nec/pc8801.cpp index 97450a9ea2e..8947d11cc13 100644 --- a/src/mame/nec/pc8801.cpp +++ b/src/mame/nec/pc8801.cpp @@ -814,7 +814,7 @@ void pc8801_state::palram_w(offs_t offset, uint8_t data) // p8suite Analog RGB test cross bars (reportedly works in 24 kHz / 80 column only) // NB: it uses a bunch of non-waitstate related opcodes to cycle time it right, // implying a stress-test for Z80 opcode cycles. -// m_screen->update_partial(m_screen->vpos()); + m_screen->update_partial(m_screen->vpos()); } diff --git a/src/mame/nokia/mikromik.cpp b/src/mame/nokia/mikromik.cpp index 35465058935..a19dbc27fb6 100644 --- a/src/mame/nokia/mikromik.cpp +++ b/src/mame/nokia/mikromik.cpp @@ -692,7 +692,7 @@ ROM_START( mm1m4 ) ROM_LOAD( "9081b.ic43", 0x0000, 0x2000, CRC(60841940) SHA1(d755e9be53f27f41d1e93b4c1793f9ea6a3e1229) ) ROM_REGION( 0x200, "address", 0 ) // address decoder - ROM_LOAD( "720793a.ic24", 0x0000, 0x0200, CRC(deea87a6) SHA1(8f19e43252c9a0b1befd02fc9d34fe1437477f3a) ) + ROM_LOAD( "720793a.ic24", 0x000, 0x200, CRC(deea87a6) SHA1(8f19e43252c9a0b1befd02fc9d34fe1437477f3a) ) ROM_REGION( 0x1000, "chargen", 0 ) // character generator ROM_LOAD( "6807b.ic61", 0x0000, 0x1000, CRC(32b36220) SHA1(8fe7a181badea3f7e656dfaea21ee9e4c9baf0f1) ) @@ -710,7 +710,7 @@ ROM_START( mm1m6 ) ROM_LOAD( "9081b.ic2", 0x0000, 0x2000, CRC(2955feb3) SHA1(946a6b0b8fb898be3f480c04da33d7aaa781152b) ) ROM_REGION( 0x200, "address", 0 ) // address decoder - ROM_LOAD( "720793a.ic24", 0x0000, 0x0200, CRC(deea87a6) SHA1(8f19e43252c9a0b1befd02fc9d34fe1437477f3a) ) + ROM_LOAD( "720793a.ic24", 0x000, 0x200, CRC(deea87a6) SHA1(8f19e43252c9a0b1befd02fc9d34fe1437477f3a) ) ROM_REGION( 0x1000, "chargen", 0 ) // character generator ROM_LOAD( "6807b.ic61", 0x0000, 0x1000, CRC(32b36220) SHA1(8fe7a181badea3f7e656dfaea21ee9e4c9baf0f1) ) @@ -728,7 +728,7 @@ ROM_START( mm1m7 ) ROM_LOAD( "9057c.ic2", 0x0000, 0x2000, CRC(89bbc042) SHA1(7e8800c94934b81ce08b7af862e1159e0517684d) ) ROM_REGION( 0x200, "address", 0 ) // address decoder - ROM_LOAD( "726972b.ic24", 0x0000, 0x0200, BAD_DUMP CRC(2487d4ca) SHA1(e883a2e9540c31abba3d7f3bc23a48941f655ea0) ) + ROM_LOAD( "726972b.ic24", 0x000, 0x200, CRC(2487d4ca) SHA1(e883a2e9540c31abba3d7f3bc23a48941f655ea0) ) ROM_REGION( 0x1000, "chargen", 0 ) // character generator ROM_LOAD( "6807b.ic61", 0x0000, 0x1000, CRC(32b36220) SHA1(8fe7a181badea3f7e656dfaea21ee9e4c9baf0f1) ) diff --git a/src/mame/nokia/mikromikko2.cpp b/src/mame/nokia/mikromikko2.cpp index d9679346def..17c341a64f1 100644 --- a/src/mame/nokia/mikromikko2.cpp +++ b/src/mame/nokia/mikromikko2.cpp @@ -67,7 +67,7 @@ void mm2_state::mm2_map(address_map &map) map(0x20000, 0x3ffff).ram(); // DRAM 128 KB (on SBC186) map(0x40000, 0x7ffff).ram(); // DRAM 256 KB (on SBC186 or MEME186) map(0x80000, 0xbffff).ram(); // DRAM 256 KB (on MEME186) - map(0xd0000, 0xd7fff).ram(); // video RAM + map(0xd0000, 0xd1fff).ram(); // video RAM map(0xd8000, 0xd9fff).rom().region("chargen", 0); map(0xf0000, 0xf01ff).rw(m_novram, FUNC(x2212_device::read), FUNC(x2212_device::write)).umask16(0xff00); map(0xf0200, 0xfffff).rom().region(I80186_TAG, 0x200); @@ -100,13 +100,13 @@ void mm2_state::mm2_io_map(address_map &map) map(0xf980, 0xf9ff).rw(m_vpac, FUNC(crt9007_device::read), FUNC(crt9007_device::write)).umask16(0x00ff); map(0xf980, 0xf981).rw(m_sio, FUNC(i8251_device::data_r), FUNC(i8251_device::data_w)).umask16(0xff00); map(0xf982, 0xf983).rw(m_sio, FUNC(i8251_device::status_r), FUNC(i8251_device::control_w)).umask16(0xff00); - //map(0xf9c0, 0xf9c0) COMPL - //map(0xf9c2, 0xf9c2) BLANK - //map(0xf9c4, 0xf9c4) MODE - //map(0xf9c6, 0xf9c6) MODEG - //map(0xf9ca, 0xf9ca) C70/50 - //map(0xf9ce, 0xf9ce) CRU - //map(0xf9cc, 0xf9cc) CRB + map(0xf9c0, 0xf9c1).w(FUNC(mm2_state::cpl_w)); + map(0xf9c2, 0xf9c3).w(FUNC(mm2_state::blc_w)); + map(0xf9c4, 0xf9c5).w(FUNC(mm2_state::mode_w)); + map(0xf9c6, 0xf9c7).w(FUNC(mm2_state::modeg_w)); + map(0xf9ca, 0xf9cb).w(FUNC(mm2_state::c70_50_w)); + map(0xf9cc, 0xf9cd).w(FUNC(mm2_state::crb_w)); + map(0xf9ce, 0xf9cf).w(FUNC(mm2_state::cru_w)); // MMC186 map(0xfa00, 0xfa1f).rw(m_dmac, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).umask16(0x00ff); @@ -126,8 +126,66 @@ void mm2_state::vpac_mem(address_map &map) static INPUT_PORTS_START( mm2 ) INPUT_PORTS_END -uint32_t mm2_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +static const gfx_layout charlayout = { + 8, 15, + RGN_FRAC(1,1), + 1, + { RGN_FRAC(0,1) }, + { 7, 6, 5, 4, 3, 2, 1, 0 }, + { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16, + 8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16 }, + 16*16 +}; + +static const gfx_layout gfxlayout = +{ + 8, 1, + RGN_FRAC(1,1), + 1, + { RGN_FRAC(0,1) }, + { 7, 6, 5, 4, 3, 2, 1, 0 }, + { 15*16 }, + 16*16 +}; + +static GFXDECODE_START( gfx_mm2 ) + GFXDECODE_ENTRY( "chargen", 0, charlayout, 0, 1 ) + GFXDECODE_ENTRY( "chargen", 0, gfxlayout, 0, 1 ) +GFXDECODE_END + +uint32_t mm2_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + if (!m_blc) + { + bitmap.fill(0, cliprect); + return 0; + } + + uint16_t *vram = (uint16_t *)m_maincpu->space(AS_PROGRAM).get_read_ptr(0xd1000); + uint16_t *crom = (uint16_t *)m_maincpu->space(AS_PROGRAM).get_read_ptr(0xd8000); + + for (int sy = 0; sy < 24; sy++) + { + for (int y = 0; y < 12; y++) + { + for (int sx = 0; sx < 80; sx++) + { + uint16_t data = vram[(sy * 80) + sx]; + offs_t char_addr = ((data & 0x1ff) << 4) | y; + uint16_t char_data = crom[char_addr]; + + for (int bit = 0; bit < 8; bit++) + { + bool pixel = BIT(char_data, 0) ^ !m_cpl; + char_data >>= 1; + + bitmap.pix((sy * 12) + y, (sx * 8) + bit) = pixel; + } + } + } + } + return 0; } @@ -135,6 +193,17 @@ void mm2_state::machine_start() { } +void mm2_state::machine_reset() +{ + m_cpl = 0; + m_blc = 0; + m_mode = 0; + m_modeg = 0; + m_c70_50 = 0; + m_cru = 0; + m_crb = 0; +} + void mm2_state::floppy_formats(format_registration &fr) { fr.add_mfm_containers(); @@ -153,10 +222,18 @@ void mm2_state::mm2(machine_config &config) m_maincpu->set_addrmap(AS_IO, &mm2_state::mm2_io_map); PIC8259(config, m_pic); + m_pic->out_int_callback().set(m_maincpu, FUNC(i80186_cpu_device::int0_w)); PIT8253(config, m_pit); - + m_pit->set_clk<0>(16_MHz_XTAL/8); + m_pit->set_clk<1>(16_MHz_XTAL/8); + m_pit->set_clk<2>(16_MHz_XTAL/8); + m_pit->out_handler<0>().set(m_pic, FUNC(pic8259_device::ir0_w)); + //m_pit->out_handler<1>().set()); MPSC ch B line clock + //m_pit->out_handler<2>().set()); Beep control + I8274(config, m_mpsc, 16_MHz_XTAL/4); + m_mpsc->out_int_callback().set(m_pic, FUNC(pic8259_device::ir1_w)); X2212(config, m_novram); @@ -164,12 +241,17 @@ void mm2_state::mm2(machine_config &config) screen_device &screen(SCREEN(config, SCREEN_TAG, SCREEN_TYPE_RASTER)); screen.set_refresh_hz(71); screen.set_screen_update(FUNC(mm2_state::screen_update)); - screen.set_size(800, 420); - screen.set_visarea(0, 800-1, 0, 420-1); + screen.set_size(640, 420); + screen.set_visarea(0, 640-1, 0, 420-1); + screen.set_palette(m_palette); + + GFXDECODE(config, "gfxdecode", m_palette, gfx_mm2); + PALETTE(config, m_palette, palette_device::MONOCHROME); CRT9007(config, m_vpac, 35.4525_MHz_XTAL/8); m_vpac->set_addrmap(0, &mm2_state::vpac_mem); m_vpac->set_character_width(10); + m_vpac->int_callback().set(FUNC(mm2_state::vpac_int_w)); m_vpac->set_screen(SCREEN_TAG); CRT9212(config, m_drb0, 0); @@ -177,11 +259,14 @@ void mm2_state::mm2(machine_config &config) CRT9212(config, m_drb1, 0); I8251(config, m_sio, 16_MHz_XTAL/4); + m_sio->rxrdy_handler().set(FUNC(mm2_state::sio_rxrdy_w)); + m_sio->txrdy_handler().set(FUNC(mm2_state::sio_txrdy_w)); // MMC186 AM9517A(config, m_dmac, 16_MHz_XTAL/4); UPD765A(config, m_fdc, 16_MHz_XTAL/2, true, true); + m_fdc->intrq_wr_callback().set(m_pic, FUNC(pic8259_device::ir4_w)); FLOPPY_CONNECTOR(config, UPD765_TAG ":0", mm2_floppies, "525qd", mm2_state::floppy_formats).enable_sound(true); @@ -209,7 +294,7 @@ ROM_START( mm2m35d ) ROMX_LOAD( "9491c.ic58", 0x8001, 0x4000, CRC(32047735) SHA1(408f03bc2d89257488e4b3336500681bb168cdec), ROM_SKIP(1) | ROM_BIOS(1) ) ROM_REGION16_LE( 0x4000, "chargen", 0 ) - ROMX_LOAD( "9067e.ic40", 0x0001, 0x2000, CRC(fa719d92) SHA1(af6cc03a8171b9c95e8548c5e0268816344d7367), ROM_SKIP(1) ) + ROMX_LOAD( "9067e.ic40", 0x0000, 0x2000, CRC(fa719d92) SHA1(af6cc03a8171b9c95e8548c5e0268816344d7367), ROM_SKIP(1) ) ROM_REGION( 0x2000, "attr", 0 ) ROM_LOAD( "9026a.ic26", 0x0000, 0x2000, CRC(fe1da600) SHA1(3a5512b08d8f7bb5a0ff3f50bcf33de649a0489d) ) @@ -221,4 +306,4 @@ ROM_START( mm2m35d ) ROM_LOAD( "keyboard", 0x000, 0x400, NO_DUMP ) ROM_END -COMP( 1983, mm2m35d, 0, 0, mm2, mm2, mm2_state, empty_init, "Nokia Data", "MikroMikko 2 M35D", MACHINE_IS_SKELETON ) +COMP( 1983, mm2m35d, 0, 0, mm2, mm2, mm2_state, empty_init, "Nokia Data", "MikroMikko 2 M35D", MACHINE_NOT_WORKING ) diff --git a/src/mame/nokia/mikromikko2.h b/src/mame/nokia/mikromikko2.h index 9b717b10eb7..ca27a1c4ce3 100644 --- a/src/mame/nokia/mikromikko2.h +++ b/src/mame/nokia/mikromikko2.h @@ -5,6 +5,7 @@ #pragma once +#include "emupal.h" #include "screen.h" #include "bus/nscsi/devices.h" #include "bus/scsi/s1410.h" @@ -44,13 +45,15 @@ class mm2_state : public driver_device m_sio(*this, "i8251"), m_dmac(*this, "am9517a"), m_fdc(*this, UPD765_TAG), - m_sasi(*this, "sasi:7:scsicb") + m_sasi(*this, "sasi:7:scsicb"), + m_palette(*this, "palette") { } void mm2(machine_config &config); protected: virtual void machine_start() override; + virtual void machine_reset() override; private: required_device m_maincpu; @@ -65,18 +68,44 @@ class mm2_state : public driver_device required_device m_dmac; required_device m_fdc; required_device m_sasi; + required_device m_palette; void mm2_map(address_map &map); void mm2_io_map(address_map &map); void vpac_mem(address_map &map); - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); static void floppy_formats(format_registration &fr); void novram_store(offs_t offset, uint8_t data); void novram_recall(offs_t offset, uint8_t data); uint8_t videoram_r(offs_t offset); + + bool m_vpac_int; + bool m_sio_rxrdy; + bool m_sio_txrdy; + + void update_pic_ir5() { m_pic->ir5_w(m_vpac_int || m_sio_rxrdy || m_sio_txrdy); } + void vpac_int_w(int state) { m_vpac_int = state; update_pic_ir5(); } + void sio_rxrdy_w(int state) { m_sio_rxrdy = state; update_pic_ir5(); } + void sio_txrdy_w(int state) { m_sio_txrdy = state; update_pic_ir5(); } + + bool m_cpl; + bool m_blc; + bool m_mode; + bool m_modeg; + bool m_c70_50; + bool m_cru; + bool m_crb; + + void cpl_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_cpl = BIT(data, 0); } + void blc_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_blc = BIT(data, 0); } + void mode_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_mode = BIT(data, 0); } + void modeg_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_modeg = BIT(data, 0); } + void c70_50_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_c70_50 = BIT(data, 0); } + void cru_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_cru = BIT(data, 0); } + void crb_w(offs_t offset, uint16_t data, uint16_t mem_mask) { m_crb = BIT(data, 0); } }; #endif // MAME_NOKIA_MIKROMIKKO2_H diff --git a/src/mame/novag/sdiamond.cpp b/src/mame/novag/sdiamond.cpp index 31775c4912a..45c03d9c695 100644 --- a/src/mame/novag/sdiamond.cpp +++ b/src/mame/novag/sdiamond.cpp @@ -9,6 +9,9 @@ Novag (Perfect Technology*) Star Diamond under Perfect Technology, Ltd., established by the daughter of Novag's founder. The main programmer (David Kittinger) also moved to the new company. +Although there may be newer Novag products with (old) software by David Kittinger, +Star Diamond was the last chess computer that he personally worked on. + Hardware notes: - PCB label: TF-05 94V0Δ - Hitachi H8S/2312 12312VTE25V, 25MHz XTAL diff --git a/src/mame/saitek/gk2000.cpp b/src/mame/saitek/gk2000.cpp index d4512e94176..a4c0715412d 100644 --- a/src/mame/saitek/gk2000.cpp +++ b/src/mame/saitek/gk2000.cpp @@ -20,6 +20,7 @@ A13 MCU is used in: - Saitek Mephisto Mythos (86142221X34) - Tandy (Radio Shack) Mega 2050X (86071221X12) - Tandy (Radio Shack) Master 2200X (suspected) +- Tandy (Radio Shack) Chess Master (suspected) TODO: - it does a cold boot at every reset, so nvram won't work properly unless MAME diff --git a/src/mame/sega/hshavoc.cpp b/src/mame/sega/hshavoc.cpp index 00cc6640683..1d87e2f08c5 100644 --- a/src/mame/sega/hshavoc.cpp +++ b/src/mame/sega/hshavoc.cpp @@ -230,4 +230,4 @@ void hshavoc_state::init_hshavoc() } // anonymous namespace -GAME( 1993, hshavoc, 0, hshavoc, hshavoc, hshavoc_state, init_hshavoc, ROT0, "Data East", "High Seas Havoc", MACHINE_NOT_WORKING ) +GAME( 1993, hshavoc, 0, hshavoc, hshavoc, hshavoc_state, init_hshavoc, ROT0, "Data East Corporation", "High Seas Havoc", MACHINE_NOT_WORKING ) diff --git a/src/mame/sega/model2.cpp b/src/mame/sega/model2.cpp index 58820125f5f..f9eca11243f 100644 --- a/src/mame/sega/model2.cpp +++ b/src/mame/sega/model2.cpp @@ -7459,7 +7459,7 @@ GAME( 1997, zeroguna, zerogun, zeroguna, zerogun, model2a_state, init_z GAME( 1997, zerogunaj, zerogun, zeroguna, zerogun, model2a_state, init_zerogun, ROT0, "Psikyo", "Zero Gunner (Japan, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, motoraid, 0, manxtt, motoraid, model2a_state, empty_init, ROT0, "Sega", "Motor Raid - Twin", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1997, motoraiddx, motoraid, manxtt, motoraid, model2a_state, empty_init, ROT0, "Sega", "Motor Raid - Twin/DX", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1997, airwlkrs, 0, model2a, vf2, model2a_state, empty_init, ROT0, "Data East", "Air Walkers", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) +GAME( 1997, airwlkrs, 0, model2a, vf2, model2a_state, empty_init, ROT0, "Data East Corporation", "Air Walkers", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) GAME( 1998, dynamcop, 0, model2a_5881, dynamcop, model2a_state, empty_init, ROT0, "Sega", "Dynamite Cop (Export, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) GAME( 1998, dyndeka2, dynamcop, model2a_5881, dynamcop, model2a_state, empty_init, ROT0, "Sega", "Dynamite Deka 2 (Japan, Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) GAME( 1998, pltkidsa, pltkids, model2a_5881, pltkids, model2a_state, init_pltkids, ROT0, "Psikyo", "Pilot Kids (Model 2A)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/sega/stv.cpp b/src/mame/sega/stv.cpp index 8c85e04178d..88e012be653 100644 --- a/src/mame/sega/stv.cpp +++ b/src/mame/sega/stv.cpp @@ -3943,7 +3943,7 @@ GAME( 1997, hanagumi, stvbios, stv, stv, stv_state, init_hanagumi, GAME( 1996, introdon, stvbios, stv, stv, stv_state, init_stv, ROT0, "Sunsoft / Success", "Karaoke Quiz Intro Don Don! (J 960213 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1995, kiwames, stvbios, stvmp, stvmp, stv_state, init_stv, ROT0, "Athena", "Pro Mahjong Kiwame S (J 951020 V1.208)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, maruchan, stvbios, stv, stv, stv_state, init_maruchan, ROT0, "Sega / Toyosuisan", "Maru-Chan de Goo! (J 971216 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1996, mausuke, stvbios, stv, stv, stv_state, init_mausuke, ROT0, "Data East", "Mausuke no Ojama the World (J 960314 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1996, mausuke, stvbios, stv, stv, stv_state, init_mausuke, ROT0, "Data East Corporation", "Mausuke no Ojama the World (J 960314 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1999, micrombc, stvbios, hopper, micrombc, stv_state, init_stv, ROT0, "Sega", "Microman Battle Charge (J 990326 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1998, myfairld, stvbios, stvmp, myfairld, stv_state, init_stv, ROT0, "Micronet", "Virtual Mahjong 2 - My Fair Lady (J 980608 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1998, othellos, stvbios, stv, stv, stv_state, init_othellos, ROT0, "Success", "Othello Shiyouyo (J 980423 V1.002)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) @@ -3965,7 +3965,7 @@ GAME( 2000, skychal, stvbios, hopper, patocar, stv_state, init_stv, GAME( 1995, smleague, stvbios, stv, stv, stv_state, init_smleague, ROT0, "Sega", "Super Major League (U 960108 V1.000)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1995, finlarch, smleague,stv, stv, stv_state, init_finlarch, ROT0, "Sega", "Final Arch (J 950714 V1.001)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, sokyugrt, stvbios, stv, stv, stv_state, init_sokyugrt, ROT0, "Raizing / Eighting", "Soukyugurentai / Terra Diver (JUET 960821 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1995, suikoenb, stvbios, stv, stv6b, stv_state, init_suikoenb, ROT0, "Data East", "Suiko Enbu / Outlaws of the Lost Dynasty (JUETL 950314 V2.001)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1995, suikoenb, stvbios, stv, stv6b, stv_state, init_suikoenb, ROT0, "Data East Corporation", "Suiko Enbu / Outlaws of the Lost Dynasty (JUETL 950314 V2.001)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1998, supgoal, stvbios, hopper, patocar, stv_state, init_stv, ROT0, "Sega", "Nerae! Super Goal (J 981218 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1997, techbowl, stvbios, hopper, patocar, stv_state, init_stv, ROT0, "Sega", "Technical Bowling (J 971212 V1.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, vfkids, stvbios, stv, stv, stv_state, init_stv, ROT0, "Sega", "Virtua Fighter Kids (JUET 960319 V0.000)", MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/seibu/darkmist.cpp b/src/mame/seibu/darkmist.cpp index 0810b968ffa..000b4954e4e 100644 --- a/src/mame/seibu/darkmist.cpp +++ b/src/mame/seibu/darkmist.cpp @@ -63,6 +63,8 @@ class darkmist_state : public driver_device m_spr_clut(*this, "spr_clut"), m_tx_clut(*this, "tx_clut"), m_decrypted_opcodes(*this, "decrypted_opcodes"), + m_bg_map(*this, "bg_map"), + m_fg_map(*this, "fg_map"), m_rombank(*this, "rombank") { } @@ -75,6 +77,27 @@ class darkmist_state : public driver_device virtual void video_start() override; private: + void hw_w(uint8_t data); + void tx_vram_w(offs_t offset, uint8_t data); + + TILE_GET_INFO_MEMBER(get_bgtile_info); + TILE_GET_INFO_MEMBER(get_fgtile_info); + TILE_GET_INFO_MEMBER(get_txttile_info); + + void palette(palette_device &palette) const; + + bitmap_ind16 m_temp_bitmap; + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void mix_layer(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, uint8_t *clut); + void decrypt_fgbgtiles(uint8_t *rgn, int size); + void decrypt_gfx(); + void decrypt_snd(); + + TIMER_DEVICE_CALLBACK_MEMBER(scanline); + void decrypted_opcodes_map(address_map &map); + void memmap(address_map &map); + required_device m_maincpu; required_device m_t5182; required_device m_screen; @@ -90,40 +113,21 @@ class darkmist_state : public driver_device required_region_ptr m_spr_clut; required_region_ptr m_tx_clut; required_shared_ptr m_decrypted_opcodes; + required_region_ptr m_bg_map; + required_region_ptr m_fg_map; required_memory_bank m_rombank; uint8_t m_hw = 0; tilemap_t *m_bgtilemap = nullptr; tilemap_t *m_fgtilemap = nullptr; tilemap_t *m_txtilemap = nullptr; - - void hw_w(uint8_t data); - void tx_vram_w(offs_t offset, uint8_t data); - - TILE_GET_INFO_MEMBER(get_bgtile_info); - TILE_GET_INFO_MEMBER(get_fgtile_info); - TILE_GET_INFO_MEMBER(get_txttile_info); - - void palette(palette_device &palette) const; - - bitmap_ind16 m_temp_bitmap; - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void mix_layer(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, uint8_t *clut); - void decrypt_fgbgtiles(uint8_t *rgn, int size); - void decrypt_gfx(); - void decrypt_snd(); - - TIMER_DEVICE_CALLBACK_MEMBER(scanline); - void decrypted_opcodes_map(address_map &map); - void memmap(address_map &map); }; TILE_GET_INFO_MEMBER(darkmist_state::get_bgtile_info) { - int code = memregion("bg_map")->base()[tile_index * 2]; // TTTTTTTT - int const attr = memregion("bg_map")->base()[(tile_index * 2) + 1]; // -PPP--TT - FIXED BITS (0xxx00xx) + int code = m_bg_map[tile_index * 2]; // TTTTTTTT + int const attr = m_bg_map[(tile_index * 2) + 1]; // -PPP--TT - FIXED BITS (0xxx00xx) code += (attr & 3) << 8; int const pal = (attr >> 4) & 0xf; @@ -133,8 +137,8 @@ TILE_GET_INFO_MEMBER(darkmist_state::get_bgtile_info) TILE_GET_INFO_MEMBER(darkmist_state::get_fgtile_info) { - int code = memregion("fg_map")->base()[tile_index * 2]; // TTTTTTTT - int const attr = memregion("fg_map")->base()[(tile_index * 2) + 1]; // -PPP--TT - FIXED BITS (0xxx00xx) + int code = m_fg_map[tile_index * 2]; // TTTTTTTT + int const attr = m_fg_map[(tile_index * 2) + 1]; // -PPP--TT - FIXED BITS (0xxx00xx) code += (attr & 3) << 8; int const pal = (attr >> 4) & 0xf; @@ -202,7 +206,7 @@ void darkmist_state::mix_layer(screen_device &screen, bitmap_ind16 &bitmap, cons uint16_t const pix = (src[x] & 0xff); uint16_t const real = clut[pix]; - if (!(real & 0x40)) + if (BIT(~real, 6)) dest[x] = src[x]; } } @@ -224,17 +228,17 @@ void darkmist_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec // fetch from top to bottom for (int i = m_spriteram.bytes() - 32; i >= 0; i -= 32) { - int const fy = m_spriteram[i + 1] & 0x40; - int const fx = m_spriteram[i + 1] & 0x80; + bool const fy = BIT(m_spriteram[i + 1], 6); + bool const fx = BIT(m_spriteram[i + 1], 7); int tile = m_spriteram[i + 0]; - if (m_spriteram[i + 1] & 0x20) + if (BIT(m_spriteram[i + 1], 5)) tile += (*m_spritebank << 8); int palette = ((m_spriteram[i + 1]) >> 1) & 0xf; - if (m_spriteram[i + 1] & 0x1) + if (BIT(m_spriteram[i + 1], 0)) palette = machine().rand() & 15; m_gfxdecode->gfx(3)->transpen( @@ -255,7 +259,7 @@ uint32_t darkmist_state::screen_update(screen_device &screen, bitmap_ind16 &bitm constexpr int DISPLAY_BG = 4; constexpr int DISPLAY_TXT = 16; -#define DM_GETSCROLL(n) (((m_scroll[(n)] << 1) & 0xff) + ((m_scroll[(n)] & 0x80) ? 1 : 0) +( ((m_scroll[(n) - 1] << 4) | (m_scroll[(n) - 1] << 12)) & 0xff00)) +#define DM_GETSCROLL(n) (((m_scroll[(n)] << 1) & 0xff) + ((m_scroll[(n)] & 0x80) ? 1 : 0) + ( ((m_scroll[(n) - 1] << 4) | (m_scroll[(n) - 1] << 12)) & 0xff00)) m_bgtilemap->set_scrollx(0, DM_GETSCROLL(0x2)); m_bgtilemap->set_scrolly(0, DM_GETSCROLL(0x6)); @@ -464,7 +468,6 @@ static const gfx_layout charlayout = RGN_FRAC(1,2), 4, { 0, 4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 }, - { 0, 1, 2, 3, 8+0, 8+1, 8+2, 8+3 }, { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 }, 16*8 @@ -476,8 +479,6 @@ static const gfx_layout tilelayout = RGN_FRAC(1,2), 4, { 0, 4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 }, - - { 0, 1, 2, 3, 8+0, 8+1, 8+2, 8+3, 16+0, 16+1, 16+2, 16+3, 24+0, 24+1, 24+2, 24+3 }, { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, @@ -487,9 +488,9 @@ static const gfx_layout tilelayout = static GFXDECODE_START( gfx_darkmist ) - GFXDECODE_ENTRY( "tx_gfx", 0, charlayout, 0x300, 16 ) - GFXDECODE_ENTRY( "bg_gfx", 0, tilelayout, 0x000, 16 ) - GFXDECODE_ENTRY( "fg_gfx", 0, tilelayout, 0x100, 16 ) + GFXDECODE_ENTRY( "tx_gfx", 0, charlayout, 0x300, 16 ) + GFXDECODE_ENTRY( "bg_gfx", 0, tilelayout, 0x000, 16 ) + GFXDECODE_ENTRY( "fg_gfx", 0, tilelayout, 0x100, 16 ) GFXDECODE_ENTRY( "spr_gfx", 0, tilelayout, 0x200, 16 ) GFXDECODE_END @@ -505,7 +506,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(darkmist_state::scanline) } - void darkmist_state::darkmist(machine_config &config) { // basic machine hardware @@ -514,7 +514,9 @@ void darkmist_state::darkmist(machine_config &config) m_maincpu->set_addrmap(AS_OPCODES, &darkmist_state::decrypted_opcodes_map); TIMER(config, "scantimer").configure_scanline(FUNC(darkmist_state::scanline), "screen", 0, 1); - T5182(config, m_t5182, 0); + T5182(config, m_t5182, 14'318'180 / 4); + m_t5182->ym_read_callback().set("ymsnd", FUNC(ym2151_device::read)); + m_t5182->ym_write_callback().set("ymsnd", FUNC(ym2151_device::write)); // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); @@ -545,7 +547,7 @@ ROM_START( darkmist ) ROM_LOAD( "dm_16.rom", 0x10000, 0x08000, CRC(094579d9) SHA1(2449bc9ba38396912ee9b72dd870ea9fcff95776) ) - ROM_REGION( 0x8000, "t5182_z80", 0 ) // Toshiba T5182 external ROM + ROM_REGION( 0x8000, "t5182:external", 0 ) // Toshiba T5182 external ROM ROM_LOAD( "dm_17.rom", 0x0000, 0x8000, CRC(7723dcae) SHA1(a0c69e7a7b6fd74f7ed6b9c6419aed94aabcd4b0) ) ROM_REGION( 0x4000, "tx_gfx", 0 ) @@ -664,7 +666,7 @@ void darkmist_state::decrypt_gfx() void darkmist_state::decrypt_snd() { - uint8_t *rom = memregion("t5182_z80")->base(); + uint8_t *rom = memregion("t5182:external")->base(); for (int i = 0x0000; i < 0x8000; i++) rom[i] = bitswap<8>(rom[i], 7, 1, 2, 3, 4, 5, 6, 0); diff --git a/src/mame/seibu/metlfrzr.cpp b/src/mame/seibu/metlfrzr.cpp index 8ca2c880143..9af9f0a9f40 100644 --- a/src/mame/seibu/metlfrzr.cpp +++ b/src/mame/seibu/metlfrzr.cpp @@ -43,7 +43,8 @@ class metlfrzr_state : public driver_device m_vram(*this, "vram"), m_video_regs(*this, "vregs"), m_palette(*this, "palette"), - m_gfxdecode(*this, "gfxdecode") + m_gfxdecode(*this, "gfxdecode"), + m_mainbank(*this, "mainbank") { } void metlfrzr(machine_config &config); @@ -60,6 +61,11 @@ class metlfrzr_state : public driver_device void legacy_obj_draw(bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update_metlfrzr(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void output_w(uint8_t data); + TIMER_DEVICE_CALLBACK_MEMBER(scanline); + void decrypted_opcodes_map(address_map &map); + void metlfrzr_map(address_map &map); + required_device m_maincpu; required_shared_ptr m_decrypted_opcodes; required_shared_ptr m_work_ram; @@ -68,12 +74,10 @@ class metlfrzr_state : public driver_device required_device m_palette; required_device m_gfxdecode; - void output_w(uint8_t data); - TIMER_DEVICE_CALLBACK_MEMBER(scanline); + required_memory_bank m_mainbank; + uint8_t m_fg_tilebank = 0; bool m_rowscroll_enable = false; - void decrypted_opcodes_map(address_map &map); - void metlfrzr_map(address_map &map); }; @@ -102,34 +106,29 @@ void metlfrzr_state::legacy_bg_draw(bitmap_ind16 &bitmap,const rectangle &clipre { gfx_element *gfx = m_gfxdecode->gfx(m_fg_tilebank); const uint16_t vram_mask = (m_vram.length() - 1) >> 1; - int count; - int x_scroll_base; - int x_scroll_shift; - uint16_t x_scroll_value; - x_scroll_value = m_video_regs[0x17] + ((m_video_regs[0x06] & 1) << 8); - x_scroll_base = (x_scroll_value >> 3) * 32; - - for (count=0;count<32*33;count++) + uint16_t x_scroll_value = m_video_regs[0x17] + ((m_video_regs[0x06] & 1) << 8); + int x_scroll_base = (x_scroll_value >> 3) * 32; + + for (int count = 0; count< 32 * 33; count++) { int tile_base = count; - int y = (count % 32); - if(y > 7 || m_rowscroll_enable == false) + int y = (count & 0x1f); + int x_scroll_shift; + if (y > 7 || m_rowscroll_enable == false) { - tile_base+= x_scroll_base; + tile_base += x_scroll_base; x_scroll_shift = (x_scroll_value & 7); } else x_scroll_shift = 0; tile_base &= vram_mask; - int x = (count / 32); + int x = (count >> 5); + const uint16_t tile = m_vram[tile_base * 2 + 0] + ((m_vram[tile_base * 2 + 1] & 0xf0) << 4); + const uint8_t color = m_vram[tile_base * 2 + 1] & 0xf; - uint16_t tile = m_vram[tile_base*2+0] + ((m_vram[tile_base*2+1] & 0xf0) << 4); - uint8_t color = m_vram[tile_base*2+1] & 0xf; - - gfx->transpen(bitmap,cliprect,tile,color,0,0,x*8-x_scroll_shift,y*8,0xf); + gfx->transpen(bitmap, cliprect, tile, color, 0, 0, x * 8 - x_scroll_shift, y * 8, 0xf); } - } /* @@ -149,21 +148,20 @@ void metlfrzr_state::legacy_obj_draw(bitmap_ind16 &bitmap,const rectangle &clipr { gfx_element *gfx_2 = m_gfxdecode->gfx(2); gfx_element *gfx_3 = m_gfxdecode->gfx(3); - int count; - uint8_t *base_spriteram = m_work_ram + 0xe00; + uint8_t const *const base_spriteram = m_work_ram + 0xe00; - for(count=0x200-4;count>-1;count-=4) + for (int count = 0x200 - 4; count > -1; count -= 4) { - gfx_element *cur_gfx = base_spriteram[count+1] & 0x40 ? gfx_3 : gfx_2; - uint8_t tile_bank = (base_spriteram[count+1] & 0x30) >> 4; - uint16_t tile = base_spriteram[count] | (tile_bank << 8); - uint8_t color = base_spriteram[count+1] & 0xf; - int y = base_spriteram[count+2]; - int x = base_spriteram[count+3]; - if(base_spriteram[count+1] & 0x80) - x-=256; - - cur_gfx->transpen(bitmap,cliprect,tile,color,0,0,x,y,0xf); + gfx_element *cur_gfx = base_spriteram[count + 1] & 0x40 ? gfx_3 : gfx_2; + const uint8_t tile_bank = (base_spriteram[count + 1] & 0x30) >> 4; + const uint16_t tile = base_spriteram[count] | (tile_bank << 8); + const uint8_t color = base_spriteram[count + 1] & 0xf; + int y = base_spriteram[count + 2]; + int x = base_spriteram[count + 3]; + if (BIT(base_spriteram[count + 1], 7)) + x -= 256; + + cur_gfx->transpen(bitmap, cliprect, tile, color, 0, 0, x, y, 0xf); } } @@ -171,8 +169,8 @@ uint32_t metlfrzr_state::screen_update_metlfrzr(screen_device &screen, bitmap_in { bitmap.fill(m_palette->black_pen(), cliprect); - legacy_bg_draw(bitmap,cliprect); - legacy_obj_draw(bitmap,cliprect); + legacy_bg_draw(bitmap, cliprect); + legacy_obj_draw(bitmap, cliprect); return 0; } @@ -185,11 +183,11 @@ void metlfrzr_state::output_w(uint8_t data) // bit 1: enabled during gameplay, rowscroll enable? // bit 0: enabled , unknown purpose (lamp?) // TODO: bits 1-0 might actually be sprite DMA enable mask/request - machine().bookkeeping().coin_lockout_w(1, BIT(data,6) ); - machine().bookkeeping().coin_lockout_w(0, BIT(data,5) ); + machine().bookkeeping().coin_lockout_w(1, BIT(data, 6)); + machine().bookkeeping().coin_lockout_w(0, BIT(data, 5)); m_fg_tilebank = (data & 0x10) >> 4; - membank("bank1")->set_entry((data & 0xc) >> 2); - m_rowscroll_enable = bool(BIT(data,1)); + m_mainbank->set_entry((data & 0xc) >> 2); + m_rowscroll_enable = bool(BIT(data, 1)); // popmessage("%02x %02x",m_fg_tilebank,data & 3); } @@ -197,7 +195,7 @@ void metlfrzr_state::output_w(uint8_t data) void metlfrzr_state::metlfrzr_map(address_map &map) { map(0x0000, 0x7fff).rom(); - map(0x8000, 0xbfff).bankr("bank1"); + map(0x8000, 0xbfff).bankr(m_mainbank); map(0xc000, 0xcfff).ram().share(m_vram); map(0xd000, 0xd1ff).ram().w(m_palette, FUNC(palette_device::write_indirect)).share("palette"); map(0xd200, 0xd3ff).ram().w(m_palette, FUNC(palette_device::write_indirect_ext)).share("palette_ext"); @@ -209,7 +207,7 @@ void metlfrzr_state::metlfrzr_map(address_map &map) map(0xd602, 0xd602).portr("START"); map(0xd603, 0xd603).portr("DSW1"); map(0xd604, 0xd604).portr("DSW2"); - map(0xd600, 0xd61f).writeonly().share("vregs"); + map(0xd600, 0xd61f).writeonly().share(m_video_regs); map(0xd700, 0xd700).w(FUNC(metlfrzr_state::output_w)); map(0xd710, 0xd710).w("t5182", FUNC(t5182_device::sound_irq_w)); @@ -220,14 +218,14 @@ void metlfrzr_state::metlfrzr_map(address_map &map) map(0xd800, 0xdfff).ram(); map(0xe000, 0xefff).ram(); - map(0xf000, 0xffff).ram().share("wram"); + map(0xf000, 0xffff).ram().share(m_work_ram); } void metlfrzr_state::decrypted_opcodes_map(address_map &map) { - map(0x0000, 0x7fff).rom().share("decrypted_opcodes"); - map(0x8000, 0xbfff).bankr("bank1"); - map(0xf000, 0xffff).ram().share("wram"); // executes code at 0xf5d5 + map(0x0000, 0x7fff).rom().share(m_decrypted_opcodes); + map(0x8000, 0xbfff).bankr(m_mainbank); + map(0xf000, 0xffff).ram().share(m_work_ram); // executes code at 0xf5d5 } @@ -326,13 +324,12 @@ INPUT_PORTS_END void metlfrzr_state::machine_start() { - membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x10000, 0x4000); + m_mainbank->configure_entries(0, 4, memregion("maincpu")->base() + 0x10000, 0x4000); } void metlfrzr_state::machine_reset() { - membank("bank1")->set_entry(0); - + m_mainbank->set_entry(0); } @@ -360,39 +357,41 @@ static const gfx_layout sprite_layout = static GFXDECODE_START(gfx_metlfrzr) - GFXDECODE_ENTRY("gfx1", 0, tile_layout, 0x100, 16) - GFXDECODE_ENTRY("gfx2", 0, tile_layout, 0x100, 16) - GFXDECODE_ENTRY("gfx3", 0, sprite_layout, 0, 16) - GFXDECODE_ENTRY("gfx4", 0, sprite_layout, 0, 16) + GFXDECODE_ENTRY("tiles1", 0, tile_layout, 0x100, 16) + GFXDECODE_ENTRY("tiles2", 0, tile_layout, 0x100, 16) + GFXDECODE_ENTRY("sprites1", 0, sprite_layout, 0, 16) + GFXDECODE_ENTRY("sprites2", 0, sprite_layout, 0, 16) GFXDECODE_END TIMER_DEVICE_CALLBACK_MEMBER(metlfrzr_state::scanline) { int scanline = param; - if(scanline == 240) // vblank-out irq - m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* Z80 - RST 10h */ + if (scanline == 240) // vblank-out irq + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); // Z80 - RST 10h // TODO: check this irq. - if(scanline == 0) // vblank-in irq - m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* Z80 - RST 08h */ + if (scanline == 0) // vblank-in irq + m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); // Z80 - RST 08h } void metlfrzr_state::metlfrzr(machine_config &config) { - /* basic machine hardware */ + // basic machine hardware Z80(config, m_maincpu, XTAL(12'000'000) / 2); m_maincpu->set_addrmap(AS_PROGRAM, &metlfrzr_state::metlfrzr_map); m_maincpu->set_addrmap(AS_OPCODES, &metlfrzr_state::decrypted_opcodes_map); TIMER(config, "scantimer").configure_scanline(FUNC(metlfrzr_state::scanline), "screen", 0, 1); - T5182(config, "t5182", 0); + t5182_device &t5182(T5182(config, "t5182", XTAL(14'318'181)/4)); + t5182.ym_read_callback().set("ymsnd", FUNC(ym2151_device::read)); + t5182.ym_write_callback().set("ymsnd", FUNC(ym2151_device::write)); PALETTE(config, m_palette).set_format(palette_device::xBGR_444, 0x200).set_indirect_entries(256 * 2); GFXDECODE(config, m_gfxdecode, m_palette, gfx_metlfrzr); - /* video hardware */ + // video hardware screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); @@ -401,10 +400,10 @@ void metlfrzr_state::metlfrzr(machine_config &config) screen.set_screen_update(FUNC(metlfrzr_state::screen_update_metlfrzr)); screen.set_palette(m_palette); - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); - ym2151_device &ymsnd(YM2151(config, "ymsnd", XTAL(14'318'181) / 4)); /* 3.579545 MHz */ + ym2151_device &ymsnd(YM2151(config, "ymsnd", XTAL(14'318'181) / 4)); // 3.579545 MHz ymsnd.irq_handler().set("t5182", FUNC(t5182_device::ym2151_irq_handler)); ymsnd.add_route(0, "mono", 0.5); ymsnd.add_route(1, "mono", 0.5); @@ -417,22 +416,22 @@ ROM_START(metlfrzr) ROM_LOAD("1.15j", 0x00000, 0x08000, CRC(f59b5fa2) SHA1(6033967dad5e64f45afbcb1b45c8eb79e0787afb)) ROM_LOAD("2.14j", 0x10000, 0x10000, CRC(21ecc248) SHA1(2fccf7db73890faf7c489bfc43c88ded54d5052d)) - ROM_REGION(0x8000, "t5182_z80", 0) /* Toshiba T5182 external data ROM */ + ROM_REGION(0x8000, "t5182:external", 0) // Toshiba T5182 external data ROM ROM_LOAD("3.4h", 0x0000, 0x8000, CRC(36f88e54) SHA1(5cbea56c7e547c353ae2f9256caaceb20e5e8503)) - ROM_REGION(0x20000, "gfx1", 0) + ROM_REGION(0x20000, "tiles1", 0) ROM_LOAD16_BYTE("10.5a", 0x00001, 0x10000, CRC(3313e74a) SHA1(8622dfb5c013173d5bb037254f4c23b1282404e1)) ROM_LOAD16_BYTE("12.7a", 0x00000, 0x10000, CRC(6da5fda9) SHA1(9d7b0b26598f31da589fece3535a4d1405b03fc2)) - ROM_REGION(0x20000, "gfx2", 0) + ROM_REGION(0x20000, "tiles2", 0) ROM_LOAD16_BYTE("11.6a", 0x00001, 0x10000, CRC(fa6490b8) SHA1(9a4c1e09b9e8fb256fec0a5ed120fece8a12e1c8)) ROM_LOAD16_BYTE("13.9a", 0x00000, 0x10000, CRC(a4f689ec) SHA1(e58bfede3fabf4cfca76c20aafb3e9fb604777c9)) - ROM_REGION(0x20000, "gfx3", 0) + ROM_REGION(0x20000, "sprites1", 0) ROM_LOAD16_BYTE("14.13a", 0x00001, 0x10000, CRC(a9cd5225) SHA1(f3d5e29ee08fb563fdc1af3c64128f2cd2feb987)) ROM_LOAD16_BYTE("16.11a", 0x00000, 0x10000, CRC(92f2cb49) SHA1(498021d94b0fde216207076491702af2324a2dcc)) - ROM_REGION(0x20000, "gfx4", 0) + ROM_REGION(0x20000, "sprites2", 0) ROM_LOAD16_BYTE("15.12a", 0x00001, 0x10000, CRC(ce5c4c8b) SHA1(2351d66ba51e80097ce53bfd448ac24901844cda)) ROM_LOAD16_BYTE("17.10a", 0x00000, 0x10000, CRC(3fec33f7) SHA1(af086ba30fc4521a0114da2824f5baa04d225a89)) @@ -449,32 +448,32 @@ ROM_END void metlfrzr_state::init_metlfrzr() { - // same as cshooter.cpp + // same as seibu/airraid.cpp uint8_t *rom = memregion("maincpu")->base(); - for (int A = 0x0000;A < 0x8000;A++) + for (int A = 0x0000; A < 0x8000; A++) { - /* decode the opcodes */ + // decode the opcodes m_decrypted_opcodes[A] = rom[A]; - if (BIT(A,5) && !BIT(A,3)) + if (BIT(A, 5) && !BIT(A, 3)) m_decrypted_opcodes[A] ^= 0x40; - if (BIT(A,10) && !BIT(A,9) && BIT(A,3)) + if (BIT(A, 10) && !BIT(A, 9) && BIT(A, 3)) m_decrypted_opcodes[A] ^= 0x20; - if ((BIT(A,10) ^ BIT(A,9)) && BIT(A,1)) + if ((BIT(A, 10) ^ BIT(A, 9)) && BIT(A, 1)) m_decrypted_opcodes[A] ^= 0x02; - if (BIT(A,9) || !BIT(A,5) || BIT(A,3)) - m_decrypted_opcodes[A] = bitswap<8>(m_decrypted_opcodes[A],7,6,1,4,3,2,5,0); + if (BIT(A, 9) || !BIT(A, 5) || BIT(A, 3)) + m_decrypted_opcodes[A] = bitswap<8>(m_decrypted_opcodes[A], 7, 6, 1, 4, 3, 2, 5, 0); - /* decode the data */ - if (BIT(A,5)) + // decode the data + if (BIT(A, 5)) rom[A] ^= 0x40; - if (BIT(A,9) || !BIT(A,5)) - rom[A] = bitswap<8>(rom[A],7,6,1,4,3,2,5,0); + if (BIT(A, 9) || !BIT(A, 5)) + rom[A] = bitswap<8>(rom[A], 7, 6, 1, 4, 3, 2, 5, 0); } } diff --git a/src/mame/seibu/mustache.cpp b/src/mame/seibu/mustache.cpp index 28233de1b58..1699d27aa91 100644 --- a/src/mame/seibu/mustache.cpp +++ b/src/mame/seibu/mustache.cpp @@ -150,13 +150,13 @@ void mustache_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec gfx_element *gfx = m_gfxdecode->gfx(1); const rectangle &visarea = m_screen->visible_area(); - for (int offs = 0;offs < m_spriteram.bytes();offs += 4) + for (int offs = 0; offs < m_spriteram.bytes(); offs += 4) { int sy = 240 - m_spriteram[offs]; int sx = 240 - m_spriteram[offs + 3]; int code = m_spriteram[offs + 2]; int const attr = m_spriteram[offs + 1]; - int const color = (attr & 0xe0)>>5; + int const color = (attr & 0xe0) >> 5; if (sy == 240) continue; @@ -324,7 +324,9 @@ void mustache_state::mustache(machine_config &config) SEI80BU(config, "sei80bu", 0).set_device_rom_tag("maincpu"); - T5182(config, "t5182", 0); + t5182_device &t5182(T5182(config, "t5182", 14.318181_MHz_XTAL / 4)); + t5182.ym_read_callback().set("ymsnd", FUNC(ym2151_device::read)); + t5182.ym_write_callback().set("ymsnd", FUNC(ym2151_device::write)); // video hardware SCREEN(config, m_screen, SCREEN_TYPE_RASTER); @@ -349,25 +351,25 @@ void mustache_state::mustache(machine_config &config) } ROM_START( mustache ) - ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "mustache.h18", 0x0000, 0x8000, CRC(123bd9b8) SHA1(33a7cba5c3a54b0b1a15dd1e24d298b6f7274321) ) ROM_LOAD( "mustache.h16", 0x8000, 0x4000, CRC(62552beb) SHA1(ee10991d7de0596608fa1db48805781cbfbbdb9f) ) - ROM_REGION( 0x8000, "t5182_z80", 0 ) // Toshiba T5182 external ROM + ROM_REGION( 0x8000, "t5182:external", 0 ) // Toshiba T5182 external ROM ROM_LOAD( "mustache.e5", 0x0000, 0x8000, CRC(efbb1943) SHA1(3320e9eaeb776d09ed63f7dedc79e720674e6718) ) - ROM_REGION( 0x0c000, "tiles",0) + ROM_REGION( 0x0c000, "tiles", 0 ) ROM_LOAD( "mustache.a13", 0x0000, 0x4000, CRC(9baee4a7) SHA1(31bcec838789462e67e54ebe7256db9fc4e51b69) ) ROM_LOAD( "mustache.a14", 0x4000, 0x4000, CRC(8155387d) SHA1(5f0a394c7671442519a831b0eeeaba4eecd5a406) ) ROM_LOAD( "mustache.a16", 0x8000, 0x4000, CRC(4db4448d) SHA1(50a94fd65c263d95fd24b4009dbb87707929fdcb) ) - ROM_REGION( 0x20000, "sprites",0 ) + ROM_REGION( 0x20000, "sprites", 0 ) ROM_LOAD( "mustache.a4", 0x00000, 0x8000, CRC(d5c3bbbf) SHA1(914e3feea54246476701f492c31bd094ad9cea10) ) ROM_LOAD( "mustache.a7", 0x08000, 0x8000, CRC(e2a6012d) SHA1(4e4cd1a186870c8a88924d5bff917c6889da953d) ) ROM_LOAD( "mustache.a5", 0x10000, 0x8000, CRC(c975fb06) SHA1(4d166bd79e19c7cae422673de3e095ad8101e013) ) ROM_LOAD( "mustache.a8", 0x18000, 0x8000, CRC(2e180ee4) SHA1(a5684a25c337aeb4effeda7982164d35bc190af9) ) - ROM_REGION( 0x1300, "proms",0 ) + ROM_REGION( 0x1300, "proms", 0 ) ROM_LOAD( "mustache.c3",0x0000, 0x0100, CRC(68575300) SHA1(bc93a38df91ad8c2f335f9bccc98b52376f9b483) ) ROM_LOAD( "mustache.c2",0x0100, 0x0100, CRC(eb008d62) SHA1(a370fbd1affaa489210ea36eb9e365263fb4e232) ) ROM_LOAD( "mustache.c1",0x0200, 0x0100, CRC(65da3604) SHA1(e4874d4152a57944d4e47306250833ea5cd0d89b) ) @@ -376,25 +378,25 @@ ROM_START( mustache ) ROM_END ROM_START( mustachei ) - ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "1.h18", 0x0000, 0x8000, CRC(22893fbc) SHA1(724ea50642aec9be10547bd86fae5e1ebfe54685) ) ROM_LOAD( "2.h16", 0x8000, 0x4000, CRC(ec70cfd3) SHA1(0476eab03b907778ea488c802b79da99bf376eb6) ) - ROM_REGION( 0x8000, "t5182_z80", 0 ) // Toshiba T5182 external ROM + ROM_REGION( 0x8000, "t5182:external", 0 ) // Toshiba T5182 external ROM ROM_LOAD( "10.e5", 0x0000, 0x8000, CRC(efbb1943) SHA1(3320e9eaeb776d09ed63f7dedc79e720674e6718) ) - ROM_REGION( 0x0c000, "tiles",0) + ROM_REGION( 0x0c000, "tiles", 0 ) ROM_LOAD( "5.a13", 0x0000, 0x4000, CRC(9baee4a7) SHA1(31bcec838789462e67e54ebe7256db9fc4e51b69) ) ROM_LOAD( "4.a15", 0x4000, 0x4000, CRC(8155387d) SHA1(5f0a394c7671442519a831b0eeeaba4eecd5a406) ) ROM_LOAD( "3.a16", 0x8000, 0x4000, CRC(4db4448d) SHA1(50a94fd65c263d95fd24b4009dbb87707929fdcb) ) - ROM_REGION( 0x20000, "sprites",0 ) + ROM_REGION( 0x20000, "sprites", 0 ) ROM_LOAD( "6.a4", 0x00000, 0x8000, CRC(4a95a89c) SHA1(b34ebbda9b0e591876988e42bd36fd505452f38c) ) ROM_LOAD( "8.a7", 0x08000, 0x8000, CRC(3e6be0fb) SHA1(319ea59107e37953c31f59f5f635fc520682b09f) ) ROM_LOAD( "7.a5", 0x10000, 0x8000, CRC(8ad38884) SHA1(e11f1e1db6d5d119afedbe6604d10a6fd6049f12) ) ROM_LOAD( "9.a8", 0x18000, 0x8000, CRC(3568c158) SHA1(c3a2120086befe396a112bd62f032638011cb47a) ) - ROM_REGION( 0x1300, "proms",0 ) + ROM_REGION( 0x1300, "proms", 0 ) ROM_LOAD( "d.c3",0x0000, 0x0100, CRC(68575300) SHA1(bc93a38df91ad8c2f335f9bccc98b52376f9b483) ) ROM_LOAD( "c.c2",0x0100, 0x0100, CRC(eb008d62) SHA1(a370fbd1affaa489210ea36eb9e365263fb4e232) ) ROM_LOAD( "b.c1",0x0200, 0x0100, CRC(65da3604) SHA1(e4874d4152a57944d4e47306250833ea5cd0d89b) ) diff --git a/src/mame/seibu/panicr.cpp b/src/mame/seibu/panicr.cpp index b1572fdfcda..c26bcd60442 100644 --- a/src/mame/seibu/panicr.cpp +++ b/src/mame/seibu/panicr.cpp @@ -16,7 +16,7 @@ SEI-8611M (M6100219A) OSC : 14.31818MHz,12.0000MHz,16.0000MHz CPU : V20 (Sony CXQ70116D-8) @ 8.000MHz [16/2] - Toshiba T5182 @ 3.579545 (14.31818/4] + Toshiba T5182 @ 3.579545 [14.31818/4] Sound: YM2151 @ 3.579545 [14.31818/4] VSync 60Hz HSync 15.32kHz @@ -87,7 +87,9 @@ class panicr_state : public driver_device m_mainram(*this, "mainram"), m_spriteram(*this, "spriteram"), m_textram(*this, "textram"), - m_spritebank(*this, "spritebank") + m_spritebank(*this, "spritebank"), + m_tilerom(*this, "tilerom"), + m_attrrom(*this, "attrrom") { } void panicr(machine_config &config); @@ -95,6 +97,27 @@ class panicr_state : public driver_device void init_panicr(); private: + void textram_w(offs_t offset, uint8_t data); + uint8_t collision_r(offs_t offset); + void scrollx_lo_w(uint8_t data); + void scrollx_hi_w(uint8_t data); + void output_w(uint8_t data); + uint8_t t5182shared_r(offs_t offset); + void t5182shared_w(offs_t offset, uint8_t data); + + TILE_GET_INFO_MEMBER(get_bgtile_info); + TILE_GET_INFO_MEMBER(get_infotile_info_2); + TILE_GET_INFO_MEMBER(get_txttile_info); + + virtual void video_start() override; + void panicr_palette(palette_device &palette) const; + + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); + + TIMER_DEVICE_CALLBACK_MEMBER(scanline); + void panicr_map(address_map &map); + required_device m_maincpu; required_device m_t5182; required_device m_gfxdecode; @@ -106,6 +129,9 @@ class panicr_state : public driver_device required_shared_ptr m_textram; required_shared_ptr m_spritebank; + required_region_ptr m_tilerom; + required_region_ptr m_attrrom; + tilemap_t *m_bgtilemap = nullptr; tilemap_t *m_infotilemap_2 = nullptr; tilemap_t *m_txttilemap = nullptr; @@ -115,31 +141,10 @@ class panicr_state : public driver_device std::unique_ptr m_tempbitmap_1; rectangle m_tempbitmap_clip; - uint8_t collision_r(offs_t offset); - void scrollx_lo_w(uint8_t data); - void scrollx_hi_w(uint8_t data); - void output_w(uint8_t data); - uint8_t t5182shared_r(offs_t offset); - void t5182shared_w(offs_t offset, uint8_t data); - - TILE_GET_INFO_MEMBER(get_bgtile_info); - TILE_GET_INFO_MEMBER(get_infotile_info_2); - TILE_GET_INFO_MEMBER(get_txttile_info); - - virtual void video_start() override; - void panicr_palette(palette_device &palette) const; - - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect); - - TIMER_DEVICE_CALLBACK_MEMBER(scanline); - void panicr_map(address_map &map); }; -#define MASTER_CLOCK XTAL(16'000'000) -#define SOUND_CLOCK XTAL(14'318'181) -#define TC15_CLOCK XTAL(12'000'000) +//#define TC15_CLOCK XTAL(12'000'000) /*************************************************************************** @@ -193,11 +198,9 @@ void panicr_state::panicr_palette(palette_device &palette) const TILE_GET_INFO_MEMBER(panicr_state::get_bgtile_info) { - int code,attr; - - code=memregion("user1")->base()[tile_index]; - attr=memregion("user2")->base()[tile_index]; - code+=((attr&7)<<8); + int code = m_tilerom[tile_index]; + int const attr = m_attrrom[tile_index]; + code += ((attr & 7) << 8); tileinfo.set(1, code, (attr & 0xf0) >> 4, @@ -205,14 +208,11 @@ TILE_GET_INFO_MEMBER(panicr_state::get_bgtile_info) } - TILE_GET_INFO_MEMBER(panicr_state::get_infotile_info_2) { - int code,attr; - - code=memregion("user1")->base()[tile_index]; - attr=memregion("user2")->base()[tile_index]; - code+=((attr&7)<<8); + int code = m_tilerom[tile_index]; + int const attr = m_attrrom[tile_index]; + code += ((attr & 7) << 8); tileinfo.set(3, code, 0, @@ -220,13 +220,11 @@ TILE_GET_INFO_MEMBER(panicr_state::get_infotile_info_2) } - - TILE_GET_INFO_MEMBER(panicr_state::get_txttile_info) { - int code=m_textram[tile_index*4]; - int attr=m_textram[tile_index*4+2]; - int color = attr & 0x07; + int const code = m_textram[tile_index * 4]; + int const attr = m_textram[tile_index * 4 + 2]; + int const color = attr & 0x07; tileinfo.group = color; @@ -250,36 +248,32 @@ void panicr_state::video_start() void panicr_state::draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect ) { - int offs,flipx,flipy,x,y,color,sprite; - - // ssss ssss | Fx-- cccc | yyyy yyyy | xxxx xxxx - for (offs = m_spriteram.bytes() - 16; offs>=0; offs-=16) + for (int offs = m_spriteram.bytes() - 16; offs >= 0; offs -= 16) { - flipx = 0; - flipy = m_spriteram[offs+1] & 0x80; - y = m_spriteram[offs+2]; - x = m_spriteram[offs+3]; - if (m_spriteram[offs+1] & 0x40) x -= 0x100; + bool const flipx = false; + bool const flipy = BIT(m_spriteram[offs + 1], 7); + int const y = m_spriteram[offs + 2]; + int x = m_spriteram[offs + 3]; + if (BIT(m_spriteram[offs + 1], 6)) x -= 0x100; - if (m_spriteram[offs+1] & 0x20) + if (BIT(m_spriteram[offs + 1], 5)) { // often set } - if (m_spriteram[offs+1] & 0x10) + if (BIT(m_spriteram[offs + 1], 4)) { - popmessage("(spriteram[offs+1] & 0x10) %02x\n", (m_spriteram[offs+1] & 0x10)); + popmessage("(BIT(spriteram[offs + 1], 4)) %02x\n", BIT(m_spriteram[offs + 1], 4)); } - - color = m_spriteram[offs+1] & 0x0f; - sprite = m_spriteram[offs+0] | (*m_spritebank << 8); + uint32_t const color = m_spriteram[offs + 1] & 0x0f; + uint32_t const sprite = m_spriteram[offs + 0] | (*m_spritebank << 8); m_gfxdecode->gfx(2)->transmask(bitmap,cliprect, sprite, - color,flipx,flipy,x,y, + color, flipx, flipy, x, y, m_palette->transpen_mask(*m_gfxdecode->gfx(2), color, 0)); } } @@ -292,45 +286,36 @@ uint32_t panicr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap // m_infotilemap_2->set_scrollx(0, m_scrollx); // m_infotilemap_2->draw(screen, *m_temprender, m_tempbitmap_clip, 0,0); - bitmap.fill(m_palette->black_pen(), cliprect); - m_txttilemap->mark_all_dirty(); - - - for (int y=0;y<256;y++) + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) { uint16_t const *const srcline = &m_temprender->pix(y); uint16_t *const dstline = &bitmap.pix(y); - for (int x=0;x<256;x++) + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) { uint16_t const dat = srcline[x]; dstline[x] = ((dat & 0x00f) | ((dat & 0x1e0)>>0)) + 0x200; - } - } draw_sprites(bitmap,cliprect); - for (int y=0;y<256;y++) + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) { uint16_t const *const srcline = &m_temprender->pix(y); uint16_t *const dstline = &bitmap.pix(y); - for (int x=0;x<256;x++) + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) { uint16_t const dat = srcline[x]; if (dat & 0x10) dstline[x] = ((dat & 0x00f) | ((dat & 0x1e0)>>0)) + 0x200; - } - } - m_txttilemap->draw(screen, bitmap, cliprect, 0,0); return 0; @@ -343,6 +328,14 @@ uint32_t panicr_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap ***************************************************************************/ +void panicr_state::textram_w(offs_t offset, uint8_t data) +{ + m_textram[offset] = data; + if (BIT(~offset, 0)) + m_txttilemap->mark_tile_dirty(offset >> 2); +} + + uint8_t panicr_state::collision_r(offs_t offset) { // re-render the collision data here @@ -357,32 +350,26 @@ uint8_t panicr_state::collision_r(offs_t offset) m_infotilemap_2->set_scrollx(0, m_scrollx & 0xffff); m_infotilemap_2->draw(*m_screen, *m_tempbitmap_1, m_tempbitmap_clip, 0,0); - - int actual_column = offset&0x3f; - int actual_line = offset >> 6; - + int actual_column = offset & 0x3f; + int const actual_line = offset >> 6; actual_column = actual_column * 4; actual_column -= m_scrollx; actual_column &= 0xff; - uint8_t ret = 0; uint16_t const *const srcline = &m_tempbitmap_1->pix(actual_line); + ret |= (srcline[(actual_column + 0) & 0xff] & 3) << 6; + ret |= (srcline[(actual_column + 1) & 0xff] & 3) << 4; + ret |= (srcline[(actual_column + 2) & 0xff] & 3) << 2; + ret |= (srcline[(actual_column + 3) & 0xff] & 3) << 0; - ret |= (srcline[(actual_column+0)&0xff]&3) << 6; - ret |= (srcline[(actual_column+1)&0xff]&3) << 4; - ret |= (srcline[(actual_column+2)&0xff]&3) << 2; - ret |= (srcline[(actual_column+3)&0xff]&3) << 0; - - logerror("%06x: (scroll x upper bits is %04x (full %04x)) read %d %d\n", m_maincpu->pc(), (m_scrollx&0xff00)>>8, m_scrollx, actual_line, actual_column); - + if (!machine().side_effects_disabled()) + logerror("%06x: (scroll x upper bits is %04x (full %04x)) read %d %d\n", m_maincpu->pc(), (m_scrollx&0xff00)>>8, m_scrollx, actual_line, actual_column); return ret; - - } @@ -401,8 +388,8 @@ void panicr_state::scrollx_hi_w(uint8_t data) void panicr_state::output_w(uint8_t data) { // d6, d7: play counter? (it only triggers on 1st coin) - machine().bookkeeping().coin_counter_w(0, (data & 0x40) ? 1 : 0); - machine().bookkeeping().coin_counter_w(1, (data & 0x80) ? 1 : 0); + machine().bookkeeping().coin_counter_w(0, BIT(data, 6)); + machine().bookkeeping().coin_counter_w(1, BIT(data, 7)); logerror("output_w %02x\n", data); @@ -426,11 +413,11 @@ void panicr_state::t5182shared_w(offs_t offset, uint8_t data) void panicr_state::panicr_map(address_map &map) { - map(0x00000, 0x01fff).ram().share("mainram"); - map(0x02000, 0x03cff).ram().share("spriteram"); // how big is sprite ram, some places definitely have sprites at 3000+ + map(0x00000, 0x01fff).ram().share(m_mainram); + map(0x02000, 0x03cff).ram().share(m_spriteram); // how big is sprite ram, some places definitely have sprites at 3000+ map(0x03d00, 0x03fff).ram(); map(0x08000, 0x0bfff).r(FUNC(panicr_state::collision_r)); - map(0x0c000, 0x0cfff).ram().share("textram"); + map(0x0c000, 0x0cfff).ram().w(FUNC(panicr_state::textram_w)).share(m_textram); map(0x0d000, 0x0d000).w(m_t5182, FUNC(t5182_device::sound_irq_w)); map(0x0d002, 0x0d002).w(m_t5182, FUNC(t5182_device::sharedram_semaphore_main_acquire_w)); map(0x0d004, 0x0d004).r(m_t5182, FUNC(t5182_device::sharedram_semaphore_snd_r)); @@ -444,7 +431,7 @@ void panicr_state::panicr_map(address_map &map) map(0x0d802, 0x0d802).w(FUNC(panicr_state::scrollx_hi_w)); map(0x0d804, 0x0d804).w(FUNC(panicr_state::scrollx_lo_w)); map(0x0d80a, 0x0d80a).w(FUNC(panicr_state::output_w)); - map(0x0d80c, 0x0d80c).writeonly().share("spritebank"); + map(0x0d80c, 0x0d80c).writeonly().share(m_spritebank); map(0x0d818, 0x0d818).nopw(); // watchdog? map(0xf0000, 0xfffff).rom(); } @@ -586,10 +573,10 @@ static const gfx_layout spritelayout = }; static GFXDECODE_START( gfx_panicr ) - GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0x000, 8 ) - GFXDECODE_ENTRY( "gfx2", 0, bgtilelayout, 0x200, 32 ) - GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x100, 16 ) - GFXDECODE_ENTRY( "gfx2", 0, infotilelayout_2, 0x100, 16 ) // palette is just to make it viewable with F4 + GFXDECODE_ENTRY( "chars", 0, charlayout, 0x000, 8 ) + GFXDECODE_ENTRY( "tiles", 0, bgtilelayout, 0x200, 32 ) + GFXDECODE_ENTRY( "sprites", 0, spritelayout, 0x100, 16 ) + GFXDECODE_ENTRY( "tiles", 0, infotilelayout_2, 0x100, 16 ) // palette is just to make it viewable with F4 GFXDECODE_END @@ -607,11 +594,16 @@ TIMER_DEVICE_CALLBACK_MEMBER(panicr_state::scanline) void panicr_state::panicr(machine_config &config) { - V20(config, m_maincpu, MASTER_CLOCK/2); /* Sony 8623h9 CXQ70116D-8 (V20 compatible) */ + constexpr XTAL MASTER_CLOCK = XTAL(16'000'000); + constexpr XTAL SOUND_CLOCK = XTAL(14'318'181); + + V20(config, m_maincpu, MASTER_CLOCK/2); // Sony 8623h9 CXQ70116D-8 (V20 compatible) m_maincpu->set_addrmap(AS_PROGRAM, &panicr_state::panicr_map); TIMER(config, "scantimer").configure_scanline(FUNC(panicr_state::scanline), "screen", 0, 1); - T5182(config, m_t5182, 0); + T5182(config, m_t5182, SOUND_CLOCK/4); + m_t5182->ym_read_callback().set("ymsnd", FUNC(ym2151_device::read)); + m_t5182->ym_write_callback().set("ymsnd", FUNC(ym2151_device::write)); SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60); @@ -625,10 +617,10 @@ void panicr_state::panicr(machine_config &config) GFXDECODE(config, m_gfxdecode, m_palette, gfx_panicr); PALETTE(config, m_palette, FUNC(panicr_state::panicr_palette), 256 * 4, 256); - /* sound hardware */ + // sound hardware SPEAKER(config, "mono").front_center(); - ym2151_device &ymsnd(YM2151(config, "ymsnd", SOUND_CLOCK/4)); /* 3.579545 MHz */ + ym2151_device &ymsnd(YM2151(config, "ymsnd", SOUND_CLOCK/4)); // 3.579545 MHz ymsnd.irq_handler().set(m_t5182, FUNC(t5182_device::ym2151_irq_handler)); ymsnd.add_route(0, "mono", 1.0); ymsnd.add_route(1, "mono", 1.0); @@ -636,30 +628,30 @@ void panicr_state::panicr(machine_config &config) ROM_START( panicr ) - ROM_REGION( 0x200000, "maincpu", 0 ) /* v20 main cpu */ + ROM_REGION( 0x100000, "maincpu", 0 ) // v20 main cpu ROM_LOAD16_BYTE("2.19m", 0x0f0000, 0x08000, CRC(3d48b0b5) SHA1(a6e8b38971a8964af463c16f32bb7dbd301dd314) ) ROM_LOAD16_BYTE("1.19n", 0x0f0001, 0x08000, CRC(674131b9) SHA1(63499cd5ad39e79e70f3ba7060680f0aa133f095) ) - ROM_REGION( 0x8000, "t5182_z80", 0 ) /* Toshiba T5182 external ROM */ + ROM_REGION( 0x8000, "t5182:external", 0 ) // Toshiba T5182 external ROM ROM_LOAD( "22d.bin", 0x0000, 0x8000, CRC(eb1a46e1) SHA1(278859ae4bca9f421247e646d789fa1206dcd8fc) ) - ROM_REGION( 0x04000, "gfx1", 0 ) + ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "13f.bin", 0x000000, 0x2000, CRC(4e6b3c04) SHA1(f388969d5d822df0eaa4d8300cbf9cee47468360) ) ROM_LOAD( "15f.bin", 0x002000, 0x2000, CRC(d735b572) SHA1(edcdb6daec97ac01a73c5010727b1694f512be71) ) - ROM_REGION( 0x80000, "gfx2", 0 ) + ROM_REGION( 0x80000, "tiles", 0 ) ROM_LOAD( "2a.bin", 0x000000, 0x20000, CRC(3ac0e5b4) SHA1(96b8bdf02002ec8ce87fd47fd21f7797a79d79c9) ) ROM_LOAD( "2b.bin", 0x020000, 0x20000, CRC(567d327b) SHA1(762b18ef1627d71074ba02b0eb270bd9a01ac0d8) ) ROM_LOAD( "2c.bin", 0x040000, 0x20000, CRC(cd77ec79) SHA1(94b61b7d77c016ae274eddbb1e66e755f312e11d) ) ROM_LOAD( "2d.bin", 0x060000, 0x20000, CRC(218d2c3e) SHA1(9503b3b67e71dc63448aed7815845b844e240afe) ) - ROM_REGION( 0x40000, "gfx3", 0 ) + ROM_REGION( 0x40000, "sprites", 0 ) ROM_LOAD( "2j.bin", 0x000000, 0x20000, CRC(80f05923) SHA1(5c886446fd77d3c39cb4fa43ea4beb8c89d20636) ) ROM_LOAD( "2k.bin", 0x020000, 0x20000, CRC(35f07bca) SHA1(54e6f82c2e6e1373c3ac1c6138ef738e5a0be6d0) ) - ROM_REGION( 0x04000, "user1", 0 ) + ROM_REGION( 0x04000, "tilerom", 0 ) ROM_LOAD( "5d.bin", 0x00000, 0x4000, CRC(f3466906) SHA1(42b512ba93ba7ac958402d1871c5ae015def3501) ) //tilemaps - ROM_REGION( 0x04000, "user2", 0 ) + ROM_REGION( 0x04000, "attrrom", 0 ) ROM_LOAD( "7d.bin", 0x00000, 0x4000, CRC(8032c1e9) SHA1(fcc8579c0117ebe9271cff31e14a30f61a9cf031) ) //attribute maps ROM_REGION( 0x0800, "proms", 0 ) @@ -673,31 +665,31 @@ ROM_START( panicr ) ROM_LOAD( "10l.bpr", 0x00700, 0x100, CRC(f3f29695) SHA1(2607e96564a5e6e9a542377a01f399ea86a36c48) ) // unknown ROM_END -ROM_START( panicrg ) /* Distributed by TV-Tuning Videospiele GMBH */ - ROM_REGION( 0x200000, "maincpu", 0 ) /* v20 main cpu */ +ROM_START( panicrg ) // Distributed by TV-Tuning Videospiele GMBH + ROM_REGION( 0x100000, "maincpu", 0 ) // v20 main cpu ROM_LOAD16_BYTE("2g.19m", 0x0f0000, 0x08000, CRC(cf759403) SHA1(1a0911c943ecc752e46873c9a5da981745f7562d) ) ROM_LOAD16_BYTE("1g.19n", 0x0f0001, 0x08000, CRC(06877f9b) SHA1(8b92209d6422ff2b1f3cb66bd39a3ff84e399eec) ) - ROM_REGION( 0x10000, "t5182_z80", 0 ) /* Toshiba T5182 external ROM */ + ROM_REGION( 0x10000, "t5182:external", 0 ) // Toshiba T5182 external ROM ROM_LOAD( "22d.bin", 0x0000, 0x8000, CRC(eb1a46e1) SHA1(278859ae4bca9f421247e646d789fa1206dcd8fc) ) - ROM_REGION( 0x04000, "gfx1", 0 ) + ROM_REGION( 0x04000, "chars", 0 ) ROM_LOAD( "13f.bin", 0x000000, 0x2000, CRC(4e6b3c04) SHA1(f388969d5d822df0eaa4d8300cbf9cee47468360) ) ROM_LOAD( "15f.bin", 0x002000, 0x2000, CRC(d735b572) SHA1(edcdb6daec97ac01a73c5010727b1694f512be71) ) - ROM_REGION( 0x80000, "gfx2", 0 ) + ROM_REGION( 0x80000, "tiles", 0 ) ROM_LOAD( "2a.bin", 0x000000, 0x20000, CRC(3ac0e5b4) SHA1(96b8bdf02002ec8ce87fd47fd21f7797a79d79c9) ) ROM_LOAD( "2b.bin", 0x020000, 0x20000, CRC(567d327b) SHA1(762b18ef1627d71074ba02b0eb270bd9a01ac0d8) ) ROM_LOAD( "2c.bin", 0x040000, 0x20000, CRC(cd77ec79) SHA1(94b61b7d77c016ae274eddbb1e66e755f312e11d) ) ROM_LOAD( "2d.bin", 0x060000, 0x20000, CRC(218d2c3e) SHA1(9503b3b67e71dc63448aed7815845b844e240afe) ) - ROM_REGION( 0x40000, "gfx3", 0 ) + ROM_REGION( 0x40000, "sprites", 0 ) ROM_LOAD( "2j.bin", 0x000000, 0x20000, CRC(80f05923) SHA1(5c886446fd77d3c39cb4fa43ea4beb8c89d20636) ) ROM_LOAD( "2k.bin", 0x020000, 0x20000, CRC(35f07bca) SHA1(54e6f82c2e6e1373c3ac1c6138ef738e5a0be6d0) ) - ROM_REGION( 0x04000, "user1", 0 ) + ROM_REGION( 0x04000, "tilerom", 0 ) ROM_LOAD( "5d.bin", 0x00000, 0x4000, CRC(f3466906) SHA1(42b512ba93ba7ac958402d1871c5ae015def3501) ) //tilemaps - ROM_REGION( 0x04000, "user2", 0 ) + ROM_REGION( 0x04000, "attrrom", 0 ) ROM_LOAD( "7d.bin", 0x00000, 0x4000, CRC(8032c1e9) SHA1(fcc8579c0117ebe9271cff31e14a30f61a9cf031) ) //attribute maps ROM_REGION( 0x0800, "proms", 0 ) @@ -716,8 +708,8 @@ void panicr_state::init_panicr() { std::vector buf(0x80000); - uint8_t *rom = memregion("gfx1")->base(); - int size = memregion("gfx1")->bytes(); + uint8_t *rom = memregion("chars")->base(); + int size = memregion("chars")->bytes(); // text data lines for (int i = 0; i < size / 2; i++) @@ -735,8 +727,8 @@ void panicr_state::init_panicr() rom[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7,6, 2,3,1,0,5,4)]; } - rom = memregion("gfx2")->base(); - size = memregion("gfx2")->bytes(); + rom = memregion("tiles")->base(); + size = memregion("tiles")->bytes(); // tiles data lines for (int i = 0; i < size / 4; i++) @@ -759,8 +751,8 @@ void panicr_state::init_panicr() rom[i] = buf[bitswap<24>(i,23,22,21,20,19,18,17,16,15,14,13,12, 5,4,3,2, 11,10,9,8,7,6, 0,1)]; } - rom = memregion("gfx3")->base(); - size = memregion("gfx3")->bytes(); + rom = memregion("sprites")->base(); + size = memregion("sprites")->bytes(); // sprites data lines for (int i = 0; i < size / 2; i++) @@ -779,8 +771,8 @@ void panicr_state::init_panicr() } //rearrange bg tilemaps a bit.... - rom = memregion("user1")->base(); - size = memregion("user1")->bytes(); + rom = memregion("tilerom")->base(); + size = memregion("tilerom")->bytes(); memcpy(&buf[0], rom, size); for (int j = 0; j < 16; j++) @@ -791,8 +783,8 @@ void panicr_state::init_panicr() } } - rom = memregion("user2")->base(); - size = memregion("user2")->bytes(); + rom = memregion("attrrom")->base(); + size = memregion("attrrom")->bytes(); memcpy(&buf[0], rom, size); for (int j = 0; j < 16; j++) diff --git a/src/mame/seibu/t5182.cpp b/src/mame/seibu/t5182.cpp index f243a801a4f..eb5b0cd4f03 100644 --- a/src/mame/seibu/t5182.cpp +++ b/src/mame/seibu/t5182.cpp @@ -149,17 +149,17 @@ rom. #include "emu.h" #include "t5182.h" -#define T5182_CLOCK XTAL(14'318'181)/4 - DEFINE_DEVICE_TYPE(T5182, t5182_device, "t5182", "T5182 MCU") t5182_device::t5182_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, T5182, tag, owner, clock), - m_ourcpu(*this, "t5182_z80"), - m_sharedram(*this, "sharedram"), - m_irqstate(0), - m_semaphore_main(0), - m_semaphore_snd(0) + : device_t(mconfig, T5182, tag, owner, clock) + , m_ourcpu(*this, "t5182_z80") + , m_sharedram(*this, "sharedram") + , m_ym_read_cb(*this, 0) + , m_ym_write_cb(*this) + , m_irqstate(0) + , m_semaphore_main(false) + , m_semaphore_snd(false) { } @@ -185,12 +185,12 @@ void t5182_device::sharedram_w(offs_t offset, uint8_t data) m_sharedram[offset] = data; } -TIMER_CALLBACK_MEMBER( t5182_device::setirq_callback ) +TIMER_CALLBACK_MEMBER(t5182_device::setirq_callback) { - switch(param) + switch (param) { case YM2151_ASSERT: - m_irqstate |= 1|4; + m_irqstate |= 1 | 4; break; case YM2151_CLEAR: @@ -213,10 +213,10 @@ TIMER_CALLBACK_MEMBER( t5182_device::setirq_callback ) if (m_ourcpu == nullptr) return; - if (m_irqstate == 0) /* no IRQs pending */ - m_ourcpu->set_input_line(0,CLEAR_LINE); - else /* IRQ pending */ - m_ourcpu->set_input_line(0,ASSERT_LINE); + if (m_irqstate == 0) // no IRQs pending + m_ourcpu->set_input_line(0, CLEAR_LINE); + else // IRQ pending + m_ourcpu->set_input_line(0, ASSERT_LINE); } void t5182_device::sound_irq_w(uint8_t data) @@ -244,32 +244,42 @@ void t5182_device::ym2151_irq_handler(int state) uint8_t t5182_device::sharedram_semaphore_snd_r() { - return m_semaphore_snd; + return m_semaphore_snd ? 1 : 0; } void t5182_device::sharedram_semaphore_main_acquire_w(uint8_t data) { - m_semaphore_main = 1; + m_semaphore_main = true; } void t5182_device::sharedram_semaphore_main_release_w(uint8_t data) { - m_semaphore_main = 0; + m_semaphore_main = false; } void t5182_device::sharedram_semaphore_snd_acquire_w(uint8_t data) { - m_semaphore_snd = 1; + m_semaphore_snd = true; } void t5182_device::sharedram_semaphore_snd_release_w(uint8_t data) { - m_semaphore_snd = 0; + m_semaphore_snd = false; } uint8_t t5182_device::sharedram_semaphore_main_r() { - return m_semaphore_main | (m_irqstate & 2); + return (m_semaphore_main ? 1 : 0) | (m_irqstate & 2); +} + +uint8_t t5182_device::ym_r(offs_t offset) +{ + return m_ym_read_cb(offset); +} + +void t5182_device::ym_w(offs_t offset, uint8_t data) +{ + m_ym_write_cb(offset, data); } // ROM definition for the Toshiba T5182 Custom CPU internal program ROM @@ -325,8 +335,8 @@ void t5182_device::t5182_map(address_map &map) { map(0x0000, 0x1fff).rom().region("cpu", 0); // internal ROM map(0x2000, 0x27ff).ram().mirror(0x1800); // internal RAM - map(0x4000, 0x40ff).ram().mirror(0x3F00).share("sharedram"); // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable - map(0x8000, 0xffff).rom().region(":t5182_z80", 0); // external ROM + map(0x4000, 0x40ff).ram().mirror(0x3f00).share(m_sharedram); // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable + map(0x8000, 0xffff).rom().region("external", 0); // external ROM } @@ -343,7 +353,7 @@ void t5182_device::t5182_map(address_map &map) void t5182_device::t5182_io(address_map &map) { map.global_mask(0xff); - map(0x00, 0x01).rw(":ymsnd", FUNC(ym2151_device::read), FUNC(ym2151_device::write)); + map(0x00, 0x01).rw(FUNC(t5182_device::ym_r), FUNC(t5182_device::ym_w)); map(0x10, 0x10).w(FUNC(t5182_device::sharedram_semaphore_snd_acquire_w)); map(0x11, 0x11).w(FUNC(t5182_device::sharedram_semaphore_snd_release_w)); map(0x12, 0x12).w(FUNC(t5182_device::ym2151_irq_ack_w)); @@ -359,7 +369,7 @@ void t5182_device::t5182_io(address_map &map) void t5182_device::device_add_mconfig(machine_config &config) { - Z80(config, m_ourcpu, T5182_CLOCK); + Z80(config, m_ourcpu, DERIVED_CLOCK(1, 1)); m_ourcpu->set_addrmap(AS_PROGRAM, &t5182_device::t5182_map); m_ourcpu->set_addrmap(AS_IO, &t5182_device::t5182_io); } diff --git a/src/mame/seibu/t5182.h b/src/mame/seibu/t5182.h index 28180b8e612..8b2fca73b59 100644 --- a/src/mame/seibu/t5182.h +++ b/src/mame/seibu/t5182.h @@ -24,6 +24,10 @@ class t5182_device : public device_t CPU_CLEAR }; + // configuration + auto ym_read_callback() { return m_ym_read_cb.bind(); } + auto ym_write_callback() { return m_ym_write_cb.bind(); } + void sound_irq_w(uint8_t data); uint8_t sharedram_semaphore_snd_r(); void sharedram_semaphore_main_acquire_w(uint8_t data); @@ -32,8 +36,6 @@ class t5182_device : public device_t void sharedram_w(offs_t offset, uint8_t data); void ym2151_irq_handler(int state); - void t5182_io(address_map &map); - void t5182_map(address_map &map); protected: // device-level overrides virtual void device_start() override; @@ -42,12 +44,6 @@ class t5182_device : public device_t virtual void device_add_mconfig(machine_config &config) override; private: - // internal state - required_device m_ourcpu; - required_shared_ptr m_sharedram; - int m_irqstate; - int m_semaphore_main; - int m_semaphore_snd; TIMER_CALLBACK_MEMBER(setirq_callback); void sharedram_semaphore_snd_acquire_w(uint8_t data); @@ -55,6 +51,23 @@ class t5182_device : public device_t uint8_t sharedram_semaphore_main_r(); void ym2151_irq_ack_w(uint8_t data); void cpu_irq_ack_w(uint8_t data); + uint8_t ym_r(offs_t offset); + void ym_w(offs_t offset, uint8_t data); + + void t5182_io(address_map &map); + void t5182_map(address_map &map); + + // internal state + required_device m_ourcpu; + required_shared_ptr m_sharedram; + + // device callbacks + devcb_read8 m_ym_read_cb; + devcb_write8 m_ym_write_cb; + + uint32_t m_irqstate; + bool m_semaphore_main; + bool m_semaphore_snd; }; DECLARE_DEVICE_TYPE(T5182, t5182_device) diff --git a/src/mame/skeleton/swunktarot.cpp b/src/mame/skeleton/swunktarot.cpp new file mode 100644 index 00000000000..94ae5e14a73 --- /dev/null +++ b/src/mame/skeleton/swunktarot.cpp @@ -0,0 +1,308 @@ +// license:BSD-3-Clause +// copyright-holders: + +/* +unknown Sunwise tarot card game + +TOP BOARD (S-8808A) +========= +ROMs 1-12 +main: +Z80 CTC-D +Z80A +Z80 +D8255AC-2 +6116 RAM + +sound: +Z80 CTC-D +D8255AC-2 +Z80 +YM3812 +5816 RAM +4 MHz osc +Oki M6242 +32.768 kHz osc + +LOWER BOARD (S-8809A) +========== +ROMs A-E +3x 6148 RAM +video output +5x 5816 RAM +18 MHz osc + +TODO: +*/ + +#include "emu.h" + +#include "cpu/z80/z80.h" +#include "machine/i8255.h" +#include "machine/msm6242.h" +#include "machine/z80ctc.h" +#include "sound/ymopl.h" + +#include "emupal.h" +#include "screen.h" +#include "speaker.h" +#include "tilemap.h" + + +// configurable logging +#define LOG_PORTS (1U << 1) + +//#define VERBOSE (LOG_GENERAL | LOG_PORTS) + +#include "logmacro.h" + +#define LOGPORTS(...) LOGMASKED(LOG_PORTS, __VA_ARGS__) + + +namespace { + +class swunktarot_state : public driver_device +{ +public: + swunktarot_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_audiocpu(*this, "audiocpu") + , m_gfxdecode(*this, "gfxdecode") + , m_audiobank(*this, "audiobank") + { + } + + void unktarot(machine_config &config) ATTR_COLD; + +protected: + virtual void machine_start() override ATTR_COLD; + +private: + required_device m_maincpu; + required_device m_audiocpu; + required_device m_gfxdecode; + + required_memory_bank m_audiobank; + + void main_program_map(address_map &map) ATTR_COLD; + void audio_program_map(address_map &map) ATTR_COLD; + void main_io_map(address_map &map) ATTR_COLD; + void audio_io_map(address_map &map) ATTR_COLD; + + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); +}; + + +uint32_t swunktarot_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + bitmap.fill(rgb_t::black(), cliprect); + + return 0; +} + + +void swunktarot_state::machine_start() +{ + m_audiobank->configure_entries(0, 32, memregion("audiocpu")->base(), 0x4000); + m_audiobank->set_entry(1); +} + + +void swunktarot_state::main_program_map(address_map &map) +{ + map(0x0000, 0x7fff).rom(); + map(0x8000, 0x9fff).ram(); + map(0xa000, 0xafff).ram(); + map(0xb000, 0xbfff).ram(); +} + +void swunktarot_state::audio_program_map(address_map &map) +{ + map(0x0000, 0x1fff).rom(); + map(0x4000, 0x47ff).ram(); + map(0xc000, 0xffff).bankr(m_audiobank); +} + +void swunktarot_state::main_io_map(address_map &map) +{ + map.global_mask(0xff); + + //map(0x00, 0x03).rw("ctc0", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); // TODO: maybe + //map(0x10, 0x13).rw("ppi0", FUNC(i8255_device::read), FUNC(i8255_device::write)); // TODO: maybe + map(0x20, 0x2f).rw("rtc", FUNC(msm6242_device::read), FUNC(msm6242_device::write)); + // map(0x31, 0x31).w //?? + // map(0x33, 0x33).w //?? + // map(0x40, 0x43).w //?? +} + +void swunktarot_state::audio_io_map(address_map &map) +{ + map.global_mask(0xff); + + //map(0x00, 0x03).rw("ctc1", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); //TODO: maybe + //map(0x04, 0x07).rw("ppi1", FUNC(i8255_device::read), FUNC(i8255_device::write)); //TODO: maybe. 0x05 seems to set the audio bank + //map(0x08, 0x09).w // YM? + //map(0x0c, 0x0c).r? // latch? irq ack? +} + + +static INPUT_PORTS_START( unktarot ) + PORT_START("IN0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(1) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_PLAYER(1) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_PLAYER(1) + + PORT_START("IN1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_PLAYER(2) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_PLAYER(2) + + PORT_START("DSW") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "SW:1") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "SW:2") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "SW:3") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "SW:4") + PORT_DIPUNKNOWN_DIPLOC(0x10, 0x10, "SW:5") + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "SW:6") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "SW:7") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "SW:8") +INPUT_PORTS_END + + +const gfx_layout gfx_8x8x1 = +{ + 8,8, + RGN_FRAC(1,1), + 1, + { RGN_FRAC(0,1) }, + { STEP8(7,-1) }, + { STEP8(0,8) }, + 8*8 +}; + +const gfx_layout gfx_8x8x4 = +{ + 8,8, + RGN_FRAC(1,4), + 4, + { RGN_FRAC(3,4), RGN_FRAC(2,4), RGN_FRAC(1,4), RGN_FRAC(0,4) }, + { STEP8(7,-1) }, + { STEP8(0,8) }, + 8*8 +}; + +static GFXDECODE_START( gfx_unktarot ) + GFXDECODE_ENTRY( "chars", 0, gfx_8x8x1, 0, 16 ) + GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x4, 0, 16 ) +GFXDECODE_END + +void swunktarot_state::unktarot(machine_config &config) +{ + Z80(config, m_maincpu, 4_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &swunktarot_state::main_program_map); + m_maincpu->set_addrmap(AS_IO, &swunktarot_state::main_io_map); + m_maincpu->set_vblank_int("screen", FUNC(swunktarot_state::irq0_line_hold)); + + Z80(config, "subcpu", 4_MHz_XTAL).set_disable(); // TODO: how does this work? does it use the same ROM as the main CPU? + + Z80(config, m_audiocpu, 4_MHz_XTAL); + m_audiocpu->set_addrmap(AS_PROGRAM, &swunktarot_state::audio_program_map); + m_audiocpu->set_addrmap(AS_IO, &swunktarot_state::audio_io_map); + + z80ctc_device &ctc0(Z80CTC(config, "ctc0", 4_MHz_XTAL)); + ctc0.intr_callback().set([this] (int state) { LOGPORTS("%s: CTC0 INTR handler %d\n", machine().describe_context(), state); }); + ctc0.zc_callback<0>().set([this] (int state) { LOGPORTS("%s: CTC0 ZC0 handler %d\n", machine().describe_context(), state); }); + ctc0.zc_callback<1>().set([this] (int state) { LOGPORTS("%s: CTC0 ZC1 handler %d\n", machine().describe_context(), state); }); + ctc0.zc_callback<2>().set([this] (int state) { LOGPORTS("%s: CTC0 ZC2 handler %d\n", machine().describe_context(), state); }); + + z80ctc_device &ctc1(Z80CTC(config, "ctc1", 4_MHz_XTAL)); + ctc1.intr_callback().set([this] (int state) { LOGPORTS("%s: CTC1 INTR handler %d\n", machine().describe_context(), state); }); + ctc1.zc_callback<0>().set([this] (int state) { LOGPORTS("%s: CTC1 ZC0 handler %d\n", machine().describe_context(), state); }); + ctc1.zc_callback<1>().set([this] (int state) { LOGPORTS("%s: CTC1 ZC1 handler %d\n", machine().describe_context(), state); }); + ctc1.zc_callback<2>().set([this] (int state) { LOGPORTS("%s: CTC1 ZC2 handler %d\n", machine().describe_context(), state); }); + + i8255_device &ppi0(I8255A(config, "ppi0")); // NEC D8255AC-2 + ppi0.in_pa_callback().set([this] () { LOGPORTS("%s: PPI0 port A in\n", machine().describe_context()); return uint8_t(0); }); + ppi0.in_pb_callback().set([this] () { LOGPORTS("%s: PPI0 port B in\n", machine().describe_context()); return uint8_t(0); }); + ppi0.in_pc_callback().set([this] () { LOGPORTS("%s: PPI0 port C in\n", machine().describe_context()); return uint8_t(0); }); + ppi0.out_pa_callback().set([this] (uint8_t data) { LOGPORTS("%s: PPI0 port A out %02x\n", machine().describe_context(), data); }); + ppi0.out_pb_callback().set([this] (uint8_t data) { LOGPORTS("%s: PPI0 port B out %02x\n", machine().describe_context(), data); }); + ppi0.out_pc_callback().set([this] (uint8_t data) { LOGPORTS("%s: PPI0 port C out %02x\n", machine().describe_context(), data); }); + + i8255_device &ppi1(I8255A(config, "ppi1")); // NEC D8255AC-2 + ppi1.in_pa_callback().set([this] () { LOGPORTS("%s: PPI1 port A in\n", machine().describe_context()); return uint8_t(0); }); + ppi1.in_pb_callback().set([this] () { LOGPORTS("%s: PPI1 port B in\n", machine().describe_context()); return uint8_t(0); }); + ppi1.in_pc_callback().set([this] () { LOGPORTS("%s: PPI1 port C in\n", machine().describe_context()); return uint8_t(0); }); + ppi1.out_pa_callback().set([this] (uint8_t data) { LOGPORTS("%s: PPI1 port A out %02x\n", machine().describe_context(), data); }); + ppi1.out_pb_callback().set([this] (uint8_t data) { LOGPORTS("%s: PPI1 port B out %02x\n", machine().describe_context(), data); }); + ppi1.out_pc_callback().set([this] (uint8_t data) { LOGPORTS("%s: PPI1 port C out %02x\n", machine().describe_context(), data); }); + + msm6242_device &rtc(MSM6242(config, "rtc", 32.768_kHz_XTAL)); + rtc.out_int_handler().set([this] (int state) { LOGPORTS("%s: RTC INT handler %d\n", machine().describe_context(), state); }); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // TODO: everything + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); + screen.set_size(64*8, 32*8); + screen.set_visarea(0*8, 64*8-1, 2*8, 30*8-1); + screen.set_screen_update(FUNC(swunktarot_state::screen_update)); + + GFXDECODE(config, m_gfxdecode, "palette", gfx_unktarot); + + PALETTE(config, "palette").set_entries(0x100); // TODO + + SPEAKER(config, "mono").front_center(); + + ym3812_device &ym(YM3812(config, "ym", 4_MHz_XTAL)); + ym.irq_handler().set([this] (int state) { LOGPORTS("%s: YM IRQ handler %d\n", machine().describe_context(), state); }); + ym.add_route(ALL_OUTPUTS, "mono", 0.80); +} + + +ROM_START( unktarot ) + ROM_REGION( 0x08000, "maincpu", 0 ) + ROM_LOAD( "1.u5", 0x00000, 0x08000, CRC(eaf339d1) SHA1(8325046d2059ad890204e0373bcfbe1221e12bdf) ) + + // these ROMs are located under the main CPU one + ROM_REGION( 0x100000, "data", 0 ) + ROM_LOAD( "2.u6", 0x00000, 0x20000, CRC(42564c5b) SHA1(c991a09c29283a50e6e1638cc80eb9dd490fda3f) ) + ROM_LOAD( "3.u7", 0x20000, 0x20000, CRC(5692e175) SHA1(a0a3d01a7d7ff5400cef8e497897786c653155f3) ) + ROM_LOAD( "4.u8", 0x40000, 0x20000, CRC(e368af7c) SHA1(9cbd32b4398bfa5b8c5a8f0e81705dcfd8919553) ) + ROM_LOAD( "5.u9", 0x60000, 0x20000, CRC(179989dd) SHA1(d07b8b980b67327ed3bbfa1da737c0261bef9e17) ) + ROM_LOAD( "6.u14", 0x80000, 0x20000, CRC(91d821d1) SHA1(ce9829fd24f45ed18ea6180104426562eee118d2) ) + ROM_LOAD( "7.u15", 0xa0000, 0x20000, CRC(d94904db) SHA1(2cb7a13f56aefed5e70f50f3c3439a2d5049b581) ) + ROM_LOAD( "8.u16", 0xc0000, 0x20000, CRC(a4d8e251) SHA1(ed0df6b525d833e5c2e9c0aeaa2e34b210f958aa) ) + ROM_LOAD( "9.u17", 0xe0000, 0x20000, CRC(5c00d059) SHA1(17fae821c17eebe675feab1c97099c6a2241b0d1) ) + + ROM_REGION( 0x80000, "audiocpu", ROMREGION_ERASE00 ) + ROM_LOAD( "10.u28", 0x00000, 0x20000, CRC(4bedeb7a) SHA1(d9ce1bc9efc26f8c90b98736ee41a3cb45fc3b68) ) + // empty u29 + ROM_LOAD( "11.u41", 0x20000, 0x20000, CRC(b0ffb442) SHA1(9524de6120adc8ec77b94e9a89992271ce12704b) ) + ROM_LOAD( "12.u42", 0x40000, 0x20000, CRC(83ae6756) SHA1(289d2ed72dbf5c1a941da67cb1f7fe9a0e3aaab2) ) + + ROM_REGION( 0x8000, "chars", 0 ) + ROM_LOAD( "e.u60", 0x0000, 0x8000, CRC(f80ba6fe) SHA1(573d49cf52b47f112f2cfd0e259b8dc5852a3102) ) + + ROM_REGION( 0x80000, "tiles", 0 ) + ROM_LOAD( "a.u56", 0x00000, 0x20000, CRC(698250cf) SHA1(aa2acb4a643d6fcff6fa406a6fe9c1ff3457ad51) ) + ROM_LOAD( "b.u57", 0x20000, 0x20000, CRC(ebcfa6fc) SHA1(00f2603c38e0e4ee86e14954afe282fafe8c1a8b) ) + ROM_LOAD( "c.u58", 0x40000, 0x20000, CRC(c6b572e8) SHA1(2fad7841a981bc98f2187237116dd61e272128d5) ) + ROM_LOAD( "d.u59", 0x60000, 0x20000, CRC(cbe4da16) SHA1(e673b3b7e95cda27f1a77e8ef44e13a58ba3d3dc) ) + // empty u66 to u69 +ROM_END + +} // anonymous namespace + + +GAME( 198?, unktarot, 0, unktarot, unktarot, swunktarot_state, empty_init, ROT0, "Sunwise", "unknown Sunwise tarot card game", MACHINE_IS_SKELETON ) diff --git a/src/mame/sony/dmac_0448.cpp b/src/mame/sony/dmac_0448.cpp index 31dfffd2563..1bedf913f63 100644 --- a/src/mame/sony/dmac_0448.cpp +++ b/src/mame/sony/dmac_0448.cpp @@ -126,8 +126,10 @@ void dmac_0448_device::dma_check(s32 param) if (!(dma.cctl & CS_ENABLE)) return; - // check transfer count - if (!dma.ctrc) + // check transfer count and autopad + // When autopad is enabled, the DMA controller will pad the transaction with 0s + // or discard reads until DRQ is lowered + if (!dma.ctrc && !(dma.cctl & CS_APAD)) return; // TODO: confirm if this is correct @@ -141,12 +143,15 @@ void dmac_0448_device::dma_check(s32 param) LOG("dma_r data 0x%02x address 0x%08x\n", data, address); - m_bus->write_byte(address, data); + if (dma.ctrc > 0) + { + m_bus->write_byte(address, data); + } } else { // memory to device - u8 const data = m_bus->read_byte(address); + u8 const data = dma.ctrc > 0 ? m_bus->read_byte(address) : 0; LOG("dma_w data 0x%02x address 0x%08x\n", data, address); @@ -164,7 +169,11 @@ void dmac_0448_device::dma_check(s32 param) dma.cofs++; // decrement count - dma.ctrc--; + // TODO: Presumably, if autopad is active this doesn't underflow? Needs confirmation on-system, because the above logic depends on this being true. + if (dma.ctrc > 0) + { + dma.ctrc--; + } // set terminal count flag if (!dma.ctrc) diff --git a/src/mame/sony/news_r3k.cpp b/src/mame/sony/news_r3k.cpp index 2d09b4fb48e..7a60064a847 100644 --- a/src/mame/sony/news_r3k.cpp +++ b/src/mame/sony/news_r3k.cpp @@ -516,6 +516,8 @@ void news_r3k_base_state::common(machine_config &config) // scsi bus and devices NSCSI_BUS(config, m_scsibus); // inquiry content for hard disk is "HITACHI DK312C CS01" + // HD CHDs will be treated as MO disks using the inquiry content "SONY SMO-C501 1.00" + // The CHS for converting a raw MO dump for 282MByte per side disks is 18678,1,31 per NEWS-OS 4's disktab file NSCSI_CONNECTOR(config, "scsi:0", news_scsi_devices, "harddisk"); NSCSI_CONNECTOR(config, "scsi:1", news_scsi_devices, nullptr); NSCSI_CONNECTOR(config, "scsi:2", news_scsi_devices, nullptr); diff --git a/src/mame/sony/zn.cpp b/src/mame/sony/zn.cpp index 98c74ca543d..fc98dc2fd3c 100644 --- a/src/mame/sony/zn.cpp +++ b/src/mame/sony/zn.cpp @@ -5307,7 +5307,7 @@ ROM_END /* Capcom ZN1 */ GAME( 1995, coh1000c, 0, coh1000c, zn, zn1_state, empty_init, ROT0, "Capcom", "ZN1", MACHINE_IS_BIOS_ROOT ) -GAME( 1995, ts2, coh1000c, coh1000c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Takara", "Battle Arena Toshinden 2 (Europe 951124)", MACHINE_IMPERFECT_SOUND ) +GAME( 1995, ts2, coh1000c, coh1000c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Takara", "Battle Arena Toshinden 2 (Europe 951124)", MACHINE_IMPERFECT_SOUND ) GAME( 1995, ts2u, ts2, coh1000c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Takara", "Battle Arena Toshinden 2 (USA 951124)", MACHINE_IMPERFECT_SOUND ) GAME( 1995, ts2ua, ts2, coh1000c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Takara", "Battle Arena Toshinden 2 (USA 951124, 32Mb mask ROMs)", MACHINE_IMPERFECT_SOUND ) GAME( 1995, ts2j, ts2, coh1000c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Takara", "Battle Arena Toshinden 2 (Japan 951124)", MACHINE_IMPERFECT_SOUND ) @@ -5316,7 +5316,7 @@ GAME( 1996, starglad, coh1000c, coh1000c, zn6b, zn1_state, empty_ini GAME( 1996, stargladj, starglad, coh1000c, zn6b, zn1_state, empty_init, ROT0, "Capcom", "Star Gladiator Episode I: Final Crusade (Japan 960627)", MACHINE_IMPERFECT_SOUND ) GAME( 1996, glpracr, coh1000c, coh1000c, zn, glpracr_state, empty_init, ROT0, "Tecmo", "Gallop Racer (English Ver 10.17.K)", MACHINE_IMPERFECT_SOUND ) GAME( 1996, glpracrj, glpracr, coh1000c, zn, glpracr_state, empty_init, ROT0, "Tecmo", "Gallop Racer (Japanese Ver 9.01.12)", MACHINE_IMPERFECT_SOUND ) -GAME( 1996, sfex, coh1000c, coh1002c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX (Europe 961219)", MACHINE_IMPERFECT_SOUND ) +GAME( 1996, sfex, coh1000c, coh1002c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX (Europe 961219)", MACHINE_IMPERFECT_SOUND ) GAME( 1996, sfexu, sfex, coh1002c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX (USA 961219)", MACHINE_IMPERFECT_SOUND ) GAME( 1996, sfexa, sfex, coh1002c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX (Asia 961219)", MACHINE_IMPERFECT_SOUND ) GAME( 1996, sfexj, sfex, coh1002c, zn6b, zn1_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX (Japan 961130)", MACHINE_IMPERFECT_SOUND ) @@ -5327,12 +5327,12 @@ GAME( 1997, sfexpj1, sfexp, coh1002c, zn6b, zn1_state, empty_ini /* Capcom ZN2 */ GAME( 1997, coh3002c, 0, coh3002c, zn, zn2_state, empty_init, ROT0, "Capcom", "ZN2", MACHINE_IS_BIOS_ROOT ) -GAME( 1997, rvschool, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Rival Schools: United By Fate (Europe 971117)", MACHINE_IMPERFECT_SOUND ) +GAME( 1997, rvschool, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Rival Schools: United By Fate (Europe 971117)", MACHINE_IMPERFECT_SOUND ) GAME( 1997, rvschoolu, rvschool, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Rival Schools: United By Fate (USA 971117)", MACHINE_IMPERFECT_SOUND ) GAME( 1997, rvschoola, rvschool, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Rival Schools: United By Fate (Asia 971117)", MACHINE_IMPERFECT_SOUND ) GAME( 1997, jgakuen, rvschool, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Shiritsu Justice Gakuen: Legion of Heroes (Japan 971216)", MACHINE_IMPERFECT_SOUND ) GAME( 1997, jgakuen1, rvschool, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Shiritsu Justice Gakuen: Legion of Heroes (Japan 971117)", MACHINE_IMPERFECT_SOUND ) -GAME( 1998, sfex2, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 (Europe 980312)", MACHINE_IMPERFECT_SOUND ) +GAME( 1998, sfex2, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 (Europe 980312)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, sfex2u, sfex2, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 (USA 980526)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, sfex2u1, sfex2, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 (USA 980312)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, sfex2a, sfex2, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 (Asia 980312)", MACHINE_IMPERFECT_SOUND ) @@ -5342,16 +5342,16 @@ GAME( 1998, plsmaswd, coh3002c, coh3002c, zn6b, zn2_state, empty_init, R GAME( 1998, plsmaswda, plsmaswd, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Plasma Sword: Nightmare of Bilstein (Asia 980316)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, stargld2, plsmaswd, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Star Gladiator 2: Nightmare of Bilstein (Japan 980316)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, tgmj, coh3002c, coh3002c, tgm, zn2_state, empty_init, ROT0, "Arika / Capcom", "Tetris: The Grand Master (Japan 980710)", MACHINE_IMPERFECT_SOUND ) -GAME( 1998, techromn, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Tech Romancer (Europe 980914)", MACHINE_IMPERFECT_SOUND ) +GAME( 1998, techromn, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Tech Romancer (Europe 980914)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, techromnu, techromn, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Tech Romancer (USA 980914)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, techromna, techromn, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Tech Romancer (Asia 980914)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, kikaioh, techromn, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom", "Choukou Senki Kikaioh (Japan 980914)", MACHINE_IMPERFECT_SOUND ) -GAME( 1999, sfex2p, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 Plus (Europe 990611)", MACHINE_IMPERFECT_SOUND ) +GAME( 1999, sfex2p, coh3002c, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 Plus (Europe 990611)", MACHINE_IMPERFECT_SOUND ) GAME( 1999, sfex2pu, sfex2p, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 Plus (USA 990611)", MACHINE_IMPERFECT_SOUND ) GAME( 1999, sfex2pa, sfex2p, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 Plus (Asia 990611)", MACHINE_IMPERFECT_SOUND ) GAME( 1999, sfex2ph, sfex2p, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 Plus (Hispanic 990611)", MACHINE_IMPERFECT_SOUND ) GAME( 1999, sfex2pj, sfex2p, coh3002c, zn6b, zn2_state, empty_init, ROT0, "Capcom / Arika", "Street Fighter EX2 Plus (Japan 990611)", MACHINE_IMPERFECT_SOUND ) -GAME( 1999, strider2, coh3002c, coh3002c, zn, zn2_state, empty_init, ROT0, "Capcom", "Strider 2 (Europe 991213)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // random hangs / crashes +GAME( 1999, strider2, coh3002c, coh3002c, zn, zn2_state, empty_init, ROT0, "Capcom", "Strider 2 (Europe 991213)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) // random hangs / crashes GAME( 1999, strider2u, strider2, coh3002c, zn, zn2_state, empty_init, ROT0, "Capcom", "Strider 2 (USA 991213)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) GAME( 1999, strider2a, strider2, coh3002c, zn, zn2_state, empty_init, ROT0, "Capcom", "Strider 2 (Asia 991213)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) GAME( 1999, shiryu2, strider2, coh3002c, zn, zn2_state, empty_init, ROT0, "Capcom", "Strider Hiryu 2 (Japan 991213)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) diff --git a/src/mame/subsino/lastfght.cpp b/src/mame/subsino/lastfght.cpp index e3c996c226e..e51bace4c21 100644 --- a/src/mame/subsino/lastfght.cpp +++ b/src/mame/subsino/lastfght.cpp @@ -92,7 +92,7 @@ class lastfght_state : public driver_device m_eeprom(*this, "eeprom"), m_screen(*this, "screen"), m_palette(*this, "palette") - { } + { } void lastfght(machine_config &config); @@ -164,8 +164,7 @@ class lastfght_state : public driver_device void lastfght_state::video_start() { - int i; - for (i = 0; i < 2; i++) + for (int i = 0; i < 2; i++) m_screen->register_screen_bitmap(m_bitmap[i]); save_item(NAME(m_bitmap[0])); diff --git a/src/mame/subsino/subsino2.cpp b/src/mame/subsino/subsino2.cpp index de8ddbc1083..d8d8635bd53 100644 --- a/src/mame/subsino/subsino2.cpp +++ b/src/mame/subsino/subsino2.cpp @@ -24,17 +24,19 @@ Year Game CPU Sound Custom 2000 New 2001 H8/3044** SS9904 SS9601, SS9802, SS9803 HM86171 RAMDAC, Battery 2001 Queen Bee H8/3044** SS9804 SS9601, SS9802, SS9803 HM86171 RAMDAC, Battery 2001 Humlan's Lyckohjul H8/3044** SS9804 SS9601, SS9802, SS9803 HM86171 RAMDAC, Battery +2002 X-Reel H8/3044** SS9904 SS9601, SS9802, SS9803 HM86171 RAMDAC, Battery 2002 Super Queen Bee H8/3044** ? ? ? 2006 X-Plan AM188-EM M6295 SS9601, SS9802, SS9803 HM86171 RAMDAC, Battery ---------------------------------------------------------------------------------------------------------------- -*SS9600 **SS9689 +* SS9600 +** SS9689 6433044A22F +*** SP006 6433044A65F Graphics for the H8-based games are stored in either four socketed DIP28 8-bit EPROMs, two socketed DIP40 16-bit EPROMs or one surface-mounted SSOP70 32-bit ROM. Later H8-based PCBs have a custom QFP device labeled "SG 003" instead of the off-the-shelf RAMDAC. -To do: - +TODO: - Add sound to SS9804/SS9904 games. - ptrain: missing scroll in race screens. - humlan: empty reels when bonus image should scroll in via L0 scroll. The image (crown/fruits) is at y > 0x100 in the tilemap. @@ -42,6 +44,7 @@ To do: - xtrain: it runs faster than a video from the real thing. It doesn't use vblank irqs (but reads the vblank bit). - mtrain: implement hopper. - xplan: starts with 4 credits, no controls to move the aircraft +- which PCBs have the newer SP006 H8 instead of SS9689? Protection seems to work the same way on every game in this driver, using a bitbanged Dallas 1-Wire EEPROM. First a Read ROM command is issued, and only the first 8 bits returned are examined to determine whether they match the expected device code (0x14). @@ -143,6 +146,7 @@ class subsino2_state : public driver_device void init_queenbeeb(); void init_queenbeei(); void init_humlan(); + void init_xreel(); void init_squeenb(); void init_qbeebing(); void init_treamary(); @@ -3111,7 +3115,7 @@ PCB Layout ***************************************************************************/ ROM_START( bishjan ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "1-v203.u21", 0x000000, 0x080000, CRC(1f891d48) SHA1(0b6a5aa8b781ba8fc133289790419aa8ea21c400) ) ROM_REGION( 0x400000, "tilemap", 0 ) @@ -3120,7 +3124,7 @@ ROM_START( bishjan ) ROM_LOAD32_BYTE( "5-v201.u27", 0x000001, 0x100000, CRC(85067d40) SHA1(3ecf7851311a77a0dfca90775fcbf6faabe9c2ab) ) ROM_LOAD32_BYTE( "6-v201.u28", 0x000003, 0x100000, CRC(430bd9d7) SHA1(dadf5a7eb90cf2dc20f97dbf20a4b6c8e7734fb1) ) - ROM_REGION( 0x100000, "samples", 0 ) // SS9904 + ROM_REGION( 0x100000, "samples", 0 ) // SS9904 ROM_LOAD( "2-v201.u9", 0x000000, 0x100000, CRC(ea42764d) SHA1(13fe1cd30e474f4b092949c440068e9ddca79976) ) ROM_REGION( 0x28, "eeprom", 0 ) @@ -3133,7 +3137,7 @@ void subsino2_state::init_bishjan() // rts -> rte rom[0x33386/2] = 0x5670; // IRQ 0 - rom[0x0CC5C/2] = 0x5670; // IRQ 8 + rom[0x0cc5c/2] = 0x5670; // IRQ 8 } // Uses newer PCB type, same as Humlan's Lyckohjul @@ -3157,9 +3161,10 @@ void subsino2_state::init_xiaoao() // rts -> rte rom[0x35238/2] = 0x5670; // IRQ 0 - rom[0x0D550/2] = 0x5670; // IRQ 8 + rom[0x0d550/2] = 0x5670; // IRQ 8 } + /*************************************************************************** New 2001 (Italy, V200N) @@ -3204,7 +3209,7 @@ New 2001 (Italy, V200N) ***************************************************************************/ ROM_START( new2001 ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "new_2001_italy_1_v200n.u21", 0x00000, 0x40000, CRC(bacc8c01) SHA1(e820bc53fa297c3f543a1d65d47eb7b5ee85a6e2) ) ROM_RELOAD( 0x40000, 0x40000 ) @@ -3214,7 +3219,7 @@ ROM_START( new2001 ) ROM_LOAD32_BYTE( "new_2001_italy_5_v200.2.u27", 0x00001, 0x40000, CRC(d028696b) SHA1(ebb047e7cafaefbdeb479c3877aea4fce0c47ad2) ) ROM_LOAD32_BYTE( "new_2001_italy_6_v200.3.u28", 0x00003, 0x40000, CRC(085599e3) SHA1(afd4bed369a96ba12037e6b8cf3a4cab84d12b21) ) - ROM_REGION( 0x80000, "samples", 0 ) // SS9904 + ROM_REGION( 0x80000, "samples", 0 ) // SS9904 ROM_LOAD( "new_2001_italy_2_v200.u9", 0x00000, 0x80000, CRC(9d522d04) SHA1(68f314b077a62598f3de8ef753bdedc93d6eca71) ) ROM_REGION( 0x28, "eeprom", 0 ) @@ -3226,10 +3231,11 @@ void subsino2_state::init_new2001() uint16_t *rom = (uint16_t*)memregion("maincpu")->base(); // rts -> rte - rom[0x45E8/2] = 0x5670; // IRQ 8 - rom[0x471C/2] = 0x5670; // IRQ 0 + rom[0x45e8/2] = 0x5670; // IRQ 8 + rom[0x471c/2] = 0x5670; // IRQ 0 } + /*************************************************************************** Queen Bee @@ -3240,9 +3246,9 @@ no ROM labels available ***************************************************************************/ ROM_START( queenbee ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "27c020 u21.bin", 0x00000, 0x40000, CRC(baec0241) SHA1(345cfee7bdb4f4c61caa828372a121f3917bb4eb) ) - ROM_FILL( 0x40000, 0x40000, 0xff ) + ROM_FILL( 0x40000, 0x40000, 0xff ) ROM_REGION( 0x200000, "tilemap", 0 ) ROM_LOAD32_BYTE( "27c4001 u25.bin", 0x000000, 0x80000, CRC(628ed650) SHA1(dadbc5f73f6a5773303d834a44d2eab836874cfe) ) @@ -3267,9 +3273,9 @@ void subsino2_state::init_queenbee() } ROM_START( queenbeeb ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "u21", 0x00000, 0x40000, CRC(23e0ad8f) SHA1(d913ebd249c471ab36aabe515a8b36bb3590c1ca) ) - ROM_FILL( 0x40000, 0x40000, 0xff ) + ROM_FILL( 0x40000, 0x40000, 0xff ) ROM_REGION( 0x200000, "tilemap", 0 ) // this PCB has a single surface mounted ROM, which hasn't been dumped. ROM_LOAD( "gfx", 0x000000, 0x200000, NO_DUMP ) @@ -3297,9 +3303,9 @@ void subsino2_state::init_queenbeeb() // make sure these are really queenbee ROM_START( queenbeei ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "u21 9ac9 v100", 0x00000, 0x40000, CRC(061b406f) SHA1(2a5433817e41610e9ba90302a6b9608f769176a0) ) - ROM_FILL( 0x40000, 0x40000, 0xff ) + ROM_FILL( 0x40000, 0x40000, 0xff ) ROM_REGION( 0x200000, "tilemap", 0 ) ROM_LOAD( "gfx", 0x000000, 0x200000, NO_DUMP ) @@ -3321,9 +3327,9 @@ void subsino2_state::init_queenbeei() } ROM_START( queenbeesa ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "00b0 u21 1v101", 0x00000, 0x40000, CRC(19e31fd7) SHA1(01cf507958b0411d21dd660280f45668d7c5b9d9) ) - ROM_FILL( 0x40000, 0x40000, 0xff ) + ROM_FILL( 0x40000, 0x40000, 0xff ) ROM_REGION( 0x200000, "tilemap", 0 ) ROM_LOAD( "gfx", 0x000000, 0x200000, NO_DUMP ) @@ -3336,8 +3342,6 @@ ROM_START( queenbeesa ) ROM_END - - /*************************************************************************** Humlan's Lyckohjul (Sweden, V402) @@ -3351,7 +3355,7 @@ and a 9804 (instead of 9904) for sound. ***************************************************************************/ ROM_START( humlan ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "hlj__truemax_1_v402.u21", 0x00000, 0x40000, CRC(5b4a7113) SHA1(9a9511aa79a6e90e8ac1b267e058c8696d13d84f) ) ROM_FILL( 0x40000, 0x40000, 0xff ) @@ -3361,7 +3365,7 @@ ROM_START( humlan ) ROM_LOAD32_BYTE( "hlj__truemax_5_v402.u27", 0x000001, 0x80000, CRC(28e14be8) SHA1(778906427175ca50ad5b0a7c5978c36ed29ef994) ) ROM_LOAD32_BYTE( "hlj__truemax_6_v402.u28", 0x000003, 0x80000, CRC(d1c7ae17) SHA1(3ddb8ad38eeb5ab0a944d7d26cfb890a4327ef2e) ) - ROM_REGION( 0x40000, "samples", 0 ) // SS9804 + ROM_REGION( 0x40000, "samples", 0 ) // SS9804 // clearly samples, might be different from the SS9904 case ROM_LOAD( "subsino__qb-v1.u9", 0x000000, 0x40000, CRC(c5dfed44) SHA1(3f5effb85de10c0804efee9bce769d916268bfc9) ) @@ -3374,10 +3378,47 @@ void subsino2_state::init_humlan() uint16_t *rom = (uint16_t*)memregion("maincpu")->base(); // rts -> rte - rom[0x38B4/2] = 0x5670; // IRQ 8 - rom[0x3A08/2] = 0x5670; // IRQ 0 + rom[0x38b4/2] = 0x5670; // IRQ 8 + rom[0x3a08/2] = 0x5670; // IRQ 0 +} + + +/*************************************************************************** + +X-Reel (c) 2002 Subsino & ECM + +Same PCB as bishjan and new2001, but with a 48MHz crystal + +***************************************************************************/ + +ROM_START( xreel ) + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_LOAD( "x-reel_ecm_1_v105.u21", 0x00000, 0x40000, CRC(f9307deb) SHA1(dff5e47d7bbf4ec96aba479f350c7891d97b86c8) ) + ROM_FILL( 0x40000, 0x40000, 0xff ) + + ROM_REGION( 0x200000, "tilemap", 0 ) + ROM_LOAD32_BYTE( "x-reel_ecm_3_v103.u25", 0x000000, 0x80000, CRC(00dda66e) SHA1(f87e60cbe6b328fa285f118eee3652873ef4a45f) ) + ROM_LOAD32_BYTE( "x-reel_ecm_4_v103.u26", 0x000002, 0x80000, CRC(3848d12c) SHA1(5e20c631a8d14f6b58077278bd52be0d6d416d20) ) + ROM_LOAD32_BYTE( "x-reel_ecm_5_v103.u27", 0x000001, 0x80000, CRC(f203d41f) SHA1(4e666ffbb5a3a6545c89cbb4516c2e918b5a96f2) ) + ROM_LOAD32_BYTE( "x-reel_ecm_6_v103.u28", 0x000003, 0x80000, CRC(a9c39698) SHA1(dedc366dec836ad3c43146633850a702ca46f722) ) + + ROM_REGION( 0x80000, "samples", 0 ) // SS9904 + ROM_LOAD( "subsino_qb-vi.u9", 0x000000, 0x80000, CRC(aa4edabb) SHA1(b117ad5bba2e410e20b5cbdb606688c6e2112450) ) + + ROM_REGION( 0x28, "eeprom", 0 ) + ROM_LOAD( "ds2430a.q3", 0x00, 0x28, CRC(39bbd2c5) SHA1(52eb2fa124e176650015389e7b04eddc49ce6e8e) ) +ROM_END + +void subsino2_state::init_xreel() +{ + uint16_t *rom = (uint16_t*)memregion("maincpu")->base(); + + // rts -> rte + rom[0x39b6/2] = 0x5670; // IRQ 8 + rom[0x3ac4/2] = 0x5670; // IRQ 0 } + /*************************************************************************** Super Queen Bee @@ -3388,9 +3429,9 @@ no ROM labels available ***************************************************************************/ ROM_START( squeenb ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "u21", 0x00000, 0x40000, CRC(9edc4062) SHA1(515c8e648f839c99905fd5a861688fc62a45c4ed) ) - ROM_FILL( 0x40000, 0x40000, 0xff ) + ROM_FILL( 0x40000, 0x40000, 0xff ) ROM_REGION( 0x200000, "tilemap", 0 ) ROM_LOAD32_BYTE( "u25", 0x000000, 0x80000, CRC(842c0a33) SHA1(defb79c158d5091ca8830e9f03dda382d03d51ef) ) @@ -3415,7 +3456,7 @@ void subsino2_state::init_squeenb() } ROM_START( qbeebing ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "rom 2 27c040", 0x00000, 0x80000, CRC(03ea15cd) SHA1(19d3c3dd9e0c57066a6bd854964fd6a9f43c989f) ) ROM_REGION( 0x400000, "tilemap", 0 ) @@ -3438,7 +3479,7 @@ void subsino2_state::init_qbeebing() } ROM_START( treamary ) - ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 + ROM_REGION( 0x80000, "maincpu", 0 ) // H8/3044 ROM_LOAD( "27c040_u21.bin", 0x00000, 0x80000, CRC(b9163830) SHA1(853ccba636c4ee806602ca92a61d4c53ee3108b7) ) ROM_REGION( 0x200000, "tilemap", 0 ) @@ -3521,6 +3562,7 @@ ROM_START( expcard ) ROM_LOAD( "ds2430a.bin", 0x00, 0x28, CRC(622a8862) SHA1(fae60a326e6905aefc36275d505147e1860a71d0) BAD_DUMP ) // handcrafted to pass protection check ROM_END + /*************************************************************************** Magic Train @@ -3707,6 +3749,7 @@ void subsino2_state::init_tbonusal() subsino_decrypt(memregion("program")->base() + 0x8100, sharkpy_bitswaps, sharkpy_xors, 0x7f00); } + /*************************************************************************** Sakura Love @@ -3756,6 +3799,7 @@ ROM_START( saklove ) ROM_LOAD( "ds2430a.q3", 0x00, 0x28, CRC(225136fb) SHA1(86095f7c98b579282605730de820d17ac2c8a141) ) ROM_END + /*************************************************************************** X-Plan @@ -3811,6 +3855,7 @@ ROM_START( xplan ) ROM_LOAD( "ds2430a.bin", 0x00, 0x28, CRC(ac70474d) SHA1(120362665af4ab361197795c6be51c8fed5a3506) BAD_DUMP ) // handcrafted to pass protection check ROM_END + /*************************************************************************** X-Train @@ -3866,6 +3911,7 @@ ROM_START( xtrain ) ROM_LOAD( "ds2430a.bin", 0x00, 0x28, CRC(9c5973b7) SHA1(ba79b2971cfa5d0183b1be5d54c5e7f13f0e8243) BAD_DUMP ) // handcrafted to pass protection check ROM_END + /*************************************************************************** Panda Train (Novamatic 1.7) @@ -3943,9 +3989,11 @@ ROM_END /*************************************************************************** - Treasure City - unknown hardware +Treasure City + +unknown hardware + ***************************************************************************/ ROM_START( treacity ) @@ -3981,8 +4029,6 @@ ROM_START( treacity202 ) ROM_END - - /*************************************************************************** Water-Nymph (Ver. 1.4) @@ -4026,43 +4072,46 @@ void subsino2_state::init_wtrnymph() subsino_decrypt(memregion("program")->base() + 0x8100, victor5_bitswaps, victor5_xors, 0x7f00); } -GAME( 1997, mtrain, 0, mtrain, mtrain, subsino2_state, init_mtrain, ROT0, "Subsino", "Magic Train (Ver. 1.4)", 0 ) // inside the program ROM says 1997, but on screen shows 1996 -GAME( 1996, mtraina, mtrain, mtrain, mtrain, subsino2_state, init_mtrain, ROT0, "Subsino", "Magic Train (Ver. 1.31)", 0 ) -GAME( 1996, strain, 0, mtrain, strain, subsino2_state, init_mtrain, ROT0, "Subsino", "Super Train (Ver. 1.9)", MACHINE_NOT_WORKING ) +GAME( 1997, mtrain, 0, mtrain, mtrain, subsino2_state, init_mtrain, ROT0, "Subsino", "Magic Train (Ver. 1.4)", 0 ) // inside the program ROM says 1997, but on screen shows 1996 +GAME( 1996, mtraina, mtrain, mtrain, mtrain, subsino2_state, init_mtrain, ROT0, "Subsino", "Magic Train (Ver. 1.31)", 0 ) + +GAME( 1996, strain, 0, mtrain, strain, subsino2_state, init_mtrain, ROT0, "Subsino", "Super Train (Ver. 1.9)", MACHINE_NOT_WORKING ) + +GAME( 1995, tbonusal, 0, tbonusal, tbonusal, subsino2_state, init_tbonusal, ROT0, "Subsino (American Alpha license)", "Treasure Bonus (American Alpha, Ver. 1.6)", MACHINE_NOT_WORKING ) -GAME( 1995, tbonusal, 0, tbonusal, tbonusal, subsino2_state, init_tbonusal, ROT0, "Subsino (American Alpha license)", "Treasure Bonus (American Alpha, Ver. 1.6)", MACHINE_NOT_WORKING ) +GAME( 1996, wtrnymph, 0, mtrain, wtrnymph, subsino2_state, init_wtrnymph, ROT0, "Subsino", "Water-Nymph (Ver. 1.4)", 0 ) -GAME( 1996, wtrnymph, 0, mtrain, wtrnymph, subsino2_state, init_wtrnymph, ROT0, "Subsino", "Water-Nymph (Ver. 1.4)", 0 ) +GAME( 1998, expcard, 0, expcard, expcard, subsino2_state, empty_init, ROT0, "Subsino (American Alpha license)", "Express Card / Top Card (Ver. 1.5)", 0 ) -GAME( 1998, expcard, 0, expcard, expcard, subsino2_state, empty_init, ROT0, "Subsino (American Alpha license)", "Express Card / Top Card (Ver. 1.5)", 0 ) +GAME( 1998, saklove, 0, saklove, saklove, subsino2_state, empty_init, ROT0, "Subsino", "Ying Hua Lian 2.0 (China, Ver. 1.02)", 0 ) -GAME( 1998, saklove, 0, saklove, saklove, subsino2_state, empty_init, ROT0, "Subsino", "Ying Hua Lian 2.0 (China, Ver. 1.02)", 0 ) +GAME( 1999, xtrain, 0, xtrain, xtrain, subsino2_state, empty_init, ROT0, "Subsino", "X-Train (Ver. 1.3)", 0 ) -GAME( 1999, xtrain, 0, xtrain, xtrain, subsino2_state, empty_init, ROT0, "Subsino", "X-Train (Ver. 1.3)", 0 ) +GAME( 1999, ptrain, 0, ptrain, ptrain, subsino2_state, empty_init, ROT0, "Subsino", "Panda Train (Novamatic 1.7)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1999, ptraina, ptrain, ptrain, ptrain, subsino2_state, empty_init, ROT0, "Subsino", "Panda Train (Ver. 1.3)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1999, ptrain, 0, ptrain, ptrain, subsino2_state, empty_init, ROT0, "Subsino", "Panda Train (Novamatic 1.7)", MACHINE_IMPERFECT_GRAPHICS ) -GAME( 1999, ptraina, ptrain, ptrain, ptrain, subsino2_state, empty_init, ROT0, "Subsino", "Panda Train (Ver. 1.3)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1997, treacity, 0, saklove, treacity, subsino2_state, empty_init, ROT0, "Subsino (American Alpha license)", "Treasure City (Ver. 208)", MACHINE_NOT_WORKING ) +GAME( 1997, treacity202, treacity, saklove, treacity, subsino2_state, empty_init, ROT0, "Subsino (American Alpha license)", "Treasure City (Ver. 202)", MACHINE_NOT_WORKING ) -GAME( 1997, treacity, 0, saklove, treacity, subsino2_state, empty_init, ROT0, "Subsino (American Alpha license)", "Treasure City (Ver. 208)", MACHINE_NOT_WORKING ) -GAME( 1997, treacity202, treacity,saklove, treacity, subsino2_state, empty_init, ROT0, "Subsino (American Alpha license)", "Treasure City (Ver. 202)", MACHINE_NOT_WORKING ) +GAME( 1999, bishjan, 0, bishjan, bishjan, subsino2_state, init_bishjan, ROT0, "Subsino", "Bishou Jan (Japan, Ver. 203)", MACHINE_NO_SOUND ) +GAME( 1999, xiaoao, bishjan, xiaoao, bishjan, subsino2_state, init_xiaoao, ROT0, "Subsino", "Xiao Ao Jiang Hu (China, Ver. 1.00)", MACHINE_NO_SOUND ) -GAME( 1999, bishjan, 0, bishjan, bishjan, subsino2_state, init_bishjan, ROT0, "Subsino", "Bishou Jan (Japan, Ver. 203)", MACHINE_NO_SOUND ) -GAME( 1999, xiaoao, bishjan, xiaoao, bishjan, subsino2_state, init_xiaoao, ROT0, "Subsino", "Xiao Ao Jiang Hu (China, Ver. 1.00)", MACHINE_NO_SOUND ) +GAME( 2000, new2001, 0, new2001, new2001, subsino2_state, init_new2001, ROT0, "Subsino", "New 2001 (Italy, Ver. 200N)", MACHINE_NO_SOUND ) -GAME( 2000, new2001, 0, new2001, new2001, subsino2_state, init_new2001, ROT0, "Subsino", "New 2001 (Italy, Ver. 200N)", MACHINE_NO_SOUND ) +GAME( 2006, xplan, 0, xplan, xplan, subsino2_state, empty_init, ROT0, "Subsino", "X-Plan (Ver. 101)", MACHINE_NOT_WORKING ) -GAME( 2006, xplan, 0, xplan, xplan, subsino2_state, empty_init, ROT0, "Subsino", "X-Plan (Ver. 101)", MACHINE_NOT_WORKING ) +GAME( 2001, queenbee, 0, humlan, queenbee, subsino2_state, init_queenbee, ROT0, "Subsino (American Alpha license)", "Queen Bee (Ver. 114)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues +GAME( 2001, queenbeeb, queenbee, humlan, queenbee, subsino2_state, init_queenbeeb, ROT0, "Subsino", "Queen Bee (Brazil, Ver. 202)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues, only program ROM available +GAME( 2001, queenbeei, queenbee, humlan, queenbee, subsino2_state, init_queenbeei, ROT0, "Subsino", "Queen Bee (Israel, Ver. 100)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues, only program ROM available +GAME( 2001, queenbeesa, queenbee, humlan, queenbee, subsino2_state, init_queenbeeb, ROT0, "Subsino", "Queen Bee (SA-101-HARD)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues, only program ROM available -GAME( 2001, queenbee, 0, humlan, queenbee, subsino2_state, init_queenbee, ROT0, "Subsino (American Alpha license)", "Queen Bee (Ver. 114)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues -GAME( 2001, queenbeeb,queenbee, humlan, queenbee, subsino2_state, init_queenbeeb,ROT0, "Subsino", "Queen Bee (Brazil, Ver. 202)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues, only program ROM available -GAME( 2001, queenbeei,queenbee, humlan, queenbee, subsino2_state, init_queenbeei,ROT0, "Subsino", "Queen Bee (Israel, Ver. 100)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues, only program ROM available -GAME( 2001, queenbeesa,queenbee,humlan, queenbee, subsino2_state, init_queenbeeb,ROT0, "Subsino", "Queen Bee (SA-101-HARD)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues, only program ROM available +GAME( 2001, humlan, queenbee, humlan, humlan, subsino2_state, init_humlan, ROT0, "Subsino (Truemax license)", "Humlan's Lyckohjul (Sweden, Ver. 402)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues -GAME( 2001, humlan, queenbee, humlan, humlan, subsino2_state, init_humlan, ROT0, "Subsino (Truemax license)", "Humlan's Lyckohjul (Sweden, Ver. 402)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues +GAME( 2002, xreel, queenbee, humlan, humlan, subsino2_state, init_xreel, ROT0, "Subsino (ECM license)", "X-Reel", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues -GAME( 2002, squeenb, 0, humlan, humlan, subsino2_state, init_squeenb, ROT0, "Subsino", "Super Queen Bee (Ver. 101)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues +GAME( 2002, squeenb, 0, humlan, humlan, subsino2_state, init_squeenb, ROT0, "Subsino", "Super Queen Bee (Ver. 101)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // severe timing issues -GAME( 2003, qbeebing, 0, humlan, humlan, subsino2_state, init_qbeebing, ROT0, "Subsino", "Queen Bee Bingo", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 2003, qbeebing, 0, humlan, humlan, subsino2_state, init_qbeebing, ROT0, "Subsino", "Queen Bee Bingo", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) -GAME( 200?, treamary, 0, bishjan, bishjan, subsino2_state, init_treamary, ROT0, "Subsino", "Treasure Mary", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 200?, treamary, 0, bishjan, bishjan, subsino2_state, init_treamary, ROT0, "Subsino", "Treasure Mary", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/taito/taito_z.cpp b/src/mame/taito/taito_z.cpp index b1edfb46503..33d37b1e36e 100644 --- a/src/mame/taito/taito_z.cpp +++ b/src/mame/taito/taito_z.cpp @@ -2711,6 +2711,10 @@ static INPUT_PORTS_START( nghtstru ) TAITO_COINAGE_US_LOC(SW A) INPUT_PORTS_END +// default all off but Cabinet: Upright according to Jp manual. +// jp manual also shows a Yoke-like analog test mode, and demo sounds with reversed meaning, +// (off position -> with sounds), undumped revision? +// NOTE: setting to Cockpit dip doesn't seem to do anything compared to Upright. static INPUT_PORTS_START( aquajack ) PORT_START("DSWA") PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW A:1") @@ -2778,8 +2782,8 @@ static INPUT_PORTS_START( aquajack ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) - PORT_START("IN2") /* what is it ??? */ - PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1) + PORT_START("IN2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN ) INPUT_PORTS_END static INPUT_PORTS_START( aquajckj ) diff --git a/src/mame/tch/littlerb.cpp b/src/mame/tch/littlerb.cpp index a50c37fa932..654a31aa56b 100644 --- a/src/mame/tch/littlerb.cpp +++ b/src/mame/tch/littlerb.cpp @@ -105,9 +105,6 @@ Dip sw.2 namespace { -#define littlerb_printf logerror -#define littlerb_alt_printf logerror - class littlerb_state : public driver_device { public: diff --git a/src/mame/tch/rltennis.cpp b/src/mame/tch/rltennis.cpp index 7f09307a260..0899f86d224 100644 --- a/src/mame/tch/rltennis.cpp +++ b/src/mame/tch/rltennis.cpp @@ -1,6 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Tomasz Slanina -/**************************************************************************************** +/************************************************************************************************** Reality Tennis - (c) 1993 TCH driver by Tomasz Slanina @@ -55,11 +55,13 @@ player - when there's nothing to play - first, empty 2k of ROMs are selected. TODO: - proper timing and interrupts (remove extra hacky blitter int generation @ vblank) - fix various gfx glitches here and there, mostly related to wrong size of data - (what's the correct size? based on src or dest rectangle ? is there some kind of zoom? or just rect clipping?) + (what's the correct size? based on src or dest rectangle ? is there some kind of zoom? + or just rect clipping?) - what the 70000a blitter reg is for ? +- awfully similar to littlerb; -****************************************************************************************/ +**************************************************************************************************/ #include "emu.h" #include "rltennis.h" @@ -73,7 +75,6 @@ player - when there's nothing to play - first, empty 2k of ROMs are selected. #define RLT_REFRESH_RATE 60 #define RLT_TIMER_FREQ (RLT_REFRESH_RATE*256) -#define RLT_XTAL XTAL(32'000'000) uint16_t rltennis_state::io_r() { @@ -182,7 +183,7 @@ void rltennis_state::ramdac_map(address_map &map) void rltennis_state::rltennis(machine_config &config) { - M68000(config, m_maincpu, RLT_XTAL/8); // MC68000P8, divider is a guess + M68000(config, m_maincpu, XTAL(32'000'000) / 4); // MC68000P8, divider is a guess m_maincpu->set_addrmap(AS_PROGRAM, &rltennis_state::rltennis_main); m_maincpu->set_vblank_int("screen", FUNC(rltennis_state::interrupt)); @@ -264,5 +265,5 @@ ROM_START( rltennisa ) ROM_LOAD( "gal22v10.ic2", 0x117, 0x2e5, CRC(b5a7cb92) SHA1(05d6e8c8208ac486e849de3322f049bcd38561e1) ) ROM_END -GAME( 1993, rltennis, 0, rltennis, rltennis, rltennis_state, empty_init, ROT0, "TCH", "Reality Tennis (set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) -GAME( 1993, rltennisa, rltennis, rltennis, rltennis, rltennis_state, empty_init, ROT0, "TCH", "Reality Tennis (set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) +GAME( 1993, rltennis, 0, rltennis, rltennis, rltennis_state, empty_init, ROT0, "TCH", "Reality Tennis (set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING | MACHINE_SUPPORTS_SAVE ) +GAME( 1993, rltennisa, rltennis, rltennis, rltennis, rltennis_state, empty_init, ROT0, "TCH", "Reality Tennis (set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_TIMING | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/tch/wheelfir.cpp b/src/mame/tch/wheelfir.cpp index 49906a4bf7c..c337e9714c9 100644 --- a/src/mame/tch/wheelfir.cpp +++ b/src/mame/tch/wheelfir.cpp @@ -61,79 +61,6 @@ level 3 interrupt = vblank interrupt level 1 interrupt = blitter interrupt -Blitter data foramt ( offset in words, offset in bytes, offset inside ram data table ) - - - fedcba9876543210 - -0 0 0 - --------76543210 dest_x0 bits 0-7 - 76543210-------- src_x0 bits 0-7 - -1 2 2 - --------76543210 dest_x1 bits 0-7 - - - -2 4 4 - --------76543210 dest_y0 bits 0-7 - 76543210-------- src_y0 bits 0-7 -3 6 6 - --------76543210 dest_y1 bits 0-7 - -4 8 -5 a -6 c 8 - ??------???????? image flags (directly copied from image info table, page and ?) - --3210---------- image page - -------8-------- src_x0 bit 8 - ------8--------- src_y0 bit 8 -7 e a - ????????--?----- flags - ---------------X X direction (src?) - --------------Y- Y direction (src?) - ---------8------ dest_x0 bit 8 - --------8------- dest_y0 bit 8 - -----------L---- dest layer - ------------??-- unknown bits, set usually when rendering target = bitmap layer - - -8 10 c - -------5-------- x scale data1 bit 5 - ------5--------- y scale data1 bit 5 - -----5---------- x scale data2 bit 5 - ----5----------- y scala data2 bit 5 - ---D------------ x scale >200% - --D------------- y scale >200% - -x-------------- X direction (dest?) - Y--------------- Y direction (dest?) - ---------8------ scroll x bit 8 - --------8------- scroll y bit 8 - ----------?----- set for road ? buffer num (is there double buffering ? or two bitmap layers?) - -9 12 e - ---------------H x scale < 50% - --------------H- y scale < 50% - -------------8-- dest_x1 bit 8 - ------------8--- dest_y1 bit 8 - - -a 14 10 - ---43210-------- x scale data1 bits 0-4 - -4-------------- y scale data1 bit 4 - --------76543210 scroll x of bitmap layer - -b 16 12 - ---43210-------- x scale data2 bits 0-4 - 10-------------- y scale data1 bits 0-1 - --------76543210 scroll y of bitmap layer -c 18 14 - ---43210-------- y scale data2 bits 0-4 - 32-------------- y scale data1 bits 2-3 -d 1a -e 1c -f 1e - @@ -181,31 +108,28 @@ BIT N - ( scale < 50% ) ? 1 : 0 namespace { -static const int ZOOM_TABLE_SIZE=1<<14; -static const int NUM_SCANLINES=256-8; -static const int NUM_VBLANK_LINES=8; -static const int LAYER_BG=0; -static const int LAYER_FG=1; -static const int NUM_COLORS=256; - -struct scroll_info -{ - int32_t x = 0, y = 0, unkbits = 0; -}; - +static const int ZOOM_TABLE_SIZE = 1 << 14; +static const int NUM_SCANLINES = 256 - 8; +static const int NUM_VBLANK_LINES = 64; // unknown, too low and sprites at top of screen on power ball flicker +static const int LAYER_BG = 0; +static const int LAYER_FG = 1; +static const int NUM_COLORS = 256; class wheelfir_state : public driver_device { public: - wheelfir_state(const machine_config &mconfig, device_type type, const char *tag) - : driver_device(mconfig, type, tag), + wheelfir_state(const machine_config &mconfig, device_type type, const char* tag) : + driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_subcpu(*this, "subcpu"), m_eeprom(*this, "eeprom"), m_screen(*this, "screen"), m_palette(*this, "palette"), + m_blitter_data(*this, "blitram"), + m_tilepages(*this, "gfx1"), + m_maincpurom(*this, "maincpu"), m_adc_eoc(0), - m_is_pwball(false), + m_force_extra_irq1(false), m_disable_raster_irq(false) { } @@ -229,9 +153,9 @@ class wheelfir_state : public driver_device required_device m_palette; std::unique_ptr m_zoom_table; - std::unique_ptr m_blitter_data; - - std::unique_ptr m_scanlines; + required_shared_ptr m_blitter_data; + required_region_ptr m_tilepages; + required_region_ptr m_maincpurom; int32_t m_direct_write_x0 = 0; int32_t m_direct_write_x1 = 0; @@ -241,14 +165,13 @@ class wheelfir_state : public driver_device int16_t m_scanline_cnt = 0; - std::unique_ptr m_tmp_bitmap[2]{}; int32_t get_scale(int32_t index) { - while(index=0) + if (m_zoom_table[index] >= 0) { return m_zoom_table[index]; } @@ -257,12 +180,14 @@ class wheelfir_state : public driver_device return 0; } void wheelfir_scanline_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); + void do_direct_write(uint8_t sixdat); + void do_blit(); void wheelfir_blit_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); void wheelfir_7c0000_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint16_t wheelfir_7c0000_r(offs_t offset, uint16_t mem_mask = ~0); void coin_cnt_w(uint16_t data); void adc_eoc_w(int state); - uint32_t screen_update_wheelfir(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + uint32_t screen_update_wheelfir(screen_device &screen, bitmap_ind16& bitmap, const rectangle &cliprect); void screen_vblank_wheelfir(int state); TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer_callback); void ramdac_map(address_map &map); @@ -270,231 +195,247 @@ class wheelfir_state : public driver_device void wheelfir_sub(address_map &map); int m_adc_eoc; - bool m_is_pwball; + bool m_force_extra_irq1; bool m_disable_raster_irq; -}; + int m_current_yscroll; +}; void wheelfir_state::wheelfir_scanline_cnt_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&m_scanline_cnt); + //logerror("%d: set scanline counter to %d\n", machine().describe_context(), m_scanline_cnt); } - -void wheelfir_state::wheelfir_blit_w(offs_t offset, uint16_t data, uint16_t mem_mask) +void wheelfir_state::do_blit() { - COMBINE_DATA(&m_blitter_data[offset]); + // blitter irq? should be timed? + m_maincpu->set_input_line(1, HOLD_LINE); - if(!ACCESSING_BITS_8_15 && offset==0x6) //LSB only! - { - int direct_width=m_direct_write_x1-m_direct_write_x0+1; - int direct_height=m_direct_write_y1-m_direct_write_y0+1; + uint8_t const* const rom = m_tilepages; - int sixdat = data&0xff; + const int src_u0 = (m_blitter_data[0] >> 8) + ((m_blitter_data[6] & 0x100) ? 256 : 0); + const int src_v0 = (m_blitter_data[2] >> 8) + ((m_blitter_data[6] & 0x200) ? 256 : 0); - if(direct_width>0 && direct_height>0) - { - int x = m_direct_write_idx % direct_width; - int y = (m_direct_write_idx / direct_width) % direct_height; + int dst_x0 = (m_blitter_data[0] & 0xff) + ((m_blitter_data[7] & 0x40) ? 256 : 0); + int dst_y0 = (m_blitter_data[2] & 0xff) + ((m_blitter_data[7] & 0x80) ? 256 : 0); - x+=m_direct_write_x0; - y+=m_direct_write_y0; + int dst_x1 = (m_blitter_data[1] & 0xff) + ((m_blitter_data[9] & 4) ? 256 : 0); + int dst_y1 = (m_blitter_data[3] & 0xff) + ((m_blitter_data[9] & 8) ? 256 : 0); - if(x<512 && y <512) - { - m_tmp_bitmap[LAYER_BG]->pix(y, x) = sixdat; - } - } + const bool flipx = (m_blitter_data[7] & 0x1); + const bool flipy = (m_blitter_data[7] & 0x2); - ++m_direct_write_idx; + const int x_dst_step = flipx ? 1 : -1; + const int y_dst_step = flipy ? 1 : -1; - return; - } + const int u_src_step = (m_blitter_data[8] & 0x4000) ? 1 : -1; + const int v_src_step = (m_blitter_data[8] & 0x8000) ? 1 : -1; - if(offset==0xf && data==0xffff) - { - m_maincpu->set_input_line(1, HOLD_LINE); + const int page = ((m_blitter_data[6]) >> 10) * 0x40000; - uint8_t const *const rom = memregion("gfx1")->base(); + if (page >= 0x700000) /* src set to unav. page before direct write to the framebuffer */ + { + logerror("%s: page set to above ROM %08x - direct write enable?\n", machine().describe_context(), page); + // wheelfir sets 0xfc0000 and 0xf00000, both of which are out of range of any GFX ROM + // kongball sets 0xfc0000 but only on startup + m_direct_write_x0 = dst_x0; + m_direct_write_x1 = dst_x1; + m_direct_write_y0 = dst_y0; + m_direct_write_y1 = dst_y1; + m_direct_write_idx = 0; + } - int width = m_screen->width(); - int height = m_screen->height(); + if (flipy) + dst_y0 -= 1; + else + dst_y0 += 1; - int src_x0=(m_blitter_data[0]>>8)+((m_blitter_data[6]&0x100)?256:0); - int src_y0=(m_blitter_data[2]>>8)+((m_blitter_data[6]&0x200)?256:0); + if (flipy) + dst_y1 += 1; + else + dst_y1 -= 1; - int dst_x0=(m_blitter_data[0]&0xff)+((m_blitter_data[7]&0x40)?256:0); - int dst_y0=(m_blitter_data[2]&0xff)+((m_blitter_data[7]&0x80)?256:0); + dst_x0 &= 0x1ff; + dst_x1 &= 0x1ff; + dst_y0 &= 0x1ff; + dst_y1 &= 0x1ff; - int dst_x1=(m_blitter_data[1]&0xff)+((m_blitter_data[9]&4)?256:0); - int dst_y1=(m_blitter_data[3]&0xff)+((m_blitter_data[9]&8)?256:0); + int vpage = (m_blitter_data[0x7] & 0x10) ? LAYER_BG : LAYER_FG; - int x_dst_step=(m_blitter_data[7]&0x1)?1:-1; - int y_dst_step=(m_blitter_data[7]&0x2)?1:-1; - int x_src_step=(m_blitter_data[8]&0x4000)?1:-1; - int y_src_step=(m_blitter_data[8]&0x8000)?1:-1; + // ?? prevents some sprite flickering in pwball and wheelfir + if (vpage == LAYER_FG) + { + dst_y0 &= 0xff; + dst_y1 &= 0xff; + } - int page=((m_blitter_data[6])>>10)*0x40000; + float scale_u_step; + float scale_v_step; + + // calculate u zoom (horizontal source scale) + const int d1u = ((m_blitter_data[0x0a] & 0x1f00) >> 8) | + ((m_blitter_data[0x08] & 0x0100) >> 3); + const int d2u = ((m_blitter_data[0x0b] & 0x1f00) >> 8) | + ((m_blitter_data[0x08] & 0x0400) >> 5); + const int hflagu = (m_blitter_data[0x09] & 0x0001) ? 1 : 0; + const int dflagu = (m_blitter_data[0x08] & 0x1000) ? 1 : 0; + const int indexu = d1u | (d2u << 6) | (hflagu << 12) | (dflagu << 13); + const float scale_u = get_scale(indexu); + + // calculate v zoom (vertical source scale) + const int d1v = ((m_blitter_data[0x0b] & 0xc000) >> 14) | + ((m_blitter_data[0x0c] & 0xc000) >> 12) | + ((m_blitter_data[0x0a] & 0x4000) >> 10) | + ((m_blitter_data[0x08] & 0x0200) >> 4); + + const int d2v = ((m_blitter_data[0x0c] & 0x1f00) >> 8) | + ((m_blitter_data[0x08] & 0x0800) >> 6); + const int hflagv = (m_blitter_data[0x09] & 0x0002) ? 1 : 0; + const int dflagv = (m_blitter_data[0x08] & 0x2000) ? 1 : 0; + const int indexv = d1v | (d2v << 6) | (hflagv << 12) | (dflagv << 13); + const float scale_v = get_scale(indexv); + + if (scale_u == 0 || scale_v == 0) return; + + scale_u_step = 100.f / scale_u; + scale_v_step = 100.f / scale_v; + + + // do the draw + int y = dst_y0; + float idx_v = 0; + do + { + int x = dst_x0; + float idx_u = 0; + int yy = src_v0 + v_src_step * idx_v; - if (!m_is_pwball) + do { - if (page >= 0x400000) /* src set to unav. page before direct write to the framebuffer */ - { - m_direct_write_x0 = dst_x0; - m_direct_write_x1 = dst_x1; - m_direct_write_y0 = dst_y0; - m_direct_write_y1 = dst_y1; - m_direct_write_idx = 0; - } - } + int xx = src_u0 + u_src_step * idx_u; - if(x_dst_step<0) - { - if(dst_x0<=dst_x1) - { - return; - } + int address = page + yy * 512 + xx; - } - else - { - if(dst_x0>=dst_x1) - { - return; - } + int pix = rom[address & (0x1000000 - 1)]; - } - - if(y_dst_step<0) - { - if(dst_y0<=dst_y1) - { - return; - } - } - else - { - if(dst_y0>=dst_y1) + if (pix && x >= 0 && y >= 0 && x < 512 && y < 512) { - return; + m_tmp_bitmap[vpage]->pix(y, x) = pix; } - } - - - //additional checks - - int d1, d2, hflag, dflag, index; - - d1=((m_blitter_data[0x0a]&0x1f00)>>8); - - d2=((m_blitter_data[0x0b]&0x1f00)>>8); - + x += x_dst_step; + x &= 0x1ff; + idx_u += scale_u_step; - d1|=((m_blitter_data[0x8]&0x100)>>3); - d2|=((m_blitter_data[0x8]&0x400)>>5); - hflag=(m_blitter_data[0x9]&0x1)?1:0; - dflag=(m_blitter_data[0x8]&0x1000)?1:0; - index=d1|(d2<<6)|(hflag<<12)|(dflag<<13); + } while (x != dst_x1); - const float scale_x=get_scale(index); + y += y_dst_step; + y &= 0x1ff; + idx_v += scale_v_step; + } while (y != dst_y1); +} - d1=((m_blitter_data[0x0b]&0xc000)>>14) | - ((m_blitter_data[0x0c]&0xc000)>>12) | - ((m_blitter_data[0x0a]&0x4000)>>10); - - d2=((m_blitter_data[0x0c]&0x1f00)>>8); - - - d1|=((m_blitter_data[0x8]&0x200)>>4); - d2|=((m_blitter_data[0x8]&0x800)>>6); - - hflag=(m_blitter_data[0x9]&0x2)?1:0; - dflag=(m_blitter_data[0x8]&0x2000)?1:0; - index=d1|(d2<<6)|(hflag<<12)|(dflag<<13); +void wheelfir_state::do_direct_write(uint8_t sixdat) +{ + const int direct_width = m_direct_write_x1 - m_direct_write_x0 + 1; + const int direct_height = m_direct_write_y1 - m_direct_write_y0 + 1; - const float scale_y=get_scale(index); + if (direct_width > 0 && direct_height > 0) + { + int x = m_direct_write_idx % direct_width; + int y = (m_direct_write_idx / direct_width) % direct_height; + x += m_direct_write_x0; + y += m_direct_write_y0; - if(scale_x==0 || scale_y==0) return; + if (x < 512 && y < 512) + { + m_tmp_bitmap[LAYER_BG]->pix(y, x) = sixdat; + } + } + ++m_direct_write_idx; +} - float scale_x_step = 100.f / scale_x; - float scale_y_step = 100.f / scale_y; +void wheelfir_state::wheelfir_blit_w(offs_t offset, uint16_t data, uint16_t mem_mask) +{ + /* + Blitter data format ( offset in words, offset in bytes ) + + 0 0 uuuuuuuu u = src_u0 bits 0-7 + 1 xxxxxxxx x = dest_x0 bits 0-7 + 1 2 -------- + 3 XXXXXXXX X = dest_x1 bits 0-7 + 2 4 vvvvvvvv v = src_v0 bits 0-7 + 5 yyyyyyyy y = dest_y0 bits 0-7 + 3 6 -------- + 7 YYYYYYYY Y = dest_y1 bits 0-7 + 4 8 -------- + 9 -------- + 5 a -------- + b -------- + 6 c --ppppvu p = page, v = src_v0 bit 8, u = src_u0 bit 8 + d DDDDDDDD D = direct bitmap/framebuffer write port + 7 e -------- + f yx-L??ff y = dest_y0 bit 8 , x = dest_x0 bit 8 , L = dest layer, ?? = used but unknown, ff = Y/X direction (src?) + 8 10 FFZzZzZz FF = Y direction/X direction (dest), Z = y scale >200% z = x scale >200%, Z = y scale data2 bit 5, z = x scale data2 bit 5, Z = y scale data1 bit 5, z = x scale data1 bit 5 + 11 Ss?----- s = scroll x of back layer bit 8, S = scroll y of back layer bit 8, ? = set on road + 9 12 -------- + 13 ----YXZz Y = dest_y1 bit 8, X = dest_x1 bit 8, Z = y scale < 50%, z = x scale < 50% + a 14 -Z-zzzzz Z = y scale data1 bit 4, z = x scale data1 bits 0-4, + 15 ssssssss s = scroll x of back layer + b 16 ZZ-zzzzz Z = y scale data1 bits 0-1, z = x scale data2 bits 0-4 + 17 SSSSSSSS S = scroll y of back layer + c 18 ZZ-ZZZZZ Z = y scale data1 bits 2-3, Z = y scale data2 bits 0-4 + 19 -------- + d 1a -------- + 1b -------- + e 1c -------- + 1d -------- + f 1e TTTTTTTT + 1f TTTTTTTT T = start blit / trigger blit (with write of 0xffff, also writes 0x0000 before filling in some params) + */ + + m_screen->update_partial(m_screen->vpos() - 1); + //uint16_t oldval = m_blitter_data[offset]; + COMBINE_DATA(&m_blitter_data[offset]); - if (m_is_pwball) + if (offset == 0x6) + { + if (!ACCESSING_BITS_8_15) //LSB only! { - scale_x_step = 1.0f; - scale_y_step = 1.0f; + do_direct_write(data & 0xff); + return; } + } - int vpage=LAYER_FG; - if(m_blitter_data[0x7]&0x10) + if (offset == 0xa) + { + if (!ACCESSING_BITS_8_15) //LSB only! { - vpage=LAYER_BG; -/* - printf("%s bg -> %d %d %d %d %d %d @ %x\n",machine().describe_context().c_str(), dst_x0,dst_y0, dst_x1,dst_y1, dst_x1-dst_x0, dst_y1-dst_y0); - - for(int i=0;i<16;++i) - { - printf("%x = %.4x\n",i,m_blitter_data[i]); - } - - printf("\n"); -*/ + // if the scroll value is written during the active frame, it must take into account + // the current yposition?? (seems to be the only way for wheelfir rasters to work?) + m_current_yscroll = (m_blitter_data[0xb] & 0x00ff) | (m_blitter_data[0x8] & 0x0080) << 1; + m_current_yscroll -= m_screen->vpos(); + return; } + } - bool endx=false; - bool endy=false; - if(m_blitter_data[0x7]&0x0c) + if (offset == 0xf) + { + if (data == 0xffff) { - //??? + do_blit(); } - - float idx_x = 0; - for(int x=dst_x0; !endx; x+=x_dst_step, idx_x+=scale_x_step) + else { - endy=false; - float idx_y = 0; - for(int y=dst_y0; !endy; y+=y_dst_step, idx_y+=scale_y_step) - { - endx=(x==(dst_x1+1)); - endy=(y==(dst_y1+1)); - - - int xx=src_x0+x_src_step*idx_x; - int yy=src_y0+y_src_step*idx_y; - - int address=page+yy*512+xx; - - int pix = rom[address&(0x1000000-1)]; - - int screen_x=x; - int screen_y=y; - - - if ((page>=0x400000) && (!m_is_pwball)) - { - //hack for clear - if(screen_x >0 && screen_y >0 && screen_x < width && screen_y pix(screen_y , screen_x ) =0; - } - } - - { - if (vpage == LAYER_FG) screen_y&=0xff; - - if(pix && screen_x >0 && screen_y >0 && screen_x < width && screen_y pix(screen_y, screen_x) = pix; - } - } - } + // writes 0x0000 before filling in some of the other params then sending 0xffff above + logerror("%s: write to offset 0xf (blit start) but with data %04x\n", machine().describe_context(), data); } } } @@ -509,23 +450,25 @@ uint32_t wheelfir_state::screen_update_wheelfir(screen_device &screen, bitmap_in { bitmap.fill(0, cliprect); - for(int y=cliprect.min_y; y < cliprect.max_y; y++) + for (int y = cliprect.min_y; y <= cliprect.max_y; y++) { - uint16_t const *const source = &m_tmp_bitmap[LAYER_BG]->pix(( (m_scanlines[y].y)&511)); - uint16_t *const dest = &bitmap.pix(y); + int scrolly = y; + scrolly += m_current_yscroll;// + scrolly &= 0x1ff; + uint16_t const* const source = &m_tmp_bitmap[LAYER_BG]->pix(scrolly); + uint16_t* const dest = &bitmap.pix(y); - for (int x = cliprect.min_x; x < cliprect.max_x; x++) + for (int x = cliprect.min_x; x <= cliprect.max_x; x++) { - dest[x] = source[(x + m_scanlines[y].x) & 511]; + int sourcex = x; + sourcex += (m_blitter_data[0xa] & 0x00ff) | (m_blitter_data[0x8] & 0x0040) << 2; + sourcex &= 0x1ff; + dest[x] = source[sourcex]; } } copybitmap_trans(bitmap, *m_tmp_bitmap[LAYER_FG], 0, 0, 0, 0, cliprect, 0); -/* - m_tmp_bitmap[LAYER_BG]->fill(0, screen.visible_area()); -*/ - return 0; } @@ -536,6 +479,9 @@ void wheelfir_state::screen_vblank_wheelfir(int state) { m_tmp_bitmap[LAYER_FG]->fill(0, m_screen->visible_area()); } + else + { + } } @@ -587,9 +533,9 @@ void wheelfir_state::coin_cnt_w(uint16_t data) void wheelfir_state::wheelfir_main(address_map &map) { map(0x000000, 0x0fffff).rom(); - map(0x200000, 0x20ffff).ram(); + map(0x200000, 0x20ffff).ram().mirror(0x010000); // kongball either needs the mirror (or has more ram?) - map(0x700000, 0x70001f).w(FUNC(wheelfir_state::wheelfir_blit_w)); + map(0x700000, 0x70001f).w(FUNC(wheelfir_state::wheelfir_blit_w)).share(m_blitter_data); map(0x720001, 0x720001).w("ramdac", FUNC(ramdac_device::index_w)); map(0x720003, 0x720003).w("ramdac", FUNC(ramdac_device::pal_w)); map(0x720005, 0x720005).w("ramdac", FUNC(ramdac_device::mask_w)); // word write? @@ -676,35 +622,52 @@ void wheelfir_state::adc_eoc_w(int state) TIMER_DEVICE_CALLBACK_MEMBER(wheelfir_state::scanline_timer_callback) { - if(param 0) { - m_maincpu->set_input_line(5, HOLD_LINE); // raster IRQ, changes scroll values for road + m_scanline_cnt--; + + if (m_scanline_cnt == 0) + { + if (!m_disable_raster_irq) + { + m_maincpu->set_input_line(5, HOLD_LINE); + } + } } - //m_screen->update_partial(param); - if ((param == 0) && m_is_pwball) + if ((param == 224) && m_force_extra_irq1) { + // why, this is the blitter irq? + // pwball and radendur won't boot otherwise though m_maincpu->set_input_line(1, HOLD_LINE); } } else { - if(param==NUM_SCANLINES) /* vblank */ + if (param == NUM_SCANLINES) /* vblank */ { m_maincpu->set_input_line(3, HOLD_LINE); } @@ -713,36 +676,81 @@ TIMER_DEVICE_CALLBACK_MEMBER(wheelfir_state::scanline_timer_callback) m_subcpu->set_input_line(1, HOLD_LINE); } +// see code below that is used to calculate this for wheelfir set +// as the other game ROMs are structured differently it's easier +// to just have this table here; the zooming code could be significantly +// refactored however +static const uint16_t zoom_index[400] = +{ + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1801, 0x1ea1, 0x1ba1, 0x1f61, 0x19e1, + 0x19a1, 0x1961, 0x1961, 0x1921, 0x1fe2, 0x1d62, 0x1ba2, 0x1aa2, 0x1a22, 0x1ea3, + 0x1804, 0x1fe4, 0x1d64, 0x1fe5, 0x1ae4, 0x1d66, 0x1fe9, 0x1fec, 0x1eac, 0x181f, + 0x0801, 0x0fe1, 0x0ea1, 0x0ca1, 0x0ba1, 0x0ae1, 0x0f61, 0x0a21, 0x09e1, 0x09e1, + 0x09a1, 0x09a1, 0x0961, 0x0961, 0x0961, 0x0802, 0x0921, 0x0921, 0x0fe2, 0x0fa2, + 0x0d62, 0x0c22, 0x0ba2, 0x0b22, 0x0aa2, 0x08e1, 0x0a22, 0x0fe3, 0x0ea3, 0x0d23, + 0x0804, 0x0ba3, 0x0fe4, 0x0f24, 0x0d64, 0x0fe5, 0x0fe5, 0x0e25, 0x0ae4, 0x0fe7, + 0x0d66, 0x0ea7, 0x0fe9, 0x0fe9, 0x0fec, 0x0ce9, 0x0eac, 0x0ff4, 0x081f, 0x0fff, + 0x0000, 0x0fff, 0x07e0, 0x0bb6, 0x06a0, 0x0560, 0x0bbf, 0x0aba, 0x09a9, 0x0abf, + 0x0a7f, 0x0a3f, 0x09ae, 0x09ff, 0x09b3, 0x09b7, 0x09bd, 0x09bf, 0x09bf, 0x0974, + 0x01a0, 0x097e, 0x097f, 0x097f, 0x092d, 0x0160, 0x0931, 0x0934, 0x0938, 0x093e, + 0x093f, 0x093f, 0x093f, 0x08a2, 0x0120, 0x08e9, 0x08ea, 0x08eb, 0x08ec, 0x08ed, + 0x08ee, 0x08f0, 0x08f2, 0x08f4, 0x08f8, 0x08fd, 0x08ff, 0x08ff, 0x08ff, 0x08ff, + 0x00e0, 0x00e0, 0x00e0, 0x00e0, 0x00e0, 0x00e0, 0x08a4, 0x08a4, 0x08a4, 0x08a4, + 0x08a4, 0x08a4, 0x08a4, 0x08a4, 0x08a5, 0x08a5, 0x08a5, 0x08a5, 0x08a5, 0x08a6, + 0x08a6, 0x08a6, 0x08a6, 0x08a6, 0x08a7, 0x08a7, 0x08a7, 0x08a8, 0x08a8, 0x08a9, + 0x08a9, 0x08aa, 0x08aa, 0x08ab, 0x08ac, 0x08ad, 0x08ad, 0x08ae, 0x08b0, 0x08b1, + 0x08b3, 0x08b5, 0x08b8, 0x08bc, 0x08bf, 0x08bf, 0x08bf, 0x08bf, 0x08bf, 0x00a0, + 0x00a0, 0x2000, 0x2fff, 0x2fff, 0x27e0, 0x27e0, 0x2bb6, 0x2bb6, 0x26a0, 0x26a0, + 0x2560, 0x2560, 0x2bbf, 0x2bbf, 0x2aba, 0x2aba, 0x29a9, 0x29a9, 0x2abf, 0x2abf, + 0x2a7f, 0x2a7f, 0x2a3f, 0x2a3f, 0x29ae, 0x29ae, 0x29ff, 0x29ff, 0x29b3, 0x29b3, + 0x29b7, 0x29b7, 0x29bd, 0x29bd, 0x29bf, 0x29bf, 0x29bf, 0x29bf, 0x2974, 0x2974, + 0x21a0, 0x21a0, 0x297e, 0x297e, 0x297f, 0x297f, 0x297f, 0x297f, 0x292d, 0x292d, + 0x2160, 0x2160, 0x2931, 0x2931, 0x2934, 0x2934, 0x2938, 0x2938, 0x293e, 0x293e, + 0x293f, 0x293f, 0x293f, 0x293f, 0x293f, 0x293f, 0x28a2, 0x28a2, 0x2120, 0x2120, + 0x28e9, 0x28e9, 0x28ea, 0x28ea, 0x28eb, 0x28eb, 0x28ec, 0x28ec, 0x28ed, 0x28ed, + 0x28ee, 0x28ee, 0x28f0, 0x28f0, 0x28f2, 0x28f2, 0x28f4, 0x28f4, 0x28f8, 0x28f8, + 0x28fd, 0x28fd, 0x28ff, 0x28ff, 0x28ff, 0x28ff, 0x28ff, 0x28ff, 0x28ff, 0x28ff, + 0x20e0, 0x20e0, 0x20e0, 0x20e0, 0x20e0, 0x20e0, 0x20e0, 0x20e0, 0x20e0, 0x20e0, + 0x20e0, 0x20e0, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, + 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a4, 0x28a5, 0x28a5, + 0x28a5, 0x28a5, 0x28a5, 0x28a5, 0x28a5, 0x28a5, 0x28a5, 0x28a5, 0x28a6, 0x28a6, + 0x28a6, 0x28a6, 0x28a6, 0x28a6, 0x28a6, 0x28a6, 0x28a6, 0x28a6, 0x28a7, 0x28a7, + 0x28a7, 0x28a7, 0x28a7, 0x28a7, 0x28a8, 0x28a8, 0x28a8, 0x28a8, 0x28a9, 0x28a9, + 0x28a9, 0x28a9, 0x28aa, 0x28aa, 0x28aa, 0x28aa, 0x28ab, 0x28ab, 0x28ac, 0x28ac, + 0x28ad, 0x28ad, 0x28ad, 0x28ad, 0x28ae, 0x28ae, 0x28b0, 0x28b0, 0x28b1, 0x28b1, + 0x28b3, 0x28b3, 0x28b5, 0x28b5, 0x28b8, 0x28b8, 0x28bc, 0x28bc, 0x28bf, 0x28bf, + 0x28bf, 0x28bf, 0x28bf, 0x28bf, 0x28bf, 0x28bf, 0x28bf, 0x28bf, 0x20a0, 0x20a0 +}; void wheelfir_state::machine_start() { m_zoom_table = std::make_unique(ZOOM_TABLE_SIZE); - m_blitter_data = std::make_unique(16); - - m_scanlines = std::make_unique(NUM_SCANLINES+NUM_VBLANK_LINES); - - for(int i=0;i<(ZOOM_TABLE_SIZE);++i) + for (int i = 0; i < (ZOOM_TABLE_SIZE); ++i) { - m_zoom_table[i]=-1; + m_zoom_table[i] = -1; } - uint16_t *ROM = (uint16_t *)memregion("maincpu")->base(); - - for(int j=0;j<400;++j) + for (int j = 0; j < 400; ++j) { - int i=j<<3; - int d1=ROM[0x200+i]&0x1f; - int d0=(ROM[0x200+i]>>8)&0x1f; - - d0|=(ROM[0x200+1+i]&1)?0x20:0; - d1|=(ROM[0x200+1+i]&4)?0x20:0; - - int hflag=(ROM[0x200+2+i]&0x100)?1:0; - int dflag=(ROM[0x200+1+i]&0x10)?1:0; - - int index=d0|(d1<<6)|(hflag<<12)|(dflag<<13); - m_zoom_table[index]=j; + /* + // calculate index for zoom + uint16_t* ROM = (uint16_t*)m_maincpurom; + int i = j << 3; + int d1 = ROM[0x200 + i] & 0x1f; + int d0 = (ROM[0x200 + i] >> 8) & 0x1f; + + d0 |= (ROM[0x200 + 1 + i] & 1) ? 0x20 : 0; + d1 |= (ROM[0x200 + 1 + i] & 4) ? 0x20 : 0; + + int hflag = (ROM[0x200 + 2 + i] & 0x100) ? 1 : 0; + int dflag = (ROM[0x200 + 1 + i] & 0x10) ? 1 : 0; + + int index = d0 | (d1 << 6) | (hflag << 12) | (dflag << 13); + */ + m_zoom_table[zoom_index[j]] = j; } } @@ -774,15 +782,15 @@ GFXDECODE_END void wheelfir_state::wheelfir(machine_config &config) { - M68000(config, m_maincpu, 32000000/2); + M68000(config, m_maincpu, 32000000 / 2); m_maincpu->set_addrmap(AS_PROGRAM, &wheelfir_state::wheelfir_main); - M68000(config, m_subcpu, 32000000/2); + M68000(config, m_subcpu, 32000000 / 2); m_subcpu->set_addrmap(AS_PROGRAM, &wheelfir_state::wheelfir_sub); - //config.set_maximum_quantum(attotime::from_hz(12000)); + config.set_maximum_quantum(attotime::from_hz(12000)); - adc0808_device &adc(ADC0808(config, "adc", 500000)); // unknown clock + adc0808_device& adc(ADC0808(config, "adc", 500000)); // unknown clock adc.eoc_ff_callback().set(FUNC(wheelfir_state::adc_eoc_w)); adc.in_callback<0>().set_ioport("STEERING"); adc.in_callback<1>().set_ioport("ACCELERATOR"); @@ -792,8 +800,10 @@ void wheelfir_state::wheelfir(machine_config &config) SCREEN(config, m_screen, SCREEN_TYPE_RASTER); m_screen->set_refresh_hz(60); - m_screen->set_size(336, NUM_SCANLINES+NUM_VBLANK_LINES); - m_screen->set_visarea(0,335, 0, NUM_SCANLINES-1); + m_screen->set_size(336, NUM_SCANLINES + NUM_VBLANK_LINES); + m_screen->set_visarea(0, 335, 0, NUM_SCANLINES - 1); + //m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(3000)); + m_screen->set_screen_update(FUNC(wheelfir_state::screen_update_wheelfir)); m_screen->screen_vblank().set(FUNC(wheelfir_state::screen_vblank_wheelfir)); m_screen->set_palette(m_palette); @@ -926,20 +936,22 @@ ROM_END void wheelfir_state::init_pwball() { - // temp hack as pwball doesn't like zooming and other things (maybe different FPGA programming?) - m_is_pwball = true; + m_force_extra_irq1 = true; +// m_disable_raster_irq = true; } void wheelfir_state::init_kongball() { - init_pwball(); + m_force_extra_irq1 = true; m_disable_raster_irq = true; // the raster interrupt points outside of code } - GAME( 199?, wheelfir, 0, wheelfir, wheelfir, wheelfir_state, empty_init, ROT0, "TCH", "Wheels & Fire", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) GAME( 199?, pwball, 0, wheelfir, pwball, wheelfir_state, init_pwball, ROT0, "TCH", "Power Ball (prototype)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // mostly complete -// these might not be fully functional games -GAME( 199?, kongball, 0, kongball, pwball, wheelfir_state, init_kongball, ROT0, "TCH", "Kong Ball (early prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // can't get ingame? +// sound ROMs were missing on PCB, so sound emulation is not possible at this point in time +GAME( 1997, kongball, 0, kongball, pwball, wheelfir_state, init_kongball, ROT0, "TCH / Digital Dreams Multimedia", "Kong Ball (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IMPERFECT_GRAPHICS ) // can't get ingame? + +// crashes (always?) when selecting track on PCB +// some courses get to gameplay in MAME right now, but crash quickly, Medium 1 is seems to work better than most others GAME( 199?, radendur, 0, wheelfir, pwball, wheelfir_state, init_kongball, ROT0, "TCH / Sator Videogames", "Radical Enduro (early prototype)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // can get ingame if you overclock CPUs significantly (IRQ problems?) diff --git a/src/mame/tecmo/wc90.cpp b/src/mame/tecmo/wc90.cpp index 305cb8c90d4..5d1bbbfca14 100644 --- a/src/mame/tecmo/wc90.cpp +++ b/src/mame/tecmo/wc90.cpp @@ -803,9 +803,9 @@ ROM_END GAME( 1989, twcup90, 0, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (World set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1989, twcup90a, twcup90, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (Europe set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1989, twcup90b, twcup90, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (Europe set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) -GAME( 1989, twcup90c, twcup90, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (Europe set 3)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1989, twcup90a, twcup90, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (Europe set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1989, twcup90b, twcup90, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (Europe set 2)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) +GAME( 1989, twcup90c, twcup90, wc90, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (Europe set 3)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 1989, twcup90t, twcup90, wc90t, wc90, wc90_state, empty_init, ROT0, "Tecmo", "Tecmo World Cup '90 (trackball set 1)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) GAME( 199?, pac90, puckman, pac90, pac90, wc90_state, empty_init, ROT90, "bootleg (Macro)", "Pac-Man (bootleg on World Cup '90 hardware)", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE ) // made by Mike Coates etc. diff --git a/src/mame/ussr/1801vp014.cpp b/src/mame/ussr/1801vp014.cpp index 8e8c22b1196..8b1133fda5d 100644 --- a/src/mame/ussr/1801vp014.cpp +++ b/src/mame/ussr/1801vp014.cpp @@ -24,7 +24,7 @@ //************************************************************************** // device type definition -DEFINE_DEVICE_TYPE(K1801VP014, k1801vp014_device, "1801vp1-014", "1801VP1-014") +DEFINE_DEVICE_TYPE(K1801VP014, k1801vp014_device, "1801vp1_014", "1801VP1-014") //************************************************************************** @@ -39,8 +39,8 @@ static INPUT_PORTS_START(ms7008) PORT_START("LINEC") PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("СУ / Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2) - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("АР2 / Alt") PORT_CODE(KEYCODE_LALT) PORT_CODE(KEYCODE_RALT) - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ЗАГЛ/СТР / Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_TOGGLE + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("АР2 / Alt") PORT_CODE(KEYCODE_LALT) PORT_CODE(KEYCODE_RALT) PORT_CHAR(UCHAR_MAMEKEY(LALT)) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ЗАГЛ/СТР / Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_TOGGLE PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED) @@ -62,8 +62,8 @@ static INPUT_PORTS_START(ms7008) PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Delete to EOL") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) // alt vec PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("СБР / Clear") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("РУС / Rus") PORT_CODE(KEYCODE_PGUP) - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ЛАТ / Lat") PORT_CODE(KEYCODE_PGDN) + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("РУС / Rus") PORT_CODE(KEYCODE_PGUP) PORT_CHAR(UCHAR_MAMEKEY(PGUP)) + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ЛАТ / Lat") PORT_CODE(KEYCODE_PGDN) PORT_CHAR(UCHAR_MAMEKEY(PGDN)) PORT_START("LINE2") PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED) @@ -171,7 +171,6 @@ k1801vp014_device::k1801vp014_device(const machine_config &mconfig, const char * , m_write_virq(*this) , m_write_keydown(*this) , m_write_halt(*this) - , m_write_data(*this) { } @@ -276,11 +275,6 @@ void k1801vp014_device::write(offs_t offset, uint16_t data, uint16_t mem_mask) case 0: m_kbd_state = (m_kbd_state & ~CSR_IE) | (data & CSR_IE); break; - - case 1: - // FIXME accessing this offset should cause bus error on BK0010 - m_write_data(data >> 8); - break; } } diff --git a/src/mame/ussr/1801vp014.h b/src/mame/ussr/1801vp014.h index 80e7c09b525..03727de4245 100644 --- a/src/mame/ussr/1801vp014.h +++ b/src/mame/ussr/1801vp014.h @@ -34,7 +34,6 @@ class k1801vp014_device : public device_t, auto virq_wr_callback() { return m_write_virq.bind(); } auto keydown_wr_callback() { return m_write_keydown.bind(); } auto halt_wr_callback() { return m_write_halt.bind(); } - auto data_wr_callback() { return m_write_data.bind(); } uint16_t read(offs_t offset); void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); @@ -61,7 +60,6 @@ class k1801vp014_device : public device_t, devcb_write_line m_write_virq; devcb_write_line m_write_keydown; devcb_write_line m_write_halt; - devcb_write8 m_write_data; uint8_t m_rxrdy; diff --git a/src/mame/ussr/bk.cpp b/src/mame/ussr/bk.cpp index 90edad4f945..4bdedc1c262 100644 --- a/src/mame/ussr/bk.cpp +++ b/src/mame/ussr/bk.cpp @@ -45,11 +45,11 @@ void bk_state::bk0010_mem(address_map &map) map(0x0000, 0x3fff).ram(); map(0x4000, 0x7fff).ram().share("videoram"); map(0x8000, 0xfeff).rom().region("maincpu",0); - map(0xffb0, 0xffb1).rw(FUNC(bk_state::key_state_r), FUNC(bk_state::key_state_w)); - map(0xffb2, 0xffb3).r(FUNC(bk_state::key_code_r)); + map(0xffb0, 0xffb3).r(m_kbd, FUNC(k1801vp014_device::read)); + map(0xffb0, 0xffb1).w(m_kbd, FUNC(k1801vp014_device::write)); map(0xffb4, 0xffb5).rw(FUNC(bk_state::vid_scroll_r), FUNC(bk_state::vid_scroll_w)); map(0xffcc, 0xffcd).noprw(); - map(0xffce, 0xffcf).rw(FUNC(bk_state::key_press_r), FUNC(bk_state::key_press_w)); + map(0xffce, 0xffcf).rw(FUNC(bk_state::sel1_r), FUNC(bk_state::sel1_w)); } void bk_state::bk0010fd_mem(address_map &map) @@ -62,137 +62,47 @@ void bk_state::bk0010fd_mem(address_map &map) map(0xe000, 0xfdff).rom().region("maincpu",0x6000); map(0xfe58, 0xfe59).rw(FUNC(bk_state::floppy_cmd_r), FUNC(bk_state::floppy_cmd_w)); map(0xfe5a, 0xfe5b).rw(FUNC(bk_state::floppy_data_r), FUNC(bk_state::floppy_data_w)); - map(0xffb0, 0xffb1).rw(FUNC(bk_state::key_state_r), FUNC(bk_state::key_state_w)); - map(0xffb2, 0xffb3).r(FUNC(bk_state::key_code_r)); + map(0xffb0, 0xffb3).r(m_kbd, FUNC(k1801vp014_device::read)); + map(0xffb0, 0xffb1).w(m_kbd, FUNC(k1801vp014_device::write)); map(0xffb4, 0xffb5).rw(FUNC(bk_state::vid_scroll_r), FUNC(bk_state::vid_scroll_w)); map(0xffcc, 0xffcd).noprw(); - map(0xffce, 0xffcf).rw(FUNC(bk_state::key_press_r), FUNC(bk_state::key_press_w)); + map(0xffce, 0xffcf).rw(FUNC(bk_state::sel1_r), FUNC(bk_state::sel1_w)); } /* Input ports */ static INPUT_PORTS_START( bk0010 ) - PORT_START("LINE0") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED) - - PORT_START("LINE1") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Clear") PORT_CODE(KEYCODE_HOME) - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Rus") PORT_CODE(KEYCODE_LALT) - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Lat") PORT_CODE(KEYCODE_RALT) - - PORT_START("LINE2") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Tab left") PORT_CODE(KEYCODE_PGUP) - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Tab right") PORT_CODE(KEYCODE_PGDN) - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED) - - PORT_START("LINE3") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Delete") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_UNUSED) - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_UNUSED) - - PORT_START("LINE4") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') - PORT_BIT(0xFE, IP_ACTIVE_HIGH, IPT_UNUSED) - - PORT_START("LINE5") - PORT_BIT(0xFF, IP_ACTIVE_HIGH, IPT_UNUSED) - - PORT_START("LINE6") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"') - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#') - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR(0xA4) - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') - - PORT_START("LINE7") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR('<') PORT_CHAR(',') - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('=') PORT_CHAR('-') - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('>') PORT_CHAR('.') - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR('/') - - PORT_START("LINE8") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("<>") PORT_CODE(KEYCODE_END) - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('A') PORT_CHAR('a') - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('B') PORT_CHAR('b') - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('C') PORT_CHAR('c') - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('D') PORT_CHAR('d') - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('E') PORT_CHAR('e') - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('F') PORT_CHAR('f') - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('G') PORT_CHAR('g') - - PORT_START("LINE9") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('H') PORT_CHAR('h') - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('I') PORT_CHAR('i') - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('J') PORT_CHAR('j') - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('K') PORT_CHAR('k') - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('L') PORT_CHAR('l') - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('M') PORT_CHAR('m') - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('N') PORT_CHAR('n') - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('O') PORT_CHAR('o') - - PORT_START("LINE10") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('P') PORT_CHAR('p') - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('Q') PORT_CHAR('q') - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('R') PORT_CHAR('r') - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('S') PORT_CHAR('s') - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('T') PORT_CHAR('t') - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('U') PORT_CHAR('u') - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('V') PORT_CHAR('v') - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('W') PORT_CHAR('w') - - PORT_START("LINE11") - PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('X') PORT_CHAR('x') - PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('Y') PORT_CHAR('y') - PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') PORT_CHAR('z') - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') - PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("~") PORT_CODE(KEYCODE_TILDE) // this alone gives nothing and gives ` with Shift! - PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("=") PORT_CODE(KEYCODE_EQUALS) // this alone acts like Enter and gives no result with Shift INPUT_PORTS_END +static const z80_daisy_config daisy_chain[] = +{ + { "keyboard" }, + { "qbus" }, + { nullptr } +}; void bk_state::bk0010(machine_config &config) { /* basic machine hardware */ - T11(config, m_maincpu, 3000000); // FIXME: actually K1801VM1 - m_maincpu->set_initial_mode(0x36ff); /* initial mode word has DAL15,14,11,8 pulled low */ + K1801VM1(config, m_maincpu, 3000000); m_maincpu->set_addrmap(AS_PROGRAM, &bk_state::bk0010_mem); - m_maincpu->in_iack().set(FUNC(bk_state::irq_callback)); + m_maincpu->set_daisy_config(daisy_chain); + m_maincpu->out_reset().set(FUNC(bk_state::reset_w)); QBUS(config, m_qbus, 0); m_qbus->set_space(m_maincpu, AS_PROGRAM); m_qbus->birq4().set_inputline(m_maincpu, t11_device::VEC_LINE); QBUS_SLOT(config, "qbus" ":1", qbus_cards, nullptr); + K1801VP014(config, m_kbd, 0); + m_kbd->virq_wr_callback().set_inputline(m_maincpu, t11_device::VEC_LINE); + m_kbd->keydown_wr_callback().set([this] (int state) { + m_sel1 |= SEL1_UPDATED; + if (state) m_sel1 &= ~SEL1_KEYDOWN; else m_sel1 |= SEL1_KEYDOWN; + }); + m_kbd->halt_wr_callback().set([this] (int state) { + m_maincpu->set_input_line(t11_device::HLT_LINE, state); + }); + /* video hardware */ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(50); diff --git a/src/mame/ussr/bk.h b/src/mame/ussr/bk.h index 89ed6851dbc..8628c197167 100644 --- a/src/mame/ussr/bk.h +++ b/src/mame/ussr/bk.h @@ -10,11 +10,22 @@ #pragma once +#include "1801vp014.h" #include "bus/qbus/qbus.h" #include "cpu/t11/t11.h" #include "imagedev/cassette.h" #include "sound/dac.h" +enum sel1_bits : u16 +{ + SEL1_UPDATED = 0004, + SEL1_RX_SER = 0020, + SEL1_RX_CAS = 0040, + SEL1_KEYDOWN = 0100, + SEL1_RDY_SER = 0200, + SEL1_MOTOR = 0200, +}; + class bk_state : public driver_device { public: @@ -24,8 +35,8 @@ class bk_state : public driver_device , m_maincpu(*this, "maincpu") , m_cassette(*this, "cassette") , m_dac(*this, "dac") + , m_kbd(*this, "keyboard") , m_qbus(*this, "qbus") - , m_io_keyboard(*this, "LINE%u", 0U) { } void bk0010(machine_config &config); @@ -33,36 +44,28 @@ class bk_state : public driver_device private: uint16_t m_scroll = 0U; - uint16_t m_kbd_state = 0U; - uint16_t m_key_code = 0U; - uint16_t m_key_pressed = 0U; - uint16_t m_key_irq_vector = 0U; + uint16_t m_sel1 = 0U; uint16_t m_drive = 0U; - emu_timer *m_kbd_timer = nullptr; - uint16_t key_state_r(); - uint16_t key_code_r(); uint16_t vid_scroll_r(); - uint16_t key_press_r(); + uint16_t sel1_r(); uint16_t trap_r(); - void key_state_w(uint16_t data); void vid_scroll_w(uint16_t data); - void key_press_w(uint16_t data); + void sel1_w(uint16_t data); void trap_w(uint16_t data); uint16_t floppy_cmd_r(); void floppy_cmd_w(uint16_t data); uint16_t floppy_data_r(); void floppy_data_w(uint16_t data); + void reset_w(int state); virtual void machine_start() override; virtual void machine_reset() override; uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - TIMER_CALLBACK_MEMBER(keyboard_callback); - uint8_t irq_callback(offs_t offset); required_shared_ptr m_vram; - required_device m_maincpu; + required_device m_maincpu; required_device m_cassette; required_device m_dac; + required_device m_kbd; required_device m_qbus; - required_ioport_array<12> m_io_keyboard; void bk0010_mem(address_map &map); void bk0010fd_mem(address_map &map); }; diff --git a/src/mame/ussr/bk_m.cpp b/src/mame/ussr/bk_m.cpp index f20f588bc2e..77f4d68cb1f 100644 --- a/src/mame/ussr/bk_m.cpp +++ b/src/mame/ussr/bk_m.cpp @@ -13,93 +13,40 @@ #include "bk.h" -TIMER_CALLBACK_MEMBER(bk_state::keyboard_callback) -{ - uint8_t code, i, j; - - for(i = 1; i < 12; i++) - { - code = m_io_keyboard[i]->read(); - if (code != 0) - { - for(j = 0; j < 8; j++) - { - if (code == (1 << j)) - { - m_key_code = j + i*8; - break; - } - } - if (BIT(m_io_keyboard[0]->read(), 2)) - { - if (i==6 || i==7) - m_key_code -= 16; - else - if (i>=8 && i<=11) - m_key_code += 32; - } - m_key_pressed = 0x40; - - if (!BIT(m_io_keyboard[0]->read(), 1)) - m_key_irq_vector = 0x30; - else - m_key_irq_vector = 0xBC; - - m_maincpu->set_input_line(0, ASSERT_LINE); - break; - } - } -} - - void bk_state::machine_start() { save_item(NAME(m_scroll)); - save_item(NAME(m_kbd_state)); - save_item(NAME(m_key_code)); - save_item(NAME(m_key_pressed)); - save_item(NAME(m_key_irq_vector)); + save_item(NAME(m_sel1)); save_item(NAME(m_drive)); - - m_maincpu->set_input_line(t11_device::VEC_LINE, ASSERT_LINE); - - m_kbd_timer = timer_alloc(FUNC(bk_state::keyboard_callback), this); - m_kbd_timer->adjust(attotime::from_hz(2400), 0, attotime::from_hz(2400)); -} - -uint8_t bk_state::irq_callback(offs_t offset) -{ - m_maincpu->set_input_line(0, CLEAR_LINE); - return m_key_irq_vector; } void bk_state::machine_reset() { - m_kbd_state = 0; + m_sel1 = SEL1_KEYDOWN | SEL1_MOTOR; m_scroll = 01330; } -uint16_t bk_state::key_state_r() +void bk_state::reset_w(int state) { - return m_kbd_state; -} -uint16_t bk_state::key_code_r() -{ - m_kbd_state &= ~0x80; // mark reading done - m_key_pressed = 0; - return m_key_code; + if (state == ASSERT_LINE) + { + m_kbd->reset(); + m_qbus->init_w(); + } } + uint16_t bk_state::vid_scroll_r() { return m_scroll; } -uint16_t bk_state::key_press_r() +uint16_t bk_state::sel1_r() { double level = m_cassette->input(); - uint16_t cas = (level < 0) ? 0 : 0x20; + uint16_t data = 0100000 | m_sel1 | ((level < 0) ? 0 : SEL1_RX_CAS); + m_sel1 &= ~SEL1_UPDATED; - return 0x8080 | m_key_pressed | cas; + return data; } uint16_t bk_state::trap_r() @@ -109,18 +56,14 @@ uint16_t bk_state::trap_r() return ~0; } -void bk_state::key_state_w(uint16_t data) -{ - m_kbd_state = (m_kbd_state & ~0x40) | (data & 0x40); -} - void bk_state::vid_scroll_w(uint16_t data) { - m_scroll = data; + m_scroll = data & 01377; } -void bk_state::key_press_w(uint16_t data) +void bk_state::sel1_w(uint16_t data) { + m_sel1 |= SEL1_UPDATED; m_dac->write(BIT(data, 6)); m_cassette->output(BIT(data, 6) ? 1.0 : -1.0); m_cassette->change_state((BIT(data, 7)) ? CASSETTE_MOTOR_DISABLED : CASSETTE_MOTOR_ENABLED, CASSETTE_MASK_MOTOR);