diff --git a/3rdparty/bx/src/debug.cpp b/3rdparty/bx/src/debug.cpp
index 8bbf1e6d122..062df287d7a 100644
--- a/3rdparty/bx/src/debug.cpp
+++ b/3rdparty/bx/src/debug.cpp
@@ -43,7 +43,13 @@ namespace bx
 		// NativeClient: NaCl module load failed: Validation failure. File violates Native Client safety rules.
 		__asm__ ("int $3");
 #elif BX_PLATFORM_EMSCRIPTEN
-		emscripten_log(EM_LOG_CONSOLE | EM_LOG_ERROR | EM_LOG_C_STACK | EM_LOG_JS_STACK | EM_LOG_DEMANGLE, "debugBreak!");
+		emscripten_log(0
+			| EM_LOG_CONSOLE
+			| EM_LOG_ERROR
+			| EM_LOG_C_STACK
+			| EM_LOG_JS_STACK
+			, "debugBreak!"
+			);
 		// Doing emscripten_debugger() disables asm.js validation due to an emscripten bug
 		//emscripten_debugger();
 		EM_ASM({ debugger; });
diff --git a/docs/source/commandline/commandline-all.rst b/docs/source/commandline/commandline-all.rst
index b2cd5ad2c64..89f7dac1287 100644
--- a/docs/source/commandline/commandline-all.rst
+++ b/docs/source/commandline/commandline-all.rst
@@ -3989,7 +3989,7 @@ Core Misc Options
 
     Specifies the type of UI to use, either ``simple`` or ``cabinet``.
 
-    The default is Cabinet (**-ui cabinet**).
+    The default is cabinet (**-ui cabinet**).
 
     Example:
         .. code-block:: bash
@@ -4025,9 +4025,9 @@ Core Misc Options
 
 **\-[no]ui_mouse**
 
-    Displays a mouse cursor when using the built-in UI for MAME.
+    Displays a mouse cursor when using the built-in MAME user interface.
 
-    The default is (**-noui_mouse**).
+    The default is ON (**-ui_mouse**).
 
 .. _mame-commandline-language:
 
diff --git a/docs/source/initialsetup/compilingmame.rst b/docs/source/initialsetup/compilingmame.rst
index f458f34af08..c9ef6d3465a 100644
--- a/docs/source/initialsetup/compilingmame.rst
+++ b/docs/source/initialsetup/compilingmame.rst
@@ -560,8 +560,9 @@ TOOLS
     Set to **1** to build additional tools along with the emulator, including
     **unidasm**, **chdman**, **romcmp**, and **srcclean**.
 EMULATOR
-    Set to **0** along with **TOOLS=1** to build *only* the tools and not the
-    main MAME emulator itself.
+    When set to **0**, the main emulator target will not be created.  This is
+    intended to be used in conjunction with setting **TOOLS** to **1** to build
+    the additional tools without building the emulator.
 NO_OPENGL
     Set to **1** to disable building the OpenGL video output module.
 NO_USE_PORTAUDIO
diff --git a/hash/cdi.xml b/hash/cdi.xml
index 66893584b90..918ce7eff9b 100644
--- a/hash/cdi.xml
+++ b/hash/cdi.xml
@@ -1277,6 +1277,22 @@ license:CC0-1.0
 		</part>
 	</software>
 
+	<software name="hotmariop" cloneof="hotmario">
+		<!--
+		Origin: Redump
+		<rom name="Hotel Mario (USA) (Beta) (1993-11-23).bin" size="367217760" crc="05ccadda" md5="8fb67e208d6ca91d83415566db5b7d15" sha1="183b2efd1f5b926757a8fb514cc861fdf7a244c5" />
+		<rom name="Hotel Mario (USA) (Beta) (1993-11-23).cue" size="101" crc="e577f8e3" md5="83f41478963317af4e44bdd2dcb89c0c" sha1="6d3a84b2333dd6f3ebb382ce896c067ddaf077aa" />
+		-->
+		<description>Hotel Mario (prototype v0.09, 19931123)</description>
+		<year>1994</year>
+		<publisher>Philips</publisher>
+		<part name="cdrom" interface="cdi_cdrom">
+			<diskarea name="cdrom">
+				<disk name="hotel mario (prototype v 0.09, 19931123)" sha1="3f0375fb2c74b9abc7c4eb8ef0b3f907b70307cb"/>
+			</diskarea>
+		</part>
+	</software>
+
 	<software name="hotmariou" cloneof="hotmario">
 		<!--
 		Origin: TOSEC
diff --git a/scripts/genie.lua b/scripts/genie.lua
index 66ac14840b8..8a6df8fb0a8 100644
--- a/scripts/genie.lua
+++ b/scripts/genie.lua
@@ -1172,6 +1172,9 @@ configuration { "asmjs" }
 		"-std=c++17",
 		"-s EXCEPTION_CATCHING_ALLOWED=\"['_ZN15running_machine17start_all_devicesEv','_ZN12cli_frontend7executeEiPPc','_ZN8chd_file11open_commonEb','_ZN8chd_file13read_metadataEjjRNSt3__212basic_stringIcNS0_11char_traitsIcEENS0_9allocatorIcEEEE','_ZN8chd_file13read_metadataEjjRNSt3__26vectorIhNS0_9allocatorIhEEEE','_ZNK19netlist_mame_device19base_validity_checkER16validity_checker']\"",
 	}
+	defines {
+		"ASIO_HAS_PTHREADS",
+	}
 	linkoptions {
 		"-Wl,--start-group",
 		"-O" .. _OPTIONS["OPTIMIZE"],
diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua
index 97aae475030..b94822a0fa1 100644
--- a/scripts/src/bus.lua
+++ b/scripts/src/bus.lua
@@ -2992,6 +2992,8 @@ if (BUSES["A2BUS"]~=null) then
 		MAME_DIR .. "src/devices/bus/a2bus/romcard.h",
 		MAME_DIR .. "src/devices/bus/a2bus/sider.cpp",
 		MAME_DIR .. "src/devices/bus/a2bus/sider.h",
+		MAME_DIR .. "src/devices/bus/a2bus/snesmax.cpp",
+		MAME_DIR .. "src/devices/bus/a2bus/snesmax.h",
 		MAME_DIR .. "src/devices/bus/a2bus/softcard3.cpp",
 		MAME_DIR .. "src/devices/bus/a2bus/softcard3.h",
 		MAME_DIR .. "src/devices/bus/a2bus/ssbapple.cpp",
@@ -5522,6 +5524,8 @@ if (BUSES["PCI"]~=null) then
 		MAME_DIR .. "src/devices/bus/pci/rtl8029as_pci.h",
 		MAME_DIR .. "src/devices/bus/pci/rtl8139_pci.cpp",
 		MAME_DIR .. "src/devices/bus/pci/rtl8139_pci.h",
+		MAME_DIR .. "src/devices/bus/pci/sis6326.cpp",
+		MAME_DIR .. "src/devices/bus/pci/sis6326.h",
 		MAME_DIR .. "src/devices/bus/pci/sonicvibes.cpp",
 		MAME_DIR .. "src/devices/bus/pci/sonicvibes.h",
 		MAME_DIR .. "src/devices/bus/pci/sw1000xg.cpp",
diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua
index 8fa1f1423eb..6b594b77238 100644
--- a/scripts/src/cpu.lua
+++ b/scripts/src/cpu.lua
@@ -2953,6 +2953,8 @@ local want_disasm_z80  = opt_tool(CPUS, "Z80")
 local want_disasm_kc80 = opt_tool(CPUS, "KC80")
 
 if want_disasm_z80 or want_disasm_kc80 then
+	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/z80/r800dasm.cpp")
+	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/z80/r800dasm.h")
 	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/z80/z80dasm.cpp")
 	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/z80/z80dasm.h")
 end
diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua
index 30425b67a80..9ce55c8a5a0 100644
--- a/scripts/src/machine.lua
+++ b/scripts/src/machine.lua
@@ -4475,6 +4475,18 @@ if (MACHINES["FDC37C93X"]~=null) then
 	}
 end
 
+---------------------------------------------------
+--
+--@src/devices/machine/it8705f.h,MACHINES["IT8705F"] = true
+---------------------------------------------------
+
+if (MACHINES["IT8705F"]~=null) then
+	files {
+		MAME_DIR .. "src/devices/machine/it8705f.cpp",
+		MAME_DIR .. "src/devices/machine/it8705f.h",
+	}
+end
+
 ---------------------------------------------------
 --
 --@src/devices/machine/pc87306.h,MACHINES["PC87306"] = true
diff --git a/src/devices/bus/a2bus/cards.cpp b/src/devices/bus/a2bus/cards.cpp
index 817553ee239..5ab855ddf5e 100644
--- a/src/devices/bus/a2bus/cards.cpp
+++ b/src/devices/bus/a2bus/cards.cpp
@@ -62,6 +62,7 @@
 #include "ramcard16k.h"
 #include "romcard.h"
 #include "sider.h"
+#include "snesmax.h"
 #include "softcard3.h"
 #include "ssbapple.h"
 #include "ssprite.h"
@@ -136,6 +137,7 @@ void apple2_cards(device_slot_interface &device)
 	device.option_add("ssprite", A2BUS_SSPRITE);               // Synetix SuperSprite Board
 	device.option_add("ssbapple", A2BUS_SSBAPPLE);             // SSB Apple speech board
 	device.option_add("4play", A2BUS_4PLAY);                   // 4Play Joystick Card (Rev. B)
+	device.option_add("snesmax", A2BUS_SNES_MAX);              // SNES MAX controller adapter
 	device.option_add("ceyes2", A2BUS_COMPUTEREYES2);          // ComputerEyes/2 Video Digitizer
 	device.option_add("twarp", A2BUS_TRANSWARP);               // AE TransWarp accelerator
 	device.option_add("applesurance", A2BUS_APPLESURANCE);     // Applesurance Diagnostic Controller
@@ -212,6 +214,7 @@ void apple2e_cards(device_slot_interface &device)
 	device.option_add("twarp", A2BUS_TRANSWARP);               // AE TransWarp accelerator
 	device.option_add("vulcan", A2BUS_VULCANIIE);              // Applied Engineering Vulcan IDE drive
 	device.option_add("4play", A2BUS_4PLAY);                   // 4Play Joystick Card (Rev. B)
+	device.option_add("snesmax", A2BUS_SNES_MAX);              // SNES MAX controller adapter
 	device.option_add("ceyes2", A2BUS_COMPUTEREYES2);          // ComputerEyes/2 Video Digitizer
 	device.option_add("applesurance", A2BUS_APPLESURANCE);     // Applesurance Diagnostic Controller
 	device.option_add("byte8251", A2BUS_BYTE8251);             // BYTE Magazine 8251 serial card
@@ -286,6 +289,7 @@ void apple2gs_cards(device_slot_interface &device)
 	device.option_add("vulcan", A2BUS_VULCAN);                 // Applied Engineering Vulcan IDE drive
 	device.option_add("vulcangold", A2BUS_VULCANGOLD);         // Applied Engineering Vulcan Gold IDE drive
 	device.option_add("4play", A2BUS_4PLAY);                   // 4Play Joystick Card (Rev. B)
+	device.option_add("snesmax", A2BUS_SNES_MAX);              // SNES MAX controller adapter
 //  device.option_add("magicmusician", A2BUS_MAGICMUSICIAN);   // Magic Musician Card
 //  device.option_add("pcxport", A2BUS_PCXPORTER);             // Applied Engineering PC Transporter
 	device.option_add("byte8251", A2BUS_BYTE8251);             // BYTE Magazine 8251 serial card
diff --git a/src/devices/bus/a2bus/snesmax.cpp b/src/devices/bus/a2bus/snesmax.cpp
new file mode 100644
index 00000000000..25638da62ed
--- /dev/null
+++ b/src/devices/bus/a2bus/snesmax.cpp
@@ -0,0 +1,97 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+#include "emu.h"
+#include "snesmax.h"
+
+#include "bus/snes_ctrl/ctrl.h"
+
+namespace {
+
+class a2bus_snes_max_device : public device_t, public device_a2bus_card_interface
+{
+public:
+	a2bus_snes_max_device(
+			machine_config const &mconfig,
+			char const *tag,
+			device_t *owner,
+			u32 clock) :
+		device_t(mconfig, A2BUS_SNES_MAX, tag, owner, clock),
+		device_a2bus_card_interface(mconfig, *this),
+		m_controllers(*this, "%u", 1U),
+		m_latch_timer(nullptr),
+		m_data(0xff)
+	{
+	}
+
+	virtual u8 read_c0nx(u8 offset) override
+	{
+		return m_data;
+	}
+
+	virtual void write_c0nx(u8 offset, u8 data) override
+	{
+		if (BIT(offset, 0))
+		{
+			m_data =
+					(m_controllers[0]->read_pin4() ? 0x00 : 0x80) |
+					(m_controllers[1]->read_pin4() ? 0x00 : 0x40) |
+					0x3f;
+		}
+		else
+		{
+			machine().scheduler().synchronize(timer_expired_delegate(FUNC(a2bus_snes_max_device::set_latch), this), 0);
+		}
+	}
+
+	virtual bool take_c800() override
+	{
+		return false;
+	}
+
+protected:
+	virtual void device_add_mconfig(machine_config &config) override ATTR_COLD
+	{
+		SNES_CONTROL_PORT(config, m_controllers[0], snes_control_port_devices, "joypad");
+		SNES_CONTROL_PORT(config, m_controllers[1], snes_control_port_devices, "joypad");
+	}
+
+	virtual void device_start() override ATTR_COLD
+	{
+		m_latch_timer = timer_alloc(FUNC(a2bus_snes_max_device::reset_latch), this);
+
+		m_data = 0xff;
+
+		save_item(NAME(m_data));
+
+		m_controllers[0]->write_strobe(0);
+		m_controllers[1]->write_strobe(0);
+	}
+
+private:
+	TIMER_CALLBACK_MEMBER(set_latch)
+	{
+		m_controllers[0]->write_strobe(1);
+		m_controllers[1]->write_strobe(1);
+		m_latch_timer->adjust(attotime::from_ticks(7, clock()));
+	}
+
+	TIMER_CALLBACK_MEMBER(reset_latch)
+	{
+		m_controllers[0]->write_strobe(0);
+		m_controllers[1]->write_strobe(0);
+
+		m_data =
+				(m_controllers[0]->read_pin4() ? 0x00 : 0x80) |
+				(m_controllers[1]->read_pin4() ? 0x00 : 0x40) |
+				0x3f;
+	}
+
+	required_device_array<snes_control_port_device, 2> m_controllers;
+	emu_timer *m_latch_timer;
+	u8 m_data;
+};
+
+} // anonymous namespace
+
+
+DEFINE_DEVICE_TYPE_PRIVATE(A2BUS_SNES_MAX, device_a2bus_card_interface, a2bus_snes_max_device, "a2snesmax", "SNES MAX Game Controller Interface")
diff --git a/src/devices/bus/a2bus/snesmax.h b/src/devices/bus/a2bus/snesmax.h
new file mode 100644
index 00000000000..3cf381242dc
--- /dev/null
+++ b/src/devices/bus/a2bus/snesmax.h
@@ -0,0 +1,20 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/***********************************************************************
+
+    Homebrew dual SNES controller interface by Lukazi
+
+    https://lukazi.blogspot.com/2021/06/game-controller-snes-max-snes.html
+
+***********************************************************************/
+#ifndef MAME_BUS_A2BUS_SNESMAX_H
+#define MAME_BUS_A2BUS_SNESMAX_H
+
+#pragma once
+
+#include "a2bus.h"
+
+
+DECLARE_DEVICE_TYPE(A2BUS_SNES_MAX, device_a2bus_card_interface)
+
+#endif // MAME_BUS_A2BUS_SNESMAX_H
diff --git a/src/devices/bus/cpc/cpc_ssa1.cpp b/src/devices/bus/cpc/cpc_ssa1.cpp
index cfe5c88d29d..eab90d6831d 100644
--- a/src/devices/bus/cpc/cpc_ssa1.cpp
+++ b/src/devices/bus/cpc/cpc_ssa1.cpp
@@ -30,10 +30,10 @@ uint8_t cpc_ssa1_device::ssa1_r()
 {
 	uint8_t ret = 0xff;
 
-	if(get_sby() == 0)
+	if(!m_sp0256_device->sby_r())
 		ret &= ~0x80;
 
-	if(get_lrq() != 0)
+	if(m_sp0256_device->lrq_r())
 		ret &= ~0x40;
 
 	return ret;
@@ -50,7 +50,7 @@ uint8_t cpc_dkspeech_device::dkspeech_r()
 
 	// SBY is not connected
 
-	if(get_lrq() != 0)
+	if(m_sp0256_device->lrq_r())
 		ret &= ~0x80;
 
 	return ret;
@@ -61,26 +61,6 @@ void cpc_dkspeech_device::dkspeech_w(uint8_t data)
 	m_sp0256_device->ald_w(data & 0x3f);
 }
 
-void cpc_ssa1_device::lrq_cb(int state)
-{
-	set_lrq(state);
-}
-
-void cpc_ssa1_device::sby_cb(int state)
-{
-	set_sby(state);
-}
-
-void cpc_dkspeech_device::lrq_cb(int state)
-{
-	set_lrq(state);
-}
-
-void cpc_dkspeech_device::sby_cb(int state)
-{
-	set_sby(state);
-}
-
 //-------------------------------------------------
 //  Device ROM definition
 //-------------------------------------------------
@@ -119,8 +99,6 @@ void cpc_ssa1_device::device_add_mconfig(machine_config &config)
 {
 	SPEAKER(config, "mono").front_center();
 	SP0256(config, m_sp0256_device, XTAL(3'120'000));
-	m_sp0256_device->data_request_callback().set(FUNC(cpc_ssa1_device::lrq_cb));
-	m_sp0256_device->standby_callback().set(FUNC(cpc_ssa1_device::sby_cb));
 	m_sp0256_device->add_route(ALL_OUTPUTS, "mono", 1.00);
 
 	// pass-through
@@ -134,8 +112,6 @@ void cpc_dkspeech_device::device_add_mconfig(machine_config &config)
 {
 	SPEAKER(config, "mono").front_center();
 	SP0256(config, m_sp0256_device, DERIVED_CLOCK(1, 1));  // uses the CPC's clock from pin 50 of the expansion port
-	m_sp0256_device->data_request_callback().set(FUNC(cpc_dkspeech_device::lrq_cb));
-	m_sp0256_device->standby_callback().set(FUNC(cpc_dkspeech_device::sby_cb));
 	m_sp0256_device->add_route(ALL_OUTPUTS, "mono", 1.00);
 
 	// pass-through
@@ -153,7 +129,6 @@ void cpc_dkspeech_device::device_add_mconfig(machine_config &config)
 cpc_ssa1_device::cpc_ssa1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
 	device_t(mconfig, CPC_SSA1, tag, owner, clock),
 	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_rom(nullptr),
-	m_lrq(1), m_sby(0),
 	m_sp0256_device(*this,"sp0256")
 {
 }
@@ -161,7 +136,6 @@ cpc_ssa1_device::cpc_ssa1_device(const machine_config &mconfig, const char *tag,
 cpc_dkspeech_device::cpc_dkspeech_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
 	device_t(mconfig, CPC_DKSPEECH, tag, owner, clock),
 	device_cpc_expansion_card_interface(mconfig, *this), m_slot(nullptr), m_rom(nullptr),
-	m_lrq(1), m_sby(0),
 	m_sp0256_device(*this,"sp0256")
 {
 }
diff --git a/src/devices/bus/cpc/cpc_ssa1.h b/src/devices/bus/cpc/cpc_ssa1.h
index b0ebc35d9cf..9c89be6067d 100644
--- a/src/devices/bus/cpc/cpc_ssa1.h
+++ b/src/devices/bus/cpc/cpc_ssa1.h
@@ -56,11 +56,6 @@ class cpc_ssa1_device : public device_t,
 	// construction/destruction
 	cpc_ssa1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
-	void set_lrq(uint8_t state) { m_lrq = state; }
-	uint8_t get_lrq() { return m_lrq; }
-	void set_sby(uint8_t state) { m_sby = state; }
-	uint8_t get_sby() { return m_sby; }
-
 	uint8_t ssa1_r();
 	void ssa1_w(uint8_t data);
 
@@ -74,15 +69,8 @@ class cpc_ssa1_device : public device_t,
 	virtual void device_add_mconfig(machine_config &config) override;
 
 private:
-	void lrq_cb(int state);
-	void sby_cb(int state);
-
 	cpc_expansion_slot_device *m_slot;
-
 	uint8_t *m_rom;
-	uint8_t m_lrq;
-	uint8_t m_sby;
-
 	required_device<sp0256_device> m_sp0256_device;
 };
 
@@ -93,11 +81,6 @@ class cpc_dkspeech_device : public device_t,
 	// construction/destruction
 	cpc_dkspeech_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
-	void set_lrq(uint8_t state) { m_lrq = state; }
-	uint8_t get_lrq() { return m_lrq; }
-	void set_sby(uint8_t state) { m_sby = state; }
-	uint8_t get_sby() { return m_sby; }
-
 	uint8_t dkspeech_r();
 	void dkspeech_w(uint8_t data);
 
@@ -111,15 +94,8 @@ class cpc_dkspeech_device : public device_t,
 	virtual void device_add_mconfig(machine_config &config) override;
 
 private:
-	void lrq_cb(int state);
-	void sby_cb(int state);
-
 	cpc_expansion_slot_device *m_slot;
-
 	uint8_t *m_rom;
-	uint8_t m_lrq;
-	uint8_t m_sby;
-
 	required_device<sp0256_device> m_sp0256_device;
 };
 
diff --git a/src/devices/bus/odyssey2/voice.cpp b/src/devices/bus/odyssey2/voice.cpp
index 78507a92ab7..43f4e30377b 100644
--- a/src/devices/bus/odyssey2/voice.cpp
+++ b/src/devices/bus/odyssey2/voice.cpp
@@ -14,6 +14,7 @@ that (European) cartridges using extra I/O won't work on it.
 
 TODO:
 - bees sound at level complete "MORE MORE MORE CHK CHK CHK" should be more rapid
+- turtlesu usually doesn't detect the voice cartridge
 
 ******************************************************************************/
 
@@ -37,6 +38,7 @@ o2_voice_device::o2_voice_device(const machine_config &mconfig, const char *tag,
 void o2_voice_device::device_start()
 {
 	save_item(NAME(m_control));
+	save_item(NAME(m_reset));
 }
 
 void o2_voice_device::cart_init()
@@ -99,11 +101,16 @@ void o2_voice_device::io_write(offs_t offset, u8 data)
 {
 	if (offset & 0x80 && ~m_control & 0x10)
 	{
-		// A0-A6: SP0256B A1-A7 (A8 to GND)
 		// D5: 7474 to SP0256B reset
-		if (data & 0x20)
-			m_speech->ald_w(offset & 0x7f);
-		else
+		bool reset = !(data & 0x20);
+		if (reset)
 			m_speech->reset();
+		else if (!m_reset)
+		{
+			// A0-A6: SP0256B A1-A7 (A8 to GND)
+			m_speech->ald_w(offset & 0x7f);
+		}
+
+		m_reset = reset;
 	}
 }
diff --git a/src/devices/bus/odyssey2/voice.h b/src/devices/bus/odyssey2/voice.h
index a125b282d66..1d48f7c48d4 100644
--- a/src/devices/bus/odyssey2/voice.h
+++ b/src/devices/bus/odyssey2/voice.h
@@ -51,6 +51,7 @@ class o2_voice_device : public device_t,
 	required_device<o2_cart_slot_device> m_subslot;
 
 	u8 m_control = 0;
+	bool m_reset = false;
 };
 
 
diff --git a/src/devices/bus/pci/clgd5446.cpp b/src/devices/bus/pci/clgd5446.cpp
index 2f901f85cea..feba8765dc8 100644
--- a/src/devices/bus/pci/clgd5446.cpp
+++ b/src/devices/bus/pci/clgd5446.cpp
@@ -42,7 +42,8 @@ ROM_START( gd5446 )
 	ROMX_LOAD( "cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c), ROM_BIOS(0) )
 	// Chip:CL-GD5446-HC-A - ROM: CL-GD5436/46 PCI VGA BIOS Version 1.25 - RAM: 1MB, 2MB, 4MB - 
 	// OSC: 14.31818MHz - Connector: DB15 - VESA feature connector
-//	ROM_SYSTEM_BIOS( 1, "???", "Quadtel CL-GD5446 1.25" )
+	ROM_SYSTEM_BIOS( 1, "quadtelo", "Quadtel CL-GD5446 1.25" )
+	ROMX_LOAD("cl-gd5446_pci_vga_bios_version_1.25.u2",  0x0000, 0x8000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a), ROM_BIOS(1) )
 //	ROMX_LOAD("5446bv.vbi", 0x00000, 0x10000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) )
 ROM_END
 
diff --git a/src/devices/bus/pci/clgd546x_laguna.cpp b/src/devices/bus/pci/clgd546x_laguna.cpp
index fdc0ed199bc..ff9e3b309db 100644
--- a/src/devices/bus/pci/clgd546x_laguna.cpp
+++ b/src/devices/bus/pci/clgd546x_laguna.cpp
@@ -16,10 +16,10 @@
 #define LOGWARN(...)            LOGMASKED(LOG_WARN, __VA_ARGS__)
 #define LOGTODO(...)            LOGMASKED(LOG_TODO, __VA_ARGS__)
 
-DEFINE_DEVICE_TYPE(CIRRUS_GD5465_LAGUNA3D, cirrus_gd5465_laguna3d_device, "clgd5465_laguna", "Cirrus Logic GD-5465 \"Laguna 3D\"")
+DEFINE_DEVICE_TYPE(GD5465_LAGUNA3D, cirrus_gd5465_laguna3d_device, "clgd5465_laguna", "Cirrus Logic GD-5465 \"Laguna 3D\"")
 
 cirrus_gd5465_laguna3d_device::cirrus_gd5465_laguna3d_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
-	: pci_card_device(mconfig, CIRRUS_GD5465_LAGUNA3D, tag, owner, clock)
+	: pci_card_device(mconfig, GD5465_LAGUNA3D, tag, owner, clock)
 	, m_vga(*this, "vga")
 	, m_vga_rom(*this, "vga_rom")
 {
@@ -142,7 +142,6 @@ void cirrus_gd5465_laguna3d_device::map_extra(uint64_t memory_window_start, uint
 		memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(cirrus_gd5465_laguna3d_device::vram_r)), write8sm_delegate(*this, FUNC(cirrus_gd5465_laguna3d_device::vram_w)));
 
 		io_space->install_device(0x03b0, 0x03df, *this, &cirrus_gd5465_laguna3d_device::legacy_io_map);
-		//memory_space->install_rom(0xc0000, 0xcffff, (void *)expansion_rom);
 	}
 }
 
diff --git a/src/devices/bus/pci/clgd546x_laguna.h b/src/devices/bus/pci/clgd546x_laguna.h
index 668f724452b..c9cf83d7a1d 100644
--- a/src/devices/bus/pci/clgd546x_laguna.h
+++ b/src/devices/bus/pci/clgd546x_laguna.h
@@ -43,6 +43,6 @@ class cirrus_gd5465_laguna3d_device :  public pci_card_device
 	bool m_vga_legacy_enable = false;
 };
 
-DECLARE_DEVICE_TYPE(CIRRUS_GD5465_LAGUNA3D, cirrus_gd5465_laguna3d_device)
+DECLARE_DEVICE_TYPE(GD5465_LAGUNA3D, cirrus_gd5465_laguna3d_device)
 
 #endif // MAME_BUS_PCI_CLGD546X_LAGUNA_H
diff --git a/src/devices/bus/pci/pci_slot.cpp b/src/devices/bus/pci/pci_slot.cpp
index 5f06639742e..1d26111ce71 100644
--- a/src/devices/bus/pci/pci_slot.cpp
+++ b/src/devices/bus/pci/pci_slot.cpp
@@ -22,6 +22,7 @@
 #include "rivatnt.h"
 #include "rtl8029as_pci.h"
 #include "rtl8139_pci.h"
+#include "sis6326.h"
 #include "sonicvibes.h"
 #include "sw1000xg.h"
 #include "virge_pci.h"
@@ -171,5 +172,6 @@ void agp_cards(device_slot_interface &device)
 	device.option_add("geforce256",     GEFORCE256);
 	device.option_add("geforce256_ddr", GEFORCE256_DDR);
 	device.option_add("quadro",         QUADRO);
-	device.option_add("laguna3d",       CIRRUS_GD5465_LAGUNA3D);
+	device.option_add("laguna3d",       GD5465_LAGUNA3D);
+	device.option_add("sis6326_agp",    SIS6326_AGP);
 }
diff --git a/src/devices/bus/pci/sis6326.cpp b/src/devices/bus/pci/sis6326.cpp
new file mode 100644
index 00000000000..825a789b8cc
--- /dev/null
+++ b/src/devices/bus/pci/sis6326.cpp
@@ -0,0 +1,202 @@
+// license:BSD-3-Clause
+// copyright-holders: Angelo Salese
+/**************************************************************************************************
+
+SiS 6326
+
+**************************************************************************************************/
+
+#include "emu.h"
+#include "sis6326.h"
+
+#define LOG_WARN      (1U << 1)
+#define LOG_AGP       (1U << 2)
+
+#define VERBOSE (LOG_GENERAL | LOG_WARN | LOG_AGP)
+//#define LOG_OUTPUT_FUNC osd_printf_info
+#include "logmacro.h"
+
+#define LOGWARN(...)            LOGMASKED(LOG_WARN, __VA_ARGS__)
+#define LOGAGP(...)             LOGMASKED(LOG_AGP, __VA_ARGS__)
+
+
+DEFINE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device,   "sis6326_agp",   "SiS 6326 AGP card")
+
+
+
+sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+	: pci_card_device(mconfig, type, tag, owner, clock)
+	, m_vga(*this, "vga")
+	, m_vga_rom(*this, "vga_rom")
+{
+	set_ids(0x10396326, 0xa0, 0x030000, 0x10396326);
+}
+
+sis6326_agp_device::sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+	: sis6326_agp_device(mconfig, SIS6326_AGP, tag, owner, clock)
+{
+}
+
+ROM_START( sis6326agp )
+	ROM_REGION32_LE( 0x10000, "vga_rom", ROMREGION_ERASEFF )
+	// Default is AOpen for supporting OpenGL
+	ROM_DEFAULT_BIOS("aopen")
+
+	ROM_SYSTEM_BIOS( 0, "aopen", "AOpen PA50V 2.25" )
+	ROMX_LOAD( "aopenpa50v.vbi", 0x000000, 0x008000, CRC(6c4c7518) SHA1(36bb29a23d565e34d548701acc248d50c99d7da4), ROM_BIOS(0) )
+	ROM_SYSTEM_BIOS( 1, "3dpro", "3DPro 4MB EDO 1.06" )
+	ROMX_LOAD( "3dpro4mbedo.bin", 0x000000, 0x010000, CRC(f04b374c) SHA1(6eb96f7517df6eb566c615c2ab9ec5567035b6a5), ROM_BIOS(1) )
+	ROM_SYSTEM_BIOS( 2, "siso", "SiS6326 4MB 1.21d" )
+	ROMX_LOAD( "4mbsdr.vbi",   0x000000, 0x00c000, CRC(a5f8c7f7) SHA1(9e5cfcf8d34e0c5829343179c87fb2b97f7a7f9c), ROM_BIOS(2) )
+	ROM_SYSTEM_BIOS( 3, "sis", "SiS6326 4MB 1.25" )
+	ROMX_LOAD( "sis6326agp.bin", 0x000000, 0x010000, CRC(a671255c) SHA1(332ab9499142e8f7a235afe046e8e8d21a28580d), ROM_BIOS(3) )
+
+	// basically identical to siso
+//	ROM_SYSTEM_BIOS( 3, "sisvbi", "SiS6326 4MB PCI 1.21d" )
+//	ROMX_LOAD( "4mb_pci.vbi",  0x000000, 0x00c000, CRC(8fca47be) SHA1(7ce995ec0d8b9ac4f0f40ccd0a61d7fc209d313f), ROM_BIOS(3) )
+ROM_END
+
+const tiny_rom_entry *sis6326_agp_device::device_rom_region() const
+{
+	return ROM_NAME(sis6326agp);
+}
+
+void sis6326_agp_device::device_add_mconfig(machine_config &config)
+{
+	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
+	screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480);
+	screen.set_screen_update(m_vga, FUNC(sis6236_vga_device::screen_update));
+
+	// TODO: barely similar, to be changed.
+	SIS6236_VGA(config, m_vga, 0);
+	m_vga->set_screen("screen");
+	// 4MB, max 8MB
+	m_vga->set_vram_size(4*1024*1024);
+}
+
+void sis6326_agp_device::device_start()
+{
+	pci_card_device::device_start();
+
+	add_map(4*1024*1024, M_MEM, FUNC(sis6326_agp_device::vram_aperture_map));
+	add_map(64*1024, M_MEM, FUNC(sis6326_agp_device::mmio_map));
+	add_map(16, M_IO, FUNC(sis6326_agp_device::vmi_map));
+
+	add_rom((u8 *)m_vga_rom->base(), 0x10000);
+	expansion_rom_base = 0xc0000;
+
+	// INTA#
+	// TODO: SRE D3 can strap this to no irq pin
+	intr_pin = 1;
+}
+
+void sis6326_agp_device::device_reset()
+{
+	pci_card_device::device_reset();
+
+	// doc makes multiple ninja jumps in messing up these defaults
+	// bus master (hardwired)
+	command = 0x0004;
+	command_mask = 0x23;
+	// medium DEVSEL#, 66 MHz capable, has capabilities list
+	status = 0x0230;
+
+	remap_cb();
+}
+
+u8 sis6326_agp_device::capptr_r()
+{
+	return 0x50;
+}
+
+u32 sis6326_agp_device::agp_command_r(offs_t offset, uint32_t mem_mask)
+{
+	LOGAGP("Read AGP command [$58] %d %d %08x\n", m_agp.enable, m_agp.data_rate, mem_mask);
+	// TODO: enable gets cleared by AGP_RESET, or even from PCI RST#
+	return m_agp.enable << 8 | (m_agp.data_rate & 7);
+}
+
+void sis6326_agp_device::agp_command_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+	LOGAGP("Write AGP command [$c8] %08x & %08x\n", data, mem_mask);
+
+	if (ACCESSING_BITS_8_15)
+	{
+		m_agp.enable = bool(BIT(m_agp.enable, 8));
+		LOGAGP("- AGP_ENABLE = %d\n", m_agp.enable);
+	}
+
+	if (ACCESSING_BITS_0_7)
+	{
+		// quick checker, to be translated into an AGP interface
+		std::map<u8, std::string> agp_transfer_rates = {
+			{ 0, "(illegal 0)" },
+			{ 1, "1X" },
+			{ 2, "2X" },
+			{ 3, "(illegal 3)" }
+		};
+
+		// make sure the AGP DATA_RATE specs are honored
+		const u8 data_rate = data & 3;
+		LOGAGP("- DATA_RATE = %s enabled=%d\n", agp_transfer_rates.at(data_rate), m_agp.enable);
+		m_agp.data_rate = data_rate;
+	}
+}
+
+void sis6326_agp_device::config_map(address_map &map)
+{
+	pci_card_device::config_map(map);
+	// AGP
+	map(0x50, 0x53).lr32(NAME([] () { return 0x00105c02; } ));
+	map(0x54, 0x57).lr32(NAME([] () { return 0x01000003; } ));
+	map(0x58, 0x5b).rw(FUNC(sis6326_agp_device::agp_command_r), FUNC(sis6326_agp_device::agp_command_w));
+	map(0x5c, 0x5f).lr32(NAME([] () { return 0x00000000; } )); // NULL terminator
+}
+
+void sis6326_agp_device::vram_aperture_map(address_map &map)
+{
+	map(0x0000000, 0x3ffffff).rw(m_vga, FUNC(sis6236_vga_device::mem_linear_r), FUNC(sis6236_vga_device::mem_linear_w));
+}
+
+void sis6326_agp_device::mmio_map(address_map &map)
+{
+}
+
+void sis6326_agp_device::vmi_map(address_map &map)
+{
+}
+
+// TODO: this should really be a subclass of VGA
+void sis6326_agp_device::legacy_memory_map(address_map &map)
+{
+	map(0xa0000, 0xbffff).rw(FUNC(sis6326_agp_device::vram_r), FUNC(sis6326_agp_device::vram_w));
+}
+
+void sis6326_agp_device::legacy_io_map(address_map &map)
+{
+	map(0, 0x02f).m(m_vga, FUNC(sis6236_vga_device::io_map));
+}
+
+uint8_t sis6326_agp_device::vram_r(offs_t offset)
+{
+	return downcast<sis6236_vga_device *>(m_vga.target())->mem_r(offset);
+}
+
+void sis6326_agp_device::vram_w(offs_t offset, uint8_t data)
+{
+	downcast<sis6236_vga_device *>(m_vga.target())->mem_w(offset, data);
+}
+
+void sis6326_agp_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
+							uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
+{
+	if (BIT(command, 1))
+	{
+		memory_space->install_readwrite_handler(0xa0000, 0xbffff, read8sm_delegate(*this, FUNC(sis6326_agp_device::vram_r)), write8sm_delegate(*this, FUNC(sis6326_agp_device::vram_w)));
+	}
+
+	if (BIT(command, 0))
+	{
+		io_space->install_device(0x03b0, 0x03df, *this, &sis6326_agp_device::legacy_io_map);
+	}
+}
diff --git a/src/devices/bus/pci/sis6326.h b/src/devices/bus/pci/sis6326.h
new file mode 100644
index 00000000000..114e2bedde8
--- /dev/null
+++ b/src/devices/bus/pci/sis6326.h
@@ -0,0 +1,59 @@
+// license:BSD-3-Clause
+// copyright-holders: Angelo Salese
+
+#ifndef MAME_BUS_PCI_SIS6326_H
+#define MAME_BUS_PCI_SIS6326_H
+
+#pragma once
+
+#include "pci_slot.h"
+#include "video/pc_vga_sis.h"
+
+class sis6326_agp_device : public pci_card_device
+{
+public:
+	sis6326_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+	static constexpr feature_type unemulated_features() { return feature::GRAPHICS; }
+
+protected:
+	sis6326_agp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+	virtual void device_start() override;
+	virtual void device_reset() override;
+	virtual void device_add_mconfig(machine_config &config) override;
+
+	virtual const tiny_rom_entry *device_rom_region() const override;
+
+	virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
+						   uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override;
+
+	virtual void config_map(address_map &map) override;
+
+	virtual u8 capptr_r() override;
+
+	void vram_aperture_map(address_map &map);
+	void mmio_map(address_map &map);
+	void vmi_map(address_map &map);
+private:
+	required_device<sis6236_vga_device> m_vga;
+	required_memory_region m_vga_rom;
+
+	void legacy_memory_map(address_map &map);
+	void legacy_io_map(address_map &map);
+
+	u8 vram_r(offs_t offset);
+	void vram_w(offs_t offset, uint8_t data);
+
+	struct {
+		bool enable = false;
+		u8 data_rate = 0;
+	} m_agp;
+
+	u32 agp_command_r(offs_t offset, uint32_t mem_mask);
+	void agp_command_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+};
+
+DECLARE_DEVICE_TYPE(SIS6326_AGP, sis6326_agp_device)
+
+#endif // MAME_BUS_PCI_SIS6326_H
diff --git a/src/devices/cpu/h8/h8_port.cpp b/src/devices/cpu/h8/h8_port.cpp
index 521cc29dedd..87253cd3eb0 100644
--- a/src/devices/cpu/h8/h8_port.cpp
+++ b/src/devices/cpu/h8/h8_port.cpp
@@ -85,7 +85,7 @@ u8 h8_port_device::odr_r()
 
 void h8_port_device::update_output()
 {
-	u8 data = m_dr & m_ddr & ~m_mask;
+	u8 data = (m_dr | ~m_ddr) & ~m_mask;
 	u8 ddr = m_ddr & ~m_mask; // 0-bits = hi-z
 	u16 res = ddr << 8 | data;
 
diff --git a/src/devices/cpu/ns32000/ns32000.cpp b/src/devices/cpu/ns32000/ns32000.cpp
index 6fef593dfd8..123353299fb 100644
--- a/src/devices/cpu/ns32000/ns32000.cpp
+++ b/src/devices/cpu/ns32000/ns32000.cpp
@@ -812,6 +812,9 @@ template <int HighBits, int Width> void ns32000_device<HighBits, Width>::flags(u
 
 template <int HighBits, int Width> void ns32000_device<HighBits, Width>::interrupt(unsigned const trap)
 {
+	if (machine().debug_enabled() && (trap > ABT))
+		debug()->exception_hook(trap);
+
 	unsigned offset = trap * 4;
 
 	switch (trap)
@@ -901,9 +904,6 @@ template <int HighBits, int Width> void ns32000_device<HighBits, Width>::interru
 	m_sequential = false;
 
 	m_icount -= top(SIZE_W, m_sp0) * 2 + top(SIZE_W, m_intbase + offset) + top(SIZE_D, m_sp0) + top(SIZE_D, m_mod);
-
-	if (machine().debug_enabled() && (trap > ABT))
-		debug()->exception_hook(trap);
 }
 
 template <int HighBits, int Width> void ns32000_device<HighBits, Width>::lpr(unsigned reg, addr_mode const mode, bool user, unsigned &tex)
@@ -3615,7 +3615,18 @@ template <int HighBits, int Width> void ns32000_device<HighBits, Width>::execute
 		}
 		catch (ns32000_abort const &)
 		{
-			interrupt(ABT);
+			try
+			{
+				interrupt(ABT);
+			}
+			catch (ns32000_abort const &)
+			{
+				// this shouldn't happen; probably indicates supervisor stack overflow (stuck interrupt?)
+				if (machine().debug_enabled())
+					machine().debug_break();
+				else
+					fatalerror("abort during abort entry 0x%08x\n", m_pc);
+			}
 		}
 	}
 }
diff --git a/src/devices/cpu/z80/r800dasm.cpp b/src/devices/cpu/z80/r800dasm.cpp
new file mode 100644
index 00000000000..655b21df3c5
--- /dev/null
+++ b/src/devices/cpu/z80/r800dasm.cpp
@@ -0,0 +1,606 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*****************************************************************************
+ *
+ *   r800dasm.cpp
+ *   Disassembler for ASCII R800 based on portable Z80 disassembler.
+ *
+ *****************************************************************************/
+
+#include "emu.h"
+#include "r800dasm.h"
+
+enum r800_disassembler::e_mnemonics : unsigned
+{
+	zADD  ,zADDC ,zADJ  ,zAND  ,zBC   ,zBIT  ,zBM   ,zBNC  ,
+	zBNZ  ,zBP   ,zBPE  ,zBPO  ,zBR   ,zBRK  ,zBZ   ,zCALL ,
+	zCLR  ,zCMP  ,zCMPM ,zDB   ,zDBNZ ,zDEC  ,zDI   ,zEI   ,
+	zHALT ,zIM   ,zIN   ,zINC  ,zINM  ,zLD   ,zMOVE ,zMOVEM,
+	zMULUB,zMULUW,zNEG  ,zNOP  ,zNOT  ,zNOTC ,zOR   ,zOUT  ,
+	zOUTM ,zPOP  ,zPUSH ,zRET  ,zRETI ,zRETN ,zROL  ,zROL4 ,
+	zROLA ,zROLC ,zROLCA,zROR  ,zROR4 ,zRORA ,zRORC ,zRORCA,
+	zSET  ,zSETC ,zSHL  ,zSHORT,zSHR  ,zSHRA ,zSLA  ,zSUB  ,
+	zSUBC ,zXCH  ,zXCHX ,zXOR
+};
+
+struct r800_disassembler::r800dasm
+{
+	e_mnemonics mnemonic;
+	const char *arguments;
+};
+
+static const char *const s_mnemonic[] =
+{
+	"add"  ,"addc" ,"adj"  ,"and"  ,"bc"   ,"bit"  ,"bm"   ,"bnc"  ,
+	"bnz"  ,"bp"   ,"bpe"  ,"bpo"  ,"br"   ,"brk"  ,"bz"   ,"call" ,
+	"clr"  ,"cmp"  ,"cmpm" ,"db"   ,"dbnz" ,"dec"  ,"di"   ,"ei"   ,
+	"halt" ,"im"   ,"in"   ,"inc"  ,"inm"  ,"ld"   ,"move" ,"movem",
+	"mulub","muluw","neg"  ,"nop"  ,"not"  ,"notc" ,"or"   ,"out"  ,
+	"outm" ,"pop"  ,"push" ,"ret"  ,"reti" ,"retn" ,"rol"  ,"rol4" ,
+	"rola" ,"rolc" ,"rolca","ror"  ,"ror4" ,"rora" ,"rorc" ,"rorca",
+	"set"  ,"setc" ,"shl"  ,"short","shr"  ,"shra" ,"sla"  ,"sub"  ,
+	"subc" ,"xch"  ,"xchx" ,"xor"
+};
+
+const u32 r800_disassembler::s_flags[] =
+{
+	0        ,0        ,0        ,0        ,0        ,0        ,0        ,0        ,
+	0        ,0        ,0        ,0        ,0        ,STEP_OVER,0        ,STEP_OVER,
+	0        ,0        ,STEP_COND,0        ,STEP_COND,0        ,0        ,0        ,
+	STEP_OVER,0        ,0        ,0        ,STEP_COND,0        ,0        ,STEP_COND,
+	0        ,0        ,0        ,0        ,0        ,0        ,0        ,0        ,
+	STEP_COND,0        ,0        ,STEP_OUT ,STEP_OUT ,STEP_OUT ,0        ,0        ,
+	0        ,0        ,0        ,0        ,0        ,0        ,0        ,0        ,
+	0        ,0        ,0        ,0        ,0        ,0        ,0        ,0        ,
+	0        ,0        ,0        ,0
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_xx_cb[256] =
+{
+	// 00 - 0F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zROLC,"Y"},   {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zRORC,"Y"},   {zDB,"?"},
+	// 10 - 1F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zROL,"Y"},    {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zROR,"Y"},    {zDB,"?"},
+	// 20 - 2F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSLA,"Y"},    {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSHRA,"Y"},   {zDB,"?"},
+	// 30 - 3F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSHL,"Y"},    {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSHR,"Y"},    {zDB,"?"},
+	// 40 - 4F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"0,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"1,Y"},  {zDB,"?"},
+	// 50 - 5F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"2,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"3,Y"},  {zDB,"?"},
+	// 60 - 6F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"4,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"5,Y"},  {zDB,"?"},
+	// 70 - 6F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"6,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zBIT,"7,Y"},  {zDB,"?"},
+	// 80 - 8F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"0,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"1,Y"},  {zDB,"?"},
+	// 90 - 9F
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"2,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"3,Y"},  {zDB,"?"},
+	// A0 - AF
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"4,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"5,Y"},  {zDB,"?"},
+	// B0 - BF
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"6,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zCLR,"7,Y"},  {zDB,"?"},
+	// C0 - CF
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"0,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"1,Y"},  {zDB,"?"},
+	// D0 - DF
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"2,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"3,Y"},  {zDB,"?"},
+	// E0 - EF
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"4,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"5,Y"},  {zDB,"?"},
+	// F0 - FF
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"6,Y"},  {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zDB,"?"},     {zDB,"?"},
+	{zDB,"?"},  {zDB,"?"},  {zSET,"7,Y"},  {zDB,"?"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_cb[256] =
+{
+	// 00 - 1F
+	{zROLC,".b"},   {zROLC,".c"},   {zROLC,".d"},      {zROLC,".e"},
+	{zROLC,".h"},   {zROLC,".l"},   {zROLC,"[.hl]"},   {zROLC,".a"},
+	{zRORC,".b"},   {zRORC,".c"},   {zRORC,".d"},      {zRORC,".e"},
+	{zRORC,".h"},   {zRORC,".l"},   {zRORC,"[.hl]"},   {zRORC,".a"},
+	// 10 - 1F
+	{zROL,".b"},    {zROL,".c"},    {zROL,".d"},       {zROL,".e"},
+	{zROL,".h"},    {zROL,".l"},    {zROL,"[.hl]"},    {zROL,".a"},
+	{zROR,".b"},    {zROR,".c"},    {zROR,".d"},       {zROR,".e"},
+	{zROR,".h"},    {zROR,".l"},    {zROR,"[.hl]"},    {zROR,".a"},
+	// 20 - 2F
+	{zSHL,".b"},    {zSHL,".c"},    {zSHL,".d"},       {zSHL,".e"},
+	{zSHL,".h"},    {zSHL,".l"},    {zSHL,"[.hl]"},    {zSHL,".a"},
+	{zSHRA,".b"},   {zSHRA,".c"},   {zSHRA,".d"},      {zSHRA,".e"},
+	{zSHRA,".h"},   {zSHRA,".l"},   {zSHRA,"[.hl]"},   {zSHRA,".a"},
+	// 30 - 3F
+	{zSHL,".b"},    {zSHL,".c"},    {zSHL,".d"},       {zSHL,".e"},
+	{zSHL,".h"},    {zSHL,".l"},    {zSHL,"[.hl]"},    {zSHL,".a"},
+	{zSHR,".b"},    {zSHR,".c"},    {zSHR,".d"},       {zSHR,".e"},
+	{zSHR,".h"},    {zSHR,".l"},    {zSHR,"[.hl]"},    {zSHR,".a"},
+	// 40 - 4F
+	{zBIT,"0,.b"},  {zBIT,"0,.c"},  {zBIT,"0,.d"},     {zBIT,"0,.e"},
+	{zBIT,"0,.h"},  {zBIT,"0,.l"},  {zBIT,"0,[.hl]"},  {zBIT,"0,.a"},
+	{zBIT,"1,.b"},  {zBIT,"1,.c"},  {zBIT,"1,.d"},     {zBIT,"1,.e"},
+	{zBIT,"1,.h"},  {zBIT,"1,.l"},  {zBIT,"1,[.hl]"},  {zBIT,"1,.a"},
+	// 50 - 5F
+	{zBIT,"2,.b"},  {zBIT,"2,.c"},  {zBIT,"2,.d"},     {zBIT,"2,.e"},
+	{zBIT,"2,.h"},  {zBIT,"2,.l"},  {zBIT,"2,[.hl]"},  {zBIT,"2,.a"},
+	{zBIT,"3,.b"},  {zBIT,"3,.c"},  {zBIT,"3,.d"},     {zBIT,"3,.e"},
+	{zBIT,"3,.h"},  {zBIT,"3,.l"},  {zBIT,"3,[.hl]"},  {zBIT,"3,.a"},
+	// 60 - 6F
+	{zBIT,"4,.b"},  {zBIT,"4,.c"},  {zBIT,"4,.d"},     {zBIT,"4,.e"},
+	{zBIT,"4,.h"},  {zBIT,"4,.l"},  {zBIT,"4,[.hl]"},  {zBIT,"4,.a"},
+	{zBIT,"5,.b"},  {zBIT,"5,.c"},  {zBIT,"5,.d"},     {zBIT,"5,.e"},
+	{zBIT,"5,.h"},  {zBIT,"5,.l"},  {zBIT,"5,[.hl]"},  {zBIT,"5,.a"},
+	// 70 - 7F
+	{zBIT,"6,.b"},  {zBIT,"6,.c"},  {zBIT,"6,.d"},     {zBIT,"6,.e"},
+	{zBIT,"6,.h"},  {zBIT,"6,.l"},  {zBIT,"6,[.hl]"},  {zBIT,"6,.a"},
+	{zBIT,"7,.b"},  {zBIT,"7,.c"},  {zBIT,"7,.d"},     {zBIT,"7,.e"},
+	{zBIT,"7,.h"},  {zBIT,"7,.l"},  {zBIT,"7,[.hl]"},  {zBIT,"7,.a"},
+	// 80 - 8F
+	{zCLR,"0,.b"},  {zCLR,"0,.c"},  {zCLR,"0,.d"},     {zCLR,"0,.e"},
+	{zCLR,"0,.h"},  {zCLR,"0,.l"},  {zCLR,"0,[.hl]"},  {zCLR,"0,.a"},
+	{zCLR,"1,.b"},  {zCLR,"1,.c"},  {zCLR,"1,.d"},     {zCLR,"1,.e"},
+	{zCLR,"1,.h"},  {zCLR,"1,.l"},  {zCLR,"1,[.hl]"},  {zCLR,"1,.a"},
+	// 90 - 9F
+	{zCLR,"2,.b"},  {zCLR,"2,.c"},  {zCLR,"2,.d"},     {zCLR,"2,.e"},
+	{zCLR,"2,.h"},  {zCLR,"2,.l"},  {zCLR,"2,[.hl]"},  {zCLR,"2,.a"},
+	{zCLR,"3,.b"},  {zCLR,"3,.c"},  {zCLR,"3,.d"},     {zCLR,"3,.e"},
+	{zCLR,"3,.h"},  {zCLR,"3,.l"},  {zCLR,"3,[.hl]"},  {zCLR,"3,.a"},
+	// A0 - AF
+	{zCLR,"4,.b"},  {zCLR,"4,.c"},  {zCLR,"4,.d"},     {zCLR,"4,.e"},
+	{zCLR,"4,.h"},  {zCLR,"4,.l"},  {zCLR,"4,[.hl]"},  {zCLR,"4,.a"},
+	{zCLR,"5,.b"},  {zCLR,"5,.c"},  {zCLR,"5,.d"},     {zCLR,"5,.e"},
+	{zCLR,"5,.h"},  {zCLR,"5,.l"},  {zCLR,"5,[.hl]"},  {zCLR,"5,.a"},
+	// B0 - BF
+	{zCLR,"6,.b"},  {zCLR,"6,.c"},  {zCLR,"6,.d"},     {zCLR,"6,.e"},
+	{zCLR,"6,.h"},  {zCLR,"6,.l"},  {zCLR,"6,[.hl]"},  {zCLR,"6,.a"},
+	{zCLR,"7,.b"},  {zCLR,"7,.c"},  {zCLR,"7,.d"},     {zCLR,"7,.e"},
+	{zCLR,"7,.h"},  {zCLR,"7,.l"},  {zCLR,"7,[.hl]"},  {zCLR,"7,.a"},
+	// C0 - CF
+	{zSET,"0,.b"},  {zSET,"0,.c"},  {zSET,"0,.d"},     {zSET,"0,.e"},
+	{zSET,"0,.h"},  {zSET,"0,.l"},  {zSET,"0,[.hl]"},  {zSET,"0,.a"},
+	{zSET,"1,.b"},  {zSET,"1,.c"},  {zSET,"1,.d"},     {zSET,"1,.e"},
+	{zSET,"1,.h"},  {zSET,"1,.l"},  {zSET,"1,[.hl]"},  {zSET,"1,.a"},
+	// D0 - DF
+	{zSET,"2,.b"},  {zSET,"2,.c"},  {zSET,"2,.d"},     {zSET,"2,.e"},
+	{zSET,"2,.h"},  {zSET,"2,.l"},  {zSET,"2,[.hl]"},  {zSET,"2,.a"},
+	{zSET,"3,.b"},  {zSET,"3,.c"},  {zSET,"3,.d"},     {zSET,"3,.e"},
+	{zSET,"3,.h"},  {zSET,"3,.l"},  {zSET,"3,[.hl]"},  {zSET,"3,.a"},
+	// E0 - EF
+	{zSET,"4,.b"},  {zSET,"4,.c"},  {zSET,"4,.d"},     {zSET,"4,.e"},
+	{zSET,"4,.h"},  {zSET,"4,.l"},  {zSET,"4,[.hl]"},  {zSET,"4,.a"},
+	{zSET,"5,.b"},  {zSET,"5,.c"},  {zSET,"5,.d"},     {zSET,"5,.e"},
+	{zSET,"5,.h"},  {zSET,"5,.l"},  {zSET,"5,[.hl]"},  {zSET,"5,.a"},
+	// F0 - FF
+	{zSET,"6,.b"},  {zSET,"6,.c"},  {zSET,"6,.d"},     {zSET,"6,.e"},
+	{zSET,"6,.h"},  {zSET,"6,.l"},  {zSET,"6,[.hl]"},  {zSET,"6,.a"},
+	{zSET,"7,.b"},  {zSET,"7,.c"},  {zSET,"7,.d"},     {zSET,"7,.e"},
+	{zSET,"7,.h"},  {zSET,"7,.l"},  {zSET,"7,[.hl]"},  {zSET,"7,.a"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_ed[256] =
+{
+	// 00 - 0F
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// 10 - 1F
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// 20 - 2F
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// 30 - 3F
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// 40 - 4F
+	{zIN,".b,[.c]"},            {zOUT,"[.c],.b"},     {zSUBC,".hl,.bc"},     {zLD,"(W),.bc"},
+	{zNEG,".a"},                {zRETN,nullptr},      {zIM,"0"},             {zLD,".i,.a"},
+	{zIN,".c,[.c]"},            {zOUT,"[.c],.c"},     {zADDC,".hl,.bc"},     {zLD,".bc,(W)"},
+	{zDB,"?"},                  {zRETI,nullptr},      {zDB,"?"},             {zLD,".r,.a"},
+	// 50 - 5F
+	{zIN,".d,[.c]"},            {zOUT,"[.c],.d"},     {zSUBC,".hl,.de"},     {zLD,"(W),.de"},
+	{zDB,"?"},                  {zDB,"?"},            {zIM,"1"},             {zLD,".a,.i"},
+	{zIN,".e,[.c]"},            {zOUT,"[.c],.e"},     {zADDC,".hl,.de"},     {zLD,".de,(W)"},
+	{zDB,"?"},                  {zDB,"?"},            {zIM,"2"},             {zLD,".a,.r"},
+	// 60 - 6F
+	{zIN,".h,[.c]"},            {zOUT,"[.c],.h"},     {zSUBC,".hl,.hl"},     {zLD,"(W),.hl"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zROR4,"[.hl]"},
+	{zIN,".l,[.c]"},            {zOUT,"[.c],.l"},     {zADDC,".hl,.hl"},     {zLD,".hl,(W)"},
+	{zDB,"?"},                  {zRETI,nullptr},      {zIM,"0"},             {zROL4,"[.hl]"},
+	// 70 - 7F
+	{zIN,".f,[.c]"},            {zDB,"?"},            {zSUBC,".hl,.sp"},     {zLD,"(W),.sp"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zIN,".a,[.c]"},            {zOUT,"[.c],.a"},     {zADDC,".hl,.sp"},     {zLD,".sp,(W)"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// 80 - 8F
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// 90 - 9F
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// A0 - AF
+	{zMOVE,"[.hl++],[.de++]"},  {zCMP,".a,[.hl++]"},  {zIN,"[.c],[.hl++]"},  {zOUT,"[.c],[.hl++]"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zMOVE,"[.hl--],[.de--]"},  {zCMP,".a,[.hl--]"},  {zIN,"[.c],[.hl--]"},  {zOUT,"[.c],[.hl--]"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// B0 - BF
+	{zMOVEM,"[.hl++],[.de++]"}, {zCMPM,".a,[.hl++]"}, {zINM,"[.c],[.hl++]"}, {zOUTM,"[.c],[.hl++]"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zMOVEM,"[.hl--],[.de--]"}, {zCMPM,".a,[.hl--]"}, {zINM,"[.c],[.hl--]"}, {zOUTM,"[.c],[.hl--]"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// C0 - CF
+	{zDB,"?"},                  {zMULUB,".a,.b"},     {zDB,"?"},             {zMULUW,".hl,.bc"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zMULUB,".a,.c"},     {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// D0 - DF
+	{zDB,"?"},                  {zMULUB,".a,.d"},     {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zMULUB,".a,.e"},     {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// E0 - EF
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	// F0 - FF
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zMULUW,".hl,.sp"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"},
+	{zDB,"?"},                  {zDB,"?"},            {zDB,"?"},             {zDB,"?"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_xx[256] =
+{
+	// 00 - 0F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zADD,".I,.bc"},   {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	// 10 - 1F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zADD,".I,.de"},   {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	// 20 - 2F
+	{zDB,"?"},         {zLD,".I,N"},      {zLD,"(W),.I"},  {zINC,".I"},
+	{zINC,".Ih"},      {zDEC,".Ih"},      {zLD,".Ih,B"},   {zDB,"?"},
+	{zDB,"?"},         {zADD,".I,.I"},    {zLD,".I,(W)"},  {zDEC,".I"},
+	{zINC,".Il"},      {zDEC,".Il"},      {zLD,".Il,B"},   {zDB,"?"},
+	// 30 - 3F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zINC,"X"},        {zDEC,"X"},        {zLD,"X,B"},     {zDB,"?"},
+	{zDB,"?"},         {zADD,".I,.sp"},   {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	// 40 - 4F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zLD,".b,.Ih"},    {zLD,".b,.Il"},    {zLD,".b,X"},    {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zLD,".c,.Ih"},    {zLD,".c,.Il"},    {zLD,".c,X"},    {zDB,"?"},
+	// 50 - 5F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zLD,".d,.Ih"},    {zLD,".d,.Il"},    {zLD,".d,X"},    {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zLD,".e,.Ih"},    {zLD,".e,.Il"},    {zLD,".e,X"},    {zDB,"?"},
+	// 60 - 6F
+	{zLD,".Ih,.b"},    {zLD,".Ih,.c"},    {zLD,".Ih,.d"},  {zLD,".Ih,.e"},
+	{zLD,".Ih,.Ih"},   {zLD,".Ih,.Il"},   {zLD,".h,X"},    {zLD,".Ih,.a"},
+	{zLD,".Il,.b"},    {zLD,".Il,.c"},    {zLD,".Il,.d"},  {zLD,".Il,.e"},
+	{zLD,".Il,.Ih"},   {zLD,".Il,.Il"},   {zLD,".l,X"},    {zLD,".Il,.a"},
+	// 70 - 7F
+	{zLD,"X,.b"},      {zLD,"X,.c"},      {zLD,"X,.d"},    {zLD,"X,.e"},
+	{zLD,"X,.h"},      {zLD,"X,.l"},      {zDB,"?"},       {zLD,"X,.a"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zLD,".a,.Ih"},    {zLD,".a,Il"},     {zLD,".a,X"},    {zDB,"?"},
+	// 80 - 8F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zADD,".a,.Ih"},   {zADD,".a,.Il"},   {zADD,".a,X"},   {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zADDC,".a,.Ih"},  {zADDC,".a,.Il"},  {zADDC,".a,X"},  {zDB,"?"},
+	// 90 - 9F
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zSUB,".a,.Ih"},   {zSUB,".a,.Il"},   {zSUB,".a,X"},   {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zSUBC,".a,.Ih"},  {zSUBC,".a,.Il"},  {zSUBC,".a,X"},  {zDB,"?"},
+	// A0 - AF
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zAND,".a,.Ih"},   {zAND,".a,.Il"},   {zAND,".a,X"},   {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zXOR,".a,.Ih"},   {zXOR,".a,.Il"},   {zXOR,".a,X"},   {zDB,"?"},
+	// B0 - BF
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zOR,".a,.Ih"},    {zOR,".a,.Il"},    {zOR,".a,X"},    {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zCMP,".a,.Ih"},   {zCMP,".a,.Il"},   {zCMP,".a,X"},   {zDB,"?"},
+	// C0 - CF
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"cb"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	// D0 - DF
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	// E0 - EF
+	{zDB,"?"},         {zPOP,".I"},       {zDB,"?"},       {zXCH,"[.sp],.I"},
+	{zDB,"?"},         {zPUSH,".I"},      {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zBR,"[.I]"},      {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	// F0 - FF
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zLD,".sp,I"},     {zDB,"?"},       {zDB,"?"},
+	{zDB,"?"},         {zDB,"?"},         {zDB,"?"},       {zDB,"?"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_main[256] =
+{
+	// 00 - 0F
+	{zNOP,nullptr},    {zLD,".bc,N"},     {zLD,"[.bc],.a"},    {zINC,".bc"},
+	{zINC,".b"},       {zDEC,".b"},       {zLD,".b,B"},        {zROLCA,nullptr},
+	{zXCH,".af,.af'"}, {zADD,".hl,.bc"},  {zLD,".a,[.bc]"},    {zDEC,".bc"},
+	{zINC,".c"},       {zDEC,".c"},       {zLD,".c,B"},        {zRORCA,nullptr},
+	// 10 - 1F
+	{zDBNZ,"O"},       {zLD,".de,N"},     {zLD,"[.de],.a"},    {zINC,".de"},
+	{zINC,".d"},       {zDEC,".d"},       {zLD,".d,B"},        {zROLA,nullptr},
+	{zSHORT,"br O"},   {zADD,".hl,.de"},  {zLD,".a,[.de]"},    {zDEC,".de"},
+	{zINC,".e"},       {zDEC,".e"},       {zLD,".e,B"},        {zRORA,nullptr},
+	// 20 - 2F
+	{zSHORT,"bnz O"},  {zLD,".hl,N"},     {zLD,"(W),.hl"},     {zINC,".hl"},
+	{zINC,".h"},       {zDEC,".h"},       {zLD,".h,B"},        {zADJ,".a"},
+	{zSHORT,"bz O"},   {zADD,".hl,.hl"},  {zLD,".hl,(W)"},     {zDEC,".hl"},
+	{zINC,".l"},       {zDEC,".l"},       {zLD,".l,B"},        {zNOT,".a"},
+	// 30 - 3F
+	{zSHORT,"bnc O"},  {zLD,".sp,N"},     {zLD,"(W),.a"},      {zINC,".sp"},
+	{zINC,"[.hl]"},    {zDEC,"[.hl]"},    {zLD,"[.hl],B"},     {zSETC,nullptr},
+	{zSHORT,"bc O"},   {zADD,".hl,.sp"},  {zLD,".a,(W)"},      {zDEC,".sp"},
+	{zINC,".a"},       {zDEC,".a"},       {zLD,".a,B"},        {zNOTC,nullptr},
+	// 40 - 4F
+	{zLD,".b,.b"},     {zLD,".b,.c"},     {zLD,".b,.d"},       {zLD,".b,.e"},
+	{zLD,".b,.h"},     {zLD,".b,.l"},     {zLD,".b,[.hl]"},    {zLD,".b,.a"},
+	{zLD,".c,.b"},     {zLD,".c,.c"},     {zLD,".c,.d"},       {zLD,".c,.e"},
+	{zLD,".c,.h"},     {zLD,".c,.l"},     {zLD,".c,[.hl]"},    {zLD,".c,.a"},
+	// 50 - 5F
+	{zLD,".d,.b"},     {zLD,".d,.c"},     {zLD,".d,.d"},       {zLD,".d,.e"},
+	{zLD,".d,.h"},     {zLD,".d,.l"},     {zLD,".d,[.hl]"},    {zLD,".d,.a"},
+	{zLD,".e,.b"},     {zLD,".e,.c"},     {zLD,".e,.d"},       {zLD,".e,.e"},
+	{zLD,".e,.h"},     {zLD,".e,.l"},     {zLD,".e,[.hl]"},    {zLD,".e,.a"},
+	// 60 - 6F
+	{zLD,".h,.b"},     {zLD,".h,.c"},     {zLD,".h,.d"},       {zLD,".h,.e"},
+	{zLD,".h,.h"},     {zLD,".h,.l"},     {zLD,".h,[.hl]"},    {zLD,".h,.a"},
+	{zLD,".l,.b"},     {zLD,".l,.c"},     {zLD,".l,.d"},       {zLD,".l,.e"},
+	{zLD,".l,.h"},     {zLD,".l,.l"},     {zLD,".l,[.hl]"},    {zLD,".l,.a"},
+	// 70 - 7F
+	{zLD,"[.hl],.b"},  {zLD,"[.hl],.c"},  {zLD,"[.hl],.d"},    {zLD,"[.hl],.e"},
+	{zLD,"[.hl],.h"},  {zLD,"[.hl],.l"},  {zHALT,nullptr},     {zLD,"[.hl],.a"},
+	{zLD,".a,.b"},     {zLD,".a,.c"},     {zLD,".a,.d"},       {zLD,".a,.e"},
+	{zLD,".a,.h"},     {zLD,".a,.l"},     {zLD,".a,[.hl]"},    {zLD,".a,.a"},
+	// 80 - BF
+	{zADD,".a,.b"},    {zADD,".a,.c"},    {zADD,".a,.d"},      {zADD,".a,.e"},
+	{zADD,".a,.h"},    {zADD,".a,.l"},    {zADD,".a,[.hl]"},   {zADD,".a,.a"},
+	{zADDC,".a,.b"},   {zADDC,".a,.c"},   {zADDC,".a,.d"},     {zADDC,".a,.e"},
+	{zADDC,".a,.h"},   {zADDC,".a,.l"},   {zADDC,".a,[.hl]"},  {zADDC,".a,.a"},
+	// 90 - 9F
+	{zSUB,".a,.b"},    {zSUB,".a,.c"},    {zSUB,".a,.d"},      {zSUB,".a,.e"},
+	{zSUB,".a,.h"},    {zSUB,".a,.l"},    {zSUB,".a,[.hl]"},   {zSUB,".a,.a"},
+	{zSUBC,".a,.b"},   {zSUBC,".a,.c"},   {zSUBC,".a,.d"},     {zSUBC,".a,.e"},
+	{zSUBC,".a,.h"},   {zSUBC,".a,.l"},   {zSUBC,".a,[.hl]"},  {zSUBC,".a,.a"},
+	// A0 - AF
+	{zAND,".a,.b"},    {zAND,".a,.c"},    {zAND,".a,.d"},      {zAND,".a,.e"},
+	{zAND,".a,.h"},    {zAND,".a,.l"},    {zAND,".a,[.hl]"},   {zAND,".a,.a"},
+	{zXOR,".a,.b"},    {zXOR,".a,.c"},    {zXOR,".a,.d"},      {zXOR,".a,.e"},
+	{zXOR,".a,.h"},    {zXOR,".a,.l"},    {zXOR,".a,[.hl]"},   {zXOR,".a,.a"},
+	// B0 - BF
+	{zOR,".a,.b"},     {zOR,".a,.c"},     {zOR,".a,.d"},       {zOR,".a,.e"},
+	{zOR,".a,.h"},     {zOR,".a,.l"},     {zOR,".a,[.hl]"},    {zOR,".a,.a"},
+	{zCMP,".a,.b"},    {zCMP,".a,.c"},    {zCMP,".d"},         {zCMP,".a,.e"},
+	{zCMP,".a,.h"},    {zCMP,".a,.l"},    {zCMP,".a,[.hl]"},   {zCMP,".a,.a"},
+	// C0 - CF
+	{zRET,"nz"},       {zPOP,".bc"},      {zBNZ,"A"},          {zBP,"A"},
+	{zCALL,"nz,A"},    {zPUSH,".bc"},     {zADD,".a,B"},       {zBRK,"V"},
+	{zRET,"z"},        {zRET,nullptr},    {zBZ,"A"},           {zDB,"cb"},
+	{zCALL,"z,A"},     {zCALL,"A"},       {zADDC,".a,B"},      {zBRK,"V"},
+	// D0 - DF
+	{zRET,"nc"},       {zPOP,".de"},      {zBNC,"A"},          {zOUT,"[P],[.a]"},
+	{zCALL,"nc,A"},    {zPUSH,".de"},     {zSUB,".a,B"},       {zBRK,"V"},
+	{zRET,"c"},        {zXCHX,nullptr},   {zBC,"A"},           {zIN,".a,[P]"},
+	{zCALL,"c,A"},     {zDB,"dd"},        {zSUBC,".a,B"},      {zBRK,"V"},
+	// E0 - EF
+	{zRET,"po"},       {zPOP,".hl"},      {zBPO,"A"},          {zXCH,"[.sp],.hl"},
+	{zCALL,"po,A"},    {zPUSH,".hl"},     {zAND,".a,B"},       {zBRK,"V"},
+	{zRET,"pe"},       {zBR,"[.hl]"},     {zBPE,"A"},          {zXCH,".de,.hl"},
+	{zCALL,"pe,A"},    {zDB,"ed"},        {zXOR,".a,B"},       {zBRK,"V"},
+	// F0 - FF
+	{zRET,"p"},        {zPOP,".af"},      {zBP,"A"},           {zDI,nullptr},
+	{zCALL,"p,A"},     {zPUSH,".af"},     {zOR,".a,B"},        {zBRK,"V"},
+	{zRET,"m"},        {zLD,".sp,.hl"},   {zBM,"A"},           {zEI,nullptr},
+	{zCALL,"m,A"},     {zDB,"fd"},        {zCMP,".a,B"},       {zBRK,"V"}
+};
+
+char r800_disassembler::sign(s8 offset)
+{
+	return (offset < 0)? '-':'+';
+}
+
+u32 r800_disassembler::offs(s8 offset)
+{
+	if (offset < 0)
+		return -offset;
+	return offset;
+}
+
+r800_disassembler::r800_disassembler()
+{
+}
+
+u32 r800_disassembler::opcode_alignment() const
+{
+	return 1;
+}
+
+offs_t r800_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
+{
+	s8 offset = 0;
+
+	offs_t pos = pc;
+	std::string ixy = "oops!!";
+
+	const r800dasm *d = nullptr;
+	u8 op = opcodes.r8(pos++);
+	switch (op)
+	{
+	case 0xcb:
+		op = opcodes.r8(pos++);
+		d = &mnemonic_cb[op];
+		break;
+	case 0xed:
+		d = &mnemonic_ed[opcodes.r8(pos++)];
+		if (d->mnemonic == zDB)
+			pos--;
+		break;
+	case 0xdd:
+	case 0xfd:
+	{
+		ixy = (op == 0xdd) ? "ix" : "iy";
+		u8 op1 = opcodes.r8(pos++);
+		if (op1 == 0xcb)
+		{
+			offset = params.r8(pos++);
+			op1 = params.r8(pos++);
+			d = &mnemonic_xx_cb[op1];
+		}
+		else
+		{
+			d = &mnemonic_xx[op1];
+			if (d->mnemonic == zDB)
+				pos--;
+		}
+		break;
+	}
+	default:
+		d = &mnemonic_main[op];
+		break;
+	}
+
+	uint32_t flags = s_flags[d->mnemonic];
+	if (d->arguments)
+	{
+		util::stream_format(stream, "%-5s ", s_mnemonic[d->mnemonic]);
+		const char *src = d->arguments;
+		while (*src)
+		{
+			switch (*src)
+			{
+			case '?':   // illegal opcode
+				util::stream_format(stream, "$%02x", op);
+				break;
+			case 'A':
+				util::stream_format(stream, "$%04X", params.r16(pos));
+				pos += 2;
+				if (src != d->arguments)
+					flags |= STEP_COND;
+				break;
+			case 'B':   // Byte op arg
+				util::stream_format(stream, "$%02X", params.r8(pos++));
+				break;
+			case 'N':   // Immediate 16 bit
+				util::stream_format(stream, "$%04X", params.r16(pos));
+				pos += 2;
+				break;
+			case 'O':   // Offset relative to PC
+				util::stream_format(stream, "$%04X", (pc + s8(params.r8(pos++)) + 2) & 0xffff);
+				if (src != d->arguments)
+					flags |= STEP_COND;
+				break;
+			case 'P':   // Port number
+				util::stream_format(stream, "$%02X", params.r8(pos++));
+				break;
+			case 'V':   // Break vector
+				util::stream_format(stream, "$%02X", op & 0x38);
+				break;
+			case 'W':   // Memory address word
+				util::stream_format(stream, "$%04X", params.r16(pos));
+				pos += 2;
+				break;
+			case 'X':
+				offset = params.r8(pos++);
+				[[fallthrough]];
+			case 'Y':
+				util::stream_format(stream,"[.%s%c$%02x]", ixy, sign(offset), offs(offset));
+				break;
+			case 'I':
+				util::stream_format(stream, "%s", ixy);
+				break;
+			default:
+				stream << *src;
+			}
+			src++;
+		}
+		if (d->mnemonic == zRET)
+			flags |= STEP_COND;
+	}
+	else
+	{
+		util::stream_format(stream, "%s", s_mnemonic[d->mnemonic]);
+	}
+
+	return (pos - pc) | flags | SUPPORTED;
+}
diff --git a/src/devices/cpu/z80/r800dasm.h b/src/devices/cpu/z80/r800dasm.h
new file mode 100644
index 00000000000..c08b6aa90de
--- /dev/null
+++ b/src/devices/cpu/z80/r800dasm.h
@@ -0,0 +1,39 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*****************************************************************************
+ *
+ *   r800dasm.h
+ *   Disassembler for ASCII R800 based on portable Z80 disassembler.
+ *
+ *****************************************************************************/
+
+#ifndef MAME_CPU_Z80_R800DASM_H
+#define MAME_CPU_Z80_R800DASM_H
+
+#pragma once
+
+class r800_disassembler : public util::disasm_interface
+{
+public:
+	r800_disassembler();
+	virtual ~r800_disassembler() = default;
+
+	virtual u32 opcode_alignment() const override;
+	virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+protected:
+	enum e_mnemonics : unsigned;
+	struct r800dasm;
+
+	static const u32 s_flags[];
+	static const r800dasm mnemonic_xx_cb[256];
+	static const r800dasm mnemonic_cb[256];
+	static const r800dasm mnemonic_ed[256];
+	static const r800dasm mnemonic_xx[256];
+	static const r800dasm mnemonic_main[256];
+
+	static inline char sign(s8 offset);
+	static inline u32 offs(s8 offset);
+};
+
+#endif
diff --git a/src/devices/machine/it8705f.cpp b/src/devices/machine/it8705f.cpp
new file mode 100644
index 00000000000..cbfec4fc3dd
--- /dev/null
+++ b/src/devices/machine/it8705f.cpp
@@ -0,0 +1,593 @@
+// license:BSD-3-Clause
+// copyright-holders: Angelo Salese
+/**************************************************************************************************
+
+Winbond IT8705F LPC Super I/O
+
+TODO:
+- Move stuff from sis950_lpc;
+- shutms11 fails detecting FDC;
+
+**************************************************************************************************/
+
+#include "emu.h"
+#include "machine/it8705f.h"
+
+#include "formats/naslite_dsk.h"
+
+#include <algorithm>
+
+#define VERBOSE (LOG_GENERAL)
+//#define LOG_OUTPUT_FUNC osd_printf_info
+#include "logmacro.h"
+
+
+DEFINE_DEVICE_TYPE(IT8705F, it8705f_device, "it8705f", "ITE IT8705F LPC Super I/O")
+
+it8705f_device::it8705f_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+	: device_t(mconfig, IT8705F, tag, owner, clock)
+	, device_isa16_card_interface(mconfig, *this)
+	, device_memory_interface(mconfig, *this)
+	, m_space_config("superio_config_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(it8705f_device::config_map), this))
+	, m_pc_fdc(*this, "fdc")
+	, m_pc_com(*this, "uart%d", 0U)
+	, m_pc_lpt(*this, "lpta")
+	, m_logical_view(*this, "logical_view")
+	, m_irq1_callback(*this)
+	, m_irq8_callback(*this)
+	, m_irq9_callback(*this)
+	, m_txd1_callback(*this)
+	, m_ndtr1_callback(*this)
+	, m_nrts1_callback(*this)
+	, m_txd2_callback(*this)
+	, m_ndtr2_callback(*this)
+	, m_nrts2_callback(*this)
+	, m_index(0)
+	, m_logical_index(0)
+	, m_lock_sequence_index(0)
+{
+	std::fill(std::begin(m_activate), std::end(m_activate), false);
+}
+
+it8705f_device::~it8705f_device()
+{
+}
+
+void it8705f_device::device_start()
+{
+	set_isa_device();
+	m_isa->set_dma_channel(0, this, true);
+	m_isa->set_dma_channel(1, this, true);
+	m_isa->set_dma_channel(2, this, true);
+	m_isa->set_dma_channel(3, this, true);
+	remap(AS_IO, 0, 0x400);
+
+}
+
+void it8705f_device::device_reset()
+{
+	m_index = 0;
+	m_lock_sequence_index = 0;
+
+	m_pc_fdc_irq_line = 6;
+	m_pc_fdc_drq_line = 2;
+//  m_pc_fdc_mode = ;
+	m_pc_fdc_address = 0x3f0;
+
+	m_pc_lpt_address = 0x0378;
+	m_pc_lpt_irq_line = 7;
+	m_pc_lpt_drq_line = 4; // disabled
+//  m_pc_lpt_mode = 0x3f;
+
+	m_pc_fdc->set_rate(500000);
+}
+
+device_memory_interface::space_config_vector it8705f_device::memory_space_config() const
+{
+	return space_config_vector {
+		std::make_pair(0, &m_space_config)
+	};
+}
+
+static void pc_hd_floppies(device_slot_interface &device)
+{
+	device.option_add("525hd", FLOPPY_525_HD);
+	device.option_add("35hd", FLOPPY_35_HD);
+	device.option_add("525dd", FLOPPY_525_DD);
+	device.option_add("35dd", FLOPPY_35_DD);
+}
+
+void it8705f_device::floppy_formats(format_registration &fr)
+{
+	fr.add_pc_formats();
+	fr.add(FLOPPY_NASLITE_FORMAT);
+}
+
+void it8705f_device::device_add_mconfig(machine_config &config)
+{
+	// 82077 compatible
+	N82077AA(config, m_pc_fdc, XTAL(24'000'000), upd765_family_device::mode_t::AT);
+	m_pc_fdc->intrq_wr_callback().set(FUNC(it8705f_device::irq_floppy_w));
+	m_pc_fdc->drq_wr_callback().set(FUNC(it8705f_device::drq_floppy_w));
+	FLOPPY_CONNECTOR(config, "fdc:0", pc_hd_floppies, "35hd", it8705f_device::floppy_formats);
+	FLOPPY_CONNECTOR(config, "fdc:1", pc_hd_floppies, "35hd", it8705f_device::floppy_formats);
+
+	NS16550(config, m_pc_com[0], XTAL(24'000'000) / 13);
+	m_pc_com[0]->out_int_callback().set(FUNC(it8705f_device::irq_serial1_w));
+	m_pc_com[0]->out_tx_callback().set(FUNC(it8705f_device::txd_serial1_w));
+	m_pc_com[0]->out_dtr_callback().set(FUNC(it8705f_device::dtr_serial1_w));
+	m_pc_com[0]->out_rts_callback().set(FUNC(it8705f_device::rts_serial1_w));
+
+	NS16550(config, m_pc_com[1], XTAL(24'000'000) / 13);
+	m_pc_com[1]->out_int_callback().set(FUNC(it8705f_device::irq_serial2_w));
+	m_pc_com[1]->out_tx_callback().set(FUNC(it8705f_device::txd_serial2_w));
+	m_pc_com[1]->out_dtr_callback().set(FUNC(it8705f_device::dtr_serial2_w));
+	m_pc_com[1]->out_rts_callback().set(FUNC(it8705f_device::rts_serial2_w));
+
+	PC_LPT(config, m_pc_lpt);
+	m_pc_lpt->irq_handler().set(FUNC(it8705f_device::irq_parallel_w));
+
+}
+
+
+void it8705f_device::remap(int space_id, offs_t start, offs_t end)
+{
+	if (space_id == AS_IO)
+	{
+		// TODO: apparently installs two ports, an alias at 0x4e/0x4f
+		m_isa->install_device(0x002e, 0x002f, read8sm_delegate(*this, FUNC(it8705f_device::read)), write8sm_delegate(*this, FUNC(it8705f_device::write)));
+
+		if (m_activate[0])
+		{
+			m_isa->install_device(m_pc_fdc_address, m_pc_fdc_address + 7, *m_pc_fdc, &n82077aa_device::map);
+		}
+
+		for (int i = 0; i < 2; i++)
+		{
+			if (m_activate[i + 1])
+			{
+				const u16 uart_addr = m_pc_com_address[i];
+				m_isa->install_device(uart_addr, uart_addr + 7, read8sm_delegate(*m_pc_com[i], FUNC(ns16450_device::ins8250_r)), write8sm_delegate(*m_pc_com[i], FUNC(ns16450_device::ins8250_w)));
+			}
+		}
+
+		// can't map below 0x100
+		if (m_activate[3] & 1 && m_pc_lpt_address & 0xf00)
+		{
+			m_isa->install_device(m_pc_lpt_address, m_pc_lpt_address + 3, read8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::read)), write8sm_delegate(*m_pc_lpt, FUNC(pc_lpt_device::write)));
+		}
+	}
+}
+
+uint8_t it8705f_device::read(offs_t offset)
+{
+	if (m_lock_sequence_index != 4)
+		return 0;
+
+	if (offset == 0)
+		return m_index;
+
+	return space().read_byte(m_index);
+}
+
+void it8705f_device::write(offs_t offset, u8 data)
+{
+	if (offset == 0)
+	{
+		if (m_lock_sequence_index == 4)
+			m_index = data;
+		else
+		{
+			// TODO: 0xaa for lock_seq[3] with 0x4e alias
+			const u8 lock_seq[4] = { 0x87, 0x01, 0x55, 0x55 };
+			if (data == lock_seq[m_lock_sequence_index])
+				m_lock_sequence_index ++;
+			else
+				m_lock_sequence_index = 0;
+		}
+	}
+	else
+	{
+		if (m_lock_sequence_index == 4)
+			space().write_byte(m_index, data);
+	}
+}
+
+void it8705f_device::config_map(address_map &map)
+{
+	map(0x02, 0x02).lw8(
+		NAME([this] (offs_t offset, u8 data) {
+			if (BIT(data, 1))
+				m_lock_sequence_index = 0;
+			// TODO: bit 0 for global reset
+		})
+	);
+	map(0x07, 0x07).lr8(NAME([this] () { return m_logical_index; })).w(FUNC(it8705f_device::logical_device_select_w));
+	map(0x20, 0x20).lr8(NAME([] () { return 0x87; })); // device ID
+	map(0x21, 0x21).lr8(NAME([] () { return 0x05; })); // revision
+//  map(0x22, 0x22) Configuration Select and Chip Version
+//  map(0x23, 0x23) Software Suspend
+//  map(0x24, 0x24) Clock Selection and Flash ROM I/F control
+//  map(0x25, 0x2a) LDN5 GPIO set multi-function pins
+//  map(0x2b, 0x2b) LDN4 alternate GPIO set multi-function pins
+//  map(0x2e, 0x2f) LDNF4 Test Modes
+
+	map(0x30, 0xff).view(m_logical_view);
+	// FDC
+	m_logical_view[0](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<0>), FUNC(it8705f_device::activate_w<0>));
+	m_logical_view[0](0x60, 0x61).lrw8(
+		NAME([this] (offs_t offset) {
+			return (m_pc_fdc_address >> (offset * 8)) & 0xff;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			const u8 shift = offset * 8;
+			m_pc_fdc_address &= 0xff << shift;
+			m_pc_fdc_address |= data << (shift ^ 8);
+			m_pc_fdc_address &= ~0xf007;
+			LOG("LDN0 (FDC): remap %04x ([%d] %02x)\n", m_pc_fdc_address, offset, data);
+
+			remap(AS_IO, 0, 0x400);
+		})
+	);
+	m_logical_view[0](0x70, 0x70).lrw8(
+		NAME([this] () {
+			return m_pc_fdc_irq_line;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			m_pc_fdc_irq_line = data & 0xf;
+			LOG("LDN0 (FDC): irq routed to %02x\n", m_pc_lpt_irq_line);
+		})
+	);
+	m_logical_view[0](0x74, 0x74).lrw8(
+		NAME([this] () {
+			return m_pc_lpt_drq_line;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			m_pc_fdc_drq_line = data & 0x7;
+			LOG("LDN0 (FDC): drq %s (%02x)\n", BIT(m_pc_lpt_drq_line, 2) ? "disabled" : "enabled", data);
+		})
+	);
+	// TODO: m_logical_view[0](0xf0, 0xf1) FDC config
+
+	// UART1
+	m_logical_view[1](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<1>), FUNC(it8705f_device::activate_w<1>));
+	m_logical_view[1](0x60, 0x61).rw(FUNC(it8705f_device::uart_address_r<0>), FUNC(it8705f_device::uart_address_w<0>));
+	m_logical_view[1](0x70, 0x70).rw(FUNC(it8705f_device::uart_irq_r<0>), FUNC(it8705f_device::uart_irq_w<0>));
+	m_logical_view[1](0xf0, 0xf0).rw(FUNC(it8705f_device::uart_config_r<0>), FUNC(it8705f_device::uart_config_w<0>));
+
+	// UART2
+	m_logical_view[2](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<2>), FUNC(it8705f_device::activate_w<2>));
+	m_logical_view[2](0x60, 0x61).rw(FUNC(it8705f_device::uart_address_r<1>), FUNC(it8705f_device::uart_address_w<1>));
+	m_logical_view[2](0x70, 0x70).rw(FUNC(it8705f_device::uart_irq_r<1>), FUNC(it8705f_device::uart_irq_w<1>));
+	m_logical_view[2](0xf0, 0xf0).rw(FUNC(it8705f_device::uart_config_r<1>), FUNC(it8705f_device::uart_config_w<1>));
+
+	// LPT
+	m_logical_view[3](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<3>), FUNC(it8705f_device::activate_w<3>));
+	m_logical_view[3](0x60, 0x61).lrw8(
+		NAME([this] (offs_t offset) {
+			return (m_pc_lpt_address >> (offset * 8)) & 0xff;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			const u8 shift = offset * 8;
+			m_pc_lpt_address &= 0xff << shift;
+			m_pc_lpt_address |= data << (shift ^ 8);
+			m_pc_lpt_address &= ~0xf003;
+			LOG("LDN3 (LPT): remap %04x ([%d] %02x)\n", m_pc_lpt_address, offset, data);
+
+			remap(AS_IO, 0, 0x400);
+		})
+	);
+	//m_logical_view[3](0x62, 0x63) secondary base address
+	//m_logical_view[3](0x64, 0x65) POST data port base address
+	m_logical_view[3](0x70, 0x70).lrw8(
+		NAME([this] () {
+			return m_pc_lpt_irq_line;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			m_pc_lpt_irq_line = data & 0xf;
+			LOG("LDN3 (LPT): irq routed to %02x\n", m_pc_lpt_irq_line);
+		})
+	);
+	m_logical_view[3](0x74, 0x74).lrw8(
+		NAME([this] () {
+			return m_pc_lpt_drq_line;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			m_pc_lpt_drq_line = data & 0x7;
+			LOG("LDN3 (LPT): drq %s (%02x)\n", BIT(m_pc_lpt_drq_line, 2) ? "disabled" : "enabled", data);
+		})
+	);
+
+	// Environment controller / HW monitor
+	m_logical_view[4](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<4>), FUNC(it8705f_device::activate_w<4>));
+	m_logical_view[4](0x31, 0xff).unmaprw();
+
+	// GPIO
+	m_logical_view[5](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<5>), FUNC(it8705f_device::activate_w<5>));
+	m_logical_view[5](0x31, 0xff).unmaprw();
+
+	// Game port
+	m_logical_view[6](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<6>), FUNC(it8705f_device::activate_w<6>));
+	m_logical_view[6](0x31, 0xff).unmaprw();
+
+	// Consumer IR
+	m_logical_view[7](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<7>), FUNC(it8705f_device::activate_w<7>));
+	m_logical_view[7](0x31, 0xff).unmaprw();
+
+	// MIDI port
+	m_logical_view[8](0x30, 0x30).rw(FUNC(it8705f_device::activate_r<8>), FUNC(it8705f_device::activate_w<8>));
+	m_logical_view[8](0x31, 0xff).unmaprw();
+}
+
+/*
+ * Global register space
+ */
+
+void it8705f_device::logical_device_select_w(offs_t offset, u8 data)
+{
+	m_logical_index = data;
+	if (m_logical_index <= 0x8)
+		m_logical_view.select(m_logical_index);
+	else
+		LOG("Attempt to select an unmapped device with %02x\n", data);
+}
+
+template <unsigned N> u8 it8705f_device::activate_r(offs_t offset)
+{
+	return m_activate[N];
+}
+
+template <unsigned N> void it8705f_device::activate_w(offs_t offset, u8 data)
+{
+	m_activate[N] = data & 1;
+	LOG("LDN%d Device %s\n", N, data & 1 ? "enabled" : "disabled");
+	remap(AS_IO, 0, 0x400);
+}
+
+void it8705f_device::request_irq(int irq, int state)
+{
+	switch (irq)
+	{
+	case 1:
+		m_irq1_callback(state);
+		break;
+	case 3:
+		m_isa->irq3_w(state);
+		break;
+	case 4:
+		m_isa->irq4_w(state);
+		break;
+	case 5:
+		m_isa->irq5_w(state);
+		break;
+	case 6:
+		m_isa->irq6_w(state);
+		break;
+	case 7:
+		m_isa->irq7_w(state);
+		break;
+	case 8:
+		m_irq8_callback(state);
+		break;
+	case 9:
+		m_irq9_callback(state);
+		break;
+	case 10:
+		m_isa->irq10_w(state);
+		break;
+	case 11:
+		m_isa->irq11_w(state);
+		break;
+	case 12:
+		m_isa->irq12_w(state);
+		break;
+	case 14:
+		m_isa->irq14_w(state);
+		break;
+	case 15:
+		m_isa->irq15_w(state);
+		break;
+	}
+}
+
+void it8705f_device::request_dma(int dreq, int state)
+{
+	switch (dreq)
+	{
+	case 0:
+		m_isa->drq0_w(state);
+		break;
+	case 1:
+		m_isa->drq1_w(state);
+		break;
+	case 2:
+		m_isa->drq2_w(state);
+		break;
+	case 3:
+		m_isa->drq3_w(state);
+		break;
+	}
+}
+
+/*
+ * Device #0 (FDC)
+ */
+
+void it8705f_device::irq_floppy_w(int state)
+{
+	if (!m_activate[0])
+		return;
+	request_irq(m_pc_fdc_irq_line, state ? ASSERT_LINE : CLEAR_LINE);
+}
+
+void it8705f_device::drq_floppy_w(int state)
+{
+	if (!m_activate[0])
+		return;
+	request_dma(m_pc_fdc_drq_line, state ? ASSERT_LINE : CLEAR_LINE);
+}
+
+/*
+ * Device #1/#2 (UART)
+ */
+
+template <unsigned N> u8 it8705f_device::uart_address_r(offs_t offset)
+{
+	return (m_pc_com_address[N] >> (offset * 8)) & 0xff;
+}
+
+template <unsigned N> void it8705f_device::uart_address_w(offs_t offset, u8 data)
+{
+	const u8 shift = offset * 8;
+	m_pc_com_address[N] &= 0xff << shift;
+	m_pc_com_address[N] |= data << (shift ^ 8);
+	m_pc_com_address[N] &= ~0xf007;
+	LOG("LDN%d (UART): remap %04x ([%d] %02x)\n", N, m_pc_com_address[N], offset, data);
+
+	remap(AS_IO, 0, 0x400);
+}
+
+template <unsigned N> u8 it8705f_device::uart_irq_r(offs_t offset)
+{
+	return m_pc_com_irq_line[N];
+}
+
+template <unsigned N> void it8705f_device::uart_irq_w(offs_t offset, u8 data)
+{
+	m_pc_com_irq_line[N] = data & 0xf;
+	LOG("LDN%d (UART): irq routed to %02x\n", N, m_pc_com_irq_line[N]);
+}
+
+template <unsigned N> u8 it8705f_device::uart_config_r(offs_t offset)
+{
+	return m_pc_com_control[N];
+}
+
+/*
+ * ---- -xx- Clock Source
+ * ---- -00- 24 MHz/13
+ * ---- -??- <reserved>
+ * ---- ---x IRQ sharing enable
+ */
+template <unsigned N> void it8705f_device::uart_config_w(offs_t offset, u8 data)
+{
+	m_pc_com_control[N] = data;
+	LOG("LDN%d (UART): control %02x\n", N, m_pc_com_control[N]);
+}
+
+void it8705f_device::irq_serial1_w(int state)
+{
+	if (!m_activate[1])
+		return;
+	request_irq(3, state ? ASSERT_LINE : CLEAR_LINE);
+}
+
+void it8705f_device::irq_serial2_w(int state)
+{
+	if (!m_activate[2])
+		return;
+	request_irq(4, state ? ASSERT_LINE : CLEAR_LINE);
+}
+
+void it8705f_device::txd_serial1_w(int state)
+{
+	if (!m_activate[1])
+		return;
+	m_txd1_callback(state);
+}
+
+void it8705f_device::txd_serial2_w(int state)
+{
+	if (!m_activate[2])
+		return;
+	m_txd2_callback(state);
+}
+
+void it8705f_device::dtr_serial1_w(int state)
+{
+	if (!m_activate[1])
+		return;
+	m_ndtr1_callback(state);
+}
+
+void it8705f_device::dtr_serial2_w(int state)
+{
+	if (!m_activate[2])
+		return;
+	m_ndtr2_callback(state);
+}
+
+void it8705f_device::rts_serial1_w(int state)
+{
+	if (!m_activate[1])
+		return;
+	m_nrts1_callback(state);
+}
+
+void it8705f_device::rts_serial2_w(int state)
+{
+	if (!m_activate[2])
+		return;
+	m_nrts2_callback(state);
+}
+
+void it8705f_device::rxd1_w(int state)
+{
+	m_pc_com[0]->rx_w(state);
+}
+
+void it8705f_device::ndcd1_w(int state)
+{
+	m_pc_com[0]->dcd_w(state);
+}
+
+void it8705f_device::ndsr1_w(int state)
+{
+	m_pc_com[0]->dsr_w(state);
+}
+
+void it8705f_device::nri1_w(int state)
+{
+	m_pc_com[0]->ri_w(state);
+}
+
+void it8705f_device::ncts1_w(int state)
+{
+	m_pc_com[0]->cts_w(state);
+}
+
+void it8705f_device::rxd2_w(int state)
+{
+	m_pc_com[1]->rx_w(state);
+}
+
+void it8705f_device::ndcd2_w(int state)
+{
+	m_pc_com[1]->dcd_w(state);
+}
+
+void it8705f_device::ndsr2_w(int state)
+{
+	m_pc_com[1]->dsr_w(state);
+}
+
+void it8705f_device::nri2_w(int state)
+{
+	m_pc_com[1]->ri_w(state);
+}
+
+void it8705f_device::ncts2_w(int state)
+{
+	m_pc_com[1]->cts_w(state);
+}
+
+/*
+ * Device #3 (Parallel)
+ */
+
+void it8705f_device::irq_parallel_w(int state)
+{
+	if (m_activate[3] == false)
+		return;
+	request_irq(m_pc_lpt_irq_line, state ? ASSERT_LINE : CLEAR_LINE);
+}
diff --git a/src/devices/machine/it8705f.h b/src/devices/machine/it8705f.h
new file mode 100644
index 00000000000..810d75c0258
--- /dev/null
+++ b/src/devices/machine/it8705f.h
@@ -0,0 +1,131 @@
+// license:BSD-3-Clause
+// copyright-holders: Angelo Salese
+
+#ifndef MAME_MACHINE_IT8705F_H
+#define MAME_MACHINE_IT8705F_H
+
+#pragma once
+
+#include "bus/isa/isa.h"
+#include "imagedev/floppy.h"
+#include "machine/8042kbdc.h"
+#include "machine/ds128x.h"
+#include "machine/ins8250.h"
+#include "machine/pc_lpt.h"
+#include "machine/upd765.h"
+
+class it8705f_device : public device_t,
+						 public device_isa16_card_interface,
+						 public device_memory_interface
+{
+public:
+	it8705f_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	virtual ~it8705f_device();
+
+	void remap(int space_id, offs_t start, offs_t end) override;
+
+	auto irq1() { return m_irq1_callback.bind(); }
+	auto irq8() { return m_irq8_callback.bind(); }
+	auto irq9() { return m_irq9_callback.bind(); }
+	auto txd1() { return m_txd1_callback.bind(); }
+	auto ndtr1() { return m_ndtr1_callback.bind(); }
+	auto nrts1() { return m_nrts1_callback.bind(); }
+	auto txd2() { return m_txd2_callback.bind(); }
+	auto ndtr2() { return m_ndtr2_callback.bind(); }
+	auto nrts2() { return m_nrts2_callback.bind(); }
+
+	void rxd1_w(int state);
+	void ndcd1_w(int state);
+	void ndsr1_w(int state);
+	void nri1_w(int state);
+	void ncts1_w(int state);
+	void rxd2_w(int state);
+	void ndcd2_w(int state);
+	void ndsr2_w(int state);
+	void nri2_w(int state);
+	void ncts2_w(int state);
+
+	static void floppy_formats(format_registration &fr);
+
+protected:
+	virtual void device_start() override;
+	virtual void device_reset() override;
+
+	virtual space_config_vector memory_space_config() const override;
+	virtual void device_add_mconfig(machine_config &config) override;
+
+private:
+	const address_space_config m_space_config;
+
+	required_device<n82077aa_device> m_pc_fdc;
+	required_device_array<ns16550_device, 2> m_pc_com;
+	required_device<pc_lpt_device> m_pc_lpt;
+	memory_view m_logical_view;
+
+	devcb_write_line m_irq1_callback;
+	devcb_write_line m_irq8_callback;
+	devcb_write_line m_irq9_callback;
+	devcb_write_line m_txd1_callback;
+	devcb_write_line m_ndtr1_callback;
+	devcb_write_line m_nrts1_callback;
+	devcb_write_line m_txd2_callback;
+	devcb_write_line m_ndtr2_callback;
+	devcb_write_line m_nrts2_callback;
+
+	u8 m_index = 0;
+	u8 m_logical_index = 0;
+	bool m_activate[9]{};
+
+	u8 m_lock_sequence_index = 0;
+
+	uint8_t read(offs_t offset);
+	void write(offs_t offset, u8 data);
+
+	void config_map(address_map &map);
+
+	void logical_device_select_w(offs_t offset, u8 data);
+	template <unsigned N> u8 activate_r(offs_t offset);
+	template <unsigned N> void activate_w(offs_t offset, u8 data);
+
+	void request_irq(int irq, int state);
+	void request_dma(int dreq, int state);
+
+	u8 m_pc_fdc_irq_line = 6;
+	u8 m_pc_fdc_drq_line = 2;
+//  u8 m_pc_fdc_mode;
+	u16 m_pc_fdc_address = 0x3f0;
+
+	void irq_floppy_w(int state);
+	void drq_floppy_w(int state);
+
+	u8 m_pc_lpt_irq_line = 7;
+	u8 m_pc_lpt_drq_line = 4;
+//  u8 m_pc_lpt_mode;
+	u16 m_pc_lpt_address = 0x378;
+
+	void irq_parallel_w(int state);
+
+	u16 m_pc_com_address[2]{};
+	u8 m_pc_com_irq_line[2]{};
+	u8 m_pc_com_control[2]{};
+
+	void irq_serial1_w(int state);
+	void txd_serial1_w(int state);
+	void dtr_serial1_w(int state);
+	void rts_serial1_w(int state);
+	void irq_serial2_w(int state);
+	void txd_serial2_w(int state);
+	void dtr_serial2_w(int state);
+	void rts_serial2_w(int state);
+
+	template <unsigned N> u8 uart_address_r(offs_t offset);
+	template <unsigned N> void uart_address_w(offs_t offset, u8 data);
+	template <unsigned N> u8 uart_irq_r(offs_t offset);
+	template <unsigned N> void uart_irq_w(offs_t offset, u8 data);
+	template <unsigned N> u8 uart_config_r(offs_t offset);
+	template <unsigned N> void uart_config_w(offs_t offset, u8 data);
+};
+
+DECLARE_DEVICE_TYPE(IT8705F, it8705f_device);
+
+#endif // MAME_MACHINE_IT8705F_H
diff --git a/src/devices/machine/ncr5385.cpp b/src/devices/machine/ncr5385.cpp
index 76448cf620c..1673beeb959 100644
--- a/src/devices/machine/ncr5385.cpp
+++ b/src/devices/machine/ncr5385.cpp
@@ -1,119 +1,827 @@
 // license:BSD-3-Clause
 // copyright-holders:Ryan Holtz
-/***********************************************************************
 
-    NCR 5385E SCSI Controller
-
-    TOOD:
-    - Everything.
-
-***********************************************************************/
+/*
+ * NCR 5385 SCSI Protocol Controller
+ *
+ * Sources:
+ *  - NCR 5385 SCSI Protocol Controller, 1983, NCR Corporation, Dayton, Ohio, USA
+ *  - NCR SCSI Engineering Notebook, 1984, NCR Microelectronics
+ *
+ * TODO:
+ *  - target mode send/receive
+ *  - disconnect/reselection
+ */
 
 #include "emu.h"
 #include "ncr5385.h"
 
-DEFINE_DEVICE_TYPE(NCR5385, ncr5385_device, "ncr5385", "NCR 5385E SCSI Controller")
+#define LOG_GENERAL  (1U << 0)
+#define LOG_REGW     (1U << 1)
+#define LOG_REGR     (1U << 2)
+#define LOG_STATE    (1U << 3)
+#define LOG_DMA      (1U << 4)
+#define LOG_COMMAND  (1U << 5)
+
+//#define VERBOSE (LOG_GENERAL|LOG_REGW|LOG_REGR|LOG_STATE|LOG_DMA|LOG_COMMAND)
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(NCR5385, ncr5385_device, "ncr5385", "NCR 5385 SCSI Protocol Controller")
 
-ncr5385_device::ncr5385_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
-	: device_t(mconfig, NCR5385, tag, owner, clock)
+// FIXME: would be better to reuse from nscsi_full_device
+static unsigned const SCSI_ARB_DELAY = 2'400;
+static unsigned const SCSI_BUS_CLEAR = 800;
+static unsigned const SCSI_BUS_FREE = 800;
+static unsigned const SCSI_BUS_SETTLE = 400;
+static unsigned const SCSI_BUS_SKEW = 10;
+static unsigned const SCSI_RST_HOLD = 25'000;
+
+ncr5385_device::ncr5385_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
+	: nscsi_device(mconfig, NCR5385, tag, owner, clock)
+	, nscsi_slot_card_interface(mconfig, *this, DEVICE_SELF)
 	, m_int(*this)
+	, m_dreq(*this)
+	, m_int_state(false)
+	, m_dreq_state(false)
 {
 }
 
+enum state : u32
+{
+	IDLE,
+	DIAGNOSTIC,
+
+	ARB_BUS_FREE,
+	ARB_START,
+	ARB_EVALUATE,
+	SEL_START,
+	SEL_DELAY,
+	SEL_WAIT_BSY,
+	SEL_COMPLETE,
+	SEL_WAIT_REQ,
+
+	XFI_START,
+	XFI_IN_REQ,
+	XFI_IN_DRQ,
+	XFI_IN_ACK,
+	XFI_OUT_REQ,
+	XFI_OUT_DRQ,
+	XFI_OUT_ACK,
+	XFI_OUT_PAD,
+};
+
+enum mode : u8
+{
+	DISCONNECTED,
+	INITIATOR,
+	TARGET,
+};
+
+enum diag_mask : u8
+{
+	DIAG_SELF = 0x07, // self-diagnostic status
+	DIAG_CMD  = 0x38, // diagnostic command status
+	DIAG_DONE = 0x80, // self-diagnostic complete
+
+	DIAG_CMD_GP = 0x18, // diagnostic good parity
+	DIAG_CMD_BP = 0x20, // diagnostic bad parity
+};
+
+enum int_mask : u8
+{
+	INT_FUNC_COMPLETE = 0x01,
+	INT_BUS_SERVICE   = 0x02,
+	INT_DISCONNECTED  = 0x04,
+	INT_SELECTED      = 0x08,
+	INT_RESELECTED    = 0x10,
+	INT_INVALID_CMD   = 0x40,
+};
+
+enum aux_status_mask : u8
+{
+	AUX_STATUS_TC_ZERO    = 0x02,
+	AUX_STATUS_PAUSED     = 0x04,
+	AUX_STATUS_IO         = 0x08,
+	AUX_STATUS_CD         = 0x10,
+	AUX_STATUS_MSG        = 0x20,
+	AUX_STATUS_PARITY_ERR = 0x40,
+	AUX_STATUS_DATA_FULL  = 0x80,
+};
+
+enum cmd_mask : u8
+{
+	CMD_INT = 0x08, // interrupting
+	CMD_SBX = 0x40, // single byte transfer
+	CMD_DMA = 0x80, // DMA mode
+};
+
 void ncr5385_device::device_start()
 {
+	save_item(NAME(m_dat));
+	save_item(NAME(m_cmd));
+	save_item(NAME(m_ctl));
+	save_item(NAME(m_dst_id));
+	save_item(NAME(m_aux_status));
+	save_item(NAME(m_own_id));
+	save_item(NAME(m_int_status));
+	save_item(NAME(m_src_id));
+	save_item(NAME(m_dia_status));
+	save_item(NAME(m_cnt));
+
+	save_item(NAME(m_state));
+	save_item(NAME(m_phase));
+	save_item(NAME(m_mode));
+	save_item(NAME(m_sbx));
+
+	save_item(NAME(m_int_state));
+	save_item(NAME(m_dreq_state));
+
+	m_state_timer = timer_alloc(timer_expired_delegate(FUNC(ncr5385_device::state_timer), this));
+
+	m_dia_status = DIAG_DONE;
 }
 
 void ncr5385_device::device_reset()
 {
-	m_state = STATE_IDLE;
-	m_int_reg = 0;
-	m_ctrl_reg = 0;
-	m_aux_status_reg = AUX_STATUS_TC_ZERO;
-	m_diag_status_reg = DIAG_COMPLETE;
+	m_cmd = 0;
+	m_ctl = 0;
+	m_dst_id = 0;
+	m_aux_status = AUX_STATUS_TC_ZERO;
+	m_int_status = 0;
+	m_src_id = 0;
+	m_dia_status &= (DIAG_DONE | DIAG_SELF);
+	m_cnt = 0;
+
+	m_state = IDLE;
+	m_mode = DISCONNECTED;
+	m_sbx = false;
+
+	// monitor all control lines
+	scsi_bus->ctrl_wait(scsi_refid, S_ALL, S_ALL);
+
+	update_int();
 }
 
-void ncr5385_device::write(offs_t offset, uint8_t data)
+void ncr5385_device::scsi_ctrl_changed()
 {
-	switch (offset)
+	u32 const ctrl = scsi_bus->ctrl_r();
+
+	static char const *const nscsi_phase[] = { "DATA OUT", "DATA IN", "COMMAND", "STATUS", "*", "*", "MESSAGE OUT", "MESSAGE IN" };
+
+	if (ctrl & S_RST)
+		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x BUS RESET\n", ctrl);
+	else if ((ctrl & S_BSY) && !(ctrl & S_SEL))
+		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x phase %s%s%s\n", ctrl, nscsi_phase[ctrl & S_PHASE_MASK],
+			ctrl & S_REQ ? " REQ" : "", ctrl & S_ACK ? " ACK" : "");
+	else if (ctrl & S_BSY)
+		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x arbitration/selection\n", ctrl);
+	else
 	{
-		case 0x0: // Data Register
-			switch (m_state)
-			{
-				case STATE_DIAGNOSTIC_GOOD_PARITY:
-					m_aux_status_reg &= ~AUX_STATUS_PARITY_ERR;
-					m_aux_status_reg |= AUX_STATUS_DATA_FULL;
-					m_int_reg = INT_FUNC_COMPLETE;
-					m_diag_status_reg = DIAG_COMPLETE | DIAG_TURN_GOOD_PARITY;
-					m_state = STATE_IDLE;
-					m_int(1);
-					logerror("%s: ncr5385_w: data=%02x (diagnostic w/ good parity)\n", machine().describe_context(), data);
-					break;
-				case STATE_DIAGNOSTIC_BAD_PARITY:
-					m_aux_status_reg |= AUX_STATUS_PARITY_ERR | AUX_STATUS_DATA_FULL;
-					m_int_reg = INT_FUNC_COMPLETE;
-					m_diag_status_reg = DIAG_COMPLETE | DIAG_TURN_BAD_PARITY;
-					m_state = STATE_IDLE;
-					m_int(1);
-					logerror("%s: ncr5385_w: data=%02x (diagnostic w/ bad parity)\n", machine().describe_context(), data);
-					break;
-				default:
-					logerror("%s: ncr5385_w: data=%02x\n", machine().describe_context(), data);
-					break;
-			}
+		LOGMASKED(LOG_STATE, "scsi_ctrl_changed 0x%03x BUS FREE\n", ctrl);
+
+		if (m_mode == INITIATOR)
+		{
+			m_mode = DISCONNECTED;
+			m_int_status |= INT_DISCONNECTED;
+			update_int();
+		}
+	}
+}
+
+void ncr5385_device::map(address_map &map)
+{
+	map(0x0, 0x0).rw(FUNC(ncr5385_device::dat_r), FUNC(ncr5385_device::dat_w));
+	map(0x1, 0x1).rw(FUNC(ncr5385_device::cmd_r), FUNC(ncr5385_device::cmd_w));
+	map(0x2, 0x2).rw(FUNC(ncr5385_device::ctl_r), FUNC(ncr5385_device::ctl_w));
+	map(0x3, 0x3).rw(FUNC(ncr5385_device::dst_id_r), FUNC(ncr5385_device::dst_id_w));
+	map(0x4, 0x4).r(FUNC(ncr5385_device::aux_status_r));
+	map(0x5, 0x5).r(FUNC(ncr5385_device::own_id_r));
+	map(0x6, 0x6).r(FUNC(ncr5385_device::int_status_r));
+	map(0x7, 0x7).r(FUNC(ncr5385_device::src_id_r));
+	map(0x9, 0x9).r(FUNC(ncr5385_device::dia_status_r));
+	map(0xc, 0xc).rw(FUNC(ncr5385_device::cnt_r<2>), FUNC(ncr5385_device::cnt_w<2>));
+	map(0xd, 0xd).rw(FUNC(ncr5385_device::cnt_r<1>), FUNC(ncr5385_device::cnt_w<1>));
+	map(0xe, 0xe).rw(FUNC(ncr5385_device::cnt_r<0>), FUNC(ncr5385_device::cnt_w<0>));
+	map(0xf, 0xf).rw(FUNC(ncr5385_device::tst_r), FUNC(ncr5385_device::tst_w));
+}
+
+u8 ncr5385_device::dat_r()
+{
+	if (m_aux_status & AUX_STATUS_DATA_FULL)
+	{
+		m_aux_status &= ~AUX_STATUS_DATA_FULL;
+
+		if (m_state != IDLE)
+			m_state_timer->adjust(attotime::zero);
+	}
+	else
+		logerror("data register empty (%s)\n", machine().describe_context());
+
+	return m_dat;
+}
+
+u8 ncr5385_device::cmd_r()
+{
+	return m_cmd;
+}
+
+u8 ncr5385_device::ctl_r()
+{
+	return m_ctl;
+}
+
+u8 ncr5385_device::dst_id_r()
+{
+	return m_dst_id;
+}
+
+u8 ncr5385_device::aux_status_r()
+{
+	u8 data = m_aux_status;
+
+	if (!m_int_status)
+	{
+		// return current phase
+		u32 const ctrl = scsi_bus->ctrl_r();
+		if (ctrl & S_MSG)
+			data |= AUX_STATUS_MSG;
+		if (ctrl & S_CTL)
+			data |= AUX_STATUS_CD;
+		if (ctrl & S_INP)
+			data |= AUX_STATUS_IO;
+	}
+	LOGMASKED(LOG_REGR, "aux_status_r 0x%02x (%s)\n", data, machine().describe_context());
+
+	return data;
+}
+
+u8 ncr5385_device::own_id_r()
+{
+	return m_own_id;
+}
+
+u8 ncr5385_device::int_status_r()
+{
+	u8 const data = m_int_status;
+	LOGMASKED(LOG_REGR, "int_status_r 0x%02x (%s)\n", data, machine().describe_context());
+	m_aux_status &= ~AUX_STATUS_PARITY_ERR;
+	m_int_status = 0;
+	update_int();
+
+	if (m_state != IDLE)
+		m_state_timer->adjust(attotime::zero);
+
+	return data;
+}
+
+u8 ncr5385_device::src_id_r()
+{
+	return m_src_id;
+}
+
+u8 ncr5385_device::dia_status_r()
+{
+	return m_dia_status;
+}
+
+template <unsigned N> u8 ncr5385_device::cnt_r()
+{
+	return u8(m_cnt >> (N * 8));
+}
+
+u8 ncr5385_device::tst_r()
+{
+	return 0;
+}
+
+void ncr5385_device::dat_w(u8 data)
+{
+	LOGMASKED(LOG_REGW, "dat_w 0x%02x (%s)\n", data, machine().describe_context());
+
+	if (!(m_aux_status & AUX_STATUS_DATA_FULL))
+	{
+		m_dat = data;
+		m_aux_status |= AUX_STATUS_DATA_FULL;
+
+		if (m_state != IDLE)
+			m_state_timer->adjust(attotime::zero);
+	}
+	else
+		logerror("data register full\n");
+}
+
+void ncr5385_device::cmd_w(u8 data)
+{
+	LOGMASKED(LOG_REGW, "cmd_w 0x%02x (%s)\n", data, machine().describe_context());
+	if (!(data & 0x18))
+	{
+		// immediate commands
+
+		switch (data & 0x1f)
+		{
+		case 0x00:
+			LOGMASKED(LOG_COMMAND, "reset\n");
+			reset();
 			break;
-		case 0x1: // Command Register
-			switch (data & 0x3f)
-			{
-				case 0x00: // Chip Reset
-					logerror("%s: ncr5385_w: command: reset\n", machine().describe_context());
-					m_state = STATE_IDLE;
-					m_int_reg = 0;
-					m_aux_status_reg = AUX_STATUS_TC_ZERO;
-					m_diag_status_reg = DIAG_COMPLETE;
-					m_int(0);
-					break;
-				case 0x0b: // Diagnostic
-					logerror("%s: ncr5385_w: command: diagnostic (%s parity)\n", machine().describe_context(), BIT(data, 6) ? "bad" : "good");
-					if (BIT(data, 6))
-						m_state = STATE_DIAGNOSTIC_BAD_PARITY;
-					else
-						m_state = STATE_DIAGNOSTIC_GOOD_PARITY;
-					break;
-				default:
-					logerror("%s: ncr5385_w: command: %02x\n", machine().describe_context(), data);
-					break;
-			}
+		case 0x01: // disconnect
+			LOGMASKED(LOG_COMMAND, "disconnect\n");
+			m_mode = DISCONNECTED;
+			break;
+		case 0x02: // pause
+			LOGMASKED(LOG_COMMAND, "pause\n");
+			break;
+		case 0x03: // set atn
+			LOGMASKED(LOG_COMMAND, "set atn\n");
+			scsi_bus->ctrl_w(scsi_refid, S_ATN, S_ATN);
+			break;
+		case 0x04: // message accepted
+			LOGMASKED(LOG_COMMAND, "message accepted\n");
+			scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
 			break;
-		case 0x2: // Control Register
-			m_ctrl_reg = data & 0x07;
-			logerror("%s: ncr5385_w: control: parity_en=%d, reselect_en=%d, select_en=%d\n", machine().describe_context(), BIT(data, CTRL_PARITY_BIT), BIT(data, CTRL_RESELECT_BIT), BIT(data, CTRL_SELECT_BIT));
+		case 0x05: // chip disabled
+			LOGMASKED(LOG_COMMAND, "chip disabled\n");
 			break;
-		default:
-			logerror("%s: ncr5385_w: %x=%02x\n", machine().describe_context(), offset, data);
+		case 0x06: case 0x07:
+			// reserved
 			break;
+		}
 	}
+	else
+	{
+		// interrupting commands
+		m_aux_status &= ~AUX_STATUS_DATA_FULL;
+		m_cmd = data;
+
+		switch (data & 0x1f)
+		{
+		case 0x08: // select w/atn
+			LOGMASKED(LOG_COMMAND, "select %d w/atn (timeout %d)\n", m_dst_id, attotime::from_ticks(m_cnt * 1024, clock()).to_string());
+			m_state = ARB_BUS_FREE;
+			m_state_timer->adjust(attotime::zero);
+			break;
+		case 0x09: // select w/o atn
+			LOGMASKED(LOG_COMMAND, "select %d w/o atn (timeout %d)\n", m_dst_id, attotime::from_ticks(m_cnt * 1024, clock()).to_string());
+			m_state = ARB_BUS_FREE;
+			m_state_timer->adjust(attotime::zero);
+			break;
+		case 0x0a: // reselect
+			LOGMASKED(LOG_COMMAND, "reselect\n");
+			break;
+		case 0x0b: // diagnostic
+			LOGMASKED(LOG_COMMAND, "diagnostic (%s parity)\n", BIT(data, 6) ? "bad" : "good");
+			m_state = DIAGNOSTIC;
+			break;
+		case 0x0c: // receive command
+			LOGMASKED(LOG_COMMAND, "receive command\n");
+			break;
+		case 0x0d: // receive data
+			LOGMASKED(LOG_COMMAND, "receive data\n");
+			break;
+		case 0x0e: // receive message out
+			LOGMASKED(LOG_COMMAND, "receive message out\n");
+			break;
+		case 0x0f: // receive unspecified info out
+			LOGMASKED(LOG_COMMAND, "receive unspecified info out\n");
+			break;
+		case 0x10: // send status
+			LOGMASKED(LOG_COMMAND, "send status\n");
+			break;
+		case 0x11: // send data
+			LOGMASKED(LOG_COMMAND, "send data\n");
+			break;
+		case 0x12: // send message in
+			LOGMASKED(LOG_COMMAND, "send message in\n");
+			break;
+		case 0x13: // send unspecified info in
+			LOGMASKED(LOG_COMMAND, "send unspecified info in\n");
+			break;
+		case 0x14: // transfer info
+			if (data & CMD_SBX)
+				LOGMASKED(LOG_COMMAND, "transfer info (%s, single byte)\n", (data & CMD_DMA) ? "dma" : "pio");
+			else
+				LOGMASKED(LOG_COMMAND, "transfer info (%s, count=%d)\n", (data & CMD_DMA) ? "dma" : "pio", m_cnt);
+			m_state = XFI_START;
+			m_sbx = data & CMD_SBX;
+			m_state_timer->adjust(attotime::zero);
+			break;
+		case 0x15: // transfer pad
+			if (data & CMD_SBX)
+				LOGMASKED(LOG_COMMAND, "transfer pad (%s, single byte)\n", (data & CMD_DMA) ? "dma" : "pio");
+			else
+				LOGMASKED(LOG_COMMAND, "transfer pad (%s, count=%d)\n", (data & CMD_DMA) ? "dma" : "pio", m_cnt);
+			m_state = XFI_START;
+			m_sbx = data & CMD_SBX;
+			m_state_timer->adjust(attotime::zero);
+			break;
+		case 0x16: case 0x17:
+		case 0x18: case 0x19: case 0x1a: case 0x1b:
+		case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+			// reserved
+			break;
+		}
+	}
+}
+
+void ncr5385_device::ctl_w(u8 data)
+{
+	LOGMASKED(LOG_REGW, "ctl_w 0x%02x (%s)\n", data, machine().describe_context());
+
+	m_ctl = data & 7;
+}
+
+void ncr5385_device::dst_id_w(u8 data)
+{
+	LOGMASKED(LOG_REGW, "dst_id_w 0x%02x (%s)\n", data, machine().describe_context());
+	m_dst_id = (data & 7);
+}
+
+template <unsigned N> void ncr5385_device::cnt_w(u8 data)
+{
+	m_cnt = (m_cnt & ~(u32(0xff) << (N * 8))) | (u32(data) << (N * 8));
+
+	if (m_cnt)
+		m_aux_status &= ~AUX_STATUS_TC_ZERO;
+	else
+		m_aux_status |= AUX_STATUS_TC_ZERO;
+}
+
+void ncr5385_device::tst_w(u8 data)
+{
+	LOGMASKED(LOG_REGW, "tst_w 0x%02x (%s)\n", data, machine().describe_context());
+}
+
+u8 ncr5385_device::dma_r()
+{
+	u8 const data = m_dat;
+	m_aux_status &= ~AUX_STATUS_DATA_FULL;
+
+	set_dreq(false);
+	m_state_timer->adjust(attotime::zero);
+
+	return data;
+}
+
+void ncr5385_device::dma_w(u8 data)
+{
+	m_dat = data;
+	m_aux_status |= AUX_STATUS_DATA_FULL;
+
+	set_dreq(false);
+	m_state_timer->adjust(attotime::zero);
+}
+
+void ncr5385_device::state_timer(s32 param)
+{
+	// step state machine
+	int const delay = state_step();
+
+	// check for data stall
+	if (delay < 0)
+		return;
+
+	// repeat until idle
+	if (m_state != IDLE)
+		m_state_timer->adjust(attotime::from_nsec(delay));
+}
+
+int ncr5385_device::state_step()
+{
+	u32 const ctrl = scsi_bus->ctrl_r();
+	int delay = 0;
+
+	u8 const oid = 1 << m_own_id;
+	u8 const tid = 1 << m_dst_id;
+
+	switch (m_state)
+	{
+	case DIAGNOSTIC:
+		m_dia_status &= DIAG_DONE | DIAG_SELF;
+		if (BIT(m_cmd, 6))
+		{
+			m_aux_status |= AUX_STATUS_PARITY_ERR;
+			m_dia_status |= DIAG_CMD_BP;
+		}
+		else
+		{
+			m_aux_status &= ~AUX_STATUS_PARITY_ERR;
+			m_dia_status |= DIAG_CMD_GP;
+		}
+
+		m_int_status |= INT_FUNC_COMPLETE;
+		m_state = IDLE;
+
+		update_int();
+		break;
+
+	case ARB_BUS_FREE:
+		LOGMASKED(LOG_STATE, "arbitration: waiting for bus free\n");
+		if (!(ctrl & (S_SEL | S_BSY | S_RST)))
+		{
+			m_state = ARB_START;
+			delay = SCSI_BUS_FREE;
+		}
+		break;
+	case ARB_START:
+		LOGMASKED(LOG_STATE, "arbitration: started\n");
+		m_state = ARB_EVALUATE;
+		delay = SCSI_ARB_DELAY;
+
+		// assert own ID and BSY
+		scsi_bus->data_w(scsi_refid, oid);
+		scsi_bus->ctrl_w(scsi_refid, S_BSY, S_BSY);
+		break;
+	case ARB_EVALUATE:
+		// check if SEL asserted, or if there's a higher ID on the bus
+		if ((ctrl & S_SEL) || (scsi_bus->data_r() & ~((oid - 1) | oid)))
+		{
+			LOGMASKED(LOG_STATE, "arbitration: lost\n");
+			m_state = ARB_BUS_FREE;
+
+			// clear data and BSY
+			scsi_bus->data_w(scsi_refid, 0);
+			scsi_bus->ctrl_w(scsi_refid, 0, S_BSY);
+		}
+		else
+		{
+			LOGMASKED(LOG_STATE, "arbitration: won\n");
+			m_state = SEL_START;
+			delay = SCSI_BUS_CLEAR + SCSI_BUS_SETTLE;
+		}
+		break;
+
+	case SEL_START:
+		LOGMASKED(LOG_STATE, "selection: SEL asserted\n");
+		m_state = SEL_DELAY;
+		delay = SCSI_BUS_SKEW * 2;
+
+		// assert own and target ID and SEL
+		scsi_bus->data_w(scsi_refid, oid | tid);
+		scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL);
+		break;
+	case SEL_DELAY:
+		LOGMASKED(LOG_STATE, "selection: BSY cleared\n");
+		m_state = SEL_WAIT_BSY;
+		delay = SCSI_BUS_SETTLE;
+
+		// clear BSY, optionally assert ATN
+		if (!BIT(m_cmd, 0))
+			scsi_bus->ctrl_w(scsi_refid, S_ATN, S_BSY | S_ATN);
+		else
+			scsi_bus->ctrl_w(scsi_refid, 0, S_BSY);
+		break;
+	case SEL_WAIT_BSY:
+		if (ctrl & S_BSY)
+		{
+			LOGMASKED(LOG_STATE, "selection: BSY asserted by target\n");
+			m_state = SEL_COMPLETE;
+			delay = SCSI_BUS_SKEW * 2;
+		}
+		else
+		{
+			LOGMASKED(LOG_STATE, "selection: timed out\n");
+			m_int_status |= INT_DISCONNECTED;
+			m_state = IDLE;
+
+			scsi_bus->ctrl_w(scsi_refid, 0, S_ATN | S_SEL);
+
+			update_int();
+		}
+		break;
+	case SEL_COMPLETE:
+		LOGMASKED(LOG_STATE, "selection: complete\n");
+		m_int_status |= INT_FUNC_COMPLETE;
+		m_mode = INITIATOR;
+		m_state = SEL_WAIT_REQ;
+		delay = -1;
+
+		update_int();
+
+		// clear data and SEL
+		scsi_bus->data_w(scsi_refid, 0);
+		scsi_bus->ctrl_w(scsi_refid, 0, S_SEL);
+		break;
+	case SEL_WAIT_REQ:
+		if (ctrl & S_REQ)
+		{
+			LOGMASKED(LOG_STATE, "selection: REQ asserted by target\n");
+			m_int_status |= INT_BUS_SERVICE;
+			m_state = IDLE;
+
+			update_int();
+		}
+		else
+			delay = -1;
+		break;
+
+	case XFI_START:
+		m_phase = ctrl & S_PHASE_MASK;
+		m_state = (ctrl & S_INP) ? XFI_IN_REQ : XFI_OUT_REQ;
+		break;
+
+	case XFI_IN_REQ:
+		// TODO: disconnect
+		if (ctrl & S_REQ)
+		{
+			if (remaining() && (ctrl & S_PHASE_MASK) == m_phase)
+			{
+				m_state = XFI_IN_DRQ;
+
+				// transfer pad in doesn't transfer any data
+				if (!BIT(m_cmd, 0))
+				{
+					m_aux_status |= AUX_STATUS_DATA_FULL;
+					m_dat = scsi_bus->data_r();
+
+					if (m_cmd & CMD_DMA)
+						set_dreq(true);
+
+					delay = -1;
+				}
+			}
+			else
+			{
+				LOGMASKED(LOG_STATE, "xfi_in: %s\n", remaining() ? "phase change" : "transfer complete");
+
+				m_int_status |= INT_BUS_SERVICE;
+				m_state = IDLE;
+
+				update_int();
+			}
+		}
+		break;
+	case XFI_IN_DRQ:
+		m_state = XFI_IN_ACK;
+
+		LOGMASKED(LOG_STATE, "xfi_in: data 0x%02x\n", m_dat);
+
+		// assert ACK
+		scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK);
+		break;
+	case XFI_IN_ACK:
+		if (!(ctrl & S_REQ))
+		{
+			m_state = XFI_IN_REQ;
+
+			if (!(m_cmd & CMD_SBX))
+			{
+				m_cnt--;
+
+				LOGMASKED(LOG_STATE, "xfi_in: %d remaining\n", m_cnt);
+
+				if (!m_cnt)
+					m_aux_status |= AUX_STATUS_TC_ZERO;
+			}
+			else
+				m_sbx = false;
+
+			// clear ACK except after last byte of message input phase
+			if (!remaining() && (ctrl & S_PHASE_MASK) == S_PHASE_MSG_IN)
+			{
+				m_int_status |= INT_FUNC_COMPLETE;
+				m_state = IDLE;
+
+				update_int();
+			}
+			else
+				scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
+		}
+		break;
+
+	case XFI_OUT_REQ:
+		if (ctrl & S_REQ)
+		{
+			// TODO: disconnect
+			if (remaining() && (ctrl & S_PHASE_MASK) == m_phase)
+			{
+				m_state = XFI_OUT_DRQ;
+
+				// FIXME: only one byte dma for transfer pad
+				if (m_cmd & CMD_DMA)
+					set_dreq(true);
+
+				delay = -1;
+			}
+			else
+			{
+				LOGMASKED(LOG_STATE, "xfi_out: %s\n", remaining() ? "phase change" : "transfer complete");
+				m_int_status |= INT_BUS_SERVICE;
+				m_state = IDLE;
+
+				update_int();
+			}
+		}
+		break;
+	case XFI_OUT_DRQ:
+		m_state = XFI_OUT_ACK;
+		m_aux_status &= ~AUX_STATUS_DATA_FULL;
+
+		LOGMASKED(LOG_STATE, "xfi_out: data 0x%02x\n", m_dat);
+
+		// assert data and ACK
+		scsi_bus->data_w(scsi_refid, m_dat);
+		if (remaining(1) && (ctrl & S_PHASE_MASK) == S_PHASE_MSG_OUT)
+			scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK | S_ATN);
+		else
+			scsi_bus->ctrl_w(scsi_refid, S_ACK, S_ACK);
+		break;
+	case XFI_OUT_ACK:
+		if (!(ctrl & S_REQ))
+		{
+			if (BIT(m_cmd, 0))
+				m_state = XFI_OUT_PAD;
+			else
+				m_state = XFI_OUT_REQ;
+
+			if (!(m_cmd & CMD_SBX))
+			{
+				m_cnt--;
+
+				LOGMASKED(LOG_STATE, "xfi_out: %d remaining\n", m_cnt);
+
+				if (!m_cnt)
+					m_aux_status |= AUX_STATUS_TC_ZERO;
+			}
+			else
+				m_sbx = false;
+
+			// clear data and ACK
+			scsi_bus->data_w(scsi_refid, 0);
+			scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
+		}
+		break;
+	case XFI_OUT_PAD:
+		if (ctrl & S_REQ)
+		{
+			// TODO: disconnect
+			if (remaining() && (ctrl & S_PHASE_MASK) == m_phase)
+				m_state = XFI_OUT_DRQ;
+			else
+			{
+				LOGMASKED(LOG_STATE, "xfi_out: %s\n", remaining() ? "phase change" : "transfer complete");
+				m_int_status |= INT_BUS_SERVICE;
+				m_state = IDLE;
+
+				update_int();
+			}
+		}
+		break;
+	}
+
+	return delay;
 }
 
-uint8_t ncr5385_device::read(offs_t offset)
+/*
+ * Returns a boolean indicating whether any data remains to be transferred:
+ *
+ *  - for single byte transfer commands, m_sbx indicates data remaining
+ *  - alternatively, return if there's a specific amount of data to transfer
+ *  - otherwise, check if there's any data to transfer
+ */
+bool ncr5385_device::remaining(u32 const count) const
 {
-	switch (offset)
+	if (m_cmd & CMD_SBX)
+		return m_sbx;
+	else if (count)
+		return m_cnt == count;
+	else
+		return m_cnt;
+}
+
+void ncr5385_device::set_dreq(bool dreq)
+{
+	if (m_dreq_state != dreq)
 	{
-		case 0x2:
-			logerror("%s: ncr5385_r: control (%02x)\n", machine().describe_context(), m_ctrl_reg);
-			return m_ctrl_reg;
-		case 0x4:
-			logerror("%s: ncr5385_r: aux status (%02x)\n", machine().describe_context(), m_aux_status_reg);
-			return m_aux_status_reg;
-		case 0x6:
-			logerror("%s: ncr5385_r: interrupt (%02x)\n", machine().describe_context(), m_int_reg);
-			m_int(1);
-			return m_int_reg;
-		case 0x9:
-			logerror("%s: ncr5385_r: diagnostic status (%02x)\n", machine().describe_context(), m_diag_status_reg);
-			return m_diag_status_reg;
-		default:
-			logerror("%s: ncr5385_r: %x (%02x)\n", machine().describe_context(), offset, 0);
-			return 0;
+		LOGMASKED(LOG_DMA, "set_dreq %d\n", dreq);
+
+		m_dreq_state = dreq;
+		m_dreq(m_dreq_state);
+	}
+}
+
+void ncr5385_device::update_int()
+{
+	bool const int_state = m_int_status & 0x5f;
+
+	if (m_int_state != int_state)
+	{
+		LOG("update_int %d\n", int_state);
+
+		m_aux_status &= ~(AUX_STATUS_MSG | AUX_STATUS_CD | AUX_STATUS_IO);
+		if (int_state)
+		{
+			m_cmd = 0;
+
+			// latch current phase
+			u32 const ctrl = scsi_bus->ctrl_r();
+			if (ctrl & S_MSG)
+				m_aux_status |= AUX_STATUS_MSG;
+			if (ctrl & S_CTL)
+				m_aux_status |= AUX_STATUS_CD;
+			if (ctrl & S_INP)
+				m_aux_status |= AUX_STATUS_IO;
+		}
+
+		m_int_state = int_state;
+		m_int(m_int_state);
 	}
 }
diff --git a/src/devices/machine/ncr5385.h b/src/devices/machine/ncr5385.h
index a1dec052045..a1e8deef207 100644
--- a/src/devices/machine/ncr5385.h
+++ b/src/devices/machine/ncr5385.h
@@ -4,11 +4,6 @@
 
     NCR 5385 SCSI Controller emulation
 
-    TODO:
-    - Everything. Currently, just enough is implemented to make the
-      Philips VP415 CPU / Datagrabber board satisfied that the
-      controller has passed its internal diagnostics.
-
 ************************************************************************
                             _____   _____
                     D2   1 |*    \_/     | 48  VCC
@@ -43,91 +38,89 @@
 
 #pragma once
 
+#include "machine/nscsi_bus.h"
 
-//**************************************************************************
-//  TYPE DEFINITIONS
-//**************************************************************************
-
-// ======================> ncr5385_device
-
-class ncr5385_device : public device_t
+class ncr5385_device
+	: public nscsi_device
+	, public nscsi_slot_card_interface
 {
 public:
-	// construction/destruction
-	ncr5385_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
 	auto irq() { return m_int.bind(); }
+	auto dreq() { return m_dreq.bind(); }
+
+	void set_own_id(unsigned id) { m_own_id = id; }
 
-	void write(offs_t offset, uint8_t data);
-	uint8_t read(offs_t offset);
+	ncr5385_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+
+	void map(address_map &map);
+
+	u8 dma_r();
+	void dma_w(u8 data);
 
 protected:
-	// device-level overrides
+	// device_t implementation
 	virtual void device_start() override;
 	virtual void device_reset() override;
 
-private:
-	enum
-	{
-		STATE_IDLE,
-		STATE_DIAGNOSTIC_GOOD_PARITY,
-		STATE_DIAGNOSTIC_BAD_PARITY,
-	};
-
-	enum
-	{
-		DIAG_TURN_MISCOMPARE_INITIAL = 0x08,
-		DIAG_TURN_MISCOMPARE_FINAL   = 0x10,
-		DIAG_TURN_GOOD_PARITY        = 0x18,
-		DIAG_TURN_BAD_PARITY         = 0x20,
-		DIAG_COMPLETE = 0x80,
-
-		DIAG_COMPLETE_BIT = 7,
-	};
-
-	enum
-	{
-		INT_FUNC_COMPLETE = 0x01,
-		INT_INVALID_CMD   = 0x40,
-
-		INT_FUNC_COMPLETE_BIT = 0,
-		INT_INVALID_CMD_BIT   = 6,
-	};
-
-	enum
-	{
-		AUX_STATUS_TC_ZERO    = 0x02,
-		AUX_STATUS_PAUSED     = 0x04,
-		AUX_STATUS_PARITY_ERR = 0x40,
-		AUX_STATUS_DATA_FULL  = 0x80,
-
-		AUX_STATUS_TC_ZERO_BIT    = 1,
-		AUX_STATUS_PAUSED_BIT     = 2,
-		AUX_STATUS_PARITY_ERR_BIT = 6,
-		AUX_STATUS_DATA_FULL_BIT  = 7,
-	};
-
-	enum
-	{
-		CTRL_SELECT   = 0x01,
-		CTRL_RESELECT = 0x02,
-		CTRL_PARITY   = 0x04,
-
-		CTRL_SELECT_BIT   = 0,
-		CTRL_RESELECT_BIT = 1,
-		CTRL_PARITY_BIT   = 2,
-	};
+	// ncsci_device implementation
+	virtual void scsi_ctrl_changed() override;
+
+	// read handlers
+	u8 dat_r();
+	u8 cmd_r();
+	u8 ctl_r();
+	u8 dst_id_r();
+	u8 aux_status_r();
+	u8 own_id_r();
+	u8 int_status_r();
+	u8 src_id_r();
+	u8 dia_status_r();
+	template <unsigned N> u8 cnt_r();
+	u8 tst_r();
+
+	// write handlers
+	void dat_w(u8 data);
+	void cmd_w(u8 data);
+	void ctl_w(u8 data);
+	void dst_id_w(u8 data);
+	template <unsigned N> void cnt_w(u8 data);
+	void tst_w(u8 data);
+
+	// state machine, interrupts and dma
+	void state_timer(s32 param);
+	int state_step();
+	bool remaining(u32 const count = 0) const;
+	void update_int();
+	void set_dreq(bool dreq);
 
+private:
 	devcb_write_line m_int;
-
-	uint32_t m_state;
-	uint8_t m_ctrl_reg;
-	uint8_t m_int_reg;
-	uint8_t m_aux_status_reg;
-	uint8_t m_diag_status_reg;
+	devcb_write_line m_dreq;
+
+	emu_timer *m_state_timer;
+
+	// registers
+	u8 m_dat;
+	u8 m_cmd;
+	u8 m_ctl;
+	u8 m_dst_id;
+	u8 m_aux_status;
+	u8 m_own_id;
+	u8 m_int_status;
+	u8 m_src_id;
+	u8 m_dia_status;
+	u32 m_cnt;
+
+	// other state
+	u32 m_state;
+	u8 m_phase;
+	u8 m_mode;
+	bool m_sbx;
+
+	bool m_int_state;
+	bool m_dreq_state;
 };
 
-// device type definition
 DECLARE_DEVICE_TYPE(NCR5385, ncr5385_device)
 
 #endif // MAME_MACHINE_NCR5385_H
diff --git a/src/devices/machine/ns32082.cpp b/src/devices/machine/ns32082.cpp
index 4fb26bf5219..ffe2f645274 100644
--- a/src/devices/machine/ns32082.cpp
+++ b/src/devices/machine/ns32082.cpp
@@ -165,6 +165,9 @@ void ns32082_device::device_reset()
 void ns32082_device::state_add(device_state_interface &parent, int &index)
 {
 	parent.state_add(index++, "MSR", m_msr).formatstr("%08X");
+	parent.state_add(index++, "PTB0", m_ptb[0]).formatstr("%08X");
+	parent.state_add(index++, "PTB1", m_ptb[1]).formatstr("%08X");
+	parent.state_add(index++, "EIA", m_eia).formatstr("%08X");
 }
 
 u16 ns32082_device::slow_status(int *icount)
@@ -468,7 +471,7 @@ ns32082_device::translate_result ns32082_device::translate(address_space &space,
 		if (m_state == RDVAL || m_state == WRVAL)
 		{
 			m_state = STATUS;
-			if (pte1 & PTE_V)
+			if (pte2 & PTE_V)
 				m_status |= SLAVE_F;
 
 			return CANCEL;
diff --git a/src/devices/machine/ns32202.cpp b/src/devices/machine/ns32202.cpp
index 8ce52d0f138..70d6bf080ea 100644
--- a/src/devices/machine/ns32202.cpp
+++ b/src/devices/machine/ns32202.cpp
@@ -712,14 +712,24 @@ void ns32202_device::ipndh_w(u8 data)
 
 void ns32202_device::isrvl_w(u8 data)
 {
-	LOGMASKED(LOG_REGW, "isrvl_w 0x%02x (%s)\n", data, machine().describe_context());
-	m_isrv = (m_isrv & 0xff00) | data;
+	if (u8(m_isrv >> 0) ^ data)
+	{
+		LOGMASKED(LOG_REGW, "isrvl_w 0x%02x (%s)\n", data, machine().describe_context());
+		m_isrv = (m_isrv & 0xff00) | data;
+
+		m_interrupt->adjust(attotime::zero);
+	}
 }
 
 void ns32202_device::isrvh_w(u8 data)
 {
-	LOGMASKED(LOG_REGW, "isrvh_w 0x%02x (%s)\n", data, machine().describe_context());
-	m_isrv = (u16(data) << 8) | u8(m_isrv);
+	if (u8(m_isrv >> 8) ^ data)
+	{
+		LOGMASKED(LOG_REGW, "isrvh_w 0x%02x (%s)\n", data, machine().describe_context());
+		m_isrv = (u16(data) << 8) | u8(m_isrv);
+
+		m_interrupt->adjust(attotime::zero);
+	}
 }
 
 void ns32202_device::imskl_w(u8 data)
diff --git a/src/devices/machine/ns32382.cpp b/src/devices/machine/ns32382.cpp
index 105bc55b1a2..d801342a102 100644
--- a/src/devices/machine/ns32382.cpp
+++ b/src/devices/machine/ns32382.cpp
@@ -406,7 +406,7 @@ ns32382_device::translate_result ns32382_device::translate(address_space &space,
 		if (m_state == RDVAL || m_state == WRVAL)
 		{
 			m_state = STATUS;
-			if (pte1 & PTE_V)
+			if (pte2 & PTE_V)
 				m_status |= SLAVE_F;
 
 			return CANCEL;
diff --git a/src/devices/machine/sis630_gui.cpp b/src/devices/machine/sis630_gui.cpp
index 8cc245cbed0..e7696b54dd4 100644
--- a/src/devices/machine/sis630_gui.cpp
+++ b/src/devices/machine/sis630_gui.cpp
@@ -63,7 +63,7 @@ DEFINE_DEVICE_TYPE(SIS630_GUI, sis630_gui_device, "sis630_gui", "SiS 630 GUI")
 
 sis630_gui_device::sis630_gui_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
 	: pci_device(mconfig, SIS630_GUI, tag, owner, clock)
-	, m_svga(*this, "svga")
+	, m_vga(*this, "svga")
 	, m_gui_rom(*this, "gui_rom")
 {
 	set_ids(0x10396300, 0x00, 0x030000, 0x00);
@@ -93,13 +93,13 @@ void sis630_gui_device::device_add_mconfig(machine_config &config)
 {
 	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
 	screen.set_raw(XTAL(25'174'800), 900, 0, 640, 526, 0, 480);
-	screen.set_screen_update(m_svga, FUNC(sis630_svga_device::screen_update));
+	screen.set_screen_update(m_vga, FUNC(sis630_vga_device::screen_update));
 
-	SIS630_SVGA(config, m_svga, 0);
-	m_svga->set_screen("screen");
+	SIS630_VGA(config, m_vga, 0);
+	m_vga->set_screen("screen");
 	// 64MB according to POST
 	// documentation claims 128MB, assume being wrong
-	m_svga->set_vram_size(64*1024*1024);
+	m_vga->set_vram_size(64*1024*1024);
 }
 
 void sis630_gui_device::config_map(address_map &map)
@@ -129,7 +129,7 @@ u32 sis630_gui_device::agp_id_r()
 {
 	LOGAGP("Read AGP ID [$50]\n");
 	// bits 23-16 AGP v1.0
-	// bits 15-8 0x5c NEXT_PTR (which goes to NULL terminator, heh)
+	// bits 15-8 0x5c NEXT_PTR (which goes to NULL terminator)
 	// bits 7-0 CAP_ID (0x02 for AGP)
 	return 0x00105c02;
 }
@@ -196,7 +196,7 @@ void sis630_gui_device::subvendor_w(offs_t offset, u32 data, u32 mem_mask)
 
 void sis630_gui_device::memory_map(address_map &map)
 {
-	map(0x0000000, 0x3ffffff).rw(m_svga, FUNC(sis630_svga_device::mem_linear_r), FUNC(sis630_svga_device::mem_linear_w)).umask32(0xffffffff);
+	map(0x0000000, 0x3ffffff).rw(m_vga, FUNC(sis630_vga_device::mem_linear_r), FUNC(sis630_vga_device::mem_linear_w));
 }
 
 void sis630_gui_device::io_map(address_map &map)
@@ -216,7 +216,7 @@ void sis630_gui_device::space_io_map(address_map &map)
 	// RIO + 0x16: 301 RAMDAC
 	// RIO + 0x30/+0x40/+0x50: omitted, legacy '300/'630 VGA regs?
 	// (gamecstl definitely tries to access 0x44 index 5 for readback extension ID)
-	map(0x30, 0x5f).m(m_svga, FUNC(sis630_svga_device::io_map));
+	map(0x30, 0x5f).m(m_vga, FUNC(sis630_vga_device::io_map));
 }
 
 void sis630_gui_device::legacy_memory_map(address_map &map)
@@ -226,7 +226,7 @@ void sis630_gui_device::legacy_memory_map(address_map &map)
 
 void sis630_gui_device::legacy_io_map(address_map &map)
 {
-	map(0x03b0, 0x03df).m(m_svga, FUNC(sis630_svga_device::io_map));
+	map(0x03b0, 0x03df).m(m_vga, FUNC(sis630_vga_device::io_map));
 }
 
 void sis630_gui_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
@@ -264,12 +264,12 @@ void sis630_gui_device::device_reset()
 // TODO: remove these trampolines
 uint8_t sis630_gui_device::vram_r(offs_t offset)
 {
-	return downcast<sis630_svga_device *>(m_svga.target())->mem_r(offset);
+	return downcast<sis630_vga_device *>(m_vga.target())->mem_r(offset);
 }
 
 void sis630_gui_device::vram_w(offs_t offset, uint8_t data)
 {
-	downcast<sis630_svga_device *>(m_svga.target())->mem_w(offset, data);
+	downcast<sis630_vga_device *>(m_vga.target())->mem_w(offset, data);
 }
 
 /*****************************
diff --git a/src/devices/machine/sis630_gui.h b/src/devices/machine/sis630_gui.h
index 600cd84d24e..c8c9d5dde5e 100644
--- a/src/devices/machine/sis630_gui.h
+++ b/src/devices/machine/sis630_gui.h
@@ -36,7 +36,7 @@ class sis630_gui_device : public pci_device
 	void space_io_map(address_map &map);
 
 private:
-	required_device<sis630_svga_device> m_svga;
+	required_device<sis630_vga_device> m_vga;
 	required_memory_region m_gui_rom;
 
 	u8 vram_r(offs_t offset);
diff --git a/src/devices/machine/sis85c496.cpp b/src/devices/machine/sis85c496.cpp
index bc2f52e547d..572a003740e 100644
--- a/src/devices/machine/sis85c496.cpp
+++ b/src/devices/machine/sis85c496.cpp
@@ -45,7 +45,7 @@ void sis85c496_host_device::internal_io_map(address_map &map)
 	pci_host_device::io_configuration_access_map(map);
 	map(0x0000, 0x001f).rw("dma8237_1", FUNC(am9517a_device::read), FUNC(am9517a_device::write));
 	map(0x0020, 0x0021).rw("pic8259_master", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
-//	map(0x0022, 0x0023) 85C497 super I/O
+//  map(0x0022, 0x0023) 85C497 super I/O
 	map(0x0040, 0x005f).rw("pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
 	map(0x0060, 0x0063).rw(FUNC(sis85c496_host_device::at_keybc_r), FUNC(sis85c496_host_device::at_keybc_w));
 	map(0x0064, 0x0067).rw("keybc", FUNC(at_keyboard_controller_device::status_r), FUNC(at_keyboard_controller_device::command_w));
diff --git a/src/devices/machine/sis950_lpc.cpp b/src/devices/machine/sis950_lpc.cpp
index 8257501ea00..9ebd0444fa7 100644
--- a/src/devices/machine/sis950_lpc.cpp
+++ b/src/devices/machine/sis950_lpc.cpp
@@ -2,30 +2,30 @@
 // copyright-holders: Angelo Salese
 /**************************************************************************************************
 
-    SiS950 LPC implementation (Super I/O & southbridge)
-
-    TODO:
-    - Convert most stuff declared here to generic interfaces;
-      \- Despite what the datasheet claims it really looks like that a separate Super I/O provides
-         the usual x86 resources;
-    - Flash ROM handling
-      \- Doesn't survive a soft reset;
-    - Fix EISA;
-    - INIT register (reset & A20 control + fast gates + fast reset timing control);
-    - Override PS/2 ports if USB legacy mode is enabled;
-    - NMI & SMI handling;
-    - SMBus handling;
-    - RTC extended bank enable;
-      \- Doesn't survive a CMOS write after fast reset;
-    - Shadow registers for PIC and PIT;
-    - IRQ remaps for PCI_SLOT
-      \- INTA GUI
-      \- INTB AUDIO and MODEM
-      \- INTC ethernet
-      \- INTD USB
-    - IRQ software traps ($6e-$6f);
-      \- Documentation mentions that those can be read-back too, huh?
-    - Understand what's the caveat of "changing device ID number" via BIOS control $40 bit 6;
+SiS950 LPC implementation (Super I/O & southbridge)
+
+TODO:
+- Convert most stuff declared here to generic interfaces;
+  \- Despite what the datasheet claims it really looks like that a separate Super I/O provides
+     the usual x86 resources;
+- Flash ROM handling
+  \- Doesn't survive a soft reset;
+- Fix EISA;
+- INIT register (reset & A20 control + fast gates + fast reset timing control);
+- Override PS/2 ports if USB legacy mode is enabled;
+- NMI & SMI handling;
+- SMBus handling;
+- RTC extended bank enable;
+  \- Doesn't survive a CMOS write after fast reset;
+- Shadow registers for PIC and PIT;
+- IRQ remaps for PCI_SLOT
+  \- INTA GUI
+  \- INTB AUDIO and MODEM
+  \- INTC ethernet
+  \- INTD USB
+- IRQ software traps ($6e-$6f);
+  \- Documentation mentions that those can be read-back too, huh?
+- Understand what's the catch of "changing device ID number" via BIOS control $40 bit 6;
 
 **************************************************************************************************/
 
@@ -65,9 +65,9 @@ sis950_lpc_device::sis950_lpc_device(const machine_config &mconfig, const char *
 	, m_dmac_slave(*this, "dmac_slave")
 	, m_pit(*this, "pit")
 	, m_keybc(*this, "keybc")
+	, m_isabus(*this, "isabus")
 	, m_speaker(*this, "speaker")
 	, m_rtc(*this, "rtc")
-	, m_uart(*this, "uart")
 	, m_acpi(*this, "acpi")
 	, m_smbus(*this, "smbus")
 	, m_fast_reset_cb(*this)
@@ -179,25 +179,32 @@ void sis950_lpc_device::device_add_mconfig(machine_config &config)
 	m_rtc->irq().set(m_pic_slave, FUNC(pic8259_device::ir0_w));
 	m_rtc->set_century_index(0x32);
 
-	// serial fragment
-	// TODO: unconfirmed type / clock
-	INS8250(config, m_uart, XTAL(18'432'000) / 10);
-	m_uart->out_tx_callback().set("com1", FUNC(rs232_port_device::write_txd));
-	m_uart->out_dtr_callback().set("com1", FUNC(rs232_port_device::write_dtr));
-	m_uart->out_rts_callback().set("com1", FUNC(rs232_port_device::write_rts));
-//  m_uart->out_int_callback().set()
-//  m_uart->out_baudout_callback().set([this](int state){ if (m_8251dtr_state) m_uart->rclk_w(state); }); // TODO: Fix INS8250 BAUDOUT pin support
-
-	rs232_port_device &rs232(RS232_PORT(config, "com1", default_rs232_devices, nullptr));
-	rs232.rxd_handler().set(m_uart, FUNC(ins8250_uart_device::rx_w));
-	rs232.dcd_handler().set(m_uart, FUNC(ins8250_uart_device::dcd_w));
-	rs232.dsr_handler().set(m_uart, FUNC(ins8250_uart_device::dsr_w));
-	rs232.ri_handler().set(m_uart, FUNC(ins8250_uart_device::ri_w));
-	rs232.cts_handler().set(m_uart, FUNC(ins8250_uart_device::cts_w));
-
 	// TODO: left/right speaker connection
 	SPEAKER(config, "mono").front_center();
 	SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50);
+
+	ISA16(config, m_isabus, 0);
+	m_isabus->irq3_callback().set(FUNC(sis950_lpc_device::pc_irq3_w));
+	m_isabus->irq4_callback().set(FUNC(sis950_lpc_device::pc_irq4_w));
+	m_isabus->irq6_callback().set(FUNC(sis950_lpc_device::pc_irq6_w));
+	m_isabus->irq5_callback().set(FUNC(sis950_lpc_device::pc_irq5_w));
+	m_isabus->irq7_callback().set(FUNC(sis950_lpc_device::pc_irq7_w));
+	m_isabus->irq2_callback().set(FUNC(sis950_lpc_device::pc_irq9_w));
+	m_isabus->irq10_callback().set(FUNC(sis950_lpc_device::pc_irq10_w));
+	m_isabus->irq11_callback().set(FUNC(sis950_lpc_device::pc_irq11_w));
+	m_isabus->irq12_callback().set(FUNC(sis950_lpc_device::pc_irq12m_w));
+	m_isabus->irq14_callback().set(FUNC(sis950_lpc_device::pc_irq14_w));
+	m_isabus->irq15_callback().set(FUNC(sis950_lpc_device::pc_irq15_w));
+	m_isabus->iochck_callback().set(FUNC(sis950_lpc_device::iochck_w));
+}
+
+void sis950_lpc_device::device_config_complete()
+{
+	auto isabus = m_isabus.finder_target();
+	isabus.first.subdevice<isa16_device>(isabus.second)->set_memspace(m_host_cpu, AS_PROGRAM);
+	isabus.first.subdevice<isa16_device>(isabus.second)->set_iospace(m_host_cpu, AS_IO);
+
+	pci_device::device_config_complete();
 }
 
 void sis950_lpc_device::config_map(address_map &map)
@@ -496,7 +503,7 @@ void sis950_lpc_device::io_map(address_map &map)
 	// map(0x03bc, 0x03bf) parallel port 3
 	// map(0x03e8, 0x03ef) serial 4
 	// map(0x03f0, 0x03f7) FDC 1
-	map(0x03f8, 0x03ff).rw(m_uart, FUNC(ins8250_device::ins8250_r), FUNC(ins8250_device::ins8250_w)); // COM1
+	// map(0x03f8, 0x03ff).rw(m_uart, FUNC(ins8250_device::ins8250_r), FUNC(ins8250_device::ins8250_w)); // COM1
 
 	// map(0x0530, 0x0537) - MSS (TCP Maximum Segment Size?)
 	// map(0x0604, 0x060b) /
@@ -511,6 +518,8 @@ void sis950_lpc_device::io_map(address_map &map)
 void sis950_lpc_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
 							uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
 {
+	m_isabus->remap(AS_PROGRAM, 0, 1 << 24);
+	m_isabus->remap(AS_IO, 0, 0xffff);
 	io_space->install_device(0, 0x07ff, *this, &sis950_lpc_device::io_map);
 
 	LOGMAP("LPC Remapping table (BIOS: %02x, flash: %02x)\n", m_bios_control, m_flash_control);
@@ -572,6 +581,24 @@ void sis950_lpc_device::unmap_log_w(offs_t offset, u8 data)
 	LOGTODO("LPC Unemulated [%02x] %02x W\n", offset + 0x10, data);
 }
 
+/*
+ * IRQ sharing
+ */
+
+void sis950_lpc_device::pc_irq1_w(int state)   { m_pic_master->ir1_w(state); }
+void sis950_lpc_device::pc_irq3_w(int state)   { m_pic_master->ir3_w(state); }
+void sis950_lpc_device::pc_irq4_w(int state)   { m_pic_master->ir4_w(state); }
+void sis950_lpc_device::pc_irq5_w(int state)   { m_pic_master->ir5_w(state); }
+void sis950_lpc_device::pc_irq6_w(int state)   { m_pic_master->ir6_w(state); }
+void sis950_lpc_device::pc_irq7_w(int state)   { m_pic_master->ir7_w(state); }
+void sis950_lpc_device::pc_irq8n_w(int state)  { m_pic_slave->ir0_w(state); }
+void sis950_lpc_device::pc_irq9_w(int state)   { m_pic_slave->ir1_w(state); }
+void sis950_lpc_device::pc_irq10_w(int state)  { m_pic_slave->ir2_w(state); }
+void sis950_lpc_device::pc_irq11_w(int state)  { m_pic_slave->ir3_w(state); }
+void sis950_lpc_device::pc_irq12m_w(int state) { m_pic_slave->ir4_w(state); }
+void sis950_lpc_device::pc_irq14_w(int state)  { m_pic_slave->ir6_w(state); }
+void sis950_lpc_device::pc_irq15_w(int state)  { m_pic_slave->ir7_w(state); }
+
 /*
  * Start of legacy handling, to be moved out
  */
@@ -712,14 +739,12 @@ void sis950_lpc_device::pc_dma_hrq_changed(int state)
 	m_dmac_slave->hack_w( state );
 }
 
-#if 0
 void sis950_lpc_device::iochck_w(int state)
 {
 //  if (!state && !m_channel_check && m_nmi_enabled)
 	if (!state && !m_channel_check)
 		m_host_cpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
 }
-#endif
 
 uint8_t sis950_lpc_device::pc_dma_read_byte(offs_t offset)
 {
diff --git a/src/devices/machine/sis950_lpc.h b/src/devices/machine/sis950_lpc.h
index fa55f85c23b..65d23efa02b 100644
--- a/src/devices/machine/sis950_lpc.h
+++ b/src/devices/machine/sis950_lpc.h
@@ -10,7 +10,6 @@
 
 #include "bus/ata/ataintf.h"
 #include "bus/isa/isa.h"
-#include "bus/rs232/rs232.h"
 #include "lpc-acpi.h"
 #include "sis950_smbus.h"
 
@@ -19,7 +18,6 @@
 #include "machine/8042kbdc.h"
 #include "machine/am9517a.h"
 #include "machine/ds128x.h"
-#include "machine/ins8250.h"
 #include "machine/intelfsh.h"
 #include "machine/pc_lpt.h"
 #include "machine/pic8259.h"
@@ -51,9 +49,24 @@ class sis950_lpc_device : public pci_device
 
 	auto fast_reset_cb() { return m_fast_reset_cb.bind(); }
 
+	void pc_irq1_w(int state);
+	void pc_irq3_w(int state);
+	void pc_irq4_w(int state);
+	void pc_irq5_w(int state);
+	void pc_irq6_w(int state);
+	void pc_irq7_w(int state);
+	void pc_irq8n_w(int state);
+	void pc_irq9_w(int state);
+	void pc_irq10_w(int state);
+	void pc_irq11_w(int state);
+	void pc_irq12m_w(int state);
+	void pc_irq14_w(int state);
+	void pc_irq15_w(int state);
+
 protected:
 	virtual void device_reset() override;
 	virtual void device_add_mconfig(machine_config &config) override;
+	virtual void device_config_complete() override;
 
 //  virtual void reset_all_mappings() override;
 
@@ -65,6 +78,8 @@ class sis950_lpc_device : public pci_device
 	template <unsigned N> void memory_map(address_map &map);
 	void io_map(address_map &map);
 
+	virtual bool map_first() const override { return true; }
+
 private:
 	required_device<cpu_device> m_host_cpu;
 	required_device<intelfsh8_device> m_flash_rom;
@@ -74,9 +89,9 @@ class sis950_lpc_device : public pci_device
 	required_device<am9517a_device> m_dmac_slave;
 	required_device<pit8254_device> m_pit;
 	required_device<kbdc8042_device> m_keybc;
+	required_device<isa16_device> m_isabus;
 	required_device<speaker_sound_device> m_speaker;
 	required_device<ds12885ext_device> m_rtc;
-	required_device<ins8250_device> m_uart;
 	required_device<lpc_acpi_device> m_acpi;
 	required_device<sis950_smbus_device> m_smbus;
 
@@ -132,7 +147,7 @@ class sis950_lpc_device : public pci_device
 		u8 fast_init;
 	} m_lpc_legacy;
 
-	// SB implementation, to be moved out
+	// southbridge implementation
 	void pit_out0(int state);
 	void pit_out1(int state);
 	void pit_out2(int state);
@@ -166,6 +181,7 @@ class sis950_lpc_device : public pci_device
 	u8 keybc_status_r(offs_t offset);
 	void keybc_command_w(offs_t offset, u8 data);
 	void at_speaker_set_spkrdata(uint8_t data);
+	void iochck_w(int state);
 };
 
 DECLARE_DEVICE_TYPE(SIS950_LPC, sis950_lpc_device)
diff --git a/src/devices/machine/w83977tf.cpp b/src/devices/machine/w83977tf.cpp
index ed22bebd812..5308d65b1e8 100644
--- a/src/devices/machine/w83977tf.cpp
+++ b/src/devices/machine/w83977tf.cpp
@@ -214,7 +214,7 @@ void w83977tf_device::config_map(address_map &map)
 	// FDC
 	m_logical_view[0](0x30, 0x30).rw(FUNC(w83977tf_device::activate_r<0>), FUNC(w83977tf_device::activate_w<0>));
 	m_logical_view[0](0x31, 0xff).unmaprw();
-	// PRT
+	// LPT
 	m_logical_view[1](0x30, 0x30).rw(FUNC(w83977tf_device::activate_r<1>), FUNC(w83977tf_device::activate_w<1>));
 	m_logical_view[1](0x60, 0x61).lrw8(
 		NAME([this] (offs_t offset) {
diff --git a/src/devices/sound/okim6588.cpp b/src/devices/sound/okim6588.cpp
index 84b1a9a3033..de12b18664b 100644
--- a/src/devices/sound/okim6588.cpp
+++ b/src/devices/sound/okim6588.cpp
@@ -136,7 +136,9 @@ s16 okim6588_device::get_adpcm_sample(u8 data)
 
 void okim6588_device::reset_adpcm()
 {
-	m_stream->update();
+	if (machine().time() > attotime::zero)
+		m_stream->update();
+
 	m_adpcm_data = 0;
 	m_adpcm.reset();
 }
diff --git a/src/devices/sound/rolandpcm.cpp b/src/devices/sound/rolandpcm.cpp
index fed29abfc22..d1ec25c8f5c 100644
--- a/src/devices/sound/rolandpcm.cpp
+++ b/src/devices/sound/rolandpcm.cpp
@@ -243,7 +243,7 @@ void mb87419_mb87420_device::write(offs_t offset, u8 data)
 			}
 			break;
 		case 0x1F:
-			m_sel_chn = data;
+			m_sel_chn = data & 0x1F;
 			break;
 		default:
 			logerror("Writing unknown reg %02X = %02X\n", offset, data);
@@ -353,7 +353,7 @@ int16_t mb87419_mb87420_device::decode_sample(int8_t data)
 	int16_t val;
 	int16_t sign;
 	uint8_t shift;
-	int16_t  result;
+	int16_t result;
 
 	if (data < 0)
 	{
diff --git a/src/devices/sound/rolandpcm.h b/src/devices/sound/rolandpcm.h
index 6afb177b108..c8f1ebb5c08 100644
--- a/src/devices/sound/rolandpcm.h
+++ b/src/devices/sound/rolandpcm.h
@@ -46,6 +46,7 @@ class mb87419_mb87420_device : public device_t, public device_sound_interface, p
 		uint32_t start = 0;     // start address (18.14 fixed point)
 		uint16_t end = 0;       // end offset (high word)
 		uint16_t loop = 0;      // loop offset (high word)
+
 		// work variables
 		bool enable = false;
 		int8_t play_dir = 0;    // playing direction, -1 [backwards] / 0 [stopped] / +1 [forwards]
diff --git a/src/devices/sound/sp0250.cpp b/src/devices/sound/sp0250.cpp
index 73e0e6cacff..2c4384888e9 100644
--- a/src/devices/sound/sp0250.cpp
+++ b/src/devices/sound/sp0250.cpp
@@ -109,11 +109,6 @@ void sp0250_device::device_reset()
 	load_values();
 }
 
-TIMER_CALLBACK_MEMBER(sp0250_device::delayed_stream_update)
-{
-	m_stream->update();
-}
-
 static uint16_t sp0250_ga(uint8_t v)
 {
 	return (v & 0x1f) << (v>>5);
diff --git a/src/devices/sound/sp0250.h b/src/devices/sound/sp0250.h
index fb463e25d5b..5dfd3742e52 100644
--- a/src/devices/sound/sp0250.h
+++ b/src/devices/sound/sp0250.h
@@ -23,8 +23,7 @@ class sp0250_device : public device_t, public device_sound_interface
 
 	// sound stream update overrides
 	virtual void sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs) override;
-
-	TIMER_CALLBACK_MEMBER(delayed_stream_update);
+	TIMER_CALLBACK_MEMBER(delayed_stream_update) { m_stream->update(); }
 
 private:
 	// internal helpers
diff --git a/src/devices/sound/sp0256.cpp b/src/devices/sound/sp0256.cpp
index 237904be94a..3486f710be3 100644
--- a/src/devices/sound/sp0256.cpp
+++ b/src/devices/sound/sp0256.cpp
@@ -55,10 +55,10 @@ sp0256_device::sp0256_device(const machine_config &mconfig, const char *tag, dev
 	, device_sound_interface(mconfig, *this)
 	, m_rom(*this, DEVICE_SELF)
 	, m_stream(nullptr)
+	, m_stream_timer(nullptr)
 	, m_drq_cb(*this)
 	, m_sby_cb(*this)
 	, m_scratch()
-	, m_lrq_timer(nullptr)
 {
 }
 
@@ -70,8 +70,17 @@ void sp0256_device::device_start()
 {
 	m_drq_cb(1);
 	m_sby_cb(1);
+	m_sby_line = 1;
 
-	m_stream = stream_alloc(0, 1, clock() / CLOCK_DIVIDER);
+	int sample_rate = clock() / CLOCK_DIVIDER;
+	m_stream = stream_alloc(0, 1, sample_rate);
+
+	// if callbacks are used, update the stream at sample rate frequency to ensure they get picked up in a timely matter
+	if (!m_drq_cb.isunset() || !m_sby_cb.isunset())
+	{
+		m_stream_timer = timer_alloc(FUNC(sp0256_device::delayed_stream_update), this);
+		m_stream_timer->adjust(attotime::from_hz(sample_rate), 0, attotime::from_hz(sample_rate));
+	}
 
 	/* -------------------------------------------------------------------- */
 	/*  Configure our internal variables.                                   */
@@ -79,7 +88,7 @@ void sp0256_device::device_start()
 	m_filt.rng = 1;
 
 	/* -------------------------------------------------------------------- */
-	/*  Allocate a scratch buffer for generating ~10kHz samples.             */
+	/*  Allocate a scratch buffer for generating ~10kHz samples.            */
 	/* -------------------------------------------------------------------- */
 	m_scratch = std::make_unique<int16_t[]>(SCBUF_SIZE);
 	save_pointer(NAME(m_scratch), SCBUF_SIZE);
@@ -91,7 +100,7 @@ void sp0256_device::device_start()
 	/* -------------------------------------------------------------------- */
 	m_halted   = 1;
 	m_filt.rpt = -1;
-	m_lrq      = 0x8000;
+	m_lrq      = 1;
 	m_page     = 0x1000 << 3;
 	m_silent   = 1;
 
@@ -103,8 +112,6 @@ void sp0256_device::device_start()
 	// TODO: because of this, check if the bitrev functions are even used anywhere else
 	// bitrevbuff(m_rom, 0, 0xffff);
 
-	m_lrq_timer = timer_alloc(FUNC(sp0256_device::set_lrq_timer_proc), this);
-
 	// save device variables
 	save_item(NAME(m_sby_line));
 	save_item(NAME(m_cur_len));
@@ -123,6 +130,7 @@ void sp0256_device::device_start()
 	save_item(NAME(m_fifo_tail));
 	save_item(NAME(m_fifo_bitp));
 	save_item(NAME(m_fifo));
+
 	// save filter variables
 	save_item(NAME(m_filt.rpt));
 	save_item(NAME(m_filt.cnt));
@@ -143,6 +151,9 @@ void sp0256_device::device_start()
 
 void sp0256_device::device_reset()
 {
+	if (machine().time() > attotime::zero)
+		m_stream->update();
+
 	// reset FIFO and SP0256
 	m_fifo_head = m_fifo_tail = m_fifo_bitp = 0;
 
@@ -150,10 +161,10 @@ void sp0256_device::device_reset()
 	m_halted   = 1;
 	m_filt.rpt = -1;
 	m_filt.rng = 1;
-	m_lrq      = 0x8000;
-	m_ald      = 0x0000;
-	m_pc       = 0x0000;
-	m_stack    = 0x0000;
+	m_lrq      = 1;
+	m_ald      = 0;
+	m_pc       = 0;
+	m_stack    = 0;
 	m_fifo_sel = 0;
 	m_mode     = 0;
 	m_page     = 0x1000 << 3;
@@ -161,9 +172,6 @@ void sp0256_device::device_reset()
 	m_sby_line = 0;
 	m_drq_cb(1);
 	SET_SBY(1);
-
-	m_lrq = 0;
-	m_lrq_timer->adjust(attotime::from_ticks(50, m_clock));
 }
 
 
@@ -727,7 +735,7 @@ void sp0256_device::bitrevbuff(uint8_t *buffer, unsigned int start, unsigned int
 /* ======================================================================== */
 /*  SP0256_GETB  -- Get up to 8 bits at the current PC.                     */
 /* ======================================================================== */
-uint32_t sp0256_device::getb( int len )
+uint32_t sp0256_device::getb(int len)
 {
 	uint32_t data;
 	uint32_t d0, d1;
@@ -756,7 +764,8 @@ uint32_t sp0256_device::getb( int len )
 			m_fifo_tail++;
 			m_fifo_bitp -= 10;
 		}
-	} else
+	}
+	else
 	{
 		/* ---------------------------------------------------------------- */
 		/*  Figure out which ROMs are being fetched into, and grab two      */
@@ -789,8 +798,8 @@ uint32_t sp0256_device::getb( int len )
 /* ======================================================================== */
 void sp0256_device::micro()
 {
-	uint8_t  immed4;
-	uint8_t  opcode;
+	uint8_t immed4;
+	uint8_t opcode;
 	uint16_t cr;
 	int ctrl_xfer;
 	int repeat;
@@ -810,7 +819,7 @@ void sp0256_device::micro()
 			m_pc       = m_ald | (0x1000 << 3);
 			m_fifo_sel = 0;
 			m_halted   = 0;
-			m_lrq      = 0x8000;
+			m_lrq      = 1;
 			m_ald      = 0;
 			for (i = 0; i < 16; i++)
 				m_filt.r[i] = 0;
@@ -823,7 +832,7 @@ void sp0256_device::micro()
 		if (m_halted)
 		{
 			m_filt.rpt = 1;
-			m_lrq      = 0x8000;
+			m_lrq      = 1;
 			m_ald      = 0;
 			for (i = 0; i < 16; i++)
 				m_filt.r[i] = 0;
@@ -864,10 +873,12 @@ void sp0256_device::micro()
 				if (immed4)     /* SETPAGE */
 				{
 					m_page = bitrev32(immed4) >> 13;
-				} else
+				}
+
 				/* -------------------------------------------------------- */
 				/*  Otherwise, this is an RTS / HLT.                        */
 				/* -------------------------------------------------------- */
+				else
 				{
 					uint32_t btrg;
 
@@ -887,7 +898,8 @@ void sp0256_device::micro()
 						m_halted   = 1;
 						m_pc       = 0;
 						ctrl_xfer  = 1;
-					} else
+					}
+					else
 					{
 						m_pc      = btrg;
 						ctrl_xfer = 1;
@@ -904,7 +916,7 @@ void sp0256_device::micro()
 			case 0xE:
 			case 0xD:
 			{
-				int btrg;
+				uint32_t btrg;
 
 				/* -------------------------------------------------------- */
 				/*  Figure out our branch target.                           */
@@ -1140,6 +1152,8 @@ void sp0256_device::micro()
 
 void sp0256_device::ald_w(uint8_t data)
 {
+	m_stream->update();
+
 	/* ---------------------------------------------------------------- */
 	/*  Drop writes to the ALD register if we're busy.                  */
 	/* ---------------------------------------------------------------- */
@@ -1155,66 +1169,59 @@ void sp0256_device::ald_w(uint8_t data)
 	/*  get the new PC address.                                         */
 	/* ---------------------------------------------------------------- */
 	m_lrq = 0;
-	m_ald = (0xff & data) << 4;
+	m_ald = data << 4;
 	m_drq_cb(0);
 	SET_SBY(0);
-
-	return;
 }
 
 int sp0256_device::lrq_r()
 {
-	// force stream update
 	m_stream->update();
-
-	return m_lrq == 0x8000;
+	return m_lrq;
 }
 
 int sp0256_device::sby_r()
 {
-	// TODO: force stream update??
-
+	m_stream->update();
 	return m_sby_line;
 }
 
 uint16_t sp0256_device::spb640_r(offs_t offset)
 {
+	m_stream->update();
+	offset &= 1;
+
 	/* -------------------------------------------------------------------- */
 	/*  Offset 0 returns the SP0256 LRQ status on bit 15.                   */
 	/* -------------------------------------------------------------------- */
 	if (offset == 0)
 	{
-		return m_lrq;
+		return m_lrq << 15;
 	}
 
 	/* -------------------------------------------------------------------- */
 	/*  Offset 1 returns the SPB640 FIFO full status on bit 15.             */
 	/* -------------------------------------------------------------------- */
-	if (offset == 1)
+	else
 	{
 		return (m_fifo_head - m_fifo_tail) >= 64 ? 0x8000 : 0;
 	}
-
-	/* -------------------------------------------------------------------- */
-	/*  Just return 255 for all other addresses in our range.               */
-	/* -------------------------------------------------------------------- */
-	return 0x00ff;
 }
 
 void sp0256_device::spb640_w(offs_t offset, uint16_t data)
 {
+	m_stream->update();
+	offset &= 1;
+
 	if (offset == 0)
 	{
 		ald_w(data & 0xff);
-		return;
 	}
-
-	if (offset == 1)
+	else
 	{
 		/* ---------------------------------------------------------------- */
 		/*  If Bit 10 is set, reset the FIFO, and SP0256.                   */
 		/* ---------------------------------------------------------------- */
-
 		if (data & 0x400)
 		{
 			m_fifo_head = m_fifo_tail = m_fifo_bitp = 0;
@@ -1234,13 +1241,10 @@ void sp0256_device::spb640_w(offs_t offset, uint16_t data)
 		/* ---------------------------------------------------------------- */
 		/*  FIFO up the lower 10 bits of the data.                          */
 		/* ---------------------------------------------------------------- */
-
 		LOG("spb640: WR_FIFO %.3X %d.%d %d\n", data & 0x3ff,
 				m_fifo_tail, m_fifo_bitp, m_fifo_head);
 
 		m_fifo[m_fifo_head++ & 63] = data & 0x3ff;
-
-		return;
 	}
 }
 
@@ -1251,11 +1255,6 @@ void sp0256_device::set_clock(int clock)
 }
 
 
-TIMER_CALLBACK_MEMBER(sp0256_device::set_lrq_timer_proc)
-{
-	m_lrq = 0x8000;
-}
-
 //-------------------------------------------------
 //  sound_stream_update - handle a stream update
 //-------------------------------------------------
@@ -1264,7 +1263,6 @@ void sp0256_device::sound_stream_update(sound_stream &stream, std::vector<read_s
 {
 	auto &output = outputs[0];
 	int output_index = 0;
-	int length, did_samp/*, old_idx*/;
 
 	while (output_index < output.samples())
 	{
@@ -1272,7 +1270,6 @@ void sp0256_device::sound_stream_update(sound_stream &stream, std::vector<read_s
 		/*  First, drain as much of our scratch buffer as we can into the   */
 		/*  sound buffer.                                                  */
 		/* ---------------------------------------------------------------- */
-
 		while (m_sc_tail != m_sc_head)
 		{
 			output.put_int(output_index++, m_scratch[m_sc_tail++ & SCBUF_MASK], 32768);
@@ -1288,14 +1285,13 @@ void sp0256_device::sound_stream_update(sound_stream &stream, std::vector<read_s
 		if (output_index > output.samples())
 			break;
 
-		length = output.samples() - output_index;
+		int length = output.samples() - output_index;
 
 		/* ---------------------------------------------------------------- */
 		/*  Process the current set of filter coefficients as long as the   */
 		/*  repeat count holds up and we have room in our scratch buffer.   */
 		/* ---------------------------------------------------------------- */
-		did_samp = 0;
-		//old_idx  = m_sc_head;
+		int did_samp = 0;
 		if (length > 0) do
 		{
 			int do_samp;
@@ -1322,7 +1318,7 @@ void sp0256_device::sound_stream_update(sound_stream &stream, std::vector<read_s
 				for (int x = 0; x < do_samp; x++)
 					m_scratch[y++ & SCBUF_MASK] = 0;
 				m_sc_head += do_samp;
-				did_samp    += do_samp;
+				did_samp += do_samp;
 			}
 			else
 			{
diff --git a/src/devices/sound/sp0256.h b/src/devices/sound/sp0256.h
index c6e1bd225c0..d1c6d7ab687 100644
--- a/src/devices/sound/sp0256.h
+++ b/src/devices/sound/sp0256.h
@@ -51,7 +51,6 @@ class sp0256_device : public device_t,
 	uint16_t spb640_r(offs_t offset);
 	void spb640_w(offs_t offset, uint16_t data);
 
-	TIMER_CALLBACK_MEMBER(set_lrq_timer_proc);
 	void set_clock(int clock);
 	void bitrevbuff(uint8_t *buffer, unsigned int start, unsigned int length);
 
@@ -62,6 +61,7 @@ class sp0256_device : public device_t,
 
 	// sound stream update overrides
 	virtual void sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs) override;
+	TIMER_CALLBACK_MEMBER(delayed_stream_update) { m_stream->update(); }
 
 private:
 	struct lpc12_t
@@ -96,6 +96,7 @@ class sp0256_device : public device_t,
 
 	required_region_ptr<uint8_t> m_rom; // 64K ROM.
 	sound_stream *m_stream;           // MAME core sound stream
+	emu_timer *m_stream_timer;        // For forcing stream update when callbacks are used
 	devcb_write_line m_drq_cb;        // Data request callback
 	devcb_write_line m_sby_cb;        // Standby callback
 
@@ -122,8 +123,6 @@ class sp0256_device : public device_t,
 	uint32_t       m_fifo_tail;       // FIFO tail pointer (where data comes from).
 	uint32_t       m_fifo_bitp;       // FIFO bit-pointer (for partial decles).
 	uint16_t       m_fifo[64];        // The 64-decle FIFO.
-
-	emu_timer *m_lrq_timer;
 };
 
 DECLARE_DEVICE_TYPE(SP0256, sp0256_device)
diff --git a/src/devices/video/i8244.cpp b/src/devices/video/i8244.cpp
index 6df1f3b9142..1734d83677d 100644
--- a/src/devices/video/i8244.cpp
+++ b/src/devices/video/i8244.cpp
@@ -448,6 +448,7 @@ void i8244_device::write_cx(int x, bool cx)
 			if (colx & m_vdc.s.collision)
 				m_collision_status |= 0x40;
 		}
+
 		// check if an already drawn object would collide with us
 		if (m_vdc.s.collision & 0x40)
 		{
@@ -553,7 +554,7 @@ void i8244_device::draw_grid(int scanline, bitmap_ind16 &bitmap, const rectangle
 }
 
 
-void i8244_device::char_pixel(u8 index, int x, int y, u8 pixel, u16 color, bitmap_ind16 &bitmap, const rectangle &cliprect)
+void i8244_device::major_pixel(u8 index, int x, int y, u8 pixel, u16 color, bitmap_ind16 &bitmap, const rectangle &cliprect)
 {
 	for (int px = x; px < x + 2; px++)
 	{
@@ -614,7 +615,7 @@ void i8244_device::draw_major(int scanline, bitmap_ind16 &bitmap, const rectangl
 
 				u16 color = 8 + ((m_vdc.s.quad[i].single[j].color >> 1) & 0x07);
 				for (int cx = 0; cx < 8; cx++, x += 2)
-					char_pixel(4 * j + 16 * i + 0x40, x, scanline, BIT(m_charset[offset & 0x1ff], cx ^ 7), color, bitmap, cliprect);
+					major_pixel(4 * j + 16 * i + 0x40, x, scanline, BIT(m_charset[offset & 0x1ff], cx ^ 7), color, bitmap, cliprect);
 			}
 		}
 	}
@@ -636,7 +637,7 @@ void i8244_device::draw_major(int scanline, bitmap_ind16 &bitmap, const rectangl
 			int x = (m_vdc.s.foreground[i].x + 5) * 2;
 			u16 color = 8 + ((m_vdc.s.foreground[i].color >> 1) & 0x07);
 			for (int cx = 0; cx < 8; cx++, x += 2)
-				char_pixel(4 * i + 0x10, x, scanline, BIT(m_charset[offset & 0x1ff], cx ^ 7), color, bitmap, cliprect);
+				major_pixel(4 * i + 0x10, x, scanline, BIT(m_charset[offset & 0x1ff], cx ^ 7), color, bitmap, cliprect);
 		}
 	}
 }
diff --git a/src/devices/video/i8244.h b/src/devices/video/i8244.h
index 9514f36deb5..680eb97033c 100644
--- a/src/devices/video/i8244.h
+++ b/src/devices/video/i8244.h
@@ -129,7 +129,7 @@ class i8244_device :  public device_t
 	void draw_grid(int scanline, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	void draw_major(int scanline, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	void draw_minor(int scanline, bitmap_ind16 &bitmap, const rectangle &cliprect);
-	void char_pixel(u8 index, int x, int y, u8 pixel, u16 color, bitmap_ind16 &bitmap, const rectangle &cliprect);
+	void major_pixel(u8 index, int x, int y, u8 pixel, u16 color, bitmap_ind16 &bitmap, const rectangle &cliprect);
 
 	// callbacks
 	devcb_write_line m_irq_func;
diff --git a/src/devices/video/pc_vga_sis.cpp b/src/devices/video/pc_vga_sis.cpp
index 944034613b4..355e99bc4fb 100644
--- a/src/devices/video/pc_vga_sis.cpp
+++ b/src/devices/video/pc_vga_sis.cpp
@@ -34,16 +34,28 @@ VBE 3.0, Multi Buffering & Virtual Scrolling available
 
 // TODO: later variant of 5598
 // (definitely doesn't have dual segment mode for instance)
-DEFINE_DEVICE_TYPE(SIS630_SVGA, sis630_svga_device, "sis630_svga", "SiS 630 VGA i/f")
+DEFINE_DEVICE_TYPE(SIS6236_VGA, sis6236_vga_device, "sis6236_vga", "SiS 6236 VGA i/f")
+DEFINE_DEVICE_TYPE(SIS630_VGA, sis630_vga_device, "sis630_vga", "SiS 630 VGA i/f")
 
-sis630_svga_device::sis630_svga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
-	: svga_device(mconfig, SIS630_SVGA, tag, owner, clock)
+sis6236_vga_device::sis6236_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+	: sis6236_vga_device(mconfig, SIS6236_VGA, tag, owner, clock)
 {
-	m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_svga_device::crtc_map), this));
-	m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_svga_device::sequencer_map), this));
+	m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis6236_vga_device::sequencer_map), this));
 }
 
-void sis630_svga_device::device_start()
+sis6236_vga_device::sis6236_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+	: svga_device(mconfig, type, tag, owner, clock)
+{
+}
+
+sis630_vga_device::sis630_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+	: sis6236_vga_device(mconfig, SIS630_VGA, tag, owner, clock)
+{
+	m_crtc_space_config = address_space_config("crtc_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::crtc_map), this));
+	m_seq_space_config = address_space_config("sequencer_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(sis630_vga_device::sequencer_map), this));
+}
+
+void sis6236_vga_device::device_start()
 {
 	svga_device::device_start();
 	zero();
@@ -52,11 +64,12 @@ void sis630_svga_device::device_start()
 	vga.crtc.maximum_scan_line = 1;
 
 	// copy over interfaces
-	vga.svga_intf.vram_size = 64*1024*1024;
-	//vga.memory = std::make_unique<uint8_t []>(vga.svga_intf.vram_size);
+	vga.memory = std::make_unique<uint8_t []>(vga.svga_intf.vram_size);
+	memset(&vga.memory[0], 0, vga.svga_intf.vram_size);
+
 }
 
-void sis630_svga_device::device_reset()
+void sis6236_vga_device::device_reset()
 {
 	svga_device::device_reset();
 
@@ -64,7 +77,7 @@ void sis630_svga_device::device_reset()
 	//m_dual_seg_mode = false;
 }
 
-void sis630_svga_device::io_3cx_map(address_map &map)
+void sis6236_vga_device::io_3cx_map(address_map &map)
 {
 	svga_device::io_3cx_map(map);
 	// TODO: for '630 it's always with dual segment enabled?
@@ -89,45 +102,7 @@ void sis630_svga_device::io_3cx_map(address_map &map)
 	);
 }
 
-// Page 144
-void sis630_svga_device::crtc_map(address_map &map)
-{
-	svga_device::crtc_map(map);
-	// CR19/CR1A Extended Signature Read-Back 0/1
-	// CR1B CRT horizontal counter (r/o)
-	// CR1C CRT vertical counter (r/o)
-	// CR1D CRT overflow counter (r/o)
-	// CR1E Extended Signature Read-Back 2
-	// CR26 Attribute Controller Index read-back
-	// TODO: is this an undocumented VGA or a SiS extension?
-	map(0x26, 0x26).lr8(
-		NAME([this] (offs_t offset) { return vga.attribute.index; })
-	);
-	// TODO: very preliminary, this section is undocumented in '630 doc
-	map(0x30, 0xff).lrw8(
-		NAME([this] (offs_t offset) {
-			return vga.crtc.data[offset];
-		}),
-		NAME([this] (offs_t offset, u8 data) {
-			// TODO: if one of these is 0xff then it enables a single port transfer to $b8000
-			// Older style MMIO?
-			vga.crtc.data[offset] = data;
-		})
-	);
-	// make sure '301 CRT2 is not enabled for now
-	// TODO: BeMAME (0.36b5) under BeOS 5.0 detects a secondary monitor by default anyway
-	map(0x30, 0x30).lr8(
-		NAME([] (offs_t offset) { return 0; })
-	);
-	map(0x31, 0x31).lr8(
-		NAME([] (offs_t offset) { return 0x60; })
-	);
-	map(0x32, 0x32).lr8(
-		NAME([] (offs_t offset) { return 0x20; })
-	);
-}
-
-void sis630_svga_device::sequencer_map(address_map &map)
+void sis6236_vga_device::sequencer_map(address_map &map)
 {
 	svga_device::sequencer_map(map);
 	// extended ID register
@@ -175,15 +150,152 @@ void sis630_svga_device::sequencer_map(address_map &map)
 	);
 	map(0x07, 0x07).lrw8(
 		NAME([this] (offs_t offset) {
-			return m_ext_misc_ctrl_0;
+			return m_ext_misc_ctrl[0];
 		}),
 		NAME([this] (offs_t offset, u8 data) {
 			LOG("SR07: Extended Misc. Control 0 %02x\n", data);
-			m_ext_misc_ctrl_0 = data;
+			m_ext_misc_ctrl[0] = data;
 			std::tie(svga.rgb24_en, svga.rgb32_en) = flush_true_color_mode();
 		})
 	);
 	//map(0x08, 0x09) CRT threshold
+	map(0x0a, 0x0a).lrw8(
+		NAME([this] (offs_t offset) {
+			return m_ext_vert_overflow;
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			LOG("SR0A: Extended CRT Overflow %02x\n", data);
+			m_ext_vert_overflow = data;
+			vga.crtc.offset = (vga.crtc.offset & 0x00ff) | ((data & 0xf0) << 4);
+			vga.crtc.vert_retrace_start = (vga.crtc.vert_retrace_start & 0x03ff) | ((data & 0x08) << 7);
+			vga.crtc.vert_blank_start =   (vga.crtc.vert_blank_start & 0x03ff)   | ((data & 0x04) << 8);
+			vga.crtc.vert_disp_end =      (vga.crtc.vert_disp_end & 0x03ff)      | ((data & 0x02) << 9);
+			vga.crtc.vert_total =         (vga.crtc.vert_total & 0x03ff)         | ((data & 0x01) << 10);
+			recompute_params();
+		})
+	);
+	map(0x0b, 0x0c).lrw8(
+		NAME([this] (offs_t offset) {
+			return m_ext_misc_ctrl[offset + 1];
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			LOG("SR%02X: Extended Misc. Control %d %02x\n", offset + 0xb, offset + 1, data);
+			m_ext_misc_ctrl[offset + 1] = data;
+		})
+	);
+	//map(0x0e, 0x0f) Ext. Config Status (r/o)
+	map(0x0f, 0x10).lrw8(
+		NAME([this] (offs_t offset) {
+			return m_ext_scratch[offset];
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			LOG("SR%02X: Extended Scratch %d %02x\n", offset + 0xf, offset, data);
+			m_ext_scratch[offset] = data;
+		})
+	);
+	//map(0x11, 0x11) DDC register
+	// ...
+}
+
+std::tuple<u8, u8> sis6236_vga_device::flush_true_color_mode()
+{
+	// punt if extended or true color is off
+	if ((m_ramdac_mode & 0x12) != 0x12)
+		return std::make_tuple(0, 0);
+
+	const u8 res = (m_ext_misc_ctrl[0] & 4) >> 2;
+
+	return std::make_tuple(res, res ^ 1);
+}
+
+void sis6236_vga_device::recompute_params()
+{
+	u8 xtal_select = (vga.miscellaneous_output & 0x0c) >> 2;
+	int xtal;
+
+	switch(xtal_select & 3)
+	{
+		case 0: xtal = XTAL(25'174'800).value(); break;
+		case 1: xtal = XTAL(28'636'363).value(); break;
+		// TODO: stub, barely enough to make BeOS 5 to set ~60 Hz for 640x480x16
+		case 2:
+		default:
+			xtal = XTAL(25'174'800).value();
+			break;
+	}
+
+	recompute_params_clock(1, xtal);
+}
+
+uint16_t sis6236_vga_device::offset()
+{
+	if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en)
+		return vga.crtc.offset << 3;
+	return svga_device::offset();
+}
+
+uint8_t sis6236_vga_device::mem_r(offs_t offset)
+{
+	if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en)
+		return svga_device::mem_linear_r(offset + svga.bank_r * 0x10000);
+	return svga_device::mem_r(offset);
+}
+
+void sis6236_vga_device::mem_w(offs_t offset, uint8_t data)
+{
+	if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en)
+	{
+		svga_device::mem_linear_w(offset + svga.bank_w * 0x10000, data);
+		return;
+	}
+	svga_device::mem_w(offset, data);
+}
+
+/*
+ * SiS630 overrides
+ */
+
+// Page 144
+void sis630_vga_device::crtc_map(address_map &map)
+{
+	sis6236_vga_device::crtc_map(map);
+	// CR19/CR1A Extended Signature Read-Back 0/1
+	// CR1B CRT horizontal counter (r/o)
+	// CR1C CRT vertical counter (r/o)
+	// CR1D CRT overflow counter (r/o)
+	// CR1E Extended Signature Read-Back 2
+	// CR26 Attribute Controller Index read-back
+	// TODO: is this an undocumented VGA or a SiS extension?
+	map(0x26, 0x26).lr8(
+		NAME([this] (offs_t offset) { return vga.attribute.index; })
+	);
+	// TODO: very preliminary, this section is undocumented in '630 doc
+	map(0x30, 0xff).lrw8(
+		NAME([this] (offs_t offset) {
+			return vga.crtc.data[offset];
+		}),
+		NAME([this] (offs_t offset, u8 data) {
+			// TODO: if one of these is 0xff then it enables a single port transfer to $b8000
+			// Older style MMIO?
+			vga.crtc.data[offset] = data;
+		})
+	);
+	// make sure '301 CRT2 is not enabled for now
+	// TODO: BeMAME (0.36b5) under BeOS 5.0 detects a secondary monitor by default anyway
+	map(0x30, 0x30).lr8(
+		NAME([] (offs_t offset) { return 0; })
+	);
+	map(0x31, 0x31).lr8(
+		NAME([] (offs_t offset) { return 0x60; })
+	);
+	map(0x32, 0x32).lr8(
+		NAME([] (offs_t offset) { return 0x20; })
+	);
+}
+
+void sis630_vga_device::sequencer_map(address_map &map)
+{
+	sis6236_vga_device::sequencer_map(map);
 	map(0x0a, 0x0a).lrw8(
 		NAME([this] (offs_t offset) {
 			return m_ext_vert_overflow;
@@ -336,57 +448,3 @@ void sis630_svga_device::sequencer_map(address_map &map)
 	//map(0x3c, 0x3c) Synchronous reset
 	//map(0x3d, 0x3d) Test enable
 }
-
-std::tuple<u8, u8> sis630_svga_device::flush_true_color_mode()
-{
-	// punt if extended or true color is off
-	if ((m_ramdac_mode & 0x12) != 0x12)
-		return std::make_tuple(0, 0);
-
-	const u8 res = (m_ext_misc_ctrl_0 & 4) >> 2;
-
-	return std::make_tuple(res, res ^ 1);
-}
-
-void sis630_svga_device::recompute_params()
-{
-	u8 xtal_select = (vga.miscellaneous_output & 0x0c) >> 2;
-	int xtal;
-
-	switch(xtal_select & 3)
-	{
-		case 0: xtal = XTAL(25'174'800).value(); break;
-		case 1: xtal = XTAL(28'636'363).value(); break;
-		// TODO: stub, barely enough to make BeOS 5 to set ~60 Hz for 640x480x16
-		case 2:
-		default:
-			xtal = XTAL(25'174'800).value();
-			break;
-	}
-
-	recompute_params_clock(1, xtal);
-}
-
-uint16_t sis630_svga_device::offset()
-{
-	if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en)
-		return vga.crtc.offset << 3;
-	return svga_device::offset();
-}
-
-uint8_t sis630_svga_device::mem_r(offs_t offset)
-{
-	if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en)
-		return svga_device::mem_linear_r(offset + svga.bank_r * 0x10000);
-	return svga_device::mem_r(offset);
-}
-
-void sis630_svga_device::mem_w(offs_t offset, uint8_t data)
-{
-	if (svga.rgb8_en || svga.rgb15_en || svga.rgb16_en || svga.rgb24_en || svga.rgb32_en)
-	{
-		svga_device::mem_linear_w(offset + svga.bank_w * 0x10000, data);
-		return;
-	}
-	svga_device::mem_w(offset, data);
-}
diff --git a/src/devices/video/pc_vga_sis.h b/src/devices/video/pc_vga_sis.h
index 7733864ac49..ebe4952d956 100644
--- a/src/devices/video/pc_vga_sis.h
+++ b/src/devices/video/pc_vga_sis.h
@@ -8,28 +8,31 @@
 
 #include "video/pc_vga.h"
 
-class sis630_svga_device : public svga_device
+class sis6236_vga_device : public svga_device
 {
 public:
-	sis630_svga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+	sis6236_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
 
 	virtual uint8_t mem_r(offs_t offset) override;
 	virtual void mem_w(offs_t offset, uint8_t data) override;
 
 protected:
+	sis6236_vga_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
 	virtual void device_start() override;
 	virtual void device_reset() override;
 
 	virtual void io_3cx_map(address_map &map) override;
 
-	virtual void crtc_map(address_map &map) override;
 	virtual void sequencer_map(address_map &map) override;
 
 	virtual uint16_t offset() override;
 	virtual void recompute_params() override;
 
 	u8 m_ramdac_mode = 0;
-	u8 m_ext_misc_ctrl_0 = 0;
+	u8 m_ext_misc_ctrl[3]{};
+	//u16 m_ext_config_status = 0;
+	u8 m_ext_scratch[2]{};
 	u8 m_ext_vert_overflow = 0;
 	u8 m_ext_horz_overflow[2]{};
 	u8 m_bus_width = 0;
@@ -43,6 +46,20 @@ class sis630_svga_device : public svga_device
 //  bool m_dual_seg_mode = false;
 };
 
-DECLARE_DEVICE_TYPE(SIS630_SVGA, sis630_svga_device)
+class sis630_vga_device : public sis6236_vga_device
+{
+public:
+	sis630_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+//	virtual void device_start() override;
+//	virtual void device_reset() override;
+
+	virtual void crtc_map(address_map &map) override;
+	virtual void sequencer_map(address_map &map) override;
+};
+
+DECLARE_DEVICE_TYPE(SIS6236_VGA, sis6236_vga_device)
+DECLARE_DEVICE_TYPE(SIS630_VGA, sis630_vga_device)
 
 #endif // MAME_VIDEO_PC_VGA_SIS_H
diff --git a/src/devices/video/sn74s262.cpp b/src/devices/video/sn74s262.cpp
index 70b2407f953..720301b8b21 100644
--- a/src/devices/video/sn74s262.cpp
+++ b/src/devices/video/sn74s262.cpp
@@ -50,7 +50,7 @@ GFXDECODE_END
 
 ROM_START( sn74s262 )
 	ROM_REGION( 0xa00, "chargen", 0 )
-	ROM_LOAD( "sn74s262", 0x000, 0xa00, NO_DUMP )
+	ROM_LOAD( "sn74s262", 0x000, 0x500, BAD_DUMP CRC(6896d319) SHA1(1234558418a5c7a9823d54a93d0c7f63bd8a490a) ) // created by hand
 ROM_END
 
 
diff --git a/src/emu/rendfont.cpp b/src/emu/rendfont.cpp
index 60ea12f9400..259d7731fe5 100644
--- a/src/emu/rendfont.cpp
+++ b/src/emu/rendfont.cpp
@@ -758,7 +758,8 @@ void render_font::get_scaled_bitmap_and_bounds(bitmap_argb32 &dest, float height
 	bounds.min_y = 0;
 
 	// compute x1,y1 from there based on the bitmap size
-	bounds.set_width(float(gl.bmwidth) * scale * aspect);
+	float width = float(gl.bmwidth) * scale * aspect;
+	bounds.set_width(width < 0.5f ? 0 : std::max(int(width), 1));
 	bounds.set_height(float(m_height) * scale);
 
 	// if the bitmap isn't big enough, bail
diff --git a/src/emu/rendlay.cpp b/src/emu/rendlay.cpp
index 76d13250bfa..7dc75efb130 100644
--- a/src/emu/rendlay.cpp
+++ b/src/emu/rendlay.cpp
@@ -1790,10 +1790,10 @@ class layout_element::image_component : public component
 			{
 				u8 const *const src(reinterpret_cast<u8 const *>(dst));
 				rgb_t const d(
-						u8((float(src[3]) * c.a) + 0.5),
-						u8((float(src[0]) * c.r) + 0.5),
-						u8((float(src[1]) * c.g) + 0.5),
-						u8((float(src[2]) * c.b) + 0.5));
+						u8((float(src[3]) * c.a) + 0.5F),
+						u8((float(src[0]) * c.r) + 0.5F),
+						u8((float(src[1]) * c.g) + 0.5F),
+						u8((float(src[2]) * c.b) + 0.5F));
 				*dst = d;
 				havealpha = havealpha || (d.a() < 255U);
 			}
diff --git a/src/emu/xtal.cpp b/src/emu/xtal.cpp
index 4f541f5a518..f6a54115faa 100644
--- a/src/emu/xtal.cpp
+++ b/src/emu/xtal.cpp
@@ -280,6 +280,7 @@ const double XTAL::known_xtals[] = {
 	 16'572'000, /* 16.572_MHz_XTAL        Micro-Term ACT-5A */
 	 16'588'800, /* 16.5888_MHz_XTAL       SM 7238 */
 	 16'666'600, /* 16.6666_MHz_XTAL       Firebeat GCU */
+	 16'667'000, /* 16.667_MHz_XTAL        Visual XDS-19P */
 	 16'669'800, /* 16.6698_MHz_XTAL       Qume QVT-102 */
 	 16'670'000, /* 16.67_MHz_XTAL         - */
 	 16'777'216, /* 16.777216_MHz_XTAL     Nintendo Game Boy Advance */
diff --git a/src/mame/acorn/atom.cpp b/src/mame/acorn/atom.cpp
index 9a298a67a20..33a91d8d434 100644
--- a/src/mame/acorn/atom.cpp
+++ b/src/mame/acorn/atom.cpp
@@ -710,6 +710,9 @@ void atom_state::floppy_formats(format_registration &fr)
 
 void atom_state::atom_common(machine_config &config)
 {
+	[[maybe_unused]] static constexpr auto X1 = 3.579545_MHz_XTAL;    // MC6847 Clock
+	static constexpr auto X2 = 4_MHz_XTAL;           // CPU Clock - a divider reduces it to 1MHz
+
 	/* basic machine hardware */
 	M6502(config, m_maincpu, X2/4);
 
@@ -758,7 +761,8 @@ void atom_state::atom(machine_config &config)
 	atom_common(config);
 	m_maincpu->set_addrmap(AS_PROGRAM, &atom_state::atom_mem);
 
-	I8271(config, m_fdc, 0);
+	// Atom Disc Pack
+	I8271(config, m_fdc, 4_MHz_XTAL / 2);
 	m_fdc->intrq_wr_callback().set(FUNC(atom_state::atom_8271_interrupt_callback));
 	m_fdc->hdl_wr_callback().set(FUNC(atom_state::motor_w));
 	FLOPPY_CONNECTOR(config, I8271_TAG ":0", atom_floppies, "525sssd", atom_state::floppy_formats).enable_sound(true);
diff --git a/src/mame/acorn/atom.h b/src/mame/acorn/atom.h
index b001d4a35b0..61a0dafd995 100644
--- a/src/mame/acorn/atom.h
+++ b/src/mame/acorn/atom.h
@@ -37,9 +37,6 @@
 #define BASERAM_TAG     "baseram"
 
 
-#define X1  XTAL(3'579'545)    // MC6847 Clock
-#define X2  XTAL(4'000'000)           // CPU Clock - a divider reduces it to 1MHz
-
 class atom_state : public driver_device
 {
 public:
diff --git a/src/mame/bfm/bfm_bd1.h b/src/mame/bfm/bfm_bd1.h
index 5d21318134d..63e02df7c7d 100644
--- a/src/mame/bfm/bfm_bd1.h
+++ b/src/mame/bfm/bfm_bd1.h
@@ -37,10 +37,10 @@ class bfm_bd1_device : public device_t
 	virtual void device_post_load() override;
 
 private:
-	static const uint8_t AT_NORMAL  = 0x00;
-	static const uint8_t AT_FLASH   = 0x01;
-	static const uint8_t AT_BLANK   = 0x02;
-	static const uint8_t AT_FLASHED = 0x80;   // set when character should be blinked off
+	static constexpr uint8_t AT_NORMAL  = 0x00;
+	static constexpr uint8_t AT_FLASH   = 0x01;
+	static constexpr uint8_t AT_BLANK   = 0x02;
+	static constexpr uint8_t AT_FLASHED = 0x80;   // set when character should be blinked off
 
 	std::unique_ptr<output_finder<16> > m_outputs;
 	uint8_t m_port_val;
diff --git a/src/mame/bfm/bfm_bda.h b/src/mame/bfm/bfm_bda.h
index cea0da23c06..fc008cbdb61 100644
--- a/src/mame/bfm/bfm_bda.h
+++ b/src/mame/bfm/bfm_bda.h
@@ -34,10 +34,10 @@ class bfm_bda_device : public device_t
 	virtual void device_post_load() override;
 
 private:
-	static const uint8_t AT_NORMAL  = 0x00;
-	static const uint8_t AT_FLASH   = 0x01;
-	static const uint8_t AT_BLANK   = 0x02;
-	static const uint8_t AT_FLASHED = 0x80;   // set when character should be blinked off
+	static constexpr uint8_t AT_NORMAL  = 0x00;
+	static constexpr uint8_t AT_FLASH   = 0x01;
+	static constexpr uint8_t AT_BLANK   = 0x02;
+	static constexpr uint8_t AT_FLASHED = 0x80;   // set when character should be blinked off
 
 	std::unique_ptr<output_finder<16> > m_outputs;
 	std::unique_ptr<output_finder<1> > m_brightness;
diff --git a/src/mame/brother/lw840.cpp b/src/mame/brother/lw840.cpp
index abc574017e9..0434d6285ba 100644
--- a/src/mame/brother/lw840.cpp
+++ b/src/mame/brother/lw840.cpp
@@ -145,14 +145,14 @@ class lw840_state : public driver_device
 	// screen updates
 	uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
 
-	uint16_t port7_r()
+	uint8_t port7_r()
 	{
 		auto row = keyboard & 0x0f;
 		if(row <= 8)
 			return io_kbrow[row]->read();
 
 		// seems to be able to control power-on self test if not 0xff
-		return 0xffff;
+		return 0xff;
 	}
 	uint16_t keyboard_r()
 	{
diff --git a/src/mame/cybiko/cybiko.cpp b/src/mame/cybiko/cybiko.cpp
index a182e837d05..001f2f63673 100644
--- a/src/mame/cybiko/cybiko.cpp
+++ b/src/mame/cybiko/cybiko.cpp
@@ -118,12 +118,12 @@ void cybiko_state::cybikoxt_mem(address_map &map)
 	map(0xe00000, 0xefffff).r(FUNC(cybiko_state::cybikoxt_key_r));
 }
 
-void cybiko_state::serflash_w(uint16_t data)
+void cybiko_state::serflash_w(uint8_t data)
 {
-	m_flash1->cs_w ((data & 0x10) ? 0 : 1);
+	m_flash1->cs_w((data & 0x10) ? 0 : 1);
 }
 
-uint16_t cybiko_state::clock_r()
+uint8_t cybiko_state::clock_r()
 {
 	if (m_rtc->sda_r())
 	{
@@ -133,13 +133,13 @@ uint16_t cybiko_state::clock_r()
 	return 0x04;
 }
 
-void cybiko_state::clock_w(uint16_t data)
+void cybiko_state::clock_w(uint8_t data)
 {
 	m_rtc->scl_w((data & 0x02) ? 1 : 0);
 	m_rtc->sda_w((data & 0x01) ? 0 : 1);
 }
 
-uint16_t cybiko_state::xtclock_r()
+uint8_t cybiko_state::xtclock_r()
 {
 	if (m_rtc->sda_r())
 	{
@@ -149,13 +149,13 @@ uint16_t cybiko_state::xtclock_r()
 	return 0;
 }
 
-void cybiko_state::xtclock_w(uint16_t data)
+void cybiko_state::xtclock_w(uint8_t data)
 {
 	m_rtc->scl_w((data & 0x02) ? 1 : 0);
 	m_rtc->sda_w((data & 0x40) ? 0 : 1);
 }
 
-uint16_t cybiko_state::xtpower_r()
+uint8_t cybiko_state::xtpower_r()
 {
 	// bit 7 = on/off button
 	// bit 6 = battery charged if "1"
@@ -172,7 +172,7 @@ uint16_t cybiko_state::adc2_r()
 	return 0x00;
 }
 
-uint16_t cybiko_state::port0_r()
+uint8_t cybiko_state::port0_r()
 {
 	// bit 3 = on/off button
 	return 0x08;
diff --git a/src/mame/cybiko/cybiko.h b/src/mame/cybiko/cybiko.h
index d7f865b77cf..25cdd551d84 100644
--- a/src/mame/cybiko/cybiko.h
+++ b/src/mame/cybiko/cybiko.h
@@ -61,15 +61,15 @@ class cybiko_state : public driver_device
 	void cybikoxt(machine_config &config);
 
 private:
-	void serflash_w(uint16_t data);
-	uint16_t clock_r();
-	void clock_w(uint16_t data);
-	uint16_t xtclock_r();
-	void xtclock_w(uint16_t data);
-	uint16_t xtpower_r();
+	void serflash_w(uint8_t data);
+	uint8_t clock_r();
+	void clock_w(uint8_t data);
+	uint8_t xtclock_r();
+	void xtclock_w(uint8_t data);
+	uint8_t xtpower_r();
 	uint16_t adc1_r();
 	uint16_t adc2_r();
-	uint16_t port0_r();
+	uint8_t port0_r();
 
 	uint16_t cybiko_lcd_r(offs_t offset, uint16_t mem_mask = ~0);
 	void cybiko_lcd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
diff --git a/src/mame/fidelity/chesster.cpp b/src/mame/fidelity/chesster.cpp
index 4ace69306bb..43f5e36539e 100644
--- a/src/mame/fidelity/chesster.cpp
+++ b/src/mame/fidelity/chesster.cpp
@@ -54,12 +54,9 @@ class chesster_state : public driver_device
 		m_inputs(*this, "IN.0")
 	{ }
 
-	// machine configs
 	void chesster(machine_config &config);
 	void kishon(machine_config &config);
 
-	void init_chesster();
-
 protected:
 	virtual void machine_start() override;
 
@@ -75,7 +72,6 @@ class chesster_state : public driver_device
 	u8 m_speech_bank = 0;
 	u8 m_select = 0;
 
-	// address maps
 	void main_map(address_map &map);
 
 	// I/O handlers
@@ -83,14 +79,12 @@ class chesster_state : public driver_device
 	u8 input_r(offs_t offset);
 };
 
-void chesster_state::init_chesster()
+void chesster_state::machine_start()
 {
+	// set up ROM banks (kishon's is 4 times larger)
 	m_numbanks = memregion("rombank")->bytes() / 0x4000;
 	m_rombank->configure_entries(0, m_numbanks, memregion("rombank")->base(), 0x4000);
-}
 
-void chesster_state::machine_start()
-{
 	// register for savestates
 	save_item(NAME(m_speech_bank));
 	save_item(NAME(m_select));
@@ -220,7 +214,7 @@ ROM_START( chesster ) // model 6120, PCB label 510.1141C01
 	ROM_LOAD("ch_1.3.ic9", 0x8000, 0x8000, CRC(8b42d1ad) SHA1(2161fc5ab2476fe7ca4ffc226e3cb329b8a57a01) ) // 27256, CH 1.3 on sticker
 
 	ROM_REGION( 0x20000, "rombank", 0 )
-	ROM_LOAD("101-1091b02.ic10", 0x0000, 0x20000, CRC(fa370e88) SHA1(a937c8f1ec295cf9539d12466993974e40771493) ) // AMI, 27C010 or equivalent
+	ROM_LOAD("101-1091b02.ic10", 0x00000, 0x20000, CRC(fa370e88) SHA1(a937c8f1ec295cf9539d12466993974e40771493) ) // AMI, 27C010 or equivalent
 ROM_END
 
 ROM_START( chesstera ) // model 6120, PCB label 510.1141C01
@@ -228,7 +222,7 @@ ROM_START( chesstera ) // model 6120, PCB label 510.1141C01
 	ROM_LOAD("chesster.ic9", 0x8000, 0x8000, CRC(29f9a698) SHA1(4c83ca46fd5fc9c40302e9c7f16b4ae2c18b06e6) ) // M27C256B, sticker but no label
 
 	ROM_REGION( 0x20000, "rombank", 0 )
-	ROM_LOAD("101-1091a02.ic10", 0x0000, 0x20000, CRC(2b4d243c) SHA1(921e51978facb502b207b4f64a73b1e74127e826) ) // AMI, 27C010 or equivalent
+	ROM_LOAD("101-1091a02.ic10", 0x00000, 0x20000, CRC(2b4d243c) SHA1(921e51978facb502b207b4f64a73b1e74127e826) ) // AMI, 27C010 or equivalent
 ROM_END
 
 ROM_START( kishon ) // model 6120G or 6127(same), PCB label 510.1141C01
@@ -236,7 +230,7 @@ ROM_START( kishon ) // model 6120G or 6127(same), PCB label 510.1141C01
 	ROM_LOAD("gc_2.3.ic9", 0x8000, 0x8000, CRC(121c007f) SHA1(652e9ea47b6bb1632d10eb0fcd7f98cdba22fce7) ) // 27C256, GC 2.3 on sticker, also seen without label
 
 	ROM_REGION( 0x80000, "rombank", 0 )
-	ROM_LOAD("kishon_chesster_v2.6.ic10", 0x0000, 0x80000, CRC(50598869) SHA1(2087e0c2f40a2408fe217a6502c8c3a247bdd063) ) // Toshiba TC544000P-12, 1-14-91, aka 101-1094A01 on 6127
+	ROM_LOAD("kishon_chesster_v2.6.ic10", 0x00000, 0x80000, CRC(50598869) SHA1(2087e0c2f40a2408fe217a6502c8c3a247bdd063) ) // Toshiba TC544000P-12, 1-14-91, aka 101-1094A01 on 6127
 ROM_END
 
 ROM_START( kishona ) // possibly Mephisto brand?, PCB label 510.1141C01
@@ -244,7 +238,7 @@ ROM_START( kishona ) // possibly Mephisto brand?, PCB label 510.1141C01
 	ROM_LOAD("german_chesster_v2.2.ic9", 0x8000, 0x8000, CRC(43e0cfcd) SHA1(961c7335f562b19fa96324c429ab70e8ab4d7647) ) // 27C256, 15.1.91
 
 	ROM_REGION( 0x80000, "rombank", 0 )
-	ROM_LOAD("kishon_chesster_v2.6.ic10", 0x0000, 0x80000, CRC(50598869) SHA1(2087e0c2f40a2408fe217a6502c8c3a247bdd063) ) // Toshiba TC544000P-12
+	ROM_LOAD("kishon_chesster_v2.6.ic10", 0x00000, 0x80000, CRC(50598869) SHA1(2087e0c2f40a2408fe217a6502c8c3a247bdd063) ) // Toshiba TC544000P-12
 ROM_END
 
 } // anonymous namespace
@@ -255,8 +249,8 @@ ROM_END
     Drivers
 *******************************************************************************/
 
-//    YEAR  NAME       PARENT    COMPAT  MACHINE   INPUT     CLASS           INIT           COMPANY, FULLNAME, FLAGS
-SYST( 1990, chesster,  0,        0,      chesster, chesster, chesster_state, init_chesster, "Fidelity Electronics", "Chesster Challenger (v1.3)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-SYST( 1990, chesstera, chesster, 0,      chesster, chesster, chesster_state, init_chesster, "Fidelity Electronics", "Chesster Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-SYST( 1991, kishon,    chesster, 0,      kishon,   chesster, chesster_state, init_chesster, "Fidelity Electronics", "Kishon Chesster (v2.3)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
-SYST( 1991, kishona,   chesster, 0,      kishon,   chesster, chesster_state, init_chesster, "Fidelity Electronics", "Kishon Chesster (v2.2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+//    YEAR  NAME       PARENT    COMPAT  MACHINE   INPUT     CLASS           INIT        COMPANY, FULLNAME, FLAGS
+SYST( 1990, chesster,  0,        0,      chesster, chesster, chesster_state, empty_init, "Fidelity Electronics", "Chesster Challenger (v1.3)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+SYST( 1990, chesstera, chesster, 0,      chesster, chesster, chesster_state, empty_init, "Fidelity Electronics", "Chesster Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+SYST( 1991, kishon,    chesster, 0,      kishon,   chesster, chesster_state, empty_init, "Fidelity Electronics", "Kishon Chesster (v2.3)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
+SYST( 1991, kishona,   chesster, 0,      kishon,   chesster, chesster_state, empty_init, "Fidelity Electronics", "Kishon Chesster (v2.2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK )
diff --git a/src/mame/funworld/photoply.cpp b/src/mame/funworld/photoply.cpp
index 80c04eb28bd..7c480a83ce6 100644
--- a/src/mame/funworld/photoply.cpp
+++ b/src/mame/funworld/photoply.cpp
@@ -1,21 +1,21 @@
 // license:BSD-3-Clause
-// copyright-holders:Angelo Salese
-/*******************************************************************************************************
-
-Photo Play (c) 199? Funworld
-
-TODO (old notes, to be resorted with new PCI conversion):
-- BIOS CMOS doesn't save at all (needed for setting up the Hard Disk);
-- DISK BOOT FAILURE after EEPROM checking (many unknown IDE cs1 reads/writes);
-- Partition boot sector is missing from the CHD dump, protection?
-- Detects CPU type as "-S 16 MHz"? Sometimes it detects it as 486SX, unknown repro
-  (after fiddling with CMOS settings anyway)
-- VGA BIOS reports being a Cirrus Logic GD5436 / 5446, it is unknown what exactly this game uses.
-- PCI hookups (SiS496/SiS497 according to POST), and improve/device-ify SiS85C49x;
-- ISA bus cards are completely guessworked;
+// copyright-holders: Angelo Salese
+/**************************************************************************************************
+
+Photo Play (c) 1998? Funworld
+
+TODO:
+- Implement microtouch as RS232 option;
+- Reimplement Combo ISA card;
 - EEPROM timings are hacked (writes mostly fail otherwise);
-- Eventually needs AudioDrive ES688 / ES1688 / ES1788 & ES1868 devices and serial ports "for linking"
-  before actually booting;
+- AudioDrive ES688 / ES1688 / ES1788 & ES1868;
+- photoply99nl: "Druk op het snijpunt van beide lijnen" -> "Press the intersection of both lines"
+  on Touch Screen calibration screen, except there aren't any on screen, gd5446 bug?
+- 100 MHz gets detected as 66 by BIOS;
+- Flush non-default scores/settings in dumps (cfr. photoply2ksp hi-scores, photoply2k4 that starts
+up with 17 credits in)
+
+===================================================================================================
 
 INFO ABOUT SECURITY DONGLES:
 
@@ -57,26 +57,27 @@ USB Dongle
 
 #include "emu.h"
 
-#include "pcshare.h"
-
+#include "bus/isa/isa_cards.h"
+#include "bus/pci/pci_slot.h"
+#include "bus/rs232/hlemouse.h"
+#include "bus/rs232/null_modem.h"
+#include "bus/rs232/rs232.h"
+#include "bus/rs232/sun_kbd.h"
+#include "bus/rs232/terminal.h"
 #include "cpu/i386/i386.h"
-#include "machine/eepromser.h"
-#include "machine/lpci.h"
-#include "machine/pckeybrd.h"
-#include "machine/idectrl.h"
-#include "video/pc_vga_cirrus.h"
+#include "machine/pci.h"
+#include "machine/sis85c496.h"
+#include "machine/w83787f.h"
 
 namespace {
 
-class photoply_state : public pcat_base_state
+class photoply_state : public driver_device
 {
 public:
-	photoply_state(const machine_config &mconfig, device_type type, const char *tag) :
-		pcat_base_state(mconfig, type, tag),
-		m_eeprom(*this, "eeprom"),
-		m_main_bios(*this, "bios"),
-		m_video_bios(*this, "video_bios"),
-		m_ex_bios(*this, "ex_bios")
+	photoply_state(const machine_config &mconfig, device_type type, const char *tag)
+		: driver_device(mconfig, type, tag)
+		, m_maincpu(*this, "maincpu")
+//		, m_eeprom(*this, "eeprom")
 	{
 	}
 
@@ -84,95 +85,20 @@ class photoply_state : public pcat_base_state
 	void photoply_dx4_100(machine_config &config);
 
 private:
-	required_device<eeprom_serial_93cxx_device> m_eeprom;
-
-	required_region_ptr<uint8_t> m_main_bios;
-	required_region_ptr<uint8_t> m_video_bios;
-	required_region_ptr<uint8_t> m_ex_bios;
-
-	std::unique_ptr<uint8_t []> m_shadow_ram;
-
-	uint8_t bios_r(offs_t offset);
-	void bios_w(offs_t offset, uint8_t data);
-	void eeprom_w(uint8_t data);
-
-	uint16_t m_pci_shadow_reg = 0;
+	required_device<i486dx4_device> m_maincpu;
+//	required_device<eeprom_serial_93cxx_device> m_eeprom;
 
-	void photoply_io(address_map &map);
-	void photoply_map(address_map &map);
+//	uint8_t bios_r(offs_t offset);
+//	void bios_w(offs_t offset, uint8_t data);
+//	void eeprom_w(uint8_t data);
 
-	virtual void machine_start() override;
-	virtual void machine_reset() override;
+	static void winbond_superio_config(device_t *device);
 
-	uint32_t sis_pcm_r(int function, int reg, uint32_t mem_mask);
-	void sis_pcm_w(int function, int reg, uint32_t data, uint32_t mem_mask);
+	void main_io(address_map &map);
+	void main_map(address_map &map);
 };
 
-// regs 0x00-0x3f both devices below
-// regs 0x40-0x7f SiS85C496 PCI & CPU Memory Controller (PCM)
-// regs 0x80-0xff SiS85C497 AT Bus Controller & Megacell (ATM)
-uint32_t photoply_state::sis_pcm_r(int function, int reg, uint32_t mem_mask)
-{
-	uint32_t r = 0;
-
-	//printf("PCM %02x %08x\n",reg,mem_mask);
-	if(reg == 0)
-	{
-		// Device ID / Vendor ID
-		return 0x04961039;
-	}
-
-	if(reg == 8)
-	{
-		// Device Class Code / Device Revision Identification
-		return 0x06000002;
-	}
-
-	// Device Header Type
-	if(reg == 0xc)
-		return 0;
-
-	if(reg == 0x44)
-	{
-
-		if(ACCESSING_BITS_8_15) // reg 0x45
-			r |= (m_pci_shadow_reg & 0xff00);
-		if(ACCESSING_BITS_0_7) // reg 0x44
-			r |= (m_pci_shadow_reg & 0x00ff);
-	}
-	return r;
-}
-
-void photoply_state::sis_pcm_w(int function, int reg, uint32_t data, uint32_t mem_mask)
-{
-	if(reg == 0x44)
-	{
-
-		/*
-		 * reg 0x45
-		 * shadow RAM control
-		 * xxxx ---- <reserved>
-		 * ---- x--- Internal Cache Cacheable Area Control
-		 * ---- -x-- PCI,ISA Master Access Shadow RAM Area Enable
-		 * ---- --x- Shadow RAM Read Control (1=Enable)
-		 * ---- ---x Shadow RAM Write Control (0=Enable)
-		 */
-		if(ACCESSING_BITS_8_15)
-			m_pci_shadow_reg = (data & 0xff00) | (m_pci_shadow_reg & 0x00ff);
-
-		/*
-		 * shadow RAM enable:
-		 * bit 7: 0xf8000-0xfffff shadow RAM enable
-		 * ...
-		 * bit 0: 0xc0000-0xc7fff shadow RAM enable
-		 */
-		if(ACCESSING_BITS_0_7) // reg 0x44
-			m_pci_shadow_reg = (data & 0x00ff) | (m_pci_shadow_reg & 0xff00);
-
-		//printf("%04x\n",m_pci_shadow_reg);
-	}
-}
-
+#if 0
 uint8_t photoply_state::bios_r(offs_t offset)
 {
 	uint8_t bit_mask = (offset & 0x38000) >> 15;
@@ -208,19 +134,6 @@ uint8_t photoply_state::bios_r(offs_t offset)
 	return m_main_bios[offset & 0x1ffff];
 }
 
-void photoply_state::bios_w(offs_t offset, uint8_t data)
-{
-//  return m_bios[offset];
-
-	if((m_pci_shadow_reg & 0x100) == 0)
-	{
-		uint8_t bit_mask = (offset & 0x38000) >> 15;
-
-		if(m_pci_shadow_reg & (1 << bit_mask))
-			m_shadow_ram[offset] = data;
-	}
-}
-
 void photoply_state::eeprom_w(uint8_t data)
 {
 	//logerror("Writing %X to EEPROM output port\n", data);
@@ -231,126 +144,116 @@ void photoply_state::eeprom_w(uint8_t data)
 	// Bits 2-3 also seem to be used to bank something else.
 	// Bits 4-7 are set for some writes, but may do nothing?
 }
+#endif
 
-void photoply_state::photoply_map(address_map &map)
+void photoply_state::main_map(address_map &map)
 {
-	map(0x00000000, 0x0009ffff).ram();
-	map(0x000a0000, 0x000bffff).rw("vga", FUNC(cirrus_gd5446_vga_device::mem_r), FUNC(cirrus_gd5446_vga_device::mem_w));
-//  map(0x000c0000, 0x000c7fff).rom().region("video_bios", 0);
-//  map(0x000c8000, 0x000cffff).rom().region("ex_bios", 0);
-	map(0x000c0000, 0x000fffff).rw(FUNC(photoply_state::bios_r), FUNC(photoply_state::bios_w));
-	map(0x00100000, 0x07ffffff).ram(); // 64MB RAM, guess!
-	map(0xfffe0000, 0xffffffff).lr8([this] (offs_t offset) { return m_main_bios[offset]; }, "bios_upper_r");
+	map.unmap_value_high();
+//	map(0x000c0000, 0x000fffff).rw(FUNC(photoply_state::bios_r), FUNC(photoply_state::bios_w));
 }
 
-void photoply_state::photoply_io(address_map &map)
+void photoply_state::main_io(address_map &map)
 {
-	pcat32_io_common(map);
-	map(0x00e8, 0x00eb).noprw();
-
-	map(0x0170, 0x0177).rw("ide2", FUNC(ide_controller_32_device::cs0_r), FUNC(ide_controller_32_device::cs0_w));
-	map(0x01f0, 0x01f7).rw("ide", FUNC(ide_controller_32_device::cs0_r), FUNC(ide_controller_32_device::cs0_w));
-	map(0x0202, 0x0202).w(FUNC(photoply_state::eeprom_w));
-//  map(0x0278, 0x027f).ram(); //parallel port 2
-	map(0x0370, 0x0377).rw("ide2", FUNC(ide_controller_32_device::cs1_r), FUNC(ide_controller_32_device::cs1_w));
-//  map(0x0378, 0x037f).ram(); //parallel port
-	map(0x03b0, 0x03df).m("vga", FUNC(cirrus_gd5446_vga_device::io_map));
-
-	map(0x03f0, 0x03f7).rw("ide", FUNC(ide_controller_32_device::cs1_r), FUNC(ide_controller_32_device::cs1_w));
-
-	map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_legacy_device::read), FUNC(pci_bus_legacy_device::write));
-
+	map.unmap_value_high();
+//	map(0x0202, 0x0202).w(FUNC(photoply_state::eeprom_w));
 }
 
 static INPUT_PORTS_START( photoply )
 INPUT_PORTS_END
 
-void photoply_state::machine_start()
+static void isa_com(device_slot_interface &device)
 {
-	m_shadow_ram = std::make_unique<uint8_t []>(0x40000);
-	save_pointer(NAME(m_shadow_ram), 0x40000);
+	device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE);
+	device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE);
+	device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE);
+	device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE);
+	device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE);
+	device.option_add("terminal", SERIAL_TERMINAL);
+	device.option_add("null_modem", NULL_MODEM);
+	device.option_add("sun_kbd", SUN_KBD_ADAPTOR);
 }
 
-void photoply_state::machine_reset()
+static void isa_internal_devices(device_slot_interface &device)
 {
-	m_pci_shadow_reg = 0;
+	device.option_add("w83787f", W83787F);
 }
 
-static const gfx_layout CGA_charlayout =
+void photoply_state::winbond_superio_config(device_t *device)
 {
-	8,8,
-	256,
-	1,
-	{ 0 },
-	{ 0,1,2,3,4,5,6,7 },
-	{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8 },
-	8*8
-};
-
-static GFXDECODE_START( gfx_photoply )
-	GFXDECODE_ENTRY( "video_bios", 0x6000+0xa5*8+7, CGA_charlayout, 0, 256 )
-	// There's also a 8x16 entry (just after the 8x8)
-GFXDECODE_END
+	w83787f_device &fdc = *downcast<w83787f_device *>(device);
+//  fdc.set_sysopt_pin(1);
+//	fdc.gp20_reset().set_inputline(":maincpu", INPUT_LINE_RESET);
+//	fdc.gp25_gatea20().set_inputline(":maincpu", INPUT_LINE_A20);
+	fdc.irq1().set(":pci:05.0", FUNC(sis85c496_host_device::pc_irq1_w));
+	fdc.irq8().set(":pci:05.0", FUNC(sis85c496_host_device::pc_irq8n_w));
+	fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd));
+	fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr));
+	fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts));
+	fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd));
+	fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr));
+	fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts));
+}
 
 void photoply_state::photoply(machine_config &config)
 {
-	// Basic machine hardware
-	I486DX4(config, m_maincpu, 75000000); // I486DX4, 75 or 100 Mhz
-	m_maincpu->set_addrmap(AS_PROGRAM, &photoply_state::photoply_map);
-	m_maincpu->set_addrmap(AS_IO, &photoply_state::photoply_io);
-	m_maincpu->set_irq_acknowledge_callback("pic8259_1", FUNC(pic8259_device::inta_cb));
-
-	pcat_common(config);
-
-	GFXDECODE(config, "gfxdecode", "vga", gfx_photoply);
-
-	ide_controller_32_device &ide(IDE_CONTROLLER_32(config, "ide").options(ata_devices, "hdd", nullptr, true));
-	ide.irq_handler().set("pic8259_2", FUNC(pic8259_device::ir6_w));
-
-	ide_controller_32_device &ide2(IDE_CONTROLLER_32(config, "ide2").options(ata_devices, nullptr, nullptr, true));
-	ide2.irq_handler().set("pic8259_2", FUNC(pic8259_device::ir7_w));
-
-	pci_bus_legacy_device &pcibus(PCI_BUS_LEGACY(config, "pcibus", 0, 0));
-	pcibus.set_device(5, FUNC(photoply_state::sis_pcm_r), FUNC(photoply_state::sis_pcm_w));
-
-	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
-	screen.set_raw(XTAL(25'174'800),900,0,640,526,0,480);
-	screen.set_screen_update("vga", FUNC(cirrus_gd5446_vga_device::screen_update));
-
-	cirrus_gd5446_vga_device &vga(CIRRUS_GD5446_VGA(config, "vga", 0));
-	vga.set_screen("screen");
-	vga.set_vram_size(0x200000);
-
-
-	EEPROM_93C46_16BIT(config, "eeprom")
-		.write_time(attotime::from_usec(1))
-		.erase_all_time(attotime::from_usec(10));
+	I486DX4(config, m_maincpu, 75'000'000); // I486DX4, 75 or 100 Mhz
+	m_maincpu->set_addrmap(AS_PROGRAM, &photoply_state::main_map);
+	m_maincpu->set_addrmap(AS_IO, &photoply_state::main_io);
+	m_maincpu->set_irq_acknowledge_callback("pci:05.0:pic8259_master", FUNC(pic8259_device::inta_cb));
+
+	PCI_ROOT(config, "pci", 0);
+	SIS85C496_HOST(config, "pci:05.0", 0, "maincpu", 32*1024*1024);
+
+	ISA16_SLOT(config, "superio", 0, "pci:05.0:isabus", isa_internal_devices, "w83787f", true).set_option_machine_config("w83787f", winbond_superio_config);
+	ISA16_SLOT(config, "isa1", 0, "pci:05.0:isabus",  pc_isa16_cards, nullptr, false);
+	ISA16_SLOT(config, "isa2", 0, "pci:05.0:isabus",  pc_isa16_cards, nullptr, false);
+	ISA16_SLOT(config, "isa3", 0, "pci:05.0:isabus",  pc_isa16_cards, nullptr, false);
+
+	// TODO: convert to Microtouch
+	rs232_port_device &serport0(RS232_PORT(config, "serport0", isa_com, "logitech_mouse"));
+	serport0.rxd_handler().set("superio:w83787f", FUNC(w83787f_device::rxd1_w));
+	serport0.dcd_handler().set("superio:w83787f", FUNC(w83787f_device::ndcd1_w));
+	serport0.dsr_handler().set("superio:w83787f", FUNC(w83787f_device::ndsr1_w));
+	serport0.ri_handler().set("superio:w83787f", FUNC(w83787f_device::nri1_w));
+	serport0.cts_handler().set("superio:w83787f", FUNC(w83787f_device::ncts1_w));
+
+	rs232_port_device &serport1(RS232_PORT(config, "serport1", isa_com, nullptr));
+	serport1.rxd_handler().set("superio:w83787f", FUNC(w83787f_device::rxd2_w));
+	serport1.dcd_handler().set("superio:w83787f", FUNC(w83787f_device::ndcd2_w));
+	serport1.dsr_handler().set("superio:w83787f", FUNC(w83787f_device::ndsr2_w));
+	serport1.ri_handler().set("superio:w83787f", FUNC(w83787f_device::nri2_w));
+	serport1.cts_handler().set("superio:w83787f", FUNC(w83787f_device::ncts2_w));
+
+	PCI_SLOT(config, "pci:1", pci_cards, 10, 0, 1, 2, 3, "gd5446");
+	PCI_SLOT(config, "pci:2", pci_cards, 11, 1, 2, 3, 0, nullptr);
+	PCI_SLOT(config, "pci:3", pci_cards, 12, 2, 3, 0, 1, nullptr);
+
+//	EEPROM_93C46_16BIT(config, "eeprom")
+//		.write_time(attotime::from_usec(1))
+//		.erase_all_time(attotime::from_usec(10));
 }
 
 // We asume that every Photo Play from 1999 onwards use a DX4 100MHz instead of a 75MHz one (both were compatible, the latter were recommended)
 void photoply_state::photoply_dx4_100(machine_config &config)
 {
 	photoply(config);
-	m_maincpu->set_clock(100000000); // 100MHz
+	m_maincpu->set_clock(100'000'000);
 }
 
 ROM_START(photoply98sp)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010, Funworld sticker: Sept 1998
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip, Funworld sticker: Sept 1998
 	ROM_LOAD("enhanced_bios_centos.bin", 0x0000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
 	ROM_REGION(0x10000, "hdd_fw", 0) // Hard disk firmware
 	ROM_LOAD("m2_at29c512.bin", 0x0000, 0x10000, CRC(22a1c9ce) SHA1(6b695ee56867176d1702273e68b5584db1b94e02) ) // Seagate ST31722A
 
 	// Seagate ST31722A
 	// 3303 CYL 1704MB 16 HEADS 63 SECTORS
 	// Funworld label: Feb 1998
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay98sp", 0, BAD_DUMP SHA1(c0d7964edaff6b99184ca64e76c41eaa07abe019) ) // From an operated HDD. A clean one must be recreated from the CDs
 ROM_END
 
@@ -361,7 +264,7 @@ ROM_END
    Winbond W83787IF (near Xtal 24.00 MHz)
    3 x ISA + 2 x PCI */
 ROM_START(photoply99sp)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT29C010A
 
 	/* Multifunction board with a ESS AudioDrive chip ISA Sound + I/O (PP2000/CI-8000)
@@ -378,10 +281,8 @@ ROM_START(photoply99sp)
 	ROM_LOAD("enhanced_bios_1.06.u13", 0x0000, 0x8000, CRC(d05e9d20) SHA1(854501b7b3bf988b10516109d058f7ca2aa07d3e) ) // Centos Combo I/O ROM BIOS for CI-8000/PP2000 v1.06, W27E257
 
 	/* Cirrus Logic PCI CL-GD5446-HC-A
-	   512MB RAM (2 x M5416258B-30J)
+	   512MB RAM (2 x M5416258B-30J) (??? -AS)
 	   Xtal 14.31818 MHz */
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
 
 	/* The Photo Play 1999 parallel port dongle contains, under expoxy resin:
 	    -Atmel AT89C2051 MCU (2KBytes internal ROM)
@@ -421,27 +322,24 @@ ROM_START(photoply99sp)
 	// Quantum Fireball EX3.2A
 	// C/H/S: 3.2 - 6256/16/63
 	// Funworld label: 09.02.1999
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay99sp", 0, BAD_DUMP SHA1(887e5b8c931d6122a1c3a8eda5cb919eb162eced) ) // From an operated HDD. A clean one must be recreated from the CDs
 ROM_END
 
 // BIOS not provided on this set
 ROM_START(photoply99nl)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, BAD_DUMP CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT29C010A
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 )
 	ROM_LOAD("enhanced_bios_1.06.u13", 0x0000, 0x8000, CRC(d05e9d20) SHA1(854501b7b3bf988b10516109d058f7ca2aa07d3e) ) // Centos Combo I/O ROM BIOS for CI-8000/PP2000 v1.06, W27E257
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay99nl", 0, BAD_DUMP SHA1(e3ff2a64f51e0ba07d08cd49cd56cdc866401b4f) ) // Recreated from the CDs using a VM
 ROM_END
 
 ROM_START(photoply2k)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787_alt.bin", 0x000000, 0x20000, CRC(e96d1bbc) SHA1(64d0726c4e9ecee8fddf4cc39d92aecaa8184d5c) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS (same string as 'photoply99sp' and 'photoply99sp' BIOSes, but different hash)
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
@@ -450,23 +348,17 @@ ROM_START(photoply2k)
 //  ROM_RELOAD(                   0x008000, 0x4000 )
 //  ROM_RELOAD(                   0x00c000, 0x4000 )
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.25.u2", 0x000000, 0x8000, CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) ) // Cirrus Logic/Quadtel CL-GD5436/46 PCI VGA BIOS v1.25
-
-	DISK_REGION( "ide:0:hdd" )
-	DISK_IMAGE( "pp201", 0, SHA1(23e1940d485d19401e7d0ad912ddad2cf2ea10b4) )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
+	DISK_IMAGE( "pp201", 0, BAD_DUMP SHA1(23e1940d485d19401e7d0ad912ddad2cf2ea10b4) )
 ROM_END
 
 ROM_START(photoply2ksp)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
 	ROM_LOAD("enhanced_bios_centos.bin", 0x0000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
 	/* The Photo Play 2000 parallel port dongle contains, under resin:
 	   Unknown MCU labeled "MARX(C)95,97 CBN/V/S" (UNDUMPED)
 	   74HC00 */
@@ -475,44 +367,38 @@ ROM_START(photoply2ksp)
 
 	// Western Digital PhD1000-00H
 	// CHS: 2100,16,63
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay2ksp", 0, BAD_DUMP SHA1(2b4b837d85bf8a41d832533afb9363fdb16f7a30) ) // From an operated HDD. A clean one must be recreated from the CDs
 ROM_END
 
 // BIOS not provided, might be different
 ROM_START(photoply2knl)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, BAD_DUMP CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
 	ROM_LOAD("enhanced_bios_centos.bin", 0x0000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
 	/* The Photo Play 2000 parallel port dongle contains, under resin:
 	   Unknown MCU labeled "MARX(C)95,97 CBN/V/S" (UNDUMPED)
 	   74HC00 */
 	ROM_REGION(0x800, "dongle", 0)
 	ROM_LOAD("marx_cbn-v-s.bin", 0x000, 0x800, NO_DUMP ) // Size unknown
 
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay2knl", 0, BAD_DUMP SHA1(75aa190913e798d04db88325006c61965f5034ef) ) // Recreated from the CDs using a VM
 ROM_END
 
 // BIOS not provided, might be different
 ROM_START(photoply2k1it)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, BAD_DUMP CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
 	ROM_LOAD("enhanced_bios_centos.bin", 0x000000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
-	DISK_REGION( "ide:0:hdd" )
-	DISK_IMAGE( "photoplay2k1it", 0, BAD_DUMP SHA1(274ea0ebc051d0f4846bc58a039d342241b4cc28) ) // Manually rebuilded by adding the resources for the folder C:\QP_MSTR from the 2001_NL version
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
+	DISK_IMAGE( "photoplay2k1it", 0, BAD_DUMP SHA1(274ea0ebc051d0f4846bc58a039d342241b4cc28) ) // Manually rebuilt by adding the resources for the folder C:\QP_MSTR from the 2001_NL version
 
 	// Recovery discs for Photo Play 2001
 
@@ -548,16 +434,13 @@ ROM_END
 
 // BIOS not provided, might be different
 ROM_START(photoply2k1nl)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, BAD_DUMP CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
 	ROM_LOAD("enhanced_bios_centos.bin", 0x0000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay2k1nl", 0, BAD_DUMP SHA1(87c9417119e9566f65db0f1b0f2182db7712c634) ) // Recreated from the CDs using a VM
 
 	// Recovery discs for Photo Play 2001
@@ -594,37 +477,31 @@ ROM_END
 
 // BIOS not provided, might be different
 ROM_START(photoply2k1mtnl)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, BAD_DUMP CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
 	ROM_LOAD("enhanced_bios_centos.bin", 0x0000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay2k1mtnl", 0, BAD_DUMP SHA1(cfa25ce036be9c2379a104a3b50d2aefd851ceeb) ) // Recreated from the CDs using a VM
 ROM_END
 
 // BIOS not provided, might be different
 ROM_START(photoply2k2be)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787.bin", 0x000000, 0x20000, BAD_DUMP CRC(af7ff1d4) SHA1(72eeecf798a03817ce7ba4d65cd4128ed3ef7e68) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS, AT27C010
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip
 	ROM_LOAD("enhanced_bios_centos.bin", 0x0000, 0x8000, CRC(ee8ad003) SHA1(4814385117599a98da02155785d1e3fce4e485bd) ) // Centos CI-8000/PP2000 ROM BIOS Version 1.06, 27C256B
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x0000, 0x8000, CRC(61f8cac7) SHA1(6e54aadfe10dfa5c7e417a054e9a64499a99083c) ) // Cirrus Logic/Quadtel CL-GD5446 PCI VGA BIOS v1.31 , AT27C256R
-
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	DISK_IMAGE( "photoplay2k2be", 0, BAD_DUMP SHA1(29719b5db60f4cc3787a3a9f6a5937226e282d46) ) // Recreated from the CDs using a VM
 ROM_END
 
 // BIOS not provided, might be different
 ROM_START(photoply2k4)
-	ROM_REGION(0x20000, "bios", 0) // Motherboard BIOS
+	ROM_REGION(0x20000, "pci:05.0", 0) // Motherboard BIOS
 	ROM_LOAD("funworld_award_486e_w83787_alt.bin", 0x000000, 0x20000, BAD_DUMP CRC(e96d1bbc) SHA1(64d0726c4e9ecee8fddf4cc39d92aecaa8184d5c) ) // 486E 96/7/19 W83787 PLUG & PLAY BIOS (same string as 'photoply99sp' and 'photoply99sp' BIOSes, but different hash)
 
 	ROM_REGION(0x8000, "ex_bios", ROMREGION_ERASE00 ) // Multifunction board with a ESS AudioDrive chip, M27128A
@@ -633,10 +510,7 @@ ROM_START(photoply2k4)
 //  ROM_RELOAD(                   0x008000, 0x4000 )
 //  ROM_RELOAD(                   0x00c000, 0x4000 )
 
-	ROM_REGION(0x8000, "video_bios", 0 )
-	ROM_LOAD("cl-gd5446_pci_vga_bios_version_1.31.u2", 0x000000, 0x8000, BAD_DUMP CRC(7a859659) SHA1(ff667218261969c48082ec12aa91088a01b0cb2a) ) // Cirrus Logic/Quadtel CL-GD5436/46 PCI VGA BIOS v1.25
-
-	DISK_REGION( "ide:0:hdd" )
+	DISK_REGION( "pci:05.0:ide1:0:hdd" )
 	// CYLS:1023,HEADS:64,SECS:63,BPS:512.
 	DISK_IMAGE( "pp2004", 0, SHA1(a3f8861cf91cf7e7446ec931f812e774ada20802) )
 ROM_END
@@ -644,15 +518,14 @@ ROM_END
 } // anonymous namespace
 
 
-// QA status from testing with pcipc (shutms11 too new for this)
 GAME( 1998, photoply98sp,    0,             photoply,         photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 1998 (Spain)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // "Non system disk or I/O error"
 GAME( 1999, photoply99sp,    0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 1999 (Spain)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // "CON device not opened. System halted" before PTS-DOS
-GAME( 1999, photoply99nl,    photoply99sp,  photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 1999 (Netherlands)",         MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Boots to funworld logo, enter into an EULA screen that needs trackball inputs to accept
+GAME( 1999, photoply99nl,    photoply99sp,  photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 1999 (Netherlands)",         MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Boots to funworld logo, goes to touchscreen calibration menu
 GAME( 2000, photoply2k,      0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (v2.01)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Fails PTS-DOS bootstrap around PC=7dc5, likely bad dump
-GAME( 2000, photoply2ksp,    photoply2k,    photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (Spain)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Fails PTS-DOS bootstrap with various memory management errors (in German), likely bad dump
-GAME( 2000, photoply2knl,    photoply2k,    photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (Netherlands)",         MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Punts in PTS-DOS after failing ES1868 detection, keyboard is unresponsive
-GAME( 2001, photoply2k1it,   0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2001 (Italy)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Boots to funworld logo, draws a "TouchScreen Error" with countdown that will hard reset the machine
+GAME( 2000, photoply2ksp,    photoply2k,    photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (Spain)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Attract mode
+GAME( 2000, photoply2knl,    photoply2k,    photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2000 (Netherlands)",         MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Punts in PTS-DOS after failing ES1868/microtouch detection, has diag inside for latter
+GAME( 2001, photoply2k1it,   0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2001 (Italy)",               MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Attract mode
 GAME( 2001, photoply2k1nl,   photoply2k1it, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2001 (Netherlands)",         MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // "Non system disk or I/O error"
-GAME( 2001, photoply2k1mtnl, photoply2k1it, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play Masters 2001 (Netherlands)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Fails LOGO display at boot (bad dump?), fails touchscreen and ES1868 detection, draws a "TouchScreen Error" with countdown that will hard reset the machine
-GAME( 2002, photoply2k2be,   0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2002 (Belgium)",             MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Boots to funworld logo, draws a "TouchScreen Error" with countdown that will hard reset the machine
-GAME( 2004, photoply2k4,     0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2004",                       MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Boots to funworld logo, draws a "TouchScreen Error" with countdown that will hard reset the machine
+GAME( 2001, photoply2k1mtnl, photoply2k1it, photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play Masters 2001 (Netherlands)", MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Fails touchscreen and ES1868 detection, executes few seconds of attract mode then throws a red screen with "HDONGLE not found"
+GAME( 2002, photoply2k2be,   0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2002 (Belgium)",             MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Shows some sort of rebus indicating correct operation of touchscreen, hangs there
+GAME( 2004, photoply2k4,     0,             photoply_dx4_100, photoply, photoply_state, empty_init, ROT0, "Funworld", "Photo Play 2004",                       MACHINE_NOT_WORKING|MACHINE_NO_SOUND|MACHINE_UNEMULATED_PROTECTION ) // Attract mode, "I.G.O. Edition 4" with Nederlands/English options
diff --git a/src/mame/layout/novag_scorpio68k.lay b/src/mame/layout/novag_scorpio68k.lay
index 3daec4d3ba4..c2a90565ecf 100644
--- a/src/mame/layout/novag_scorpio68k.lay
+++ b/src/mame/layout/novag_scorpio68k.lay
@@ -374,7 +374,7 @@ authors:hap
 	<element name="text_r8a"><text string="Go"><color red="0.3" green="0.7" blue="0.7" /></text></element>
 	<element name="text_r8b"><text string=" "></text></element>
 
-	<element name="text_n1b"><text string="Gambit Book" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
+	<element name="text_n1b"><text string=" " align="1"></text></element>
 	<element name="text_n2b"><text string="Infinite" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_n3b"><text string="Info" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_n4b"><text string="Review" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
@@ -383,13 +383,15 @@ authors:hap
 	<element name="text_n7b"><text string=" " align="1"></text></element>
 	<element name="text_n8b"><text string=" " align="1"></text></element>
 
+	<element name="text_m1c"><text string="Gambit" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
+	<element name="text_m1d"><text string="Book" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_m4c"><text string="Best Move/"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_m4d"><text string="Random"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_m5c"><text string="Restore" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_m5d"><text string="Game" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_m6c"><text string="Tournament" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_m6d"><text string="Book" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
-	<element name="text_r2c"><text string="Pro-op Book" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
+	<element name="text_r2c"><text string="Pro-op Book/" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 	<element name="text_r2d"><text string="Both Books" align="1"><color red="0.51" green="0.5" blue="0.49" /></text></element>
 
 	<element name="text_p1"><image file="chess/wk.svg"></image></element>
@@ -431,6 +433,8 @@ authors:hap
 
 		<element ref="text_r2c"><bounds x="23.2" y="21.757" width="10" height="1.2" /></element>
 		<element ref="text_r2d"><bounds x="23.2" y="22.757" width="10" height="1.2" /></element>
+		<element ref="text_m1c"><bounds x="17" y="13.7" width="10" height="1.2" /></element>
+		<element ref="text_m1d"><bounds x="17" y="14.7" width="10" height="1.2" /></element>
 		<element ref="text_m4c"><bounds xc="18" y="31.771" width="10" height="1.2" /></element>
 		<element ref="text_m4d"><bounds xc="18" y="32.771" width="10" height="1.2" /></element>
 		<element ref="text_m5c"><bounds x="17" y="45.929" width="10" height="1.2" /></element>
diff --git a/src/mame/layout/novag_sdiamond.lay b/src/mame/layout/novag_sdiamond.lay
index f86cc449ba6..f0db10b620f 100644
--- a/src/mame/layout/novag_sdiamond.lay
+++ b/src/mame/layout/novag_sdiamond.lay
@@ -374,7 +374,7 @@ authors:hap
 	<element name="text_r8a"><text string="Go"><color red="0.01" green="0.01" blue="0.01" /></text></element>
 	<element name="text_r8b"><text string=" "></text></element>
 
-	<element name="text_l8c"><text string="Next Best"><color red="0.01" green="0.01" blue="0.01" /></text></element>
+	<element name="text_l8c"><text string="Next Best/"><color red="0.01" green="0.01" blue="0.01" /></text></element>
 	<element name="text_l8d"><text string="Take Back"><color red="0.01" green="0.01" blue="0.01" /></text></element>
 
 	<element name="text_p1"><image file="chess/wp.svg"></image></element>
diff --git a/src/mame/mame.lst b/src/mame/mame.lst
index eb132e5b918..02a80e0773a 100644
--- a/src/mame/mame.lst
+++ b/src/mame/mame.lst
@@ -28707,6 +28707,7 @@ cptshark                        // (c) 2006  Astro Corp.
 dinodino                        // (c) 2005  Astro Corp.
 gostopac                        // (c) 2004  Astro Corp.
 hacher                          // (c) 2005  bootleg (Gametron)
+hapfarm                         // (c) 2008  Astro Corp.
 luckycoin                       // (c) 2002  Astro Corp.
 magibomb                        // (c) 2001? Astro Corp.
 magibomba                       // (c) 2002  Astro Corp.
@@ -28732,6 +28733,7 @@ speedmstb                       // (c) 2004  D2 Enterprises
 westvent                        // (c) 2007? Astro Corp.
 winbingo                        // (c) 2006  Astro Corp.
 winbingoa                       // (c) 2006  Astro Corp.
+wwitch                          // (c) 2005  Astro Corp.
 zoo                             // (c) 2004  Astro Corp.
 
 @source:misc/astropc.cpp
@@ -28927,8 +28929,13 @@ ssipkr40                        // (c) 1990 SSI
 cardline                        // (c) 199? Veltmeijer
 
 @source:misc/carrera.cpp
+alantin                         // bootleg (Robert / Avraam)
 bsebman                         // (c) 19?? BS Electronics
+bsebmanbl                       // bootleg (Ballas / Avraam)
+bsebmanbl2                      // bootleg (J.T.)
 carrera                         // (c) 19?? BS Electronics
+drkseal                         // bootleg (Vegas)
+ncarrera                        // bootleg (J.T.)
 
 @source:misc/castle.cpp
 castfpt                         // Fortune Pot
@@ -32067,6 +32074,9 @@ wyvernwg                        // (c) 2001 Semicom / Game Vision
 wyvernwga                       // (c) 2001 Semicom / Game Vision
 yorijori                        // (c)
 
+@source:misc/vampire.cpp
+vampire
+
 @source:misc/vcombat.cpp
 shadfgtr                        // (c) 1993 DUTECH Inc.
 vcombat                         // (c) 1993 VR8 Inc.
@@ -41987,6 +41997,10 @@ pv9234                          //
 @source:skeleton/pwp14.cpp
 pwp14                           // Smith Corona PWP System 14
 
+@source:skeleton/qmquasar.cpp
+qmquasar                        //
+technox                         //
+
 @source:skeleton/qmsirius.cpp
 qmrave                          //
 qmsirius                        //
@@ -45684,6 +45698,9 @@ v550                            //
 @source:visual/v1050.cpp
 v1050                           //
 
+@source:visual/xds.cpp
+xds19p                          // (c) 1990 Visual Technology
+
 @source:votrax/votrhv.cpp
 hc110                           // 1978 Votrax/Phonic Mirror HandiVoice HC-110
 hc120                           // 1978 Votrax/Phonic Mirror HandiVoice HC-120
diff --git a/src/mame/metro/metro.cpp b/src/mame/metro/metro.cpp
index 7a5e592d9af..61c101b24aa 100644
--- a/src/mame/metro/metro.cpp
+++ b/src/mame/metro/metro.cpp
@@ -1065,7 +1065,7 @@ void metro_state::puzzlet_map(address_map &map)
 }
 
 
-void metro_state::puzzlet_portb_w(u16 data)
+void metro_state::puzzlet_portb_w(u8 data)
 {
 //  popmessage("PORTB %02x", data);
 }
diff --git a/src/mame/metro/metro.h b/src/mame/metro/metro.h
index d50d094647a..67a51f3a694 100644
--- a/src/mame/metro/metro.h
+++ b/src/mame/metro/metro.h
@@ -116,7 +116,7 @@ class metro_state : public driver_device
 	u16 gakusai_input_r();
 	void blzntrnd_sh_bankswitch_w(u8 data);
 	void puzzlet_irq_enable_w(u8 data);
-	void puzzlet_portb_w(u16 data);
+	void puzzlet_portb_w(u8 data);
 	void k053936_w(offs_t offset, u16 data, u16 mem_mask = ~0);
 	void gakusai_oki_bank_hi_w(u8 data);
 	void gakusai_oki_bank_lo_w(u8 data);
diff --git a/src/mame/misc/astrcorp.cpp b/src/mame/misc/astrcorp.cpp
index e893c5c26c8..296b389a38a 100644
--- a/src/mame/misc/astrcorp.cpp
+++ b/src/mame/misc/astrcorp.cpp
@@ -35,9 +35,11 @@ Year + Game              PCB ID                    CPU                Video
 05  Dino Dino            T-3802A                   ASTRO V102PX-010?  ASTRO V05      ASTRO F02 2003-03-12                       Encrypted
 05  Stone Age            L1                        ASTRO V102PX-012?  ASTRO V05(x2)  ASTRO F02 2004-09-04                       Encrypted
 05? Hacher (hack)        M1.2                      ?                  ?              ASTRO F02 2005-02-18                       Encrypted
+05  Wicked Witch         O (CS350P032)             ASTRO V102PX-016?  ASTRO V06      ASTRO F02 2005-09-17                       Encrypted
 06  Captain Shark        M1.2                      ASTRO V102PX-006?  ASTRO V06      ASTRO F02 2005-05-29                       Encrypted
 06  Win Win Bingo        M1.2                      ASTRO V102PX-006?  ASTRO V06      ASTRO F02 2005-09-17                       Encrypted
 07? Western Venture      O (CS350P032)             ASTRO V102?        ASTRO V07      ASTRO F01 2007-06-03                       Encrypted
+07  Happy Farm           _P_ROHS                   ASTRO V102PX-008?  ASTRO V07      ASTRO ROHS BA21C00009 M835KK01             Encrypted
 ----------------------------------------------------------------------------------------------------------------------------------------------------------------------
 
 - astoneag, magibomb, winbingo, etc.: to initialize EEPROM (and self test in some games), keep keyout (W) pressed during boot.
@@ -68,6 +70,8 @@ Year + Game              PCB ID                    CPU                Video
 - monkeyl,a: need RE of the CPU code, inputs and layout. After reset it initializes.
 - speedmst,a,b: need RE of the CPU code, correct EEPROM. Won't boot right now.
 - cptshark: needs verifying of inputs and layout
+- wwitch: needs correct GFX ROMs loading / decode, RE of the CPU code, inputs, outputs. Currently starts but then freezes.
+- hapfarm: doesn't work, possibly wrong interrupts. Code base differs significantly, needs studying.
 
 *************************************************************************************************************/
 
@@ -294,17 +298,20 @@ class zoo_state : public astrocorp_state
 	void hacher(machine_config &config);
 	void dinodino(machine_config &config);
 	void gostop(machine_config &config);
+	void hapfarm(machine_config &config);
 	void magibombd(machine_config &config);
 	void magibombg(machine_config &config);
 	void monkeyl(machine_config &config);
 	void speedmst(machine_config &config);
 	void winbingo(machine_config &config);
+	void wwitch(machine_config &config);
 	void zoo(machine_config &config);
 
 	void init_cptshark();
 	void init_dinodino();
 	void init_gostop();
 	void init_hacher();
+	void init_hapfarm();
 	void init_magibombd();
 	void init_magibombg();
 	void init_monkeyl();
@@ -314,6 +321,7 @@ class zoo_state : public astrocorp_state
 	void init_speedmstb();
 	void init_winbingo();
 	void init_winbingoa();
+	void init_wwitch();
 	void init_zoo();
 
 	virtual void eeprom_w(u8 data) override;
@@ -347,18 +355,22 @@ class zoo_state : public astrocorp_state
 	void dinodino_map(address_map &map);
 	void gostop_map(address_map &map);
 	void hacher_map(address_map &map);
+	void hapfarm_map(address_map &map);
 	void magibombd_map(address_map &map);
 	void magibombg_map(address_map &map);
 	void monkeyl_map(address_map &map);
 	void speedmst_map(address_map &map);
 	void winbingo_map(address_map &map);
+	void wwitch_map(address_map &map);
 	void zoo_map(address_map &map);
 
-	static const decryption_info dinodino_table;
 	static const decryption_info gostop_table;
-	static const decryption_info magibombd_table;
-	static const decryption_info winbingo_table;
-	static const decryption_info zoo_table;
+	static const decryption_info v102_px005_table;
+	static const decryption_info v102_px006_table;
+	static const decryption_info v102_px008_table;
+	static const decryption_info v102_px010_table;
+	static const decryption_info v102_px014_table;
+	static const decryption_info v102_px016_table;
 };
 
 // Adds RAMDAC and 16x32 sprites
@@ -380,7 +392,7 @@ class astoneag_state : public zoo_state
 	void astoneag_map(address_map &map);
 	void ramdac_map(address_map &map);
 
-	static const decryption_info astoneag_table;
+	static const decryption_info v102_px012_table;
 	void interleave_sprites_16x32();
 };
 
@@ -962,6 +974,40 @@ void zoo_state::speedmst_map(address_map &map)
 	//map(0x??0001, 0x??0001).w(FUNC(zoo_state::oki_bank_w))
 }
 
+void zoo_state::wwitch_map(address_map &map)
+{
+	map(0x000000, 0x03ffff).rom().mirror(0x800000); // POST checks for ROM checksum at mirror
+	map(0xa00001, 0xa00001).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+	map(0xa80000, 0xa80fff).ram().share("spriteram");
+	map(0xa82000, 0xa82001).nopr().w(FUNC(zoo_state::draw_sprites_w));
+	map(0xa84000, 0xa84001).portr("INPUTS");
+	map(0xa88001, 0xa88001).w(FUNC(zoo_state::eeprom_w));
+	map(0xa8a000, 0xa8a001).w(FUNC(zoo_state::magibomb_outputs_w));
+	map(0xa8e000, 0xa8e001).portr("EEPROM_IN");
+	map(0xb00000, 0xb00000).w(FUNC(zoo_state::oki_bank_w));
+	map(0xb80000, 0xb83fff).ram().share("nvram"); // battery
+	map(0xc00000, 0xc00001).portr("CPUCODE_IN");
+	map(0xd00000, 0xd001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
+//  map(0x??0001, 0x??0001).w(FUNC(zoo_state::screen_enable_w)); // unknown location
+}
+
+void zoo_state::hapfarm_map(address_map &map) // TODO: verify everything
+{
+	map(0x000000, 0x03ffff).rom().mirror(0x800000); // POST checks for ROM checksum at mirror
+	map(0x480000, 0x483fff).ram().share("nvram"); // battery
+	map(0xb00000, 0xb00001).portr("CPUCODE_IN");
+	map(0xb80000, 0xb80fff).ram().share("spriteram");
+	map(0xb82000, 0xb82001).nopr().w(FUNC(zoo_state::draw_sprites_w));
+	map(0xb84000, 0xb84001).portr("INPUTS");
+	map(0xb88001, 0xb88001).w(FUNC(zoo_state::eeprom_w));
+	map(0xb8a000, 0xb8a001).w(FUNC(zoo_state::magibomb_outputs_w));
+	map(0xb8e000, 0xb8e001).portr("EEPROM_IN");
+	map(0xd00000, 0xd001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
+	map(0xd80000, 0xd80000).w(FUNC(zoo_state::oki_bank_w));
+	map(0xe00001, 0xe00001).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write));
+//  map(0x??0001, 0x??0001).w(FUNC(zoo_state::screen_enable_w)); // unknown location
+}
+
 void astoneag_state::astoneag_map(address_map &map)
 {
 	map(0x000000, 0x03ffff).rom().mirror(0x800000); // POST checks for ROM checksum at mirror
@@ -1403,6 +1449,18 @@ void zoo_state::speedmst(machine_config &config)
 	m_maincpu->set_addrmap(AS_PROGRAM, &zoo_state::speedmst_map);
 }
 
+void zoo_state::wwitch(machine_config &config)
+{
+	winbingo(config);
+	m_maincpu->set_addrmap(AS_PROGRAM, &zoo_state::wwitch_map);
+}
+
+void zoo_state::hapfarm(machine_config &config)
+{
+	winbingo(config);
+	m_maincpu->set_addrmap(AS_PROGRAM, &zoo_state::hapfarm_map);
+}
+
 void astoneag_state::ramdac_map(address_map &map)
 {
 	map(0x000, 0x2ff).rw(m_ramdac, FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w));
@@ -2493,6 +2551,61 @@ ROM_START( cptshark ) // clearly based on Win Win Bingo, still has strings for i
 	ROM_LOAD( "cptshark_cpucode.key", 0x00, 0x02, CRC(c38c8e25) SHA1(7e866fc75f4ddbbd6efbbd359f2b378c798e2cec) )
 ROM_END
 
+/***************************************************************************
+
+Wicked Witch
+Astro Corp.
+
+***************************************************************************/
+
+ROM_START( wwitch )
+	ROM_REGION( 0x40000, "maincpu", 0 )
+	ROM_LOAD16_BYTE( "1_wicked_w_aa.01.a.u26", 0x00000, 0x20000, CRC(6c654105) SHA1(b07e807864d7d0ccb80111369f8dc205fe45aea4) ) // F29C51001T
+	ROM_LOAD16_BYTE( "2_wicked_w_aa.01.a.u25", 0x00001, 0x20000, CRC(66206bb4) SHA1(80513d7dc7cd664238f01a6c1b3e40e7696e2211) ) // F29C51001T
+
+	ROM_REGION( 0x600000, "sprites", 0 )
+	ROM_LOAD( "mx29f1610mc.bin", 0x000000, 0x200000, CRC(8dad2fc0) SHA1(88c4bda8e247839029a8c9a84d3bd598892b1775) ) // no U location on the PCB, silkscreened 'ROM # 7' on PCB under the chip
+	ROM_LOAD( "mx29f1610mc.u30", 0x200000, 0x200000, CRC(d4e7b00d) SHA1(2689d19fcdd828d0d47265362f6625377a90c1e4) ) // silkscreened 'ROM # 4' on PCB under the chip
+	ROM_LOAD( "mx29f1610mc.u51", 0x400000, 0x200000, CRC(05bc898d) SHA1(c88c14e4858943b2ea719abe0cc9ac0738d682dd) ) // silkscreened 'ROM # 3' on PCB under the chip
+
+	ROM_REGION( 0x80000, "oki", 0 )
+	ROM_LOAD( "5_wicked_w_aa.01.a.bin", 0x00000, 0x80000, CRC(298014f3) SHA1(98da24e84ec69c48e8754f8406e11e68fb352e28) )
+
+	ROM_REGION16_LE( 0x80, "eeprom", 0 )
+	ROM_LOAD( "93c46.u13", 0x00, 0x80, CRC(663f14cd) SHA1(8a675a4e270d86d3a350e7ddbeb3f9d958798bd1) )
+
+	ROM_REGION16_LE( 0x02, "astro_cpucode", 0 )
+	ROM_LOAD( "wwitch_cpucode.key", 0x00, 0x02, NO_DUMP )
+ROM_END
+
+/***************************************************************************
+
+Happy Farm
+Astro Corp.
+
+***************************************************************************/
+
+ROM_START( hapfarm ) // also has Hot Runner N3.00 string, so probably derived from that code base
+	ROM_REGION( 0x40000, "maincpu", 0 )
+	ROM_LOAD16_BYTE( "1_happy_farm_us.01.02.b.u26", 0x00000, 0x20000, CRC(c60bbc39) SHA1(fcf23c9c75bc221a310b87de58dea75f018065c2) ) // EV29001TSC-70R read as F29C51001T
+	ROM_LOAD16_BYTE( "2_happy_farm_us.01.02.b.u25", 0x00001, 0x20000, CRC(186a3e0f) SHA1(8e2474beb9264dbadc154cdfdc7b911cc1a3a601) ) // EV29001TSC-70R read as F29C51001T
+
+	ROM_REGION( 0x600000, "sprites", 0 )
+	ROM_LOAD( "mx29f1610mc.bin", 0x000000, 0x200000, CRC(fea5629e) SHA1(cbee315f7264dc6f3dd2a973cf948854138827e3) ) // no U location on the PCB, silkscreened 'ROM # 7' on PCB under the chip
+	ROM_LOAD( "mx29f1610mc.u30", 0x200000, 0x200000, CRC(97af8968) SHA1(344834f7fae193e9f505d451cb6fc7240e5e84b9) ) // silkscreened 'ROM # 4' on PCB under the chip
+	ROM_LOAD( "mx29f1610mc.u51", 0x400000, 0x200000, CRC(42faf0e8) SHA1(de596978c9a57d7667b78755ea111972857b6313) ) // silkscreened 'ROM # 3' on PCB under the chip
+
+	ROM_REGION( 0x80000, "oki", 0 )
+	ROM_LOAD( "5_happy_farm.bin", 0x00000, 0x40000, CRC(859a6086) SHA1(2821ae6f86df8a3bbff0f348cf6a36c1c3fec68a) ) // 0xxxxxxxxxxxxxxxxxx = 0xFF
+	ROM_CONTINUE(                 0x00000, 0x40000 )
+
+	ROM_REGION16_LE( 0x80, "eeprom", 0 )
+	ROM_LOAD( "93c46.u13", 0x00, 0x80, CRC(c11f2b48) SHA1(174681a01b30b036e948a90313add8e7de9aef55) )
+
+	ROM_REGION16_LE( 0x02, "astro_cpucode", 0 )
+	ROM_LOAD( "hapfarm_cpucode.key", 0x00, 0x02, NO_DUMP )
+ROM_END
+
 void astrocorp_state::init_showhand()
 {
 #if 0
@@ -2602,7 +2715,7 @@ void zoo_state::decrypt_rom(const decryption_info &table)
 	}
 }
 
-const zoo_state::decryption_info zoo_state::magibombd_table = {
+const zoo_state::decryption_info zoo_state::v102_px014_table = {
 	{
 		{
 			{ 8, 11, 9 },
@@ -2636,7 +2749,7 @@ const zoo_state::decryption_info zoo_state::magibombd_table = {
 
 void zoo_state::init_magibombd()
 {
-	decrypt_rom(magibombd_table);
+	decrypt_rom(v102_px014_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2652,7 +2765,7 @@ void zoo_state::init_magibombd()
 
 void zoo_state::init_magibombg()
 {
-	decrypt_rom(magibombd_table);
+	decrypt_rom(v102_px014_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2666,7 +2779,7 @@ void zoo_state::init_magibombg()
 #endif
 }
 
-const zoo_state::decryption_info zoo_state::winbingo_table = {
+const zoo_state::decryption_info zoo_state::v102_px006_table = {
 	{
 		{
 			{ 8, 11, 9 },
@@ -2700,7 +2813,7 @@ const zoo_state::decryption_info zoo_state::winbingo_table = {
 
 void zoo_state::init_winbingo()
 {
-	decrypt_rom(winbingo_table);
+	decrypt_rom(v102_px006_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2714,7 +2827,7 @@ void zoo_state::init_winbingo()
 
 void zoo_state::init_winbingoa()
 {
-	decrypt_rom(winbingo_table);
+	decrypt_rom(v102_px006_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2728,7 +2841,7 @@ void zoo_state::init_winbingoa()
 
 void zoo_state::init_hacher()
 {
-	decrypt_rom(winbingo_table);
+	decrypt_rom(v102_px006_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2742,7 +2855,7 @@ void zoo_state::init_hacher()
 
 void zoo_state::init_cptshark()
 {
-	decrypt_rom(winbingo_table);
+	decrypt_rom(v102_px006_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2754,7 +2867,7 @@ void zoo_state::init_cptshark()
 #endif
 }
 
-const zoo_state::decryption_info zoo_state::zoo_table = {
+const zoo_state::decryption_info zoo_state::v102_px005_table = {
 	{
 		{
 			{ 8, 9, 10 },
@@ -2788,7 +2901,7 @@ const zoo_state::decryption_info zoo_state::zoo_table = {
 
 void zoo_state::init_zoo()
 {
-	decrypt_rom(zoo_table);
+	decrypt_rom(v102_px005_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2803,7 +2916,7 @@ void zoo_state::init_zoo()
 #endif
 }
 
-const zoo_state::decryption_info zoo_state::dinodino_table = {
+const zoo_state::decryption_info zoo_state::v102_px010_table = {
 	{
 		{
 			{ 8, 11, 9 },
@@ -2837,7 +2950,7 @@ const zoo_state::decryption_info zoo_state::dinodino_table = {
 
 void zoo_state::init_dinodino()
 {
-	decrypt_rom(dinodino_table);
+	decrypt_rom(v102_px010_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2897,7 +3010,7 @@ void zoo_state::init_gostop()
 
 void zoo_state::init_monkeyl()
 {
-	decrypt_rom(zoo_table);
+	decrypt_rom(v102_px005_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2913,7 +3026,7 @@ void zoo_state::init_monkeyl()
 
 void zoo_state::init_monkeyla()
 {
-	decrypt_rom(zoo_table);
+	decrypt_rom(v102_px005_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2929,7 +3042,7 @@ void zoo_state::init_monkeyla()
 
 void zoo_state::init_speedmst()
 {
-	decrypt_rom(zoo_table);
+	decrypt_rom(v102_px005_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2943,7 +3056,7 @@ void zoo_state::init_speedmst()
 
 void zoo_state::init_speedmsta()
 {
-	decrypt_rom(zoo_table);
+	decrypt_rom(v102_px005_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2957,7 +3070,7 @@ void zoo_state::init_speedmsta()
 
 void zoo_state::init_speedmstb()
 {
-	decrypt_rom(zoo_table);
+	decrypt_rom(v102_px005_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -2969,7 +3082,101 @@ void zoo_state::init_speedmstb()
 #endif
 }
 
-const astoneag_state::decryption_info astoneag_state::astoneag_table = {
+const zoo_state::decryption_info zoo_state::v102_px016_table = {
+	{
+		{
+			{ 11, 10, 9 },
+			{
+				{ { 7, 5, 4, 6,  0, 3, 2, 1 }, 0x00 },
+				{ { 1, 4, 6, 0,  2, 5, 3, 7 }, 0xd0 },
+				{ { 1, 7, 4, 3,  6, 5, 0, 2 }, 0x88 },
+				{ { 6, 5, 2, 3,  7, 1, 0, 4 }, 0xd1 },
+				{ { 6, 1, 7, 2,  4, 0, 3, 5 }, 0x64 },
+				{ { 1, 7, 2, 6,  5, 4, 3, 0 }, 0x83 },
+				{ { 6, 7, 4, 2,  5, 0, 1, 3 }, 0x81 },
+				{ { 7, 5, 1, 0,  2, 4, 6, 3 }, 0xea },
+			}
+		},
+		{
+			{ 12, 10, 8 },
+			{
+				{ { 6, 5, 4, 3,  2, 1, 0, 7 }, 0x90 },
+				{ { 2, 4, 0, 7,  5, 6, 3, 1 }, 0x32 },
+				{ { 7, 1, 0, 6,  5, 2, 3, 4 }, 0xa9 },
+				{ { 2, 0, 3, 5,  1, 4, 6, 7 }, 0xa2 },
+				{ { 3, 0, 6, 5,  2, 1, 4, 7 }, 0x02 },
+				{ { 0, 1, 6, 4,  5, 2, 7, 3 }, 0x30 },
+				{ { 3, 5, 2, 7,  6, 1, 4, 0 }, 0x0a },
+				{ { 0, 6, 4, 2,  7, 3, 1, 5 }, 0x81 },
+			}
+		}
+	},
+	{ 12, 9, 11, 8, 10, 7, 2, 4, 6, 5, 3 }
+};
+
+void zoo_state::init_wwitch()
+{
+	decrypt_rom(v102_px016_table);
+#if 1
+	// TODO: There's more stuff happening for addresses < 0x400...
+	// override reset vector for now
+	u16 * const rom = (u16 *)memregion("maincpu")->base();
+	rom[0x00004/2] = 0x0000;
+	rom[0x00006/2] = 0x0446;
+
+	rom[0x00400/2] = 0x4e75; // overlay!?
+
+	rom[0x01220/2] = 0x4e75; // Mirror ROM word checksum (it expects 0)
+#endif
+}
+
+const zoo_state::decryption_info zoo_state::v102_px008_table = {
+	{
+		{
+			{ 11, 10, 9 },
+			{
+				{ { 7, 5, 4, 6,  0, 3, 2, 1 }, 0x00 },
+				{ { 1, 4, 6, 0,  2, 5, 3, 7 }, 0xd0 },
+				{ { 1, 7, 4, 3,  6, 5, 0, 2 }, 0x88 },
+				{ { 6, 5, 2, 3,  7, 1, 0, 4 }, 0xd1 },
+				{ { 6, 1, 7, 2,  4, 0, 3, 5 }, 0x64 },
+				{ { 1, 7, 2, 6,  5, 4, 3, 0 }, 0x83 },
+				{ { 6, 7, 4, 2,  5, 0, 1, 3 }, 0x81 },
+				{ { 7, 5, 1, 0,  2, 4, 6, 3 }, 0xea },
+			}
+		},
+		{
+			{ 12, 10, 8 },
+			{
+				{ { 6, 5, 4, 3,  2, 1, 0, 7 }, 0x90 },
+				{ { 2, 4, 0, 7,  5, 6, 3, 1 }, 0x32 },
+				{ { 7, 1, 0, 6,  5, 2, 3, 4 }, 0xa9 },
+				{ { 2, 0, 3, 5,  1, 4, 6, 7 }, 0xa2 },
+				{ { 3, 0, 6, 5,  2, 1, 4, 7 }, 0x02 },
+				{ { 0, 1, 6, 4,  5, 2, 7, 3 }, 0x30 },
+				{ { 3, 5, 2, 7,  6, 1, 4, 0 }, 0x0a },
+				{ { 0, 6, 4, 2,  7, 3, 1, 5 }, 0x81 },
+			}
+		}
+	},
+	{ 12, 9, 11, 8, 10, 7, 2, 6, 3, 5, 4 }
+};
+
+void zoo_state::init_hapfarm()
+{
+	decrypt_rom(v102_px008_table);
+#if 1
+	// TODO: There's more stuff happening for addresses < 0x400...
+	// override reset vector for now
+	u16 * const rom = (u16 *)memregion("maincpu")->base();
+	rom[0x00004/2] = 0x0000;
+	rom[0x00006/2] = 0x0400;
+
+	rom[0x32126/2] = 0x4e75; // Mirror ROM word checksum (it expects 0)
+#endif
+}
+
+const astoneag_state::decryption_info astoneag_state::v102_px012_table = {
 	{
 		{
 			{ 11, 10, 9 },
@@ -3003,7 +3210,7 @@ const astoneag_state::decryption_info astoneag_state::astoneag_table = {
 
 void astoneag_state::init_astoneag()
 {
-	decrypt_rom(astoneag_table);
+	decrypt_rom(v102_px012_table);
 #if 1
 	// TODO: There's more stuff happening for addresses < 0x400...
 	// override reset vector for now
@@ -3064,8 +3271,10 @@ GAMEL( 2004,  magibombg, magibomb, magibombg, magibombg, zoo_state,       init_m
 GAMEL( 2004,  speedmst,  0,        speedmst,  magibombg, zoo_state,       init_speedmst,  ROT0, "D2 Enterprises", "Speed Master (Ver. V1.0, Apr 29 2004)",      MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING, layout_magibomb  ) // Apr 29 2004 16:29:35
 GAMEL( 2003,  speedmsta, speedmst, speedmst,  magibombg, zoo_state,       init_speedmsta, ROT0, "D2 Enterprises", "Speed Master (Ver. V1.0, May 23 2003)",      MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING, layout_magibomb  ) // May 23 2003 16:38:02
 GAMEL( 2003,  speedmstb, speedmst, speedmst,  magibombg, zoo_state,       init_speedmstb, ROT0, "D2 Enterprises", "Speed Master (Ver. V1.0, Apr 28 2004)",      MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING, layout_magibomb  ) // Apr 28 2004 17:21:26
-GAMEL( 2006,  cptshark,  0,        winbingo,  winbingo,  zoo_state,       init_cptshark,  ROT0, "Astro Corp. / American Alpha", "Captain Shark (Ver. CS.01.6, Apr 21 2006)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION, layout_winbingo  ) // 13:50:11 Apr 21 2006
+GAMEL( 2006,  cptshark,  0,        winbingo,  winbingo,  zoo_state,       init_cptshark,  ROT0, "Astro Corp. / American Alpha", "Captain Shark (Ver. CS.01.6, Apr 21 2006)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING, layout_winbingo  ) // 13:50:11 Apr 21 2006
 GAMEL( 2006,  winbingo,  0,        winbingo,  winbingo,  zoo_state,       init_winbingo,  ROT0, "Astro Corp.", "Win Win Bingo (Ver. GM.03.3, Feb 23 2006)",     MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION, layout_winbingo  ) // 15:47:48 Feb 23 2006
 GAMEL( 2006,  winbingoa, winbingo, winbingo,  winbingo,  zoo_state,       init_winbingoa, ROT0, "Astro Corp.", "Win Win Bingo (Ver. GM.05.1, May 11 2006)",     MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING,           layout_winbingo  ) // 11:02:07 May 11 2006. Undumped sprite ROMs
 GAMEL( 2005,  hacher,    winbingo, hacher,    winbingo,  zoo_state,       init_hacher,    ROT0, "bootleg (Gametron)", "Hacher (hack of Win Win Bingo EN.01.6)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS, layout_winbingo  ) // 14:25:46 Mar 10 2005. One bad sprite ROM
 GAME ( 2007?, westvent,  0,        skilldrp,  skilldrp,  astrocorp_state, empty_init,     ROT0, "Astro Corp.", "Western Venture (Ver. AA.02.D)",                MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING                             ) // One bad program ROM
+GAME ( 2005,  wwitch,    0,        wwitch,    magibombd, zoo_state,       init_wwitch,    ROT0, "Astro Corp.", "Wicked Witch (Ver. AA.01.A)",                   MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING ) // 29/12/05 09:29
+GAME ( 2008,  hapfarm,   0,        hapfarm,   magibombd, zoo_state,       init_hapfarm,   ROT0, "Astro Corp.", "Happy Farm (Ver. US.01.02.B)",                  MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING ) // 2008/10/16
diff --git a/src/mame/misc/carrera.cpp b/src/mame/misc/carrera.cpp
index b1e94452804..62e778501bc 100644
--- a/src/mame/misc/carrera.cpp
+++ b/src/mame/misc/carrera.cpp
@@ -1,5 +1,6 @@
 // license:BSD-3-Clause
-// copyright-holders:David Haywood
+// copyright-holders: David Haywood
+
 /*
 
 This is a simple 'Pairs' game called
@@ -40,15 +41,19 @@ Emulation Notes:
 
 TODO:
 - Are colors 100% correct? Needs a reference to be sure.
-- There are reel gfxs on the roms (near the end), left-over or there's a way to enable it?
+- There are reel GFXs on the ROMs (near the end), left-over or there's a way to enable it?
   Update: if you trigger a normal irq 0 instead of a NMI the game will change into a proper 8 liner game without inputs. Investigate on it...
+  Update 2: alantin, bsebmanbl, bsebmanbl2, drkseal start directly with the 8 liner game
+- ncarrera has an undumped AT90S8515 MCU (8 bit AVR RISC core)
 
 */
 
 #include "emu.h"
+
 #include "cpu/z80/z80.h"
 #include "sound/ay8910.h"
 #include "video/mc6845.h"
+
 #include "emupal.h"
 #include "screen.h"
 #include "speaker.h"
@@ -56,9 +61,6 @@ Emulation Notes:
 
 namespace {
 
-#define MASTER_CLOCK    XTAL(22'118'400)
-
-
 class carrera_state : public driver_device
 {
 public:
@@ -88,7 +90,7 @@ class carrera_state : public driver_device
 
 void carrera_state::prg_map(address_map &map)
 {
-	map(0x0000, 0x4fff).rom();
+	map(0x0000, 0x7fff).rom();
 	map(0xe000, 0xe7ff).ram();
 	map(0xe800, 0xe800).w("crtc", FUNC(mc6845_device::address_w));
 	map(0xe801, 0xe801).w("crtc", FUNC(mc6845_device::register_w));
@@ -109,13 +111,13 @@ void carrera_state::io_map(address_map &map)
 }
 
 static INPUT_PORTS_START( carrera )
-	PORT_START("IN0")   /* Port 0 */
+	PORT_START("IN0")   // Port 0
 	PORT_BIT( 0x01, IP_ACTIVE_LOW,  IPT_JOYSTICK_UP )
 	PORT_BIT( 0x02, IP_ACTIVE_LOW,  IPT_JOYSTICK_DOWN )
 	PORT_BIT( 0x04, IP_ACTIVE_LOW,  IPT_JOYSTICK_LEFT  )
 	PORT_BIT( 0x08, IP_ACTIVE_LOW,  IPT_JOYSTICK_RIGHT )
 	PORT_BIT( 0x10, IP_ACTIVE_LOW,  IPT_BUTTON1 )
-	/* unused / unknown inputs, not dips */
+	// unused / unknown inputs, not dips
 	PORT_DIPNAME( 0x20, 0x20, "0" )
 	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
@@ -124,10 +126,10 @@ static INPUT_PORTS_START( carrera )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
-	PORT_START("IN1")   /* Port 1 */
+	PORT_START("IN1")   // Port 1
 	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
 	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
-	/* unused / unknown inputs, not dips */
+	// unused / unknown inputs, not dips
 	PORT_DIPNAME( 0x04, 0x04, "1" )
 	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
@@ -147,8 +149,8 @@ static INPUT_PORTS_START( carrera )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
-	/* I suspect the 4 below are the 4xDSWs */
-	PORT_START("IN2")   /* Port 2 */
+	// I suspect the 4 below are the 4xDSWs
+	PORT_START("IN2")   // Port 2
 	PORT_DIPNAME( 0x01, 0x01, "2" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
@@ -174,7 +176,7 @@ static INPUT_PORTS_START( carrera )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
-	PORT_START("IN3")   /* Port 3 */
+	PORT_START("IN3")   // Port 3
 	PORT_DIPNAME( 0x01, 0x01, "3" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
@@ -200,7 +202,7 @@ static INPUT_PORTS_START( carrera )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
-	PORT_START("IN4")   /* Port 4 */
+	PORT_START("IN4")   // Port 4
 	PORT_DIPNAME( 0x01, 0x01, "4" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
@@ -226,7 +228,7 @@ static INPUT_PORTS_START( carrera )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 
-	PORT_START("IN5")   /* Port 5 */
+	PORT_START("IN5")   // Port 5
 	PORT_DIPNAME( 0x01, 0x01, "5" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
@@ -265,7 +267,7 @@ static const gfx_layout tiles8x8_layout =
 };
 
 static GFXDECODE_START( gfx_carrera )
-	GFXDECODE_ENTRY( "gfx1", 0, tiles8x8_layout, 0, 1 )
+	GFXDECODE_ENTRY( "tiles", 0, tiles8x8_layout, 0, 1 )
 GFXDECODE_END
 
 uint32_t carrera_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
@@ -276,9 +278,9 @@ uint32_t carrera_state::screen_update(screen_device &screen, bitmap_rgb32 &bitma
 	{
 		for (int x = 0; x < 64; x++)
 		{
-			int tile = m_tileram[count&0x7ff] | m_tileram[(count&0x7ff)+0x800]<<8;
+			int tile = m_tileram[count & 0x7ff] | m_tileram[(count & 0x7ff) + 0x800] << 8;
 
-			m_gfxdecode->gfx(0)->opaque(bitmap,cliprect,tile,0,0,0,x*8,y*8);
+			m_gfxdecode->gfx(0)->opaque(bitmap, cliprect, tile, 0, 0, 0, x * 8, y * 8);
 			count++;
 		}
 	}
@@ -316,12 +318,14 @@ void carrera_state::palette(palette_device &palette) const
 
 void carrera_state::carrera(machine_config &config)
 {
-	/* basic machine hardware */
+	constexpr XTAL MASTER_CLOCK = 22.1184_MHz_XTAL;
+
+	// basic machine hardware
 	Z80(config, m_maincpu, MASTER_CLOCK / 6);
 	m_maincpu->set_addrmap(AS_PROGRAM, &carrera_state::prg_map);
 	m_maincpu->set_addrmap(AS_IO, &carrera_state::io_map);
 
-	/* video hardware */
+	// video hardware
 	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
 	screen.set_refresh_hz(60);
 	screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
@@ -338,11 +342,11 @@ void carrera_state::carrera(machine_config &config)
 	GFXDECODE(config, m_gfxdecode, m_palette, gfx_carrera);
 	PALETTE(config, m_palette, FUNC(carrera_state::palette), 32);
 
-	/* sound hardware */
+	// sound hardware
 	SPEAKER(config, "mono").front_center();
 
-	ay8910_device &aysnd(AY8910(config, "aysnd", MASTER_CLOCK/12));
-	/* these are set as input, but I have no idea which input port it uses is for the AY */
+	ay8910_device &aysnd(AY8910(config, "aysnd", MASTER_CLOCK / 12));
+	// these are set as input, but I have no idea which input port it uses is for the AY
 	aysnd.port_a_read_callback().set(FUNC(carrera_state::unknown_r));
 	aysnd.port_b_read_callback().set(FUNC(carrera_state::unknown_r));
 	aysnd.add_route(ALL_OUTPUTS, "mono", 1.00);
@@ -353,7 +357,7 @@ ROM_START( carrera )
 	ROM_REGION( 0x10000, "maincpu", 0 )
 	ROM_LOAD( "27512.ic22", 0x00000, 0x10000, CRC(2385b9c8) SHA1(12d4397779e074096fbb23b114985f104366b79c) )
 
-	ROM_REGION( 0x50000, "gfx1", 0 )
+	ROM_REGION( 0x50000, "tiles", 0 )
 	ROM_LOAD( "27512.ic1", 0x00000, 0x10000, CRC(a16e914e) SHA1(09f2271f193a7bffd62ef6e428ecbf9aa1154860) )
 	ROM_LOAD( "27512.ic2", 0x10000, 0x10000, CRC(147036a5) SHA1(34b4818fe61c5b13220b0a2001987b68b655b2cb) )
 	ROM_LOAD( "27512.ic3", 0x20000, 0x10000, CRC(920eee0e) SHA1(85e6d5292b751c57c64d17858bd00292356599e3) )
@@ -368,7 +372,7 @@ ROM_START( bsebman )
 	ROM_REGION( 0x10000, "maincpu", 0 )
 	ROM_LOAD( "ic22", 0x00000, 0x10000, CRC(294a205f) SHA1(b088617354b6a37520060f19f77d841ad8ee1538) )
 
-	ROM_REGION( 0x50000, "gfx1", 0 )
+	ROM_REGION( 0x50000, "tiles", 0 )
 	ROM_LOAD( "ic1", 0x00000, 0x10000, CRC(bf4868e1) SHA1(ca91343dbdb9f43d9b981b9b3f958edb17bf188d) )
 	ROM_LOAD( "ic2", 0x10000, 0x10000, CRC(26e1c17e) SHA1(ea0669e87207104eeaa3eae6a6708dbdf94e3c3c) )
 	ROM_LOAD( "ic3", 0x20000, 0x10000, CRC(8401248d) SHA1(f8c8ed93d76709ead0b262ab3039df6febe3c005) )
@@ -379,8 +383,93 @@ ROM_START( bsebman )
 	ROM_LOAD( "am27s19.ic39", 0x00, 0x20, CRC(af16359f) SHA1(1ff5c9d7807e52be09c0ded56fb68a47e41b3fcf) )
 ROM_END
 
+ROM_START( bsebmanbl )
+	ROM_REGION( 0x10000, "maincpu", 0 )
+	ROM_LOAD( "27512.ic22", 0x00000, 0x10000, CRC(7b896b33) SHA1(841d5c7853e18109b74cad44c9f0d91398add146) ) // SLDH
+
+	ROM_REGION( 0x50000, "tiles", 0 ) // still has BS GFX
+	ROM_LOAD( "27512.ic1", 0x00000, 0x10000, CRC(a16e914e) SHA1(09f2271f193a7bffd62ef6e428ecbf9aa1154860) )
+	ROM_LOAD( "27512.ic2", 0x10000, 0x10000, CRC(147036a5) SHA1(34b4818fe61c5b13220b0a2001987b68b655b2cb) )
+	ROM_LOAD( "27512.ic3", 0x20000, 0x10000, CRC(920eee0e) SHA1(85e6d5292b751c57c64d17858bd00292356599e3) )
+	ROM_LOAD( "27512.ic4", 0x30000, 0x10000, CRC(97433f36) SHA1(39f3c6b76ad540693682832aba6e4fc400ca3753) )
+	ROM_LOAD( "27512.ic5", 0x40000, 0x10000, CRC(ffa75920) SHA1(aa5619f5aabcdfa250bb24bcad101a8c512a1776) )
+
+	ROM_REGION( 0x20, "proms", 0 )
+	ROM_LOAD( "82s123.ic39", 0x00, 0x20, CRC(af16359f) SHA1(1ff5c9d7807e52be09c0ded56fb68a47e41b3fcf) )
+ROM_END
+
+ROM_START( bsebmanbl2 )
+	ROM_REGION( 0x10000, "maincpu", 0 ) // has Carrera, Avraam and Ballas strings
+	ROM_LOAD( "27512.ic22", 0x00000, 0x10000, CRC(ca2c8962) SHA1(140a217bb0365ec55116ba483208bdf1d820a7af) )
+
+	ROM_REGION( 0x50000, "tiles", 0 ) // hacked J.T. GFX instead of BS
+	ROM_LOAD( "27512.ic1", 0x00000, 0x10000, CRC(65ad616a) SHA1(e87d6d187ec5c99628d767a9720dd9d634e39c2d) )
+	ROM_LOAD( "27512.ic2", 0x10000, 0x10000, CRC(64004dcb) SHA1(f9af56035f00d3d914c8e83e941762cb6153fc16) )
+	ROM_LOAD( "27512.ic3", 0x20000, 0x10000, CRC(c6e0a838) SHA1(e30d0f28845f331839afc44fb7358be72d2a88cb) )
+	ROM_LOAD( "27512.ic4", 0x30000, 0x10000, CRC(eccd4da0) SHA1(8171ed1e9a492b804c86b5cd98cc8de91b01608c) )
+	ROM_LOAD( "27512.ic5", 0x40000, 0x10000, CRC(f3014271) SHA1(97eeea6f2cde8f115d3285398b0083f0d1c95578) )
+
+	ROM_REGION( 0x20, "proms", 0 )
+	ROM_LOAD( "82s123.ic39", 0x00, 0x20, CRC(af16359f) SHA1(1ff5c9d7807e52be09c0ded56fb68a47e41b3fcf) )
+ROM_END
+
+ROM_START( alantin )
+	ROM_REGION( 0x10000, "maincpu", 0 )
+	ROM_LOAD( "alpro.ic22", 0x00000, 0x10000, CRC(1eb97b31) SHA1(7097cf344734a2b553356f9b9fd6453e584a6e3f) ) // 27512
+
+	ROM_REGION( 0x50000, "tiles", 0 ) // still has BS GFX
+	ROM_LOAD( "alantin1.ic1", 0x00000, 0x10000, CRC(feb49cfd) SHA1(696683375c832b4cd6db9eef0edf4919b90c97ef) )
+	ROM_LOAD( "alantin2.ic2", 0x10000, 0x10000, CRC(e79da4b9) SHA1(a80c5f6431fc755645a0c8cd0cb290669f0cbada) )
+	ROM_LOAD( "alantin3.ic3", 0x20000, 0x10000, CRC(73d7c748) SHA1(bf688b8f506859ed3c514915676b13cecfec0a81) )
+	ROM_LOAD( "alantin4.ic4", 0x30000, 0x10000, CRC(6a061afd) SHA1(f6d736bd284e97ab915adb249c371617daa02a36) )
+	ROM_LOAD( "alantin5.ic5", 0x40000, 0x10000, CRC(35d8fb1b) SHA1(5d7ff8089e16ebb792543eeb9cc682f9f5eba6fe) )
+
+	ROM_REGION( 0x20, "proms", 0 )
+	ROM_LOAD( "82s123.ic39", 0x00, 0x20, CRC(5b0e598f) SHA1(99a8e80229d684f2083634ae2d96bf1d4f13677c) )
+ROM_END
+
+ROM_START( drkseal )
+	ROM_REGION( 0x10000, "maincpu", 0 ) // still shows Alantin and Avraam strings
+	ROM_LOAD( "27512.ic22", 0x00000, 0x10000, CRC(8a1732e5) SHA1(191de15d0ccf439991e3c0c258cbfeb79ef19002) ) // 1xxxxxxxxxxxxxxx = 0xFF
+
+	ROM_REGION( 0x50000, "tiles", 0 ) // shows Vegas copyright
+	ROM_LOAD( "27512.ic1", 0x00000, 0x10000, CRC(fd3b6bbc) SHA1(b1fe09772a5d9a07077038244517fc7169266893) )
+	ROM_LOAD( "27512.ic2", 0x10000, 0x10000, CRC(d3a048e3) SHA1(687d58b84ca5985f51755b09c8a8b2ef68d16399) )
+	ROM_LOAD( "27512.ic3", 0x20000, 0x10000, CRC(50b8f9ee) SHA1(4f31e36eb54fde40e409f0ac18bf87126174be33) )
+	ROM_LOAD( "27512.ic4", 0x30000, 0x10000, CRC(15292338) SHA1(95352969d3003eb3451334d569ead730cec9bcec) )
+	ROM_LOAD( "27512.ic5", 0x40000, 0x10000, CRC(99fb8640) SHA1(053fdd600e5a120ea8988f3d55d1d444e8b29abe) )
+
+	ROM_REGION( 0x20, "proms", 0 )
+	ROM_LOAD( "82s123.ic39", 0x00, 0x20, CRC(03aadf73) SHA1(e5baf8c5e7276eb207357e4cbb694c75e8caab6a) )
+ROM_END
+
+// this set uses a newer 'TYPE C-2000' board with a 'Rania Original 2000 Type 8515' riser board (the Z80 and MC6845 have been moved here along with a AT90S8515 MCU)
+ROM_START( ncarrera )
+	ROM_REGION( 0x10000, "maincpu", 0 ) // has 2001, Mpampis and Avraam strings
+	ROM_LOAD( "27512.ic22", 0x00000, 0x10000, CRC(3ec2dbca) SHA1(896fbccaf844c1fa5861b176c09e4a3707b3524f) ) // 1xxxxxxxxxxxxxxx = 0xFF
+
+	ROM_REGION( 0x2200, "mcu", 0 )
+	ROM_LOAD( "internal_eeprom", 0x0000, 0x0200, NO_DUMP )
+	ROM_LOAD( "internal_flash",  0x0200, 0x2000, NO_DUMP )
+
+	ROM_REGION( 0x50000, "tiles", 0 ) // has both New Carrera and New Bomberman GFX
+	ROM_LOAD( "27512.ic1", 0x00000, 0x10000, CRC(dbec54c7) SHA1(ca7e54c198ca8abeffba1b323a514678384c35f9) )
+	ROM_LOAD( "27512.ic2", 0x10000, 0x10000, CRC(8e8c2b6d) SHA1(001121e0b91d8e0efdc3f5f99c43e1751b4be758) )
+	ROM_LOAD( "27512.ic3", 0x20000, 0x10000, CRC(ac66cda8) SHA1(65fae21de9f9727c5d8198ff57b27d703a7518fc) )
+	ROM_LOAD( "27512.ic4", 0x30000, 0x10000, CRC(c337a9b8) SHA1(0c4f86e1c7c94c492b09e3571e213308e9fa7c47) )
+	ROM_LOAD( "27512.ic5", 0x40000, 0x10000, CRC(d8494f96) SHA1(11bc5d73f030361de8e6d6434ccbeac02c61a9eb) )
+
+	ROM_REGION( 0x20, "proms", 0 )
+	ROM_LOAD( "am27s19.ic39", 0x00, 0x20, CRC(af16359f) SHA1(1ff5c9d7807e52be09c0ded56fb68a47e41b3fcf) )
+ROM_END
+
 } // anonymous namespace
 
 
-GAME( 19??, carrera, 0,       carrera, carrera, carrera_state, empty_init, ROT0, "BS Electronics", "Carrera (Version 6.7)",   MACHINE_SUPPORTS_SAVE )
-GAME( 19??, bsebman, carrera, carrera, carrera, carrera_state, empty_init, ROT0, "BS Electronics", "Bomberman (Version 6.6)", MACHINE_SUPPORTS_SAVE )
+GAME( 19??, carrera,    0,       carrera, carrera, carrera_state, empty_init, ROT0, "BS Electronics",             "Carrera (Version 6.7)",                   MACHINE_SUPPORTS_SAVE )
+GAME( 19??, bsebman,    carrera, carrera, carrera, carrera_state, empty_init, ROT0, "BS Electronics",             "Bomberman (Version 6.6)",                 MACHINE_SUPPORTS_SAVE )
+GAME( 1999, bsebmanbl,  carrera, carrera, carrera, carrera_state, empty_init, ROT0, "bootleg (Ballas / Avraam)",  "Bomberman (Version 6.6, Avraam bootleg)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // needs verifying of inputs
+GAME( 1999, bsebmanbl2, carrera, carrera, carrera, carrera_state, empty_init, ROT0, "bootleg (J.T.)",             "Bomberman (Version 6.6, J.T. bootleg)",   MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // needs verifying of inputs
+GAME( 1999, alantin,    0,       carrera, carrera, carrera_state, empty_init, ROT0, "bootleg (Robert / Avraam)",  "Alantin - Aladdin's Magic Lamp",          MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // needs verifying of inputs
+GAME( 1999, drkseal,    0,       carrera, carrera, carrera_state, empty_init, ROT0, "bootleg (Vegas)",            "Dark Seal (8-liner)",                     MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // needs verifying of inputs
+GAME( 2001, ncarrera,   0,       carrera, carrera, carrera_state, empty_init, ROT0, "bootleg (J.T.)",             "New Carrera - Version 2000",              MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE ) // needs MCU dump
diff --git a/src/mame/misc/ez2d.cpp b/src/mame/misc/ez2d.cpp
index df40993618a..9fe62c419ff 100644
--- a/src/mame/misc/ez2d.cpp
+++ b/src/mame/misc/ez2d.cpp
@@ -1,5 +1,5 @@
 // license:BSD-3-Clause
-// copyright-holders:Ivan Vangelista
+// copyright-holders:
 /*
 
 TODO:
diff --git a/src/mame/misc/gammagic.cpp b/src/mame/misc/gammagic.cpp
index 6ac26bd2e1f..a2270b1d444 100644
--- a/src/mame/misc/gammagic.cpp
+++ b/src/mame/misc/gammagic.cpp
@@ -96,6 +96,7 @@ void gammagic_state::v8000_map(address_map &map)
 	map(0x000000, 0x07ffff).rom();
 	map(0x100000, 0x13ffff).ram();
 	map(0x1ff800, 0x1fffff).ram();
+	//map(0x500010, 0x50001f).rw("asc", FUNC(i82510_device::read), FUNC(i82510_device::write)).umask32(0xff00ff00);
 }
 
 static INPUT_PORTS_START( gammagic )
@@ -181,7 +182,7 @@ void gammagic_state::gammagic(machine_config &config)
 	ISA16_SLOT(config, "isa3", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
 	ISA16_SLOT(config, "isa4", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
 
-	rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
+	rs232_port_device &serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
 	serport0.rxd_handler().set("board4:fdc37c93x", FUNC(fdc37c93x_device::rxd1_w));
 	serport0.dcd_handler().set("board4:fdc37c93x", FUNC(fdc37c93x_device::ndcd1_w));
 	serport0.dsr_handler().set("board4:fdc37c93x", FUNC(fdc37c93x_device::ndsr1_w));
diff --git a/src/mame/misc/neomania.cpp b/src/mame/misc/neomania.cpp
index 3de892a64cd..4d01b094639 100644
--- a/src/mame/misc/neomania.cpp
+++ b/src/mame/misc/neomania.cpp
@@ -1,6 +1,23 @@
 // license:BSD-3-Clause
 // copyright-holders:
-/*
+/**************************************************************************************************
+
+TODO:
+- SIGABRT in pcipc/pciagp trying to execute ppm.exe,
+  in shutms11 will draw "Parallel Port Manager v4.0" then fail on device check.
+\- "Testing I/O board connection"
+   bp 100027e2, edit $25dd11 = 0x02 (board identifier?)
+\- "Testing I/O board communications"
+   bp 10002942 (checks acknowledge from control bit 6 @ $37a, for 0xe0-0xe7. Buffers at $25dd48-4f)
+   Expected ack values: 40 40 00 00 40 00 40 00
+   bp 10002d57,1,{ebx=8;g} for a quick workaround
+\- "Testing I/O board input bits" / "BAD 0 1 2 3     7"
+   Goes ahead in checking each port r/w, TBD
+\- Fails win98 PS/2 PnP afterwards, which isn't supposed to be connected in the first place.
+- Extract "Guard.zip" and understand what is for;
+
+===================================================================================================
+
 Neo Mania:
  The Portuguese (Vila Nova de Gaia) company "Hyper M.A.R." created this machine on 2002 with 40 games,
  and updated it on 2003 increasing the number of games up to 48. There was a latest newer version
@@ -21,15 +38,10 @@ C:\Neomania folder contains ppm.exe, which is the driver for the parallel port d
 It also contains a password protected "Guard.zip", copy protection?
 C:\Windows has driver installs for:
 - a Sound Blaster AudioPCI 128
-- an ATI All-In-Wonder / All-In-Wonder Pro (with leftover "SYSTEM.I~I" footprint with "display.drv=ATI Rage IIC AGP (Português)").
-
-TODO:
-- HDD image doesn't boot in neither shutms11 nor pcipc, mangled MBR boot record or geometry params (has -chs 3532,16,38 but WinImage reports back ~20 GB partition?);
-- (With manually c&p files in a CHD that works) SIGABRT in pcipc trying to execute ppm.exe, in shutms11 will draw "Parallel Port Manager v4.0" then fail on device check;
-- Extract "Guard.zip" and understand what is for;
-
+- an ATI All-In-Wonder / All-In-Wonder Pro (with leftover "SYSTEM.I~I" footprint with
+  "display.drv=ATI Rage IIC AGP (Português)").
 
-*/
+**************************************************************************************************/
 
 #include "emu.h"
 #include "cpu/i386/i386.h"
diff --git a/src/mame/misc/vampire.cpp b/src/mame/misc/vampire.cpp
new file mode 100644
index 00000000000..2cb85dd3762
--- /dev/null
+++ b/src/mame/misc/vampire.cpp
@@ -0,0 +1,666 @@
+// license:BSD-3-Clause
+// copyright-holders:Tomasz Slanina
+/*
+
+Entertainment Enterprises Vampire
+
+TODO:
+- correct interrupt handling (main and sound cpu)
+- communication between main and audio cpu
+- PIT outputs
+- correct clocks
+- color decode
+- fix gfx glitches - extra pixels (column?) on edges (only when gfx is flipped)
+
+Hardware notes:
+
+MAIN CPU:
+ - 6809P, 8 MHz xtal
+ - NMI - main interrupt vector, currectly there's a hack (int vectors) to use standard irq/firq vectors
+         Currently NMI writes error messages to the terminal(?) output ($814, $815)
+
+VIDEO:
+ - custom blitter - ROM (256x512, 1bpp) -> VRAM (256x256, 4bpp?, double buffered?)
+ - blitter data (8 bytes long 'slots') stored in RAM, format:
+
+   0 - src address (ROM)
+   1 /
+   2 - 256 - height
+   3 - 32 - width (bytes)
+   4 - flags
+       76543210
+       x------- end of list
+       --x----- flip
+       -?-????? unknown (unused?)
+   5 - pen (0-15)
+   6 - dsty
+   7 - dstx
+
+- there's a base (x,y) offset for each blit($7fa-$7fb writes), write to this address triggers the blitter
+- blitter starts to copy gfx from the last accessed slot (even if ram is locked) and stops on the slot with 'end of list' bit set
+- blitter control ($7f8):
+
+  76543210
+  x------- flip screen
+  -x------ blitter ram lock
+  ---x---- front/back buffer (?)
+  --?-???? unknown
+
+AUDIO:
+- 6502 ? (empty socket)
+- 4MHz xtal near the cpu socket
+- IRQ - ?
+- NMI - triggered by main cpu, sound latch read
+- AY-3-8910
+- PPI (8253) - used to sync the audio
+- game works without the sound cpu
+
++-----------------------------------------------------------------------------------------------------------------------------------+
+|                                                                                                                                   |
+|                                           C                  D                   E                F          H          J         |
+|                                                                                                                                   |
+|               A             B         +-------+                           +------------+      +-------------+                     |
+|                                       |74LS14N|                           | MSM2128RS  |      |H1         1F|                     |
+|  +----+   +-------+     +-------+     +-------+                           |   22075    |      |  M5L2764K   |                   1 |
+|  |8Mhz|   |74LS123|     |74LS367|                                         +------------+      +-------------+                     |
+|  |xtal|   +-------+     +-------+     +-------+          +-------+        +------------+      +-------------+                     |
+|  +----+                               |74LS367|          |74LS367|        | MSM2128RS  |      |H2         2F|                   2 |
+|           +---------------------+     +-------+          +-------+        |   22075    |      |  M5L2764K   |                     |
++------+    |                     |                                         +------------+      +-------------+                     |
+|      |    |       HD68B09P      |     +-------+          +-------+        +------------+      +-------------+                     |
+|      |    |           JAPAN     |     |74LS04P|          |74LS139|        | MSM2128RS  |      |H3         3F|                   3 |
+|      |    +---------------------+     +-------+          +-------+        |   22075    |      |  M5L2764K   |                     |
+|      |                                                                    +------------+      +-------------+                     |
+|CONNEC|    +-------+   +---------+     +-------+          +-------+        +------------+      +-------------+                     |
+|TOR   |    |74LS04P|   |74LS245N |     |74LS00N|          |74LS138|        | MSM2128RS  |      |H4         4F|       +---------+   |
+|      |    +-------+   +---------+     +-------+          +-------+        |   22075    |      |  M5L2764K   |       |74LS273N | 4 |
+|RIBBON|                                                                    +------------+      +-------------+       +---------+   |
+|CABLE |    +-------+   +---------+      +-------+         +-------+                                                                |
+|      |    |74LS02N|   |74LS245N |      |74LS138|         |74LS08N|                            +-------+             +---------+   |
+|TO    |    +-------+   +---------+      +-------+         +-------+        +---------------+   |74LS166|             |74LS273N | 5 |
+|SECOND|                                                                    |P1           6E|   +-------+             +---------+   |
+|PCB   |    +-------+     +-------+     +-------+          +-------+        |   M5L2764K    |   +-------+  +-------+  +-------+     |
+|      |    |74LS74A|     |       |     |74LS32N|          |74LS30N|        +---------------+   |74LS161|  |74LS161|  |74LS138|   6 |
+|      |    +-------+     +-------+     +-------+          +-------+        +---------------+   +-------+  +-------+  +-------+     |
+|      |                                                                    |P2           7E|   +-------+  +-------+  +-------+     |
+|      |    +---------+   +-------+      +-------+                          |   M5L2764K    |   |74LS161|  |74LS161|  |74LS04P|   7 |
+|      |    |74LS130N |   |74LS173|      |74LS138|                          +---------------+   +-------+  +-------+  +-------+     |
++------+    +---------+   +-------+      +-------+      +------------+      +---------+  +-------+                                  |
+|                                                       | MSM2128RS  |      |74LS245N |  |74LS138|     +-------+      +-------+     |
+|                         +-------+     +-------+       |   22075    |      +---------+  +-------+     |74LS74A|      |74LS74A|   8 |
++------+                  |74LS139|     |74LS125|       +------------+                                 +-------+      +-------+     |
+|      |                  +-------+     +-------+                           +---------------------+                                 |
+|      |                                                                    |    EMPTY SOCKET     |    +-------+         +----+     |
+|      |                  +-------+    +---------+                          |most likely sound-cpu|    |74LS04P|         |4Mhz|   9 |
+|      |                  |74LS74A|    |M74LS373P|                          +---------------------+    +-------+         |xtal|     |
+|CONNEC|                  +-------+    +---------+                                                                       +----+     |
+|TOR   |                                                                                                                            |
+|      |    +-------+     +-------+    +------------+   +------------+      +-------+     +-------+    +---------+   +---------+    |
+|RIBBON|    |MC14053|     |74LS174|    | M5L8253P-5 |   |9D          |      |74LS367|     |74LS367|    |   SW2   |   |   SW1   | 10 |
+|CABLE |    +-------+     +-------+    |            |   |  M5L2732K  |      +-------+     +-------+    +---------+   +---------+    |
+|      |                               +------------+   +------------+                                                              |
+|TO    |                                                                   +---------+   +---------+   +---------+   +---------+    |
+|SECOND|                                                                   |74LS245N |   |74LS273N |   |74LS240N |   |74LS240N | 11 |
+|PCB   |                                                                   +---------+   +---------+   +---------+   +---------+    |
+|      |                                                                                                                            |
+|      |                                                                                                                            |
+|      |                                                                                                                            |
+|      |                                                                                                                            |
+|      |                      +----------------------+                     +---------+   +---------+   +---------+   +---------+    |
++------+                      |         SOUND        |                     |74LS244P |   |74LS240N |   |74LS240N |   |74LS240N | 12 |
+|                             |       AY-3-8910      |                     +---------+   +---------+   +---------+   +---------+    |
+|                             +----------------------+                                                                              |
+|                                                                                                                                   |
+|                 +----+                                                                                                            |
+|                 |3080|                                                                                                            |
+|                 +----+    +----+                +-------+                                                                         |
+|                           |3080|                |LM324N |                                                                      13 |
+|                           +----+                +-------+                                                                         |
+|                                                                                                                                   |
+|                                                                                                                                   |
+|                                                                                                                                   |
+|                                       +-----+B1            CONNECTOR             B22+-----+                                       |
+|                                       |     |||||||||||||||||||||||||||||||||||||||||     |        P1422-1                        |
++---------------------------------------+     +---------------------------------------+     +---------------------------------------+
+
+
+
++-----------------------------------------------------------------------------------------------------------------------------------+
+|          +---------+ A           B            C                D               E            F             G             H         |
+|          |60.00000 |         +-------+    +-------+        +-------+       +-------+                                              |
+|          |Mhz      |         |74S114N|    |74S20N |        |74S163N|       |74S04N |                                            1 |
+|          +---------+         +-------+    +-------+        +-------+       +-------+                                              |
+|                                                                                                                                   |
+|                 +-------+    +-------+     +-------+     +---------+       +-------+     +-------+     +-------+                  |
+|                 |74S04N |    |74S114N|     |74S163N|     |PAL12H6CJ|       |74S174N|     |74S04N |     |74LS74N|                2 |
+|                 +-------+    +-------+     +-------+     +---------+       +-------+     +-------+     +-------+                  |
+|                                                                   2D                                                              |
+|                 +-------+    +-------+    +-------+                        +-------+     +-------+     +-------+                  |
+|                 |74S174N|    |74S20N |    |74S08N |                        |74LS669|     |74LS107|     |74LS74A|                3 |
+|                 +-------+    +-------+    +-------+                        +-------+     +-------+     +-------+                  |
+|                                                                                                                                   |
++------+          +-------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+                  |
+|      |          |74S08N |    |PAL16R8CN|  |74LS161|        |74LS161|       |74LS138|     |74LS74A|     |74LS10N|                4 |
+|      |          +-------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+                  |
+|      |                                4B                                                                                          |
+|      |          +-------+    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|      |          |74S02N |    |74S195N|    |74LS161|        |74LS161|       |74LS08N|     |74LS04P|     |74LS86P|     |74153N |  5 |
+|CONNEC|          +-------+    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|TOR   |                                                                                                                            |
+|      |          +-------+    +-------+    +-------+      +---------+       +-------+     +-------+     +-------+     +-------+    |
+|RIBBON|          |74LS86P|    |74LS74A|    |74LS174|      |74LS374N |       |74LS161|     |74LS161|     |74LS86P|     |74153N |  6 |
+|CABLE |          +-------+    +-------+    +-------+      +---------+       +-------+     +-------+     +-------+     +-------+    |
+|      |                                                                                                                            |
+|TO    |          +-------+    +---------+  +-------+        +-------+                                   +-------+     +-------+    |
+|SECOND|          |74LS197|    |74LS374N |  |74LS669|        |74LS669|                                   |74LS86P|     |74153N |  7 |
+|PCB   |          +-------+    +---------+  +-------+        +-------+                                   +-------+     +-------+    |
+|      |                                                                                                                            |
+|      |          +-------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|      |          |74LS197|    |74LS374N |  |74LS669|        |74LS669|       |74LS669|     |74LS669|     |74LS86P|     |74153N |  8 |
+|      |          +-------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
++------+                                                                                                                            |
+|                 +-------+    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+                  |
+|                 |74LS197|    |74LS283|    |74LS174|        |74LS174|       |74LS74A|     |74LS74A|     |74LS00N|                9 |
++------+          +-------+    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+                  |
+|      |                                                                                                                            |
+|      |          +-------+    +-------+    +-------+      +---------+                                                              |
+|      |          |74LS74A|    |74LS283|    |74S194N|      |74LS377N |       +-------+     +-------+     +-------+     +-------+    |
+|      |          +-------+    +-------+    +-------+      +---------+       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 | 10 |
+|      |          +-------+    +--------+   +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|CONNEC|          |74LS32N|    |74LS374N|   |74S194N|        |74173N |       +-------+     +-------+     +-------+     +-------+    |
+|TOR   |          +-------+    +--------+   +-------+        +-------+       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 | 11 |
+|      |        +---------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|RIBBON|        |74LS245N |    |74LS374N |  |74LS04P|        |74173N |       +-------+     +-------+     +-------+     +-------+    |
+|CABLE |        +---------+    +---------+  +-------+        +-------+       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 | 12 |
+|      |                                                                     +-------+     +-------+     +-------+     +-------+    |
+|TO    |        +---------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|SECOND|        |74LS245N |    |74LS374N |  |74LS194|        |74Ls194|       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 | 13 |
+|PCB   |        +---------+    +---------+  +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|      |                                                                     +-------+     +-------+     +-------+     +-------+    |
+|      |     +------------+                                                  |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 |    |
+|      |     | M58725P-15 |    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|      |     |    JAPAN   |    |74LS157|    |74LS194|        |74Ls194|       +-------+     +-------+     +-------+     +-------+ 14 |
++------+     +------------+    +-------+    +-------+        +-------+       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 |    |
+|                                                                            +-------+     +-------+     +-------+     +-------+    |
+|            +------------+    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|            | M58725P-15 |    |74LS157|    |74LS194|        |74Ls194|       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 | 15 |
+|            |    JAPAN   |    +-------+    +-------+        +-------+       +-------+     +-------+     +-------+     +-------+    |
+|            +------------+                                                  +-------+     +-------+     +-------+     +-------+    |
+|                               +-------+   +-------+        +-------+       |MB8264 |     |MB8264 |     |MB8264 |     |MB8264 |    |
+|                    +-------+  |TB24S10|   |74LS194|        |74Ls194|       +-------+     +-------+     +-------+     +-------+ 16 |
+|                    |TB24S10|  +-------+   +-------+        +-------+                                                              |
+|                    +-------+        16B                                                                                           |
+|                          16A                                               P1422-2                                                |
++-----------------------------------------------------------------------------------------------------------------------------------+
+
+*/
+
+#include "emu.h"
+
+#include "cpu/m6809/m6809.h"
+#include "cpu/m6502/m6502.h"
+#include "machine/gen_latch.h"
+#include "machine/pit8253.h"
+#include "sound/ay8910.h"
+#include "sound/dac.h"
+
+#include "emupal.h"
+#include "screen.h"
+#include "speaker.h"
+
+
+namespace {
+
+class vampire_state : public driver_device
+{
+public:
+	vampire_state(const machine_config &mconfig, device_type type, const char *tag) :
+		driver_device(mconfig, type, tag),
+		m_maincpu(*this, "maincpu"),
+		m_audiocpu(*this,"audiocpu"),
+		m_soundlatch(*this, "soundlatch"),
+		m_palette(*this, "palette"),
+		m_gfxrom(*this, "gfx")
+	{ }
+
+	void vampire(machine_config &config);
+	void init_vampire();
+
+protected:
+	virtual void machine_start() override;
+
+private:
+	required_device<cpu_device> m_maincpu;
+	required_device<cpu_device> m_audiocpu;
+	required_device<generic_latch_8_device> m_soundlatch;
+	required_device<palette_device> m_palette;
+	required_region_ptr<u8> m_gfxrom;
+
+	struct
+	{
+		u8 base_x = 0;
+		u8 base_y = 0;
+
+		offs_t last_offset = 0;
+		u8 last_data = 0;
+
+		u8 flags = 0xff;
+
+		std::unique_ptr<u8[]> layer_1;
+		std::unique_ptr<u8[]> layer_2;
+		std::unique_ptr<u8[]> slots;
+	} m_blitter;
+
+	u8 m_pit_output = 0;
+
+	void palette(palette_device &palette) const;
+	u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+
+	u8 blitter_r(offs_t offset);
+	void blitter_w(offs_t offset, u8 data);
+	void blit_trigger(offs_t offset);
+
+	void vampire_memory(address_map &map);
+	void vampire_audio(address_map &map);
+
+	void pit_out_w0(int state);
+	void pit_out_w1(int state);
+	void pit_out_w2(int state);
+
+	u8 sound_sync_r();
+	u8 sound_ack_r();
+	void blitter_flags_w(u8 data);
+	void blitter_control_w(offs_t offset, u8 data);
+	u8 io814_r();
+	u8 io815_r();
+};
+
+void vampire_state::machine_start()
+{
+	m_blitter.layer_1 = make_unique_clear<u8[]>(256 * 256);
+	m_blitter.layer_2 = make_unique_clear<u8[]>(256 * 256);
+	m_blitter.slots = make_unique_clear<u8[]>(0x1000);
+
+	save_item(NAME(m_blitter.base_x));
+	save_item(NAME(m_blitter.base_y));
+	save_item(NAME(m_blitter.last_offset));
+	save_item(NAME(m_blitter.last_data));
+	save_item(NAME(m_blitter.flags));
+	save_pointer(NAME(m_blitter.layer_1), 256 * 256);
+	save_pointer(NAME(m_blitter.layer_2), 256 * 256);
+	save_pointer(NAME(m_blitter.slots), 0x1000);
+
+	save_item(NAME(m_pit_output));
+}
+
+
+
+/*******************************************************************************
+    Video
+*******************************************************************************/
+
+void vampire_state::palette(palette_device& palette) const
+{
+	u8 *proms = memregion("proms")->base();
+	for (int i = 0; i < 256; ++i)
+	{
+		int g = ((proms[i] & 0b00000011) >> 0) * 85;
+		int r = ((proms[i] & 0b00011100) >> 2) * 36;
+		int b = ((proms[i] & 0b11100000) >> 5) * 36;
+		palette.set_pen_color(i, rgb_t(r, g, b));
+	}
+}
+
+u32 vampire_state::screen_update(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect)
+{
+	// replace with data copy
+	for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
+	{
+		for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
+		{
+			bitmap.pix(y, x) = (m_blitter.flags & 0x10) ? m_blitter.layer_1[256 * y + x] : m_blitter.layer_2[256 * y + x];
+		}
+	}
+
+	return 0;
+}
+
+void vampire_state::blit_trigger(offs_t offset)
+{
+	u8 *ptr = (m_blitter.flags & 0x10) ? m_blitter.layer_2.get() : m_blitter.layer_1.get();
+	u32 index = offset >> 3; // start of the 8 byte-long slot
+
+	while (index < 0x200)
+	{
+		const u8 *slot = &m_blitter.slots[index << 3];
+
+		u32 desty = slot[6]; // pixels
+		const u32 destx = slot[7]; // pixels
+
+		const u32 start_offset = ((slot[0] << 8) | slot[1]) << 3; // start offset
+		const u8 pen = slot[5]; // 0xf is max used
+
+		const int32_t sy = 256 - slot[2]; // pixels
+		const int32_t sx = ((32 - slot[3])) << 3; // bytes (src ROM)
+
+		for (int yy = 0; yy < sy; ++yy)
+		{
+			for (int xx = 0; xx < sx; ++xx)
+			{
+				const u32 srcptr = start_offset + 256 * yy + xx;
+				const u32 dstptr = (desty + m_blitter.base_y) * 256 + destx + xx + m_blitter.base_x;
+
+				if (desty + m_blitter.base_y > 255 || destx + xx + m_blitter.base_x > 255)
+					continue;
+
+				u8 pix = 0;
+
+				if (dstptr < 256 * 256)
+					pix = m_gfxrom[(srcptr >> 3) & 0x3fff] & (1 << (7 - (srcptr & 7)));
+
+				// when source is above the 256x512 (ROM size) image = solid fill (rom read returns 0xff?
+				// could be handled by extended rom region, ff filled)
+				if (slot[0] & 0x80)
+					pix = 1;
+
+				if (pix)
+					ptr[dstptr] = pen;
+			}
+			desty += (slot[4] & 0x20) ? 1 : -1; // flip
+		}
+		if (slot[4] & 0x80)
+			break; // end mark
+
+		++index;
+	}
+}
+
+
+
+/*******************************************************************************
+    Main CPU I/O
+*******************************************************************************/
+
+void vampire_state::blitter_flags_w(u8 data)
+{
+	m_blitter.flags = data;
+}
+
+void vampire_state::blitter_control_w(offs_t offset, u8 data)
+{
+	if (!(offset & 1))
+	{
+		m_blitter.base_y = data;
+	}
+	else
+	{
+		m_blitter.base_x = data;
+		blit_trigger(m_blitter.last_offset);
+		m_maincpu->set_input_line(0, HOLD_LINE);
+	}
+}
+
+u8 vampire_state::sound_ack_r()
+{
+	return m_soundlatch->pending_r() << 7 ^ 0x80;
+}
+
+
+// Main CPU NMI
+u8 vampire_state::io814_r()
+{
+	// bit 1
+	return machine().rand();
+}
+
+u8 vampire_state::io815_r()
+{
+	return machine().rand();
+}
+
+
+u8 vampire_state::blitter_r(offs_t offset)
+{
+	return m_blitter.slots[offset];
+}
+
+void vampire_state::blitter_w(offs_t offset, u8 data)
+{
+	m_blitter.last_offset = offset;
+
+	if (m_blitter.flags & 0x40)
+	{
+		m_blitter.last_data = data; // not used?
+		return;
+	}
+
+	m_blitter.slots[offset] = data;
+}
+
+
+void vampire_state::vampire_memory(address_map &map)
+{
+	map(0x07f0, 0x07f0).portr("IN1");
+	map(0x07f1, 0x07f1).portr("IN2");
+	map(0x07f2, 0x07f2).portr("DSW1");
+	map(0x07f3, 0x07f3).portr("DSW2");
+	map(0x07f4, 0x07f4).w(m_soundlatch, FUNC(generic_latch_8_device::write));
+	map(0x07f5, 0x07f5).r(FUNC(vampire_state::sound_ack_r));
+	map(0x07f8, 0x07f8).w(FUNC(vampire_state::blitter_flags_w));
+	map(0x07fa, 0x07fb).w(FUNC(vampire_state::blitter_control_w));
+
+	map(0x0814, 0x0814).r(FUNC(vampire_state::io814_r));
+	map(0x0815, 0x0815).r(FUNC(vampire_state::io815_r));
+
+	map(0x1000, 0x1fff).r(FUNC(vampire_state::blitter_r)).w(FUNC(vampire_state::blitter_w));
+	map(0x2000, 0x3fff).ram();
+	map(0x8000, 0xffff).rom();
+}
+
+
+
+/*******************************************************************************
+    Audio CPU I/O
+*******************************************************************************/
+
+void vampire_state::pit_out_w0(int state)
+{
+	m_pit_output = state;
+}
+
+void vampire_state::pit_out_w1(int state)
+{
+	// unknown
+}
+
+void vampire_state::pit_out_w2(int state)
+{
+	// unknown
+}
+
+u8 vampire_state::sound_sync_r()
+{
+	return m_pit_output << 6;
+}
+
+void vampire_state::vampire_audio(address_map &map)
+{
+	map(0x0000, 0x03ff).ram();
+	map(0x4000, 0x4000).ram(); // unk write
+	map(0x6000, 0x6000).r(m_soundlatch, FUNC(generic_latch_8_device::read));
+	map(0x8000, 0x8000).w(m_soundlatch, FUNC(generic_latch_8_device::acknowledge_w));
+	map(0xa000, 0xa001).w("aysnd", FUNC(ay8910_device::data_address_w));
+	map(0xa008, 0xa00b).rw("pit", FUNC(pit8253_device::read), FUNC(pit8253_device::write));
+	map(0xa00c, 0xa00c).r(FUNC(vampire_state::sound_sync_r));
+	map(0xf000, 0xffff).rom();
+}
+
+
+
+/*******************************************************************************
+    Input Ports
+*******************************************************************************/
+
+static INPUT_PORTS_START( vampire )
+	PORT_START("DSW1")
+	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) )
+	PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
+	PORT_DIPSETTING(    0x02, DEF_STR( 4C_3C ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
+	PORT_DIPSETTING(    0x03, DEF_STR( 1C_3C ) )
+	PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coin_B ) )
+	PORT_DIPSETTING(    0x08, DEF_STR( 3C_1C ) )
+	PORT_DIPSETTING(    0x04, DEF_STR( 2C_1C ) )
+	PORT_DIPSETTING(    0x0c, DEF_STR( 4C_3C ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
+	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Lives ) )
+	PORT_DIPSETTING(    0x00, "3" )
+	PORT_DIPSETTING(    0x10, "5" )
+	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) // $d831
+	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x40, 0x40, "Infinite Time (Cheat)" )
+	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+
+	PORT_START("DSW2")
+	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
+	PORT_DIPSETTING(    0x01, DEF_STR( Upright ) )
+	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x80, 0x00, "Infinite Lives (Cheat)" )
+	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
+
+	PORT_START("IN1")
+	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
+	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 )
+	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )  PORT_PLAYER(1)
+	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
+	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN )  PORT_PLAYER(1)
+	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )    PORT_PLAYER(1)
+	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 )        PORT_PLAYER(1) // unused?
+	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 )        PORT_PLAYER(1)
+
+	PORT_START("IN2")
+	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START2 )
+	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
+	PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )  PORT_PLAYER(2)
+	PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
+	PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN)   PORT_PLAYER(2)
+	PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )    PORT_PLAYER(2)
+	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 )        PORT_PLAYER(2) // unused?
+	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 )        PORT_PLAYER(2)
+INPUT_PORTS_END
+
+
+
+/*******************************************************************************
+    Machine Configs
+*******************************************************************************/
+
+void vampire_state::vampire(machine_config &config)
+{
+	// basic machine hardware
+	MC6809(config, m_maincpu, 8_MHz_XTAL); // HD68B09P
+	m_maincpu->set_addrmap(AS_PROGRAM, &vampire_state::vampire_memory);
+
+	pit8253_device &pit(PIT8253(config, "pit", 0));
+	pit.set_clk<0>(4_MHz_XTAL/2);
+	pit.set_clk<1>(4_MHz_XTAL/2);
+	pit.set_clk<2>(4_MHz_XTAL/2);
+	pit.out_handler<0>().set(FUNC(vampire_state::pit_out_w0));
+	pit.out_handler<1>().set(FUNC(vampire_state::pit_out_w1));
+	pit.out_handler<2>().set(FUNC(vampire_state::pit_out_w2));
+
+	M6502(config, m_audiocpu, 4_MHz_XTAL/2);
+	m_audiocpu->set_addrmap(AS_PROGRAM, &vampire_state::vampire_audio);
+
+	// video hardware
+	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
+	screen.set_refresh_hz(60);
+	screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
+	screen.set_size(256, 256);
+	screen.set_visarea(0*8, 32*8 - 1, 2*8, 30*8 - 1);
+	screen.set_screen_update(FUNC(vampire_state::screen_update));
+	screen.screen_vblank().set_inputline(m_maincpu, M6809_FIRQ_LINE, HOLD_LINE);
+
+	screen.set_palette(m_palette);
+	PALETTE(config, m_palette, FUNC(vampire_state::palette), 256);
+
+	// sound hardware
+	GENERIC_LATCH_8(config, m_soundlatch);
+	m_soundlatch->set_separate_acknowledge(true);
+	m_soundlatch->data_pending_callback().set_inputline(m_audiocpu, INPUT_LINE_NMI);
+	m_soundlatch->data_pending_callback().append([this](int state) { if (state) machine().scheduler().perfect_quantum(attotime::from_usec(100)); });
+
+	SPEAKER(config, "speaker").front_center();
+	AY8910(config, "aysnd", 4_MHz_XTAL/4).add_route(ALL_OUTPUTS, "speaker", 0.5);
+}
+
+
+
+/*******************************************************************************
+    ROM Definitions
+*******************************************************************************/
+
+ROM_START( vampire )
+	ROM_REGION( 0x10000, "maincpu", 0 )
+	ROM_LOAD( "h1.1f", 0x8000, 0x2000, CRC(7e69ff9b) SHA1(85f6303803a0577f96b879e0b9d280a4f22cca8c) )
+	ROM_LOAD( "h2.2f", 0xa000, 0x2000, CRC(e94155f8) SHA1(f60d82d9204f7b13aa9be189ca74ca48bf9e879a) )
+	ROM_LOAD( "h3.3f", 0xc000, 0x2000, CRC(ce27dd90) SHA1(4edd8ba08f828a0c3c6eb21a2d9e0d1e53fac407) )
+	ROM_LOAD( "h4.4f", 0xe000, 0x2000, CRC(a25f00bc) SHA1(db445c1876b79c4d553d4f9cc881f41f68b6667c) )
+
+	ROM_REGION( 0x10000, "audiocpu", 0 )
+	ROM_LOAD( "9d", 0xf000, 0x1000, CRC(e13a7aef) SHA1(77a49cb0f3f037826a32bbfa8fab524f17895992) )
+
+	ROM_REGION( 0x4000, "gfx", 0 )
+	ROM_LOAD( "cg_p1.6e", 0x0000, 0x2000, CRC(042661a4) SHA1(58ed7c782a2486aa8c2c650d6d9e54929e5dd50b) )
+	ROM_LOAD( "cg_p2.7e", 0x2000, 0x2000, CRC(e9dd9dff) SHA1(8a9ad8659763a9c010d0b482af3a40978c02cec7) )
+
+	ROM_REGION( 0x0100, "proms", 0 )
+	ROM_LOAD_NIB_LOW(  "16a", 0x0000, 0x0100, CRC(bc60a2eb) SHA1(73b8f5f6eee90a4d59a5c62a6a342fa49185938c) )
+	ROM_LOAD_NIB_HIGH( "16b", 0x0000, 0x0100, CRC(aa6b627b) SHA1(556d6bab46419ce55dd254de9615981852be6e6f) )
+ROM_END
+
+void vampire_state::init_vampire()
+{
+	u8 *rom = memregion("maincpu")->base();
+
+	// hack interrupt vectors
+	rom[0xfff6] = rom[0xffe0];
+	rom[0xfff7] = rom[0xffe1];
+	rom[0xfff8] = rom[0xffe2];
+	rom[0xfff9] = rom[0xffe3];
+}
+
+} // anonymous namestate
+
+
+
+/*******************************************************************************
+    Drivers
+*******************************************************************************/
+
+// it is unclear if the game saw a wide release, or was only location tested
+GAME( 1983, vampire, 0, vampire, vampire, vampire_state, init_vampire, ROT90, "Entertainment Enterprises, Ltd.", "Vampire (prototype?)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_COLORS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/namco/namcond1.cpp b/src/mame/namco/namcond1.cpp
index 95bf2d5ba9d..1b9a92c51a9 100644
--- a/src/mame/namco/namcond1.cpp
+++ b/src/mame/namco/namcond1.cpp
@@ -242,11 +242,11 @@ class namcond1_state : public driver_device
 	required_shared_ptr<uint16_t> m_shared_ram;
 
 	uint8_t m_h8_irq5_enabled = 0;
-	uint16_t m_p8 = 0;
+	uint8_t m_p8 = 0;
 
-	uint16_t mcu_p7_read();
-	uint16_t mcu_pa_read();
-	void mcu_pa_write(uint16_t data);
+	uint8_t mcu_p7_read();
+	uint8_t mcu_pa_read();
+	void mcu_pa_write(uint8_t data);
 	uint16_t cuskey_r(offs_t offset);
 	void cuskey_w(offs_t offset, uint16_t data);
 	uint16_t printer_r();
@@ -441,17 +441,17 @@ static INPUT_PORTS_START( abcheck )
 INPUT_PORTS_END
 
 
-uint16_t namcond1_state::mcu_p7_read()
+uint8_t namcond1_state::mcu_p7_read()
 {
 	return 0xff;
 }
 
-uint16_t namcond1_state::mcu_pa_read()
+uint8_t namcond1_state::mcu_pa_read()
 {
 	return 0xff;
 }
 
-void namcond1_state::mcu_pa_write(uint16_t data)
+void namcond1_state::mcu_pa_write(uint8_t data)
 {
 	m_p8 = data;
 }
@@ -504,7 +504,6 @@ void namcond1_state::namcond1(machine_config &config)
 	m_mcu->read_porta().set(FUNC(namcond1_state::mcu_pa_read));
 	m_mcu->write_porta().set(FUNC(namcond1_state::mcu_pa_write));
 
-
 	config.set_maximum_quantum(attotime::from_hz(6000));
 
 	YGV608(config, m_ygv608, 0);
diff --git a/src/mame/namco/namcos10.cpp b/src/mame/namco/namcos10.cpp
index 66f5d79c246..d8aaed90e23 100644
--- a/src/mame/namco/namcos10.cpp
+++ b/src/mame/namco/namcos10.cpp
@@ -1359,7 +1359,7 @@ void namcos10_state::namcos10_mgexio(machine_config &config)
 	HOPPER(config, m_mgexio_hopper[2], attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
 
 	mgexio.port4_read_callback().set([this] (offs_t offset) {
-		uint16_t r = 0;
+		uint8_t r = 0;
 		r |= (m_mgexio_outputs[6] & 1); // divider sol (l) sensor
 		r |= (m_mgexio_outputs[7] & 1) << 1; //divider sol (r) sensor
 		return r;
@@ -1370,7 +1370,7 @@ void namcos10_state::namcos10_mgexio(machine_config &config)
 	});
 
 	mgexio.porta_read_callback().set([this] (offs_t offset) {
-		uint16_t r = 0b1111;
+		uint8_t r = 0b1111;
 
 		// update coin states
 		auto curtime = machine().time();
@@ -1395,11 +1395,11 @@ void namcos10_state::namcos10_mgexio(machine_config &config)
 		return r;
 	});
 
-	mgexio.port4_write_callback().set([this] (uint16_t data) {
+	mgexio.port4_write_callback().set([this] (uint8_t data) {
 		m_mgexio_outputs[8] = BIT(data, 6); // win lamp
 	});
 
-	mgexio.portb_write_callback().set([this] (uint16_t data) {
+	mgexio.portb_write_callback().set([this] (uint8_t data) {
 		m_mgexio_hopper[0]->motor_w(BIT(data, 0));
 		m_mgexio_hopper[1]->motor_w(BIT(data, 1));
 		m_mgexio_hopper[2]->motor_w(BIT(data, 4));
@@ -3260,18 +3260,18 @@ static INPUT_PORTS_START( mgexio_medal )
 	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
 
 	PORT_START("MGEXIO_SENSOR")
-	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Check Sensor(2)")
-	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Check Sensor(1)")
-	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Check Sensor(4)")
-	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Check Sensor(3)")
-	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Check Sensor(6)")
-	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Check Sensor(5)")
-	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Check Sensor(7)")
-	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_TILT )
+	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Check Sensor(2)")
+	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Check Sensor(1)")
+	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Check Sensor(4)")
+	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Check Sensor(3)")
+	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Check Sensor(6)")
+	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Check Sensor(5)")
+	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Check Sensor(7)")
+	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT )
 
 	PORT_START("MGEXIO_COIN")
-	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_NAME("Coin Sensor(L)") PORT_CHANGED_MEMBER(DEVICE_SELF, namcos10_state, mgexio_coin_start, 0)
-	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin Sensor(R)") PORT_CHANGED_MEMBER(DEVICE_SELF, namcos10_state, mgexio_coin_start, 1)
+	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_NAME("Coin Sensor(L)") PORT_CHANGED_MEMBER(DEVICE_SELF, namcos10_state, mgexio_coin_start, 0)
+	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin Sensor(R)") PORT_CHANGED_MEMBER(DEVICE_SELF, namcos10_state, mgexio_coin_start, 1)
 
 INPUT_PORTS_END
 
diff --git a/src/mame/namco/namcos10_exio.cpp b/src/mame/namco/namcos10_exio.cpp
index dfa55abd12f..8cd91f1c0be 100644
--- a/src/mame/namco/namcos10_exio.cpp
+++ b/src/mame/namco/namcos10_exio.cpp
@@ -208,13 +208,13 @@ void namcos10_mgexio_device::map(address_map &map)
 }
 
 template <int Port>
-uint16_t namcos10_mgexio_device::port_r()
+uint8_t namcos10_mgexio_device::port_r()
 {
 	return m_port_read[Port](0);
 }
 
 template <int Port>
-void namcos10_mgexio_device::port_w(uint16_t data)
+void namcos10_mgexio_device::port_w(uint8_t data)
 {
 	m_port_write[Port](data);
 }
diff --git a/src/mame/namco/namcos10_exio.h b/src/mame/namco/namcos10_exio.h
index d608c8012f1..f43547cbfd8 100644
--- a/src/mame/namco/namcos10_exio.h
+++ b/src/mame/namco/namcos10_exio.h
@@ -116,8 +116,8 @@ class namcos10_mgexio_device : public namcos10_exio_base_device
 private:
 	void map(address_map &map);
 
-	template <int Port> uint16_t port_r();
-	template <int Port> void port_w(uint16_t data);
+	template <int Port> uint8_t port_r();
+	template <int Port> void port_w(uint8_t data);
 
 	TIMER_CALLBACK_MEMBER(cpu_reset_timeout);
 
@@ -125,8 +125,8 @@ class namcos10_mgexio_device : public namcos10_exio_base_device
 	required_shared_ptr<uint16_t> m_ram;
 	required_device<nvram_device> m_nvram;
 
-	devcb_read16::array<7> m_port_read;
-	devcb_write16::array<7> m_port_write;
+	devcb_read8::array<7> m_port_read;
+	devcb_write8::array<7> m_port_write;
 
 	emu_timer *m_cpu_reset_timer;
 
diff --git a/src/mame/namco/namcos12.cpp b/src/mame/namco/namcos12.cpp
index 52659347f77..290ea9ce7c1 100644
--- a/src/mame/namco/namcos12.cpp
+++ b/src/mame/namco/namcos12.cpp
@@ -1178,9 +1178,9 @@ class namcos12_state : public driver_device
 	uint8_t s12_mcu_portB_r();
 	void s12_mcu_portB_w(uint8_t data);
 	uint8_t s12_mcu_p6_r();
-	uint16_t iob_p4_r();
-	uint16_t iob_p6_r();
-	void iob_p4_w(uint16_t data);
+	uint8_t iob_p4_r();
+	uint8_t iob_p6_r();
+	void iob_p4_w(uint8_t data);
 
 	required_device<psxcpu_device> m_maincpu;
 	required_device<ram_device> m_ram;
@@ -1212,9 +1212,7 @@ class namcos12_state : public driver_device
 	uint32_t m_ttt_val[2];
 	uint8_t m_sub_porta;
 	uint8_t m_sub_portb;
-
 	uint8_t m_jvssense;
-	uint8_t m_tssio_port_4;
 
 	void sharedram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
 	uint16_t sharedram_r(offs_t offset, uint16_t mem_mask = ~0);
@@ -1627,8 +1625,6 @@ void namcos12_state::machine_reset()
 	bankoffset_w(0,0,0xffff);
 
 	m_jvssense = 1;
-	m_tssio_port_4 = 0;
-
 	m_has_tektagt_dma = 0;
 }
 
@@ -1877,20 +1873,18 @@ void namcos12_state::jvsmap(address_map &map)
 	map(0xc000, 0xfb7f).ram();
 }
 
-uint16_t namcos12_state::iob_p4_r()
+uint8_t namcos12_state::iob_p4_r()
 {
-	return m_tssio_port_4;
+	return 0;
 }
 
-void namcos12_state::iob_p4_w(uint16_t data)
+void namcos12_state::iob_p4_w(uint8_t data)
 {
-	m_tssio_port_4 = data;
-
 	// bit 2 = SENSE line back to main (0 = asserted, 1 = dropped)
 	m_jvssense = (data & 0x04) ? 0 : 1;
 }
 
-uint16_t namcos12_state::iob_p6_r()
+uint8_t namcos12_state::iob_p6_r()
 {
 	// d4 is service button
 	uint8_t sb = (m_service_io->read() & 1) << 4;
diff --git a/src/mame/namco/namcos23.cpp b/src/mame/namco/namcos23.cpp
index 07884d40f1e..78cb76cf0ed 100644
--- a/src/mame/namco/namcos23.cpp
+++ b/src/mame/namco/namcos23.cpp
@@ -1818,7 +1818,6 @@ class namcos23_state : public driver_device
 	uint8_t m_sub_port8;
 	uint8_t m_sub_porta;
 	uint8_t m_sub_portb;
-	uint8_t m_tssio_port_4;
 	output_finder<8> m_lamps;
 };
 
@@ -3331,13 +3330,11 @@ void namcos23_state::s23h8rwmap(address_map &map)
 
 uint8_t namcos23_state::iob_p4_r()
 {
-	return m_tssio_port_4;
+	return 0;
 }
 
 void namcos23_state::iob_p4_w(uint8_t data)
 {
-	m_tssio_port_4 = data;
-
 	// bit 2 = SENSE line back to main (0 = asserted, 1 = dropped)
 	m_jvssense = (data & 0x04) ? 0 : 1;
 }
@@ -3759,7 +3756,6 @@ void namcos23_state::init_s23()
 	m_sub_port8 = 0x02;
 	m_sub_porta = 0;
 	m_sub_portb = 0x50;
-	m_tssio_port_4 = 0;
 	m_subcpu_running = false;
 	m_render.count[0] = m_render.count[1] = 0;
 	m_render.cur = 0;
diff --git a/src/mame/natsemi/icm3216.cpp b/src/mame/natsemi/icm3216.cpp
index d8623cae822..8cd01c054be 100644
--- a/src/mame/natsemi/icm3216.cpp
+++ b/src/mame/natsemi/icm3216.cpp
@@ -30,7 +30,7 @@
 // various hardware
 #include "machine/mc68681.h"
 #include "machine/mm58274c.h"
-//#include "machine/ncr5385.h"
+#include "machine/ncr5385.h"
 #include "machine/ns32081.h"
 #include "machine/ns32082.h"
 #include "machine/ns32202.h"
@@ -60,7 +60,7 @@ class icm3216_state : public driver_device
 		, m_duart(*this, "duart%u", 0U)
 		, m_serial(*this, "serial%u", 0U)
 		, m_iop(*this, "iop")
-		//, m_scsi(*this, "scsi:7:ncr5385")
+		, m_scsi(*this, "scsi:7:ncr5385")
 		, m_led(*this, "led%u", 1U)
 		, m_boot(*this, "boot")
 	{
@@ -106,7 +106,7 @@ class icm3216_state : public driver_device
 	required_device_array<rs232_port_device, 4> m_serial;
 
 	required_device<z80_device> m_iop;
-	//required_device<ncr5385_device> m_scsi;
+	required_device<ncr5385_device> m_scsi;
 
 	output_finder<5> m_led;
 
@@ -126,7 +126,9 @@ class icm3216_state : public driver_device
 	enum iop_status_mask : u8
 	{
 		IOP_IID = 0x07, // subchannel interrupt ID
-		IOP_IRS = 0x10, // interrupt request set
+		IOP_IRS = 0x10, // interrupt request
+		IOP_RST = 0x20, // scsi reset
+		IOP_ABT = 0x40, // scsi abort interrupt?
 		IOP_BSY = 0x80, // busy
 	};
 
@@ -254,7 +256,7 @@ void icm3216_state::iop_mem_map(address_map &map)
 	// c015 write 0x08
 	// c017 write 0x00 (after read16?, clear BSY?)
 
-	//map(0xc020, 0xc02f).m(m_scsi, FUNC(ncr5385_device::map));
+	map(0xc020, 0xc02f).m(m_scsi, FUNC(ncr5385_device::map));
 }
 
 void icm3216_state::iop_pio_map(address_map &map)
@@ -328,9 +330,6 @@ void icm3216_state::icm3216(machine_config &config)
 	NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr, false);
 	NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false);
 	NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false);
-#if 1
-	NSCSI_CONNECTOR(config, "scsi:7", scsi_devices, nullptr, false);
-#else
 	NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5385", NCR5385).machine_config(
 		[this](device_t *device)
 		{
@@ -341,7 +340,6 @@ void icm3216_state::icm3216(machine_config &config)
 			ncr5385.irq().set(*this, FUNC(icm3216_state::iop_int<2>));
 			ncr5385.dreq().set_inputline(m_iop, INPUT_LINE_NMI);
 		});
-#endif
 }
 
 void icm3216_state::parity_select_w(u8 data)
@@ -480,15 +478,22 @@ u8 icm3216_state::iop_r()
 
 void icm3216_state::iop_w(u8 data)
 {
+	/*
+	 * cmd  function
+	 *  0x00   write command pointer table (followed by address, lsb first)
+	 *  0x01   acknowledge interrupt
+	 *  0x02   reset i/o controller?
+	 *  0x03   scsi reset
+	 *  0x05   reset i/o controller?
+	 *  0x1n   start i/o subchannel n
+	 *  0x2n   abort i/o subchannel n
+	 */
 	LOG("iop_w 0x%02x (%s)\n", data, machine().describe_context());
 	m_iop_cmd = data;
 
-	if (false)
-	{
-		m_iop_sts |= IOP_BSY;
+	m_iop_sts |= IOP_BSY;
 
-		iop_int<1>(1);
-	}
+	iop_int<1>(1);
 }
 
 // iop interrupt vector bits
diff --git a/src/mame/nichibutsu/hrdvd.cpp b/src/mame/nichibutsu/hrdvd.cpp
index 6ffd06d4c38..0b040071fff 100644
--- a/src/mame/nichibutsu/hrdvd.cpp
+++ b/src/mame/nichibutsu/hrdvd.cpp
@@ -108,11 +108,11 @@ class hrdvd_state : public driver_device
 
 	void mpeg_dreq_w(int state);
 
-	uint16_t p6_r();
-	void p6_w(uint16_t data);
-	uint16_t pb_r();
-	void pb_w(uint16_t data);
-	void pa_w(uint16_t data);
+	uint8_t p6_r();
+	void p6_w(uint8_t data);
+	uint8_t pb_r();
+	void pb_w(uint8_t data);
+	void pa_w(uint8_t data);
 
 	uint8_t cs0_r(offs_t offset);
 	void cs0_w(offs_t offset, uint8_t data);
@@ -141,12 +141,12 @@ void hrdvd_state::mpeg_dreq_w(int state)
 	m_subcpu->set_input_line(H8_INPUT_LINE_DREQ0, m_mpeg_dreq && !(m_p6 & 0x04));
 }
 
-uint16_t hrdvd_state::p6_r()
+uint8_t hrdvd_state::p6_r()
 {
 	return m_p6;
 }
 
-void hrdvd_state::p6_w(uint16_t data)
+void hrdvd_state::p6_w(uint8_t data)
 {
 	u8 delta = data ^ m_p6;
 	m_p6 = data;
@@ -158,12 +158,12 @@ void hrdvd_state::p6_w(uint16_t data)
 	logerror("p6 %02x\n", m_p6);
 }
 
-uint16_t hrdvd_state::pb_r()
+uint8_t hrdvd_state::pb_r()
 {
 	return m_pb;
 }
 
-void hrdvd_state::pb_w(uint16_t data)
+void hrdvd_state::pb_w(uint8_t data)
 {
 	u8 delta = data ^ m_pb;
 	m_pb = (m_pb & 0xc0) | (data & 0x3f);
@@ -174,7 +174,7 @@ void hrdvd_state::pb_w(uint16_t data)
 		logerror("pb %02x\n", data);
 }
 
-void hrdvd_state::pa_w(uint16_t data)
+void hrdvd_state::pa_w(uint8_t data)
 {
 	u8 delta = data ^ m_pa;
 	m_pa = data;
diff --git a/src/mame/novag/primo.cpp b/src/mame/novag/primo.cpp
index d45e51989da..66144978c0e 100644
--- a/src/mame/novag/primo.cpp
+++ b/src/mame/novag/primo.cpp
@@ -385,7 +385,7 @@ void primo_state::primo(machine_config &config)
 
 	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_SVG));
 	screen.set_refresh_hz(60);
-	screen.set_size(1920/4, 606/4);
+	screen.set_size(1920/5, 606/5);
 	screen.set_visarea_full();
 
 	PWM_DISPLAY(config, m_led_pwm).set_size(2, 8);
diff --git a/src/mame/novag/sdiamond.cpp b/src/mame/novag/sdiamond.cpp
index 7b73db825f9..89bc8d01cef 100644
--- a/src/mame/novag/sdiamond.cpp
+++ b/src/mame/novag/sdiamond.cpp
@@ -156,7 +156,7 @@ void sdiamond_state::update_lcd()
 	for (int i = 0; i < 4; i++)
 	{
 		// LCD common is 0/1/Hi-Z
-		const u32 data = BIT(m_lcd_com, i + 4) ? (BIT(m_lcd_com, i) ? ~m_lcd_segs : m_lcd_segs) : 0;
+		const u16 data = BIT(m_lcd_com, i + 4) ? (BIT(m_lcd_com, i) ? ~m_lcd_segs : m_lcd_segs) : 0;
 		m_lcd_pwm->write_row(i, data);
 	}
 }
diff --git a/src/mame/pc/europc_kbd.cpp b/src/mame/pc/europc_kbd.cpp
index 5624dd7823f..7d1dd9762c1 100644
--- a/src/mame/pc/europc_kbd.cpp
+++ b/src/mame/pc/europc_kbd.cpp
@@ -24,8 +24,6 @@
 
 #include "cpu/m6805/m68705.h"
 
-#include "utf8.h"
-
 //**************************************************************************
 //  LLE KEYBOARD DEVICE
 //**************************************************************************
@@ -232,7 +230,7 @@ static INPUT_PORTS_START(europc_kbd)
 	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F11)) PORT_CODE(KEYCODE_F11)
 	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) PORT_CODE(KEYCODE_PLUS_PAD)
 	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_CODE(KEYCODE_MINUS_PAD)
-	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 2  " UTF8_DOWN) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_CODE(KEYCODE_2_PAD)
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(u8"Keypad 2  \u2193") PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_CODE(KEYCODE_2_PAD) // ↓
 	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 7  Home") PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_CODE(KEYCODE_7_PAD)
 	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('-') PORT_CHAR('_') PORT_CODE(KEYCODE_MINUS)
 	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('\'') PORT_CHAR('@') PORT_CODE(KEYCODE_QUOTE)
@@ -250,7 +248,7 @@ static INPUT_PORTS_START(europc_kbd)
 	PORT_START("COLUMN9")
 	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 0  Ins") PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_CODE(KEYCODE_0_PAD)
 	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F10)) PORT_CODE(KEYCODE_F10)
-	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 6  " UTF8_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_CODE(KEYCODE_6_PAD)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(u8"Keypad 6  \u2192") PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_CODE(KEYCODE_6_PAD) // →
 	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Scroll Lock  Break") PORT_CHAR(UCHAR_MAMEKEY(SCRLOCK)) PORT_CODE(KEYCODE_SLASH_PAD)
 	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 1  End") PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) PORT_CODE(KEYCODE_1_PAD)
 	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x08) PORT_CODE(KEYCODE_BACKSPACE)
@@ -261,8 +259,8 @@ static INPUT_PORTS_START(europc_kbd)
 	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) PORT_CODE(KEYCODE_RCONTROL)
 	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(UCHAR_MAMEKEY(F9)) PORT_CODE(KEYCODE_F9)
 	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 3  Pg Dn") PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) PORT_CODE(KEYCODE_3_PAD)
-	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 8  " UTF8_UP) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_CODE(KEYCODE_8_PAD)
-	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("Keypad 4  " UTF8_LEFT) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_CODE(KEYCODE_4_PAD)
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(u8"Keypad 8  \u2191") PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_CODE(KEYCODE_8_PAD) // ↑
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(u8"Keypad 4  \u2190") PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_CODE(KEYCODE_4_PAD) // ←
 	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR(0x0d) PORT_CODE(KEYCODE_ENTER)
 	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('=') PORT_CHAR('+') PORT_CODE(KEYCODE_EQUALS)
 	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CHAR('#') PORT_CHAR('~') PORT_CODE(KEYCODE_BACKSLASH) // to right of quote key
diff --git a/src/mame/pc/pcipc.cpp b/src/mame/pc/pcipc.cpp
index 668362d9811..bda654aafb8 100644
--- a/src/mame/pc/pcipc.cpp
+++ b/src/mame/pc/pcipc.cpp
@@ -587,7 +587,7 @@ void pcipc_state::pcipc(machine_config &config)
 	ISA16_SLOT(config, "isa4", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
 	ISA16_SLOT(config, "isa5", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
 
-	rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
+	rs232_port_device &serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
 	serport0.rxd_handler().set("board4:fdc37c93x", FUNC(fdc37c93x_device::rxd1_w));
 	serport0.dcd_handler().set("board4:fdc37c93x", FUNC(fdc37c93x_device::ndcd1_w));
 	serport0.dsr_handler().set("board4:fdc37c93x", FUNC(fdc37c93x_device::ndsr1_w));
@@ -654,7 +654,7 @@ void pcipc_state::pciagp(machine_config &config)
 	ISA16_SLOT(config, "isa3", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
 
 #if 0
-	rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
+	rs232_port_device &serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
 	serport0.rxd_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::rxd1_w));
 	serport0.dcd_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ndcd1_w));
 	serport0.dsr_handler().set("board4:w83977tf", FUNC(fdc37c93x_device::ndsr1_w));
diff --git a/src/mame/pc/pcipc_sis.cpp b/src/mame/pc/pcipc_sis.cpp
index 9fa42529dd5..1a7deaec051 100644
--- a/src/mame/pc/pcipc_sis.cpp
+++ b/src/mame/pc/pcipc_sis.cpp
@@ -112,7 +112,6 @@ void sis496_state::winbond_superio_config(device_t *device)
 
 void sis496_state::sis496(machine_config &config)
 {
-	// Basic machine hardware
 	I486DX4(config, m_maincpu, 75000000); // I486DX4, 75 or 100 Mhz
 	m_maincpu->set_addrmap(AS_PROGRAM, &sis496_state::main_map);
 	m_maincpu->set_addrmap(AS_IO, &sis496_state::main_io);
@@ -126,7 +125,7 @@ void sis496_state::sis496(machine_config &config)
 	ISA16_SLOT(config, "isa2", 0, "pci:05.0:isabus",  pc_isa16_cards, nullptr, false);
 	ISA16_SLOT(config, "isa3", 0, "pci:05.0:isabus",  pc_isa16_cards, nullptr, false);
 
-	rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, "logitech_mouse"));
+	rs232_port_device &serport0(RS232_PORT(config, "serport0", isa_com, "logitech_mouse"));
 	serport0.rxd_handler().set("board4:w83787f", FUNC(w83787f_device::rxd1_w));
 	serport0.dcd_handler().set("board4:w83787f", FUNC(w83787f_device::ndcd1_w));
 	serport0.dsr_handler().set("board4:w83787f", FUNC(w83787f_device::ndsr1_w));
diff --git a/src/mame/pc/sis630.cpp b/src/mame/pc/sis630.cpp
index 78b7d98a079..3bc3e8e1434 100644
--- a/src/mame/pc/sis630.cpp
+++ b/src/mame/pc/sis630.cpp
@@ -153,7 +153,13 @@
 #include "cpu/i386/i386.h"
 #include "bus/isa/isa_cards.h"
 #include "bus/pc_kbd/keyboards.h"
+#include "bus/rs232/hlemouse.h"
+#include "bus/rs232/null_modem.h"
+#include "bus/rs232/rs232.h"
+#include "bus/rs232/sun_kbd.h"
+#include "bus/rs232/terminal.h"
 #include "machine/intelfsh.h"
+#include "machine/it8705f.h"
 #include "machine/pci.h"
 #include "machine/sis5513_ide.h"
 #include "machine/sis630_host.h"
@@ -193,12 +199,44 @@ class sis630_state : public driver_device
 
 //  void main_io(address_map &map);
 //  void main_map(address_map &map);
+	static void ite_superio_config(device_t *device);
 };
 
 
 static INPUT_PORTS_START(sis630)
 INPUT_PORTS_END
 
+static void isa_com(device_slot_interface &device)
+{
+	device.option_add("microsoft_mouse", MSFT_HLE_SERIAL_MOUSE);
+	device.option_add("logitech_mouse", LOGITECH_HLE_SERIAL_MOUSE);
+	device.option_add("wheel_mouse", WHEEL_HLE_SERIAL_MOUSE);
+	device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE);
+	device.option_add("rotatable_mouse", ROTATABLE_HLE_SERIAL_MOUSE);
+	device.option_add("terminal", SERIAL_TERMINAL);
+	device.option_add("null_modem", NULL_MODEM);
+	device.option_add("sun_kbd", SUN_KBD_ADAPTOR);
+}
+
+static void isa_internal_devices(device_slot_interface &device)
+{
+	device.option_add("it8705f", IT8705F);
+}
+
+void sis630_state::ite_superio_config(device_t *device)
+{
+	it8705f_device &fdc = *downcast<it8705f_device *>(device);
+//  fdc.set_sysopt_pin(1);
+	fdc.irq1().set(":pci:01.0", FUNC(sis950_lpc_device::pc_irq1_w));
+	fdc.irq8().set(":pci:01.0", FUNC(sis950_lpc_device::pc_irq8n_w));
+	fdc.txd1().set(":serport0", FUNC(rs232_port_device::write_txd));
+	fdc.ndtr1().set(":serport0", FUNC(rs232_port_device::write_dtr));
+	fdc.nrts1().set(":serport0", FUNC(rs232_port_device::write_rts));
+	fdc.txd2().set(":serport1", FUNC(rs232_port_device::write_txd));
+	fdc.ndtr2().set(":serport1", FUNC(rs232_port_device::write_dtr));
+	fdc.nrts2().set(":serport1", FUNC(rs232_port_device::write_rts));
+}
+
 void sis630_state::sis630(machine_config &config)
 {
 	// Slot 1/Socket 370, Coppermine FC-PGA @ 500~850+/100 MHz or Celeron PPGA 300~600+ MHz
@@ -257,6 +295,24 @@ void sis630_state::sis630(machine_config &config)
 	// TODO: 1 parallel + 2 serial ports
 	// TODO: 1 game port ('7018?)
 
+	// TODO: move in MB implementations
+	// (some unsupported variants uses W83697HF, namely Gigabyte GA-6SMZ7)
+	ISA16_SLOT(config, "superio", 0, "pci:01.0:isabus", isa_internal_devices, "it8705f", true).set_option_machine_config("it8705f", ite_superio_config);
+
+	rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
+	serport0.rxd_handler().set("superio:it8705f", FUNC(it8705f_device::rxd1_w));
+	serport0.dcd_handler().set("superio:it8705f", FUNC(it8705f_device::ndcd1_w));
+	serport0.dsr_handler().set("superio:it8705f", FUNC(it8705f_device::ndsr1_w));
+	serport0.ri_handler().set("superio:it8705f", FUNC(it8705f_device::nri1_w));
+	serport0.cts_handler().set("superio:it8705f", FUNC(it8705f_device::ncts1_w));
+
+	rs232_port_device &serport1(RS232_PORT(config, "serport1", isa_com, nullptr));
+	serport1.rxd_handler().set("superio:it8705f", FUNC(it8705f_device::rxd2_w));
+	serport1.dcd_handler().set("superio:it8705f", FUNC(it8705f_device::ndcd2_w));
+	serport1.dsr_handler().set("superio:it8705f", FUNC(it8705f_device::ndsr2_w));
+	serport1.ri_handler().set("superio:it8705f", FUNC(it8705f_device::nri2_w));
+	serport1.cts_handler().set("superio:it8705f", FUNC(it8705f_device::ncts2_w));
+
 	// TODO: AMR (Audio/modem riser) + UPT (Panel Link-TV out), assume [E]ISA complaint, needs specific slot options
 //  ISA16_SLOT(config, "isa1", 0, "pci:01.0:isabus", pc_isa16_cards, nullptr, false);
 //  ISA16_SLOT(config, "isa2", 0, "pci:01.0:isabus", pc_isa16_cards, nullptr, false);
diff --git a/src/mame/pinball/idsa.cpp b/src/mame/pinball/idsa.cpp
index 331e00ae0a0..4b62c6c222b 100644
--- a/src/mame/pinball/idsa.cpp
+++ b/src/mame/pinball/idsa.cpp
@@ -1,5 +1,5 @@
 // license:BSD-3-Clause
-// copyright-holders:Ivan Vangelista, Robbbert
+// copyright-holders:Robbbert
 /***********************************************************************************************************************
 PINBALL
 IDSA pinballs
diff --git a/src/mame/rm/rm380z.cpp b/src/mame/rm/rm380z.cpp
index 7b32f30e7c1..f1b7bea783c 100644
--- a/src/mame/rm/rm380z.cpp
+++ b/src/mame/rm/rm380z.cpp
@@ -288,6 +288,9 @@ void rm380z_state_cos34::configure(machine_config &config)
 
 	m_screen->set_raw(8_MHz_XTAL, 512, 0, 320, 312, 0, 240);
 	PALETTE(config, "palette", palette_device::MONOCHROME_HIGHLIGHT);
+
+	SN74S262(config, m_rocg, 0);
+	m_rocg->set_palette("palette");
 }
 
 void rm380z_state_cos40::configure(machine_config &config)
@@ -335,17 +338,11 @@ void rm480z_state::configure(machine_config &config)
 ROM_START( rm380z34d ) // COS 3.4D/F
 	ROM_REGION( 0x10000, RM380Z_MAINCPU_TAG, ROMREGION_ERASEFF )
 	ROM_LOAD( "cos34d-f.bin", 0x0000, 0x1000, CRC(eb128b40) SHA1(c46f358fb76459987e41750d052995563f2f7d53))
-	// chargen ROM is undumped, afaik
-	ROM_REGION( 0x1680, "chargen", 0 )
-	ROM_LOAD( "ch3.raw", 0x0000, 0x1680, BAD_DUMP CRC(c223622b) SHA1(185ef24896419d7ff46f71a760ac217de3811684))
 ROM_END
 
 ROM_START( rm380z34e ) // COS 3.4E/M
 	ROM_REGION( 0x10000, RM380Z_MAINCPU_TAG, ROMREGION_ERASEFF )
 	ROM_LOAD( "cos34e-m.bin", 0x0000, 0x1000, CRC(20e2ddf4) SHA1(3177b28793d5a348c94fd0ae6393d74e2e9a8662))
-	// chargen ROM is undumped, afaik
-	ROM_REGION( 0x1680, "chargen", 0 )
-	ROM_LOAD( "ch3.raw", 0x0000, 0x1680, BAD_DUMP CRC(c223622b) SHA1(185ef24896419d7ff46f71a760ac217de3811684))
 ROM_END
 
 ROM_START( rm380z ) // COS 4.0B/M
diff --git a/src/mame/rm/rm380z.h b/src/mame/rm/rm380z.h
index 8da8469335a..b6c6de92b17 100644
--- a/src/mame/rm/rm380z.h
+++ b/src/mame/rm/rm380z.h
@@ -18,6 +18,7 @@ Research Machines RM 380Z
 #include "machine/keyboard.h"
 #include "machine/ram.h"
 #include "machine/wd_fdc.h"
+#include "video/sn74s262.h"
 
 #include "emupal.h"
 
@@ -37,7 +38,6 @@ class rm380z_state : public driver_device
 protected:
 	rm380z_state(const machine_config &mconfig, device_type type, const char *tag) :
 		driver_device(mconfig, type, tag),
-		m_chargen(*this, "chargen"),
 		m_maincpu(*this, RM380Z_MAINCPU_TAG),
 		m_screen(*this, "screen"),
 		m_messram(*this, RAM_TAG),
@@ -88,7 +88,6 @@ class rm380z_state : public driver_device
 	uint8_t m_port1 = 0;
 	uint8_t m_fbfe = 0;
 
-	required_region_ptr<u8> m_chargen;
 	required_device<cpu_device> m_maincpu;
 	optional_device<screen_device> m_screen;
 	optional_device<ram_device> m_messram;
@@ -103,6 +102,7 @@ class rm380z_state_cos34 : public rm380z_state
 public:
 	rm380z_state_cos34(const machine_config &mconfig, device_type type, const char *tag) :
 		rm380z_state(mconfig, type, tag),
+		m_rocg(*this, "sn74s262"),
 		m_cassette(*this, "cassette")
 	{
 	}
@@ -132,15 +132,11 @@ class rm380z_state_cos34 : public rm380z_state
 		uint8_t m_chars[ROWS][COLS];
 	};
 
-	static inline constexpr int RM380Z_CHDIMX = 5;
-	static inline constexpr int RM380Z_CHDIMY = 9;
-	static inline constexpr int RM380Z_NCX = 8;
-	static inline constexpr int RM380Z_NCY = 16;
-
 	void putChar_vdu40(int charnum, int x, int y, bitmap_ind16 &bitmap) const;
 
 	rm380z_vram<RM380Z_SCREENROWS, RM380Z_SCREENCOLS> m_vram;
 
+	required_device<sn74s262_device> m_rocg;
 	required_device<cassette_image_device> m_cassette;
 };
 
@@ -149,7 +145,8 @@ class rm380z_state_cos40 : public rm380z_state
 {
 public:
 	rm380z_state_cos40(const machine_config &mconfig, device_type type, const char *tag) :
-		rm380z_state(mconfig, type, tag)
+		rm380z_state(mconfig, type, tag),
+		m_chargen(*this, "chargen")
 	{
 	}
 
@@ -191,6 +188,8 @@ class rm380z_state_cos40 : public rm380z_state
 	int m_videomode = RM380Z_VIDEOMODE_80COL;
 	rm380z_vram<RM380Z_SCREENROWS, RM380Z_SCREENCOLS> m_vram;
 
+	required_region_ptr<u8> m_chargen;
+
 private:
 	void config_videomode();
 	void putChar_vdu80(int charnum, int attribs, int x, int y, bitmap_ind16 &bitmap) const;
diff --git a/src/mame/rm/rm380z_v.cpp b/src/mame/rm/rm380z_v.cpp
index f16f091214c..c75f361415f 100644
--- a/src/mame/rm/rm380z_v.cpp
+++ b/src/mame/rm/rm380z_v.cpp
@@ -287,20 +287,20 @@ void rm380z_state_cos40::putChar_vdu80(int charnum, int attribs, int x, int y, b
 
 void rm380z_state_cos34::putChar_vdu40(int charnum, int x, int y, bitmap_ind16 &bitmap) const
 {
-	if ((charnum > 0) && (charnum <= 0x7f))
+	if (charnum <= 0x7f)
 	{
-		// normal chars (base set)
-		int basex=RM380Z_CHDIMX*(charnum/RM380Z_NCY);
-		int basey=RM380Z_CHDIMY*(charnum%RM380Z_NCY);
-
 		// 5x9 characters are drawn in 8x10 grid
 		// with 1 pixel gap to the left, 2 pixel gap to the right, and 1 pixel gap at the bottom
-		for (int r=0;r<RM380Z_CHDIMY;r++)
+		for (int r=0; r < 9; r++)
 		{
-			for (int c=0;c<RM380Z_CHDIMX;c++)
+			uint8_t data = m_rocg->read(charnum, r);
+
+			for (int c=1; c < 6; c++, data <<= 1)
 			{
-				uint8_t chval = (m_chargen[((basey + r) * RM380Z_CHDIMX * RM380Z_NCX) + basex + c] == 0xff) ? 0 : 2;
-				bitmap.pix(y * (RM380Z_CHDIMY+1) + r, x * (RM380Z_CHDIMX+3) + c + 1) = chval;
+				if (data & 0x40)
+				{
+					bitmap.pix(y * 10 + r, x * 8 + c) = 2;
+				}
 			}
 		}
 	}
@@ -418,14 +418,6 @@ void rm380z_state_cos34::update_screen(bitmap_ind16 &bitmap) const
 		for (int col = 0; col < ncols; col++)
 		{
 			uint8_t curch = m_vram.get_char(row, col);
-			if (curch == 0)
-			{
-				// NUL character looked like 'O' when displayed and could be used instead of 'O'
-				// In fact the front panel writes 0x49, 0x00 to display "IO", and in COS 3.4
-				// displaying or typing 'O' actually writes 0x00 to vram.
-				// This hack is only necessary because we don't have the real 74LS262 charset ROM
-				curch = 'O';
-			}
 			putChar_vdu40(curch, col, row, bitmap);
 		}
 	}
diff --git a/src/mame/roland/roland_d70.cpp b/src/mame/roland/roland_d70.cpp
index 2180550542c..fd941d9a423 100755
--- a/src/mame/roland/roland_d70.cpp
+++ b/src/mame/roland/roland_d70.cpp
@@ -7,23 +7,28 @@
 
 ****************************************************************************/
 
+#include "emu.h"
+
 #include "bus/generic/carts.h"
 #include "bus/generic/slot.h"
 #include "bus/midi/midiinport.h"
 #include "bus/midi/midioutport.h"
 #include "cpu/mcs96/i8x9x.h"
 #include "cpu/mcs96/i8xc196.h"
-#include "emu.h"
-#include "emupal.h"
-#include "machine/ram.h"
 #include "machine/timer.h"
+#include "sound/rolandpcm.h"
+#include "video/t6963c.h"
+
+#include "emupal.h"
 #include "screen.h"
 #include "softlist_dev.h"
-#include "sound/rolandpcm.h"
 #include "speaker.h"
-#include "video/t6963c.h"
+
+#include "multibyte.h"
+
 #include <queue>
 
+
 namespace {
 
 // unscramble address: ROM dump offset -> proper (descrambled) offset
@@ -36,105 +41,121 @@ namespace {
 #define UNSCRAMBLE_DATA(_data) bitswap<8>(_data, 1, 2, 7, 3, 5, 0, 4, 6)
 
 // Bitmasks for the display board interface via PORT1
-static constexpr uint8_t CONT_MASK = 0b10000000;
-static constexpr uint8_t RW_MASK = 0b01000000;
-static constexpr uint8_t AD_MASK = 0b00100000;
-static constexpr uint8_t SCK_MASK = 0b00010000;
-static constexpr uint8_t SI_MASK = 0b00001000;
-static constexpr uint8_t SO_MASK = 0b00000100;
-static constexpr uint8_t ACK_MASK = 0b00000010;
-static constexpr uint8_t ENCO_MASK = 0b00000001;
+static constexpr u8 CONT_MASK = 0b10000000;
+static constexpr u8 RW_MASK   = 0b01000000;
+static constexpr u8 AD_MASK   = 0b00100000;
+static constexpr u8 SCK_MASK  = 0b00010000;
+static constexpr u8 SI_MASK   = 0b00001000;
+static constexpr u8 SO_MASK   = 0b00000100;
+static constexpr u8 ACK_MASK  = 0b00000010;
+static constexpr u8 ENCO_MASK = 0b00000001;
 
 static INPUT_PORTS_START(d70)
-  PORT_START("KEY0")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Performance") PORT_CODE(KEYCODE_K)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Patch") PORT_CODE(KEYCODE_L)
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Tone") PORT_CODE(KEYCODE_COLON)
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("A/B") PORT_CODE(KEYCODE_Q)
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Int/Card") PORT_CODE(KEYCODE_W)
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Command") PORT_CODE(KEYCODE_E)
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Write") PORT_CODE(KEYCODE_R)
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_T)
-
-  PORT_START("KEY1")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 1")
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 2")
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 3")
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 4")
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 5")
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 6")
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 7")
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 8")
-
-  PORT_START("KEY2")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 1") PORT_CODE(KEYCODE_1)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 2") PORT_CODE(KEYCODE_2)
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 3") PORT_CODE(KEYCODE_3)
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 4") PORT_CODE(KEYCODE_4)
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 5") PORT_CODE(KEYCODE_5)
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 6") PORT_CODE(KEYCODE_6)
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 7") PORT_CODE(KEYCODE_7)
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 8") PORT_CODE(KEYCODE_8)
-
-  PORT_START("KEY3")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Inc/Ins") PORT_CODE(KEYCODE_H)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Dec/Del") PORT_CODE(KEYCODE_J)
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("S") PORT_CODE(KEYCODE_DOWN)
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("A") PORT_CODE(KEYCODE_LEFT)
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("D") PORT_CODE(KEYCODE_RIGHT)
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("W") PORT_CODE(KEYCODE_UP)
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Midi Out") PORT_CODE(KEYCODE_N)
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Tone Display") PORT_CODE(KEYCODE_B)
-
-  PORT_START("KEY4")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_SLASH)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F5") PORT_CODE(KEYCODE_G)
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F4") PORT_CODE(KEYCODE_F)
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F3") PORT_CODE(KEYCODE_D)
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F2") PORT_CODE(KEYCODE_S)
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F1") PORT_CODE(KEYCODE_A)
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("User") PORT_CODE(KEYCODE_STOP)
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part") PORT_CODE(KEYCODE_COMMA)
-
-  PORT_START("KEY5")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_X)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Portamento")
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Resonance")
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Pan")
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Tuning") PORT_CODE(KEYCODE_V)
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Attack")
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Release")
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Pcm Card") PORT_CODE(KEYCODE_C)
-
-  PORT_START("KEY6")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Play") PORT_CODE(KEYCODE_Z)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Solo")
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Cutoff")
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Level")
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Upper 4")
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Upper 3")
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Lower 2")
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Lower 1")
-
-  PORT_START("KEY7")
-  PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x8, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x4, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x2, IP_ACTIVE_LOW, IPT_UNUSED)
-  PORT_BIT(0x1, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Effect/Ctrl") PORT_CODE(KEYCODE_M)
+	PORT_START("KEY0")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Performance") PORT_CODE(KEYCODE_K)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Patch") PORT_CODE(KEYCODE_L)
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Tone") PORT_CODE(KEYCODE_COLON)
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("A/B") PORT_CODE(KEYCODE_Q)
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Int/Card") PORT_CODE(KEYCODE_W)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Command") PORT_CODE(KEYCODE_E)
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Write") PORT_CODE(KEYCODE_R)
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Enter") PORT_CODE(KEYCODE_T)
+
+	PORT_START("KEY1")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 1")
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 2")
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 3")
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 4")
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 5")
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 6")
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 7")
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Bank 8")
+
+	PORT_START("KEY2")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 1") PORT_CODE(KEYCODE_1)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 2") PORT_CODE(KEYCODE_2)
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 3") PORT_CODE(KEYCODE_3)
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 4") PORT_CODE(KEYCODE_4)
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 5") PORT_CODE(KEYCODE_5)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 6") PORT_CODE(KEYCODE_6)
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 7") PORT_CODE(KEYCODE_7)
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Number 8") PORT_CODE(KEYCODE_8)
+
+	PORT_START("KEY3")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Inc/Ins") PORT_CODE(KEYCODE_H)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Dec/Del") PORT_CODE(KEYCODE_J)
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("S") PORT_CODE(KEYCODE_DOWN)
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("A") PORT_CODE(KEYCODE_LEFT)
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("D") PORT_CODE(KEYCODE_RIGHT)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("W") PORT_CODE(KEYCODE_UP)
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Midi Out") PORT_CODE(KEYCODE_N)
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Tone Display") PORT_CODE(KEYCODE_B)
+
+	PORT_START("KEY4")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Exit") PORT_CODE(KEYCODE_SLASH)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F5") PORT_CODE(KEYCODE_G)
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F4") PORT_CODE(KEYCODE_F)
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F3") PORT_CODE(KEYCODE_D)
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F2") PORT_CODE(KEYCODE_S)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("F1") PORT_CODE(KEYCODE_A)
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("User") PORT_CODE(KEYCODE_STOP)
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Part") PORT_CODE(KEYCODE_COMMA)
+
+	PORT_START("KEY5")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Edit") PORT_CODE(KEYCODE_X)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Portamento")
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Resonance")
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Pan")
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Tuning") PORT_CODE(KEYCODE_V)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Attack")
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Release")
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Pcm Card") PORT_CODE(KEYCODE_C)
+
+	PORT_START("KEY6")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Play") PORT_CODE(KEYCODE_Z)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Solo")
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Cutoff")
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Level")
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Upper 4")
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Upper 3")
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Lower 2")
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Lower 1")
+
+	PORT_START("KEY7")
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_UNUSED)
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Effect/Ctrl") PORT_CODE(KEYCODE_M)
 INPUT_PORTS_END
 
 class roland_d70_state : public driver_device {
 public:
-  roland_d70_state(const machine_config &mconfig, device_type type, const char *tag)
-	  : driver_device(mconfig, type, tag), m_cpu(*this, "maincpu"),
-		m_pcm(*this, "pcm"), m_lcd(*this, "lcd"), m_midi_timer(*this, "midi_timer"),
-		m_ram(*this, "ram"), m_dsp_ram(*this, "dsp_ram"), m_keys(*this, "KEY%u", 0),
-		sw_scan_index(0), sw_scan_bank(-1), sw_scan_state(0xFF), sw_scan_mode(0),
-		sw_scan_current_out(0xFF), m_midi_rx(0), m_midi_pos(0) {}
+	roland_d70_state(const machine_config &mconfig, device_type type, const char *tag) :
+		driver_device(mconfig, type, tag),
+		m_bank_view(*this, "bank"),
+		m_ram(*this, "ram", 128 * 1024, ENDIANNESS_LITTLE),
+		m_dsp_ram(*this, "dsp_ram", 8 * 1024, ENDIANNESS_LITTLE),
+		m_rom_bank(*this, "rom_bank"),
+		m_ram_bank(*this, "ram_bank"),
+		m_pcm_rom(*this, "pcm"),
+		m_cpu(*this, "maincpu"),
+		m_pcm(*this, "pcm"),
+		m_lcd(*this, "lcd"),
+		m_midi_timer(*this, "midi_timer"),
+		m_keys(*this, "KEY%u", 0),
+		m_sw_scan_index(0),
+		m_sw_scan_bank(-1),
+		m_sw_scan_state(0xff),
+		m_sw_scan_mode(0),
+		m_sw_scan_current_out(0xff),
+		m_midi_rx(0),
+		m_midi_pos(0)
+	{
+	}
 
 	void d70(machine_config &config);
 	void init_d70();
@@ -143,24 +164,15 @@ class roland_d70_state : public driver_device {
 	virtual void machine_start() override;
 
 private:
-	required_device<i8x9x_device> m_cpu;
-	required_device<mb87419_mb87420_device> m_pcm;
-	required_device<t6963c_device> m_lcd;
-	required_device<timer_device> m_midi_timer;
-	required_device<ram_device> m_ram;
-	required_device<ram_device> m_dsp_ram;
-	required_ioport_array<8> m_keys;
-
 	void lcd_map(address_map &map);
 	void lcd_palette(palette_device &palette) const;
 
-	void bank_w(uint8_t data);
+	void bank_w(u8 data);
 	u8 ksga_io_r(offs_t offset);
 	void ksga_io_w(offs_t offset, u8 data);
 	u16 port0_r();
 	u8 port1_r();
 	void port1_w(u8 data);
-	u8 pcmrom_r(offs_t offset);
 	u8 dsp_io_r(offs_t offset);
 	void dsp_io_w(offs_t offset, u8 data);
 	u8 tvf_io_r(offs_t offset);
@@ -184,27 +196,41 @@ class roland_d70_state : public driver_device {
 	void descramble_rom_internal(u8 *dst, const u8 *src);
 	void descramble_rom_external(u8 *dst, const u8 *src);
 
-	u8 sound_io_buffer[0x100];
-	u8 dsp_io_buffer[0x80];
-	int sw_scan_index;
-	int sw_scan_bank;
-	u8 sw_scan_state;
-	u8 sw_scan_mode;
-	u8 sw_scan_current_out;
+	memory_view m_bank_view;
+	memory_share_creator<u16> m_ram;
+	memory_share_creator<u8> m_dsp_ram;
+	required_memory_bank m_rom_bank;
+	required_memory_bank m_ram_bank;
+	required_region_ptr<u8> m_pcm_rom;
+	required_device<i8x9x_device> m_cpu;
+	required_device<mb87419_mb87420_device> m_pcm;
+	required_device<t6963c_device> m_lcd;
+	required_device<timer_device> m_midi_timer;
+	required_ioport_array<8> m_keys;
+
+	u8 m_sound_io_buffer[0x100];
+	u8 m_dsp_io_buffer[0x80];
+	int m_sw_scan_index;
+	int m_sw_scan_bank;
+	u8 m_sw_scan_state;
+	u8 m_sw_scan_mode;
+	u8 m_sw_scan_current_out;
 	u8 m_midi_rx;
 	int m_midi_pos;
 	std::queue<u8> midi_queue;
 };
 
 void roland_d70_state::machine_start() {
-	membank("bank")->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000);
-	membank("bank")->configure_entries(0x20, 2, m_ram->pointer(), 0x4000);
-	membank("bank")->configure_entries(0x30, 2, m_ram->pointer(), 0x4000);
-	membank("fixed")->set_base(m_ram->pointer());
+	m_bank_view.select(0);
+	m_rom_bank->configure_entries(0, 8, memregion("maincpu")->base(), 0x4000);
+	m_ram_bank->configure_entries(0, 2, &m_ram[0], 0x4000);
+	m_cpu->space(AS_PROGRAM).install_ram(0xc000, 0xffff, &m_ram[0]);
 }
 
-void roland_d70_state::bank_w(uint8_t data) {
-	membank("bank")->set_entry(data);
+void roland_d70_state::bank_w(u8 data) {
+	m_bank_view.select(BIT(data, 5));
+	m_rom_bank->set_entry(data & 0x07);
+	m_ram_bank->set_entry(data & 0x01);
 }
 
 u8 roland_d70_state::ksga_io_r(offs_t offset) {
@@ -252,86 +278,76 @@ u16 roland_d70_state::port0_r() {
 	return 0x00;
 }
 
-u8 roland_d70_state::roland_d70_state::port1_r() {
-	sw_scan_current_out = m_ram->read(0x0F);
-	// logerror("p1r %02x\n", sw_scan_current_out);
-	return sw_scan_current_out;
+u8 roland_d70_state::port1_r() {
+	m_sw_scan_current_out = m_ram[0x0f / 2] >> 8;
+	// logerror("p1r %02x\n", m_sw_scan_current_out);
+	return m_sw_scan_current_out;
 }
 
-void roland_d70_state::roland_d70_state::port1_w(u8 data) {
+void roland_d70_state::port1_w(u8 data) {
 	// logerror("p1w %02x\n", data);
-	// sw_scan_current_out = data & ~(SO_MASK);
+	// m_sw_scan_current_out = data & ~(SO_MASK);
 
 	if (data & RW_MASK) {
-	if ((data & CONT_MASK) && !(sw_scan_state & CONT_MASK)) {
-		sw_scan_index = 0;
-		sw_scan_bank += 1;
-	}
-
-	// Clock cycle
-	if ((data & SCK_MASK) && !(sw_scan_state & SCK_MASK)) {
-		if ((data & AD_MASK)) {
-		if (sw_scan_mode == 0) {
-			sw_scan_current_out &= ~(SO_MASK);
-		} else if (sw_scan_mode == 1) {
-			u8 buttonState = sw_scan_bank != -1 ? (m_keys[sw_scan_bank]->read() >> sw_scan_index) & 0x1 : 1;
+		if ((data & CONT_MASK) && !(m_sw_scan_state & CONT_MASK)) {
+			m_sw_scan_index = 0;
+			m_sw_scan_bank += 1;
+		}
 
-			if (buttonState) {
-			sw_scan_current_out |= SO_MASK;
+		// Clock cycle
+		if ((data & SCK_MASK) && !(m_sw_scan_state & SCK_MASK)) {
+			if ((data & AD_MASK)) {
+				if (m_sw_scan_mode == 0) {
+					m_sw_scan_current_out &= ~(SO_MASK);
+				} else if (m_sw_scan_mode == 1) {
+					u8 buttonState = m_sw_scan_bank != -1 ? BIT(m_keys[m_sw_scan_bank]->read(), m_sw_scan_index) : 1;
+
+					if (buttonState) {
+						m_sw_scan_current_out |= SO_MASK;
+					} else {
+						m_sw_scan_current_out &= ~(SO_MASK);
+					}
+					m_sw_scan_index += 1;
+				}
 			} else {
-			sw_scan_current_out &= ~(SO_MASK);
+				m_sw_scan_mode += 1;
 			}
-			sw_scan_index += 1;
 		}
-		} else {
-		sw_scan_mode += 1;
-		}
-	}
 	} else {
-	sw_scan_mode = 0;
-	sw_scan_index = 0;
-	sw_scan_bank = -1;
+		m_sw_scan_mode = 0;
+		m_sw_scan_index = 0;
+		m_sw_scan_bank = -1;
 	}
 
-	sw_scan_state = data;
+	m_sw_scan_state = data;
 
-	m_ram->write(0x0F, sw_scan_current_out);
-}
-
-u8 roland_d70_state::pcmrom_r(offs_t offset) {
-	const u8 *pcm_rom = memregion("pcm")->base();
-	// logerror("pcm read %x %x\n", offset, pcm_rom[offset]);
-	return pcm_rom[offset];
+	m_ram[0x0f / 2] = (m_ram[0x0f / 2] & 0x00ff) | (u16(m_sw_scan_current_out) << 8);
 }
 
 u8 roland_d70_state::dsp_io_r(offs_t offset) {
-	return dsp_io_buffer[offset];
+	return m_dsp_io_buffer[offset];
 }
 
 void roland_d70_state::dsp_io_w(offs_t offset, u8 data) {
-	dsp_io_buffer[offset] = data;
+	m_dsp_io_buffer[offset] = data;
 	// do read/write to some external memory, makes the RCC-CPU check pass.
 	// (routine at 0x4679)
 	switch (offset) {
-		case 0x04:
+	case 0x04:
 		// write to partials?? (written in loop at 0x4375)
 		break;
 
-		case 0x06: {
-		u8 *ram = m_dsp_ram->pointer();
-		offs_t ofs = data;
-		ram[0x000 | ofs] = dsp_io_buffer[0x00] & 0x03;
-		ram[0x100 | ofs] = dsp_io_buffer[0x01];
-		ram[0x200 | ofs] = dsp_io_buffer[0x02];
-		} break;
-
-		case 0x0A: {
-		const u8 *ram = m_dsp_ram->pointer();
-		offs_t ofs = data;
-		dsp_io_buffer[0x00] = ram[0x000 | ofs];
-		dsp_io_buffer[0x01] = ram[0x100 | ofs];
-		dsp_io_buffer[0x02] = ram[0x200 | ofs];
-		} break;
+	case 0x06:
+		m_dsp_ram[0x000 | data] = m_dsp_io_buffer[0x00] & 0x03;
+		m_dsp_ram[0x100 | data] = m_dsp_io_buffer[0x01];
+		m_dsp_ram[0x200 | data] = m_dsp_io_buffer[0x02];
+		break;
+
+	case 0x0a:
+		m_dsp_io_buffer[0x00] = m_dsp_ram[0x000 | data];
+		m_dsp_io_buffer[0x01] = m_dsp_ram[0x100 | data];
+		m_dsp_io_buffer[0x02] = m_dsp_ram[0x200 | data];
+		break;
 	}
 }
 
@@ -354,31 +370,26 @@ u8 roland_d70_state::snd_io_r(offs_t offset) {
 	// All this is just for making debugging easier, as it allows one to check the
 	// register state using the Memory Viewer.
 	if (offset == 0x01 || offset == 0x21)
-	offset ^= 0x20; // remove when PCM data readback via sound chip is confirmed
-					// to work
+		offset ^= 0x20; // remove when PCM data readback via sound chip is confirmed to work
 	if (offset < 0x20)
-	return m_pcm->read(offset);
+		return m_pcm->read(offset);
 	if (offset < 0x40)
-	offset -= 0x20;
+		offset -= 0x20;
 
 	if (offset == 0x01) {
-		// code for reading from the PCM sample table is at 0xB027
-		// The code at 0xB0AC writes to 1411/1F (??), then 1403/02 (bank), then
-		// 1409/08/0B/0A (address). It waits a few cycles and at 0xB0F7 it reads the
+		// code for reading from the PCM sample table is at 0xb027
+		// The code at 0xb0ac writes to 1411/1F (??), then 1403/02 (bank), then
+		// 1409/08/0b/0a (address). It waits a few cycles and at 0xb0f7 it reads the
 		// resulting data from 1401.
-		offs_t bank = sound_io_buffer[0x03];
-		offs_t addr = (sound_io_buffer[0x09] << 0) | (sound_io_buffer[0x0A] << 8) |
-						(sound_io_buffer[0x0B] << 16);
-		addr = ((addr >> 6) + 2) & 0x3FFFF;
+		offs_t bank = m_sound_io_buffer[0x03];
+		offs_t addr = get_u24le(&m_sound_io_buffer[0x09]);
+		addr = ((addr >> 6) + 2) & 0x3ffff;
 		addr |= (bank << 16);
 		// write actual ROM address to 1440..1443 for debugging
-		sound_io_buffer[0x43] = (addr >> 0) & 0xFF;
-		sound_io_buffer[0x42] = (addr >> 8) & 0xFF;
-		sound_io_buffer[0x41] = (addr >> 16) & 0xFF;
-		sound_io_buffer[0x40] = (addr >> 24) & 0xFF;
-		return pcmrom_r(addr);
+		put_u32be(&m_sound_io_buffer[40], addr);
+		return m_pcm_rom[addr];
 	}
-	return sound_io_buffer[offset];
+	return m_sound_io_buffer[offset];
 }
 
 void roland_d70_state::snd_io_w(offs_t offset, u8 data) {
@@ -398,7 +409,7 @@ void roland_d70_state::snd_io_w(offs_t offset, u8 data) {
 	if (offset < 0x20) {
 		m_pcm->write(offset, data);
 	}
-	sound_io_buffer[offset] = data;
+	m_sound_io_buffer[offset] = data;
 }
 
 u8 roland_d70_state::ach0_r() { return 128; }
@@ -418,13 +429,15 @@ void roland_d70_state::lcd_palette(palette_device &palette) const {
 void roland_d70_state::d70_map(address_map &map) {
 	map(0x0100, 0x0100).w(FUNC(roland_d70_state::bank_w));
 	map(0x0400, 0x07ff).rw(FUNC(roland_d70_state::ksga_io_r), FUNC(roland_d70_state::ksga_io_w));
-	map(0x0800, 0x0802).rw(m_lcd, FUNC(t6963c_device::read), FUNC(t6963c_device::write)).umask16(0x00FF);
+	map(0x0800, 0x0802).rw(m_lcd, FUNC(t6963c_device::read), FUNC(t6963c_device::write)).umask16(0x00ff);
 	map(0x0900, 0x09ff).rw(FUNC(roland_d70_state::snd_io_r), FUNC(roland_d70_state::snd_io_w));
 	map(0x0a00, 0x0aff).rw(FUNC(roland_d70_state::dsp_io_r), FUNC(roland_d70_state::dsp_io_w));
 	map(0x0c00, 0x0cff).rw(FUNC(roland_d70_state::tvf_io_r), FUNC(roland_d70_state::tvf_io_w));
-	map(0x1000, 0x7FFF).rom().region("maincpu", 0x1000);
-	map(0x8000, 0xbfff).bankrw("bank");
-	map(0xc000, 0xffff).bankrw("fixed");
+	map(0x1000, 0x7fff).rom().region("maincpu", 0x1000);
+	map(0x8000, 0xbfff).view(m_bank_view);
+	m_bank_view[0](0x8000, 0xbfff).bankr(m_rom_bank);
+	m_bank_view[1](0x8000, 0xbfff).bankrw(m_ram_bank);
+	//map(0xc000, 0xffff) fixed RAM - will install on start
 }
 
 void roland_d70_state::d70(machine_config &config) {
@@ -440,8 +453,6 @@ void roland_d70_state::d70(machine_config &config) {
 	maincpu.ach3_cb().set(FUNC(roland_d70_state::ach3_r));
 	maincpu.ach4_cb().set(FUNC(roland_d70_state::ach4_r));
 
-	RAM(config, m_ram).set_default_size("128K");
-
 	SPEAKER(config, "lspeaker").front_left();
 	SPEAKER(config, "rspeaker").front_right();
 
@@ -450,8 +461,6 @@ void roland_d70_state::d70(machine_config &config) {
 	m_pcm->add_route(0, "lspeaker", 1.0);
 	m_pcm->add_route(1, "rspeaker", 1.0);
 
-	RAM(config, m_dsp_ram).set_default_size("8K");
-
 	T6963C(config, m_lcd, 0);
 	m_lcd->set_addrmap(0, &roland_d70_state::lcd_map);
 
@@ -481,8 +490,8 @@ void roland_d70_state::init_d70() {
 	// Only the first 0x80 bytes of the ROMs are readable text in a raw dump.
 	// The U-110 actually checks some of these header bytes, but it uses
 	// post-scrambling variants of offsets/values.
-	u8 *src = static_cast<u8 *>(memregion("pcmorg")->base());
-	u8 *dst = static_cast<u8 *>(memregion("pcm")->base());
+	u8 *src = reinterpret_cast<u8 *>(memregion("pcmorg")->base());
+	u8 *dst = reinterpret_cast<u8 *>(memregion("pcm")->base());
 	// descramble internal ROMs
 	descramble_rom_internal(&dst[0x000000], &src[0x000000]);
 	descramble_rom_internal(&dst[0x100000], &src[0x100000]);
diff --git a/src/mame/saitek/chessac.cpp b/src/mame/saitek/chessac.cpp
index f2ba1b38c20..57d883b26e2 100644
--- a/src/mame/saitek/chessac.cpp
+++ b/src/mame/saitek/chessac.cpp
@@ -291,8 +291,8 @@ void chessac_state::p7_w(u8 data)
 
 static INPUT_PORTS_START( chessac )
 	PORT_START("IN.0")
-	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) PORT_NAME("Yes") PORT_CODE(KEYCODE_F1) // combine for NEW GAME
-	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_NAME("No") PORT_CODE(KEYCODE_F1) // "
+	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) PORT_CODE(KEYCODE_F1) PORT_NAME("Yes") // combine for NEW GAME
+	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_CODE(KEYCODE_F1) PORT_NAME("No")  // "
 	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_P) PORT_NAME("Position")
 	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_NAME("Hint / Info")
 	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(KEYCODE_B) PORT_NAME("Fwd / Black")
@@ -373,7 +373,7 @@ void chessac_state::chessac(machine_config &config)
 *******************************************************************************/
 
 ROM_START( chessac )
-	ROM_REGION( 0x8000, "maincpu", 0 )
+	ROM_REGION16_BE( 0x8000, "maincpu", 0 )
 	ROM_LOAD("97_saitek_86165400831_hd6433214a08f.u1", 0x0000, 0x8000, CRC(29d06d6a) SHA1(08b6f4093b240b0a34d9da67c9acffc576ba1d2d) )
 
 	ROM_REGION( 0x400000, "adpcm", 0 )
diff --git a/src/mame/saitek/gk2000.cpp b/src/mame/saitek/gk2000.cpp
index 1c0f4d16dc0..be6c61368d7 100644
--- a/src/mame/saitek/gk2000.cpp
+++ b/src/mame/saitek/gk2000.cpp
@@ -89,7 +89,7 @@ class gk2000_state : public driver_device
 
 	void p2_w(u8 data);
 	u8 p4_r();
-	void p5_w(offs_t offset, u8 data, u8 mem_mask);
+	void p5_w(u8 data);
 };
 
 void gk2000_state::machine_start()
@@ -198,10 +198,8 @@ u8 gk2000_state::p4_r()
 	return ~data;
 }
 
-void gk2000_state::p5_w(offs_t offset, u8 data, u8 mem_mask)
+void gk2000_state::p5_w(u8 data)
 {
-	data |= ~mem_mask;
-
 	// P50: speaker out
 	m_dac->write(data & 1);
 
diff --git a/src/mame/saitek/prisma.cpp b/src/mame/saitek/prisma.cpp
index 71c286da2b8..b26b6101029 100644
--- a/src/mame/saitek/prisma.cpp
+++ b/src/mame/saitek/prisma.cpp
@@ -354,7 +354,7 @@ void prisma_state::prisma(machine_config &config)
 *******************************************************************************/
 
 ROM_START( prisma )
-	ROM_REGION( 0x8000, "maincpu", 0 )
+	ROM_REGION16_BE( 0x8000, "maincpu", 0 )
 	ROM_LOAD("90_saitek_86051150st9_3258l02p.u1", 0x0000, 0x8000, CRC(b6f8384f) SHA1(a4e8a4a45009c15bda1778512a87dea756aae6d8) )
 
 	ROM_REGION( 795951, "screen", 0 )
diff --git a/src/mame/sega/flashbeats.cpp b/src/mame/sega/flashbeats.cpp
index 490dd678c91..19b3ea80886 100644
--- a/src/mame/sega/flashbeats.cpp
+++ b/src/mame/sega/flashbeats.cpp
@@ -56,8 +56,8 @@ class flashbeats_state : public driver_device
 	virtual void machine_reset() override;
 
 	void scsp_irq(offs_t offset, uint8_t data);
-	uint16_t p6_r();
-	void p6_w(uint16_t data);
+	uint8_t p6_r();
+	void p6_w(uint8_t data);
 
 	required_device<h83007_device> m_maincpu;
 	required_device<m68000_device> m_scspcpu;
@@ -82,12 +82,12 @@ uint32_t flashbeats_state::screen_update(screen_device &screen, bitmap_rgb32 &bi
 	return 0;
 }
 
-uint16_t flashbeats_state::p6_r()
+uint8_t flashbeats_state::p6_r()
 {
 	return (m_eeprom->do_read() << 3);
 }
 
-void flashbeats_state::p6_w(uint16_t data)
+void flashbeats_state::p6_w(uint8_t data)
 {
 	m_eeprom->clk_write((data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
 	m_eeprom->di_write((data >> 2) & 1);
diff --git a/src/mame/seibu/wiz.cpp b/src/mame/seibu/wiz.cpp
index a958347a22f..cb12aa52420 100644
--- a/src/mame/seibu/wiz.cpp
+++ b/src/mame/seibu/wiz.cpp
@@ -1552,7 +1552,7 @@ GAME( 1983, finger,   stinger, stinger, stinger2, stinger_state, init_stinger, R
 GAME( 1984, scion,    0,       scion,   scion,    stinger_state, empty_init,   ROT0,   "Seibu Denshi",                         "Scion",                       MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_COLORS | MACHINE_SUPPORTS_SAVE )
 GAME( 1984, scionc,   scion,   scion,   scion,    stinger_state, empty_init,   ROT0,   "Seibu Denshi (Cinematronics license)", "Scion (Cinematronics)",       MACHINE_IMPERFECT_SOUND | MACHINE_IMPERFECT_COLORS | MACHINE_SUPPORTS_SAVE )
 GAME( 1984, kungfut,  0,       kungfut, kungfut,  wiz_state,     empty_init,   ROT0,   "Seibu Kaihatsu",                       "Kung-Fu Taikun (set 1)",      MACHINE_SUPPORTS_SAVE | MACHINE_NODEVICE_MICROPHONE )
-GAME( 1984, kungfuta, kungfut, kungfuta,kungfut,  wiz_state,     empty_init,   ROT0,   "Seibu Kaihatsu",                       "Kung-Fu Taikun (set 2)",      MACHINE_SUPPORTS_SAVE | MACHINE_NODEVICE_MICROPHONE ) /* board was a bootleg but set might still be original */
+GAME( 1984, kungfuta, kungfut, kungfuta,kungfut,  wiz_state,     empty_init,   ROT0,   "Seibu Kaihatsu",                       "Kung-Fu Taikun (set 2)",      MACHINE_SUPPORTS_SAVE | MACHINE_NODEVICE_MICROPHONE ) // board was a bootleg but set might still be original
 GAME( 1985, wiz,      0,       wiz,     wiz,      wiz_state,     empty_init,   ROT270, "Seibu Kaihatsu",                       "Wiz",                         MACHINE_SUPPORTS_SAVE )
 GAME( 1985, wizt,     wiz,     wiz,     wiz,      wiz_state,     empty_init,   ROT270, "Seibu Kaihatsu (Taito license)",       "Wiz (Taito, set 1)",          MACHINE_SUPPORTS_SAVE )
 GAME( 1985, wizta,    wiz,     wiz,     wiz,      wiz_state,     empty_init,   ROT270, "Seibu Kaihatsu (Taito license)",       "Wiz (Taito, set 2)",          MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/seta/seta2.cpp b/src/mame/seta/seta2.cpp
index 3df4e7d4478..6141d08778f 100644
--- a/src/mame/seta/seta2.cpp
+++ b/src/mame/seta/seta2.cpp
@@ -851,7 +851,7 @@ void funcube_state::funcube_sub_map(address_map &map)
 
 #define FUNCUBE_SUB_CPU_CLOCK (XTAL(14'745'600))
 
-uint16_t funcube_state::coins_r()
+uint8_t funcube_state::coins_r()
 {
 	uint8_t ret = ioport("SWITCH")->read();
 	uint8_t coin_bit0 = 1; // active low
@@ -886,7 +886,7 @@ void funcube_state::funcube_debug_outputs()
 	//popmessage("LED: %02x OUT: %02x", m_funcube_leds, m_outputs);
 }
 
-void funcube_state::leds_w(uint16_t data)
+void funcube_state::leds_w(uint8_t data)
 {
 	m_funcube_leds = data;
 
@@ -902,13 +902,13 @@ void funcube_state::leds_w(uint16_t data)
 	funcube_debug_outputs();
 }
 
-uint16_t funcube_state::outputs_r()
+uint8_t funcube_state::outputs_r()
 {
 	// Bits 1,2,3 read
 	return m_outputs;
 }
 
-void funcube_state::outputs_w(uint16_t data)
+void funcube_state::outputs_w(uint8_t data)
 {
 	m_outputs = data;
 
@@ -925,7 +925,7 @@ void funcube_state::outputs_w(uint16_t data)
 	funcube_debug_outputs();
 }
 
-uint16_t funcube_state::battery_r()
+uint8_t funcube_state::battery_r()
 {
 	return ioport("BATTERY")->read() ? 0x40 : 0x00;
 }
diff --git a/src/mame/seta/seta2.h b/src/mame/seta/seta2.h
index 9ac8fe56bff..60ede6f027a 100644
--- a/src/mame/seta/seta2.h
+++ b/src/mame/seta/seta2.h
@@ -187,11 +187,11 @@ class funcube_state : public seta2_state
 	void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset] = data; }
 
 	uint32_t debug_r();
-	uint16_t coins_r();
-	void leds_w(uint16_t data);
-	uint16_t outputs_r();
-	void outputs_w(uint16_t data);
-	uint16_t battery_r();
+	uint8_t coins_r();
+	void leds_w(uint8_t data);
+	uint8_t outputs_r();
+	void outputs_w(uint8_t data);
+	uint8_t battery_r();
 
 	TIMER_DEVICE_CALLBACK_MEMBER(funcube_interrupt);
 
@@ -201,7 +201,7 @@ class funcube_state : public seta2_state
 
 	void funcube_debug_outputs();
 
-	uint16_t m_outputs, m_funcube_leds;
+	uint8_t m_outputs, m_funcube_leds;
 	uint64_t m_coin_start_cycles = 0;
 	uint8_t m_hopper_motor = 0;
 };
diff --git a/src/mame/skeleton/qmquasar.cpp b/src/mame/skeleton/qmquasar.cpp
new file mode 100644
index 00000000000..fc360b5f0c3
--- /dev/null
+++ b/src/mame/skeleton/qmquasar.cpp
@@ -0,0 +1,150 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/***************************************************************************
+
+    Skeleton driver for Quasimidi Quasar & TechnoX synthesizer modules.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "cpu/mcs51/mcs51.h"
+#include "machine/6850acia.h"
+#include "video/hd44780.h"
+#include "emupal.h"
+#include "screen.h"
+
+namespace {
+
+class qmquasar_state : public driver_device
+{
+public:
+	qmquasar_state(const machine_config &mconfig, device_type type, const char *tag)
+		: driver_device(mconfig, type, tag)
+		, m_maincpu(*this, "maincpu")
+	{
+	}
+
+	void quasar(machine_config &config);
+	void technox(machine_config &config);
+
+protected:
+	virtual void driver_start() override;
+
+private:
+	HD44780_PIXEL_UPDATE(quasar_pixel_update);
+	HD44780_PIXEL_UPDATE(technox_pixel_update);
+
+	void prog_map(address_map &map);
+	void ext_map(address_map &map);
+
+	required_device<mcs51_cpu_device> m_maincpu;
+};
+
+HD44780_PIXEL_UPDATE(qmquasar_state::quasar_pixel_update)
+{
+	if (x < 5 && y < 8 && line < 2 && pos < 40)
+		bitmap.pix(line * 8 + y, pos * 6 + x) = state;
+}
+
+HD44780_PIXEL_UPDATE(qmquasar_state::technox_pixel_update)
+{
+	if (x < 5 && y < 8 && line < 2 && pos < 16)
+		bitmap.pix(line * 8 + y, pos * 6 + x) = state;
+}
+
+
+void qmquasar_state::prog_map(address_map &map)
+{
+	map(0x0000, 0xffff).rom().region("program", 0); // TODO: banking?
+}
+
+void qmquasar_state::ext_map(address_map &map)
+{
+	map(0x0000, 0x38ff).ram();
+	map(0x3900, 0x3903).nopr();
+	map(0x390b, 0x390b).nopr();
+	map(0x7c00, 0x7fff).noprw();
+	map(0x8000, 0x8003).noprw();
+	map(0xa000, 0xa001).w("acia", FUNC(acia6850_device::write));
+	map(0xa002, 0xa003).r("acia", FUNC(acia6850_device::read));
+	map(0xb000, 0xb001).w("lcdc", FUNC(hd44780_device::write));
+	map(0xb002, 0xb003).r("lcdc", FUNC(hd44780_device::read));
+	map(0xc000, 0xc0ff).nopw();
+	map(0xff10, 0xff10).noprw();
+}
+
+
+static INPUT_PORTS_START(qmquasar)
+INPUT_PORTS_END
+
+void qmquasar_state::quasar(machine_config &config)
+{
+	I8032(config, m_maincpu, 12'000'000); // exact type and clock unknown
+	m_maincpu->set_addrmap(AS_PROGRAM, &qmquasar_state::prog_map);
+	m_maincpu->set_addrmap(AS_IO, &qmquasar_state::ext_map);
+
+	acia6850_device &acia(ACIA6850(config, "acia"));
+	acia.irq_handler().set_inputline(m_maincpu, MCS51_INT1_LINE);
+
+	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD));
+	screen.set_refresh_hz(60);
+	screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
+	screen.set_screen_update("lcdc", FUNC(hd44780_device::screen_update));
+	screen.set_size(6*40, 8*2);
+	screen.set_visarea_full();
+	screen.set_palette("palette");
+
+	PALETTE(config, "palette", palette_device::MONOCHROME_INVERTED);
+
+	hd44780_device &lcdc(HD44780(config, "lcdc", 270'000)); // TODO: clock not measured, datasheet typical clock used
+	lcdc.set_lcd_size(2, 40);
+	lcdc.set_pixel_update_cb(FUNC(qmquasar_state::quasar_pixel_update));
+}
+
+void qmquasar_state::technox(machine_config &config)
+{
+	quasar(config);
+
+	subdevice<screen_device>("screen")->set_size(6*16, 8*2);
+	subdevice<screen_device>("screen")->set_visarea_full();
+
+	subdevice<hd44780_device>("lcdc")->set_lcd_size(2, 16);
+	subdevice<hd44780_device>("lcdc")->set_pixel_update_cb(FUNC(qmquasar_state::technox_pixel_update));
+}
+
+
+ROM_START(qmquasar)
+	ROM_REGION(0x20000, "program", 0)
+	ROM_LOAD("27c1000_v200.ic4", 0x00000, 0x20000, CRC(951363bd) SHA1(6dfb2fa362afd8da0fb764108b6263d9da45c676)) // "Version No: 2.00"
+
+	ROM_REGION(0x40000, "samples", 0)
+	ROM_LOAD("27c020_v200d.ic51", 0x00000, 0x40000, CRC(ef318407) SHA1(e147413d5df2f9489c2886587ae60f6807b7dbb9))
+ROM_END
+
+ROM_START(technox)
+	ROM_REGION(0x20000, "program", 0)
+	ROM_LOAD("mx27c1000_v105.ic4", 0x00000, 0x20000, CRC(4d393cd9) SHA1(9ee853f1f2e88fbfc86589c4d0f91003d0ff146f)) // "Version No 1.05b"
+
+	ROM_REGION(0x20000, "samples", 0)
+	ROM_LOAD("nm27c010_v105.ic51", 0x00000, 0x20000, CRC(d669570e) SHA1(0645a1b022ed25a836152933e6df32da4448f49a))
+ROM_END
+
+void qmquasar_state::driver_start()
+{
+	memory_region *rgn = memregion("program");
+	u8 *rom = rgn->base();
+
+	for (offs_t base = 0x00000; base < rgn->bytes(); base += 0x100)
+	{
+		// Copy 256-byte block before descrambling addresses
+		std::vector<uint8_t> orig(&rom[base], &rom[base + 0x100]);
+
+		for (offs_t offset = 0; offset < 0x100; offset++)
+			rom[base + offset] = orig[bitswap<8>(offset, 1, 2, 3, 6, 5, 7, 1, 0) ^ 0x40 ^ ((offset & 0x11) << 3)];
+	}
+}
+
+} // anonymous namespace
+
+SYST(1993, qmquasar, 0, 0, quasar,  qmquasar, qmquasar_state, empty_init, "Quasimidi Musikelektronik GmbH", "Quasimidi Quasar", MACHINE_IS_SKELETON)
+SYST(1995, technox,  0, 0, technox, qmquasar, qmquasar_state, empty_init, "Quasimidi Musikelektronik GmbH", "TechnoX",          MACHINE_IS_SKELETON)
diff --git a/src/mame/skeleton/vp415.cpp b/src/mame/skeleton/vp415.cpp
index 70befc79a6d..3f873fc4285 100644
--- a/src/mame/skeleton/vp415.cpp
+++ b/src/mame/skeleton/vp415.cpp
@@ -421,7 +421,7 @@ void vp415_state::z80_program_map(address_map &map)
 void vp415_state::z80_io_map(address_map &map)
 {
 	map.global_mask(0xff);
-	map(0x00, 0x0f).rw(SCSI_TAG, FUNC(ncr5385_device::read), FUNC(ncr5385_device::write));
+	map(0x00, 0x0f).m(SCSI_TAG, FUNC(ncr5385_device::map));
 	// 0x20, 0x21: Connected to A0 + D0..D7 of SLAVE i8041
 	map(0x34, 0x34).w(FUNC(vp415_state::sel34_w));
 	map(0x37, 0x37).r(FUNC(vp415_state::sel37_r));
diff --git a/src/mame/taito/invqix.cpp b/src/mame/taito/invqix.cpp
index 7b8cd31da10..7ac94f436b4 100644
--- a/src/mame/taito/invqix.cpp
+++ b/src/mame/taito/invqix.cpp
@@ -147,14 +147,14 @@ class invqix_state : public driver_device
 private:
 	uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
 
-	uint16_t port3_r();
-	void port3_w(uint16_t data);
-	uint16_t port5_r();
-	void port5_w(uint16_t data);
-	uint16_t port6_r();
-	void port6_w(uint16_t data);
-	uint16_t porta_r();
-	uint16_t portg_r();
+	uint8_t port3_r();
+	void port3_w(uint8_t data);
+	uint8_t port5_r();
+	void port5_w(uint8_t data);
+	uint8_t port6_r();
+	void port6_w(uint8_t data);
+	uint8_t porta_r();
+	uint8_t portg_r();
 
 	void vctl_w(uint16_t data);
 
@@ -228,42 +228,42 @@ uint32_t invqix_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap
 	return 0;
 }
 
-uint16_t invqix_state::port3_r()
+uint8_t invqix_state::port3_r()
 {
 	return (m_eeprom->do_read() << 5) | 0x03;
 }
 
-void invqix_state::port3_w(uint16_t data)
+void invqix_state::port3_w(uint8_t data)
 {
 	m_eeprom->cs_write((data >> 2) & 1);
 	m_eeprom->di_write((data >> 4) & 1);
 	m_eeprom->clk_write((data >> 3) & 1);
 }
 
-uint16_t invqix_state::port5_r()
+uint8_t invqix_state::port5_r()
 {
 	return 0;
 }
 
-void invqix_state::port5_w(uint16_t data)
+void invqix_state::port5_w(uint8_t data)
 {
 }
 
-uint16_t invqix_state::port6_r()
+uint8_t invqix_state::port6_r()
 {
 	return 0;
 }
 
-void invqix_state::port6_w(uint16_t data)
+void invqix_state::port6_w(uint8_t data)
 {
 }
 
-uint16_t invqix_state::porta_r()
+uint8_t invqix_state::porta_r()
 {
 	return 0xf0;
 }
 
-uint16_t invqix_state::portg_r()
+uint8_t invqix_state::portg_r()
 {
 	return 0;
 }
diff --git a/src/mame/taito/taito_h.cpp b/src/mame/taito/taito_h.cpp
index aa0c573d760..ec251e80ece 100644
--- a/src/mame/taito/taito_h.cpp
+++ b/src/mame/taito/taito_h.cpp
@@ -29,8 +29,8 @@ System specs :
  Chips : TC0070RGB (RGB/Video Mixer)
          TC0220IOC (Input)
          TC0140SYT (Sound communication)
-         TC0130LNB (???)
-         TC0160ROM (???)
+         TC0130LNB (Graphics Data and palette addressing related)
+         TC0160ROM (Graphics ROM addressing related)
          TC0080VCO (Tilemap & Motion Object Gen)
 
  name             irq    resolution   tx-layer   tc0220ioc
@@ -52,6 +52,11 @@ Known issues :
  - Sprite zoom is a bit wrong.
  - Title screen of dynamite league is wrong a bit, which is mentioned by
    Yasuhiro Ogawa.
+ - Flip screen doesn't work on background layers:
+     * 'syvalion': title screen doesn't show up. Also BG tiles are not shown in their proper locations during gameplay
+	 * 'dleague' : title screen doesn't show up. Playfield is not completely shown during gameplay
+	 * 'recordbr': Taito logo doesn't show up during attract mode. Backgrounds don't show up during gameplay
+	 * 'tetristh': title screen doesn't show up. Backgrounds don't show up during gameplay
 
 
 Stephh's notes (based on the game M68000 code and some tests) :
@@ -67,8 +72,13 @@ Stephh's notes (based on the game M68000 code and some tests) :
       * 0x0002 (World) uses TAITO_COINAGE_WORLD
   - Notice screen only if region = 0x0000
   - Text is always in Japanese regardless of the region !
-  - DSW bit 6 has an unknown effect because of a write to unmapped 0x430000.w
-    (see code at 0x002af8). Another write to this address is done at 0x002a96.
+  - DSW bit 6 is used to configure TC0160ROM addressing mode to use 1MB JEDEC ROM pinout or 1MB Non-JEDEC 28-pin Mask ROM pinout.
+    Main difference between pinouts is the A16 address line and /OE input line are "swapped".
+    Enabling or disabling this switch causes different writes to 0x430000.w address, so looks like it's mapped
+	to a control register on TC0160ROM, which is involved in GFX ROM addressing.
+	It writes a 0x2eea value on that address at initializing HW time, only when it's ON (see code at 0x002af8).
+	Another write to this address is done at 0x002a96 with a 0x27ea value (default value?), always at boot up.
+	It's set to "always ON" at the operator manual, because all known PCBs use the 28-pin Mask ROM for GFX data.
 
 
 2) 'recordbr' and 'gogold'
@@ -216,6 +226,7 @@ void syvalion_state::syvalion_map(address_map &map)
 	map(0x300001, 0x300001).w("tc0140syt", FUNC(tc0140syt_device::master_port_w));
 	map(0x300003, 0x300003).rw("tc0140syt", FUNC(tc0140syt_device::master_comm_r), FUNC(tc0140syt_device::master_comm_w));
 	map(0x400000, 0x420fff).rw(m_tc0080vco, FUNC(tc0080vco_device::word_r), FUNC(tc0080vco_device::word_w));
+	map(0x430000, 0x430001).nopr();    // ?? writes a byte at start up. TC0160ROM addressing mode?
 	map(0x500800, 0x500fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
 }
 
@@ -228,6 +239,7 @@ void taitoh_state::recordbr_map(address_map &map)
 	map(0x300001, 0x300001).w("tc0140syt", FUNC(tc0140syt_device::master_port_w));
 	map(0x300003, 0x300003).rw("tc0140syt", FUNC(tc0140syt_device::master_comm_r), FUNC(tc0140syt_device::master_comm_w));
 	map(0x400000, 0x420fff).rw(m_tc0080vco, FUNC(tc0080vco_device::word_r), FUNC(tc0080vco_device::word_w));
+	map(0x430000, 0x430001).nopr();    // ?? writes a byte at start up. TC0160ROM addressing mode?
 	map(0x500800, 0x500fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
 }
 
@@ -240,6 +252,7 @@ void taitoh_state::tetristh_map(address_map &map)
 	map(0x200003, 0x200003).rw("tc0140syt", FUNC(tc0140syt_device::master_comm_r), FUNC(tc0140syt_device::master_comm_w));
 	map(0x300000, 0x300003).rw(m_tc0040ioc, FUNC(tc0040ioc_device::read), FUNC(tc0040ioc_device::write)).umask16(0x00ff);
 	map(0x400000, 0x420fff).rw(m_tc0080vco, FUNC(tc0080vco_device::word_r), FUNC(tc0080vco_device::word_w));
+	map(0x430000, 0x430001).nopr();    // ?? writes a byte at start up. TC0160ROM addressing mode?
 	map(0x500800, 0x500fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
 }
 
@@ -253,6 +266,7 @@ void taitoh_state::dleague_map(address_map &map)
 	map(0x300003, 0x300003).rw("tc0140syt", FUNC(tc0140syt_device::master_comm_r), FUNC(tc0140syt_device::master_comm_w));
 	map(0x400000, 0x420fff).rw(m_tc0080vco, FUNC(tc0080vco_device::word_r), FUNC(tc0080vco_device::word_w));
 	map(0x500800, 0x500fff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette");
+	map(0x430000, 0x430001).nopr();    // ?? writes a byte at start up. TC0160ROM addressing mode?
 	map(0x600000, 0x600001).nopw();    // ?? writes zero once per frame
 }
 
@@ -288,19 +302,19 @@ static INPUT_PORTS_START( syvalion )
 	/* 0x200000 (port 1) -> 0x102843.b (-$57bd,A5) */
 	PORT_START("DSWB")
 	TAITO_DIFFICULTY_LOC(SW2)
-	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SW2:3,4")
+	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )          PORT_DIPLOCATION("SW2:3,4")
 	PORT_DIPSETTING(    0x08, "1000k" )
 	PORT_DIPSETTING(    0x0c, "1500k" )
 	PORT_DIPSETTING(    0x04, "2000k" )
 	PORT_DIPSETTING(    0x00, DEF_STR( None ) )
-	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )        PORT_DIPLOCATION("SW2:5,6")
+	PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )               PORT_DIPLOCATION("SW2:5,6")
 	PORT_DIPSETTING(    0x00, "2" )
 	PORT_DIPSETTING(    0x30, "3" )
 	PORT_DIPSETTING(    0x20, "4" )
 	PORT_DIPSETTING(    0x10, "5" )
-	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )      PORT_DIPLOCATION("SW2:7") /* code at 0x002af8 - see notes */
-	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x40, 0x00, "Graphics ROM Addressing Mode" ) PORT_DIPLOCATION("SW2:7") /* Has no effect in emulation, see notes */
+	PORT_DIPSETTING(    0x40, "JEDEC" )                 /* Pin 2 = A16, Pin 24 = /OE */
+	PORT_DIPSETTING(    0x00, "Non-JEDEC" )             /* Pin 2 = /OE, Pin 24 = A16 */
 	PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" )        /* Listed as "Unused" */
 
 	PORT_START("IN0")
@@ -349,19 +363,19 @@ static INPUT_PORTS_START( syvalionp )
 	/* 0x200000 (port 1) -> 0x102843.b (-$57bd,A5) */
 	PORT_START("DSWB")
 	TAITO_DIFFICULTY_LOC(SW2)
-	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )   PORT_DIPLOCATION("SW2:3,4")
+	PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )          PORT_DIPLOCATION("SW2:3,4")
 	PORT_DIPSETTING(    0x08, "1000k" )
 	PORT_DIPSETTING(    0x0c, "1500k" )
 	PORT_DIPSETTING(    0x04, "2000k" )
 	PORT_DIPSETTING(    0x00, DEF_STR( None ) )
-	PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )        PORT_DIPLOCATION("SW2:5,6")
+	PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )               PORT_DIPLOCATION("SW2:5,6")
 	PORT_DIPSETTING(    0x00, "2" )
 	PORT_DIPSETTING(    0x30, "3" )
 	PORT_DIPSETTING(    0x20, "4" )
 	PORT_DIPSETTING(    0x10, "5" )
-	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )      PORT_DIPLOCATION("SW2:7") /* code at 0x002af8 - see notes */
-	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
-	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x40, 0x00, "Graphics ROM Addressing Mode" ) PORT_DIPLOCATION("SW2:7") /* Has no effect in emulation, see notes */
+	PORT_DIPSETTING(    0x40, "JEDEC" )                 /* Pin 2 = A16, Pin 24 = /OE */
+	PORT_DIPSETTING(    0x00, "Non-JEDEC" )             /* Pin 2 = /OE, Pin 24 = A16 */
 	PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" )        /* Listed as "Unused" */
 
 	PORT_START("IN0")
@@ -1012,10 +1026,10 @@ ROM_END
 
 
 //    YEAR  NAME       PARENT    MACHINE   INPUT      STATE           INIT        MONITOR  COMPANY                      FULLNAME                                 FLAGS
-GAME( 1988, syvalion,  0,        syvalion, syvalion,  syvalion_state, empty_init, ROT0,    "Taito Corporation",         "Syvalion (Japan)",                      MACHINE_SUPPORTS_SAVE )
-GAME( 1988, syvalionp, syvalion, syvalion, syvalionp, syvalion_state, empty_init, ROT0,    "Taito Corporation",         "Syvalion (World, prototype)",           MACHINE_SUPPORTS_SAVE )
-GAME( 1988, syvalionu, syvalion, syvalion, syvalion,  syvalion_state, empty_init, ROT0,    "Taito America Corporation", "Syvalion (US, PS2 Taito Legends 2)",    MACHINE_SUPPORTS_SAVE )
-GAME( 1988, syvalionw, syvalion, syvalion, syvalion,  syvalion_state, empty_init, ROT0,    "Taito Corporation Japan",   "Syvalion (World, PS2 Taito Legends 2)", MACHINE_SUPPORTS_SAVE )
+GAME( 1988, syvalion,  0,        syvalion, syvalion,  syvalion_state, empty_init, ROT0,    "Taito Corporation",         "Syvalion (Japan)",                      MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
+GAME( 1988, syvalionp, syvalion, syvalion, syvalionp, syvalion_state, empty_init, ROT0,    "Taito Corporation",         "Syvalion (World, prototype)",           MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
+GAME( 1988, syvalionu, syvalion, syvalion, syvalion,  syvalion_state, empty_init, ROT0,    "Taito America Corporation", "Syvalion (US, PS2 Taito Legends 2)",    MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
+GAME( 1988, syvalionw, syvalion, syvalion, syvalion,  syvalion_state, empty_init, ROT0,    "Taito Corporation Japan",   "Syvalion (World, PS2 Taito Legends 2)", MACHINE_SUPPORTS_SAVE | MACHINE_NO_COCKTAIL )
 GAME( 1988, recordbr,  0,        recordbr, recordbr,  taitoh_state,   empty_init, ROT0,    "Taito Corporation Japan",   "Recordbreaker (World)",                 MACHINE_SUPPORTS_SAVE )
 GAME( 1988, gogold,    recordbr, recordbr, gogold,    taitoh_state,   empty_init, ROT0,    "Taito Corporation",         "Go For The Gold (Japan)",               MACHINE_SUPPORTS_SAVE )
 GAME( 1988, tetristh,  tetris,   tetristh, tetristh,  taitoh_state,   empty_init, ROT0,    "Sega",                      "Tetris (Japan, Taito H-System)",        MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/tektronix/tek440x.cpp b/src/mame/tektronix/tek440x.cpp
index 2bb15f1fca4..e96705f3d3c 100644
--- a/src/mame/tektronix/tek440x.cpp
+++ b/src/mame/tektronix/tek440x.cpp
@@ -42,18 +42,23 @@
 ***************************************************************************/
 
 #include "emu.h"
+
+#include "tek410x_kbd.h"
+
+#include "bus/nscsi/hd.h"
 #include "bus/rs232/rs232.h"
+#include "cpu/m6502/m6502.h"
 #include "cpu/m68000/m68010.h"
 #include "cpu/m68000/m68020.h"
-#include "cpu/m6502/m6502.h"
 #include "machine/am9513.h"
 #include "machine/bankdev.h"
-#include "machine/mos6551.h"    // debug tty
 #include "machine/mc146818.h"
 #include "machine/mc68681.h"
+#include "machine/mos6551.h"    // debug tty
 #include "machine/ncr5385.h"
-#include "tek410x_kbd.h"
+#include "machine/nscsi_bus.h"
 #include "sound/sn76496.h"
+
 #include "emupal.h"
 #include "screen.h"
 #include "speaker.h"
@@ -72,6 +77,8 @@ class tek440x_state : public driver_device
 		m_duart(*this, "duart"),
 		m_keyboard(*this, "keyboard"),
 		m_snsnd(*this, "snsnd"),
+		m_rtc(*this, "rtc"),
+		m_scsi(*this, "scsi:7:ncr5385"),
 		m_prom(*this, "maincpu"),
 		m_mainram(*this, "mainram"),
 		m_vram(*this, "vram"),
@@ -115,6 +122,8 @@ class tek440x_state : public driver_device
 	required_device<mc68681_device> m_duart;
 	required_device<tek410x_keyboard_device> m_keyboard;
 	required_device<sn76496_device> m_snsnd;
+	required_device<mc146818_device> m_rtc;
+	required_device<ncr5385_device> m_scsi;
 	required_region_ptr<u16> m_prom;
 	required_shared_ptr<u16> m_mainram;
 	required_shared_ptr<u16> m_vram;
@@ -326,8 +335,8 @@ void tek440x_state::physical_map(address_map &map)
 	// 7b6000-7b7fff: Mouse
 	map(0x7b8000, 0x7b8003).mirror(0x100).rw("timer", FUNC(am9513_device::read16), FUNC(am9513_device::write16));
 	// 7ba000-7bbfff: MC146818 RTC
-	// 7bc000-7bdfff: SCSI bus address registers
-	map(0x7be000, 0x7be01f).mirror(0x1fe0).rw("scsic", FUNC(ncr5385_device::read), FUNC(ncr5385_device::write)).umask16(0xff00).cswidth(16);
+	map(0x7bc000, 0x7bc000).lw8([this](u8 data) { m_scsi->set_own_id(data & 7); }, "scsi_addr"); // 7bc000-7bdfff: SCSI bus address registers
+	map(0x7be000, 0x7be01f).m(m_scsi, FUNC(ncr5385_device::map)).umask16(0xff00); //.mirror(0x1fe0) .cswidth(16);
 }
 
 void tek440x_state::fdccpu_map(address_map &map)
@@ -351,6 +360,11 @@ INPUT_PORTS_END
  *
  *************************************/
 
+static void scsi_devices(device_slot_interface &device)
+{
+	device.option_add("harddisk", NSCSI_HARDDISK);
+}
+
 void tek440x_state::tek4404(machine_config &config)
 {
 	/* basic machine hardware */
@@ -391,9 +405,23 @@ void tek440x_state::tek4404(machine_config &config)
 
 	AM9513(config, "timer", 40_MHz_XTAL / 4 / 10); // from CPU E output
 
-	//MC146818(config, "calendar", 32.768_MHz_XTAL);
+	MC146818(config, m_rtc, 32.768_MHz_XTAL);
+
+	NSCSI_BUS(config, "scsi");
+	NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, "harddisk");
+	NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr);
+	NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr);
+	NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr);
+	NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr);
+	NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr);
+	NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr);
+	NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5385", NCR5385).clock(40_MHz_XTAL / 4).machine_config(
+		[this](device_t *device)
+		{
+			ncr5385_device &adapter = downcast<ncr5385_device &>(*device);
 
-	NCR5385(config, "scsic", 40_MHz_XTAL / 4).irq().set_inputline(m_maincpu, M68K_IRQ_3);
+			adapter.irq().set_inputline(m_maincpu, M68K_IRQ_3);
+		});
 
 	rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr));
 	rs232.rxd_handler().set("aica", FUNC(mos6551_device::write_rxd));
diff --git a/src/mame/tektronix/tekigw.cpp b/src/mame/tektronix/tekigw.cpp
index 3000d55ccd3..4cc68511667 100644
--- a/src/mame/tektronix/tekigw.cpp
+++ b/src/mame/tektronix/tekigw.cpp
@@ -9,15 +9,44 @@
  *   - https://archive.org/details/tektronix_Tektronix_1985
  *
  * TODO:
- *   - am9516 dma controller
  *   - slots and cards
  *   - gpib devices
  *   - graphics and keyboard
  */
 /*
- * WIP
+ * tek4132
  *  - novram chip select not asserted when trying to read ethernet mac address?
  *  - aborts to firmware monitor on second serial port after failing to boot
+ *  - hangs during UTek boot
+ *
+booting /vmunix
+<UTek>  RSA - RS-232 ports
+<UTek>  RSADMA - RS-232 DMA
+<UTek>  SCSI - SCSI interface
+<UTek>  lna0: Ethernet= 8:0:11:0:0:f7 Ip=[42.128.0.1]
+<UTek>  LNA - Local Area Network
+<UTek>  CEPWR - Soft Power switch
+<UTek> end configure
+<UTek> Tektronix - UTek STRATOSIIW2.3 #1.25 Thu Oct 23 16:56:50 PDT 1986
+<UTek>
+<UTek> real mem = 1024k
+<UTek> firstaddr = 0x3fda8
+<UTek> firstaddr = 0x78600
+<UTek> avail mem = 531456
+<UTek> using 51 buffers containing 104448 bytes of memory
+<UTek> inittodr: clock has gone backward, file system time used
+<UTek>    file system time = 2eab0645
+<UTek>    clock = 5bb2d3
+ */
+/*
+ * tek6130
+ * "Invalid menu file.  Dropping into shell.\n" - string at d789
+ * accessed by printf at 7b82
+ * message set at a6b0
+ *
+Booting from disk
+Invalid menu file.  Dropping into shell.
+diags>
  */
 
 #include "emu.h"
@@ -27,12 +56,12 @@
 #include "machine/ram.h"
 
 // various hardware
-//#include "machine/am9516a.h"
+#include "machine/am9516.h"
 #include "machine/am9517a.h"
 #include "machine/eepromser.h"
 #include "machine/i82586.h"
 #include "machine/mm58167.h"
-//#include "machine/ncr5385.h"
+#include "machine/ncr5385.h"
 #include "machine/ns32081.h"
 #include "machine/ns32082.h"
 #include "machine/ns32202.h"
@@ -75,7 +104,7 @@ class tekigw_state_base : public driver_device
 		, m_serial(*this, "port%u", 0U)
 		, m_rtc(*this, "rtc")
 		, m_nov(*this, "nov%u", 0U)
-		//, m_dma(*this, "dma")
+		, m_dma(*this, "dma")
 		, m_lan(*this, "lan")
 		, m_led(*this, "led")
 	{
@@ -90,6 +119,7 @@ class tekigw_state_base : public driver_device
 
 	// address maps
 	template <unsigned ST> void cpu_map(address_map &map);
+	void dma_map(address_map &map);
 
 	// computer board control registers
 	u8 nov_r() { return m_nmr; }
@@ -114,7 +144,7 @@ class tekigw_state_base : public driver_device
 	required_device_array<rs232_port_device, 2> m_serial;
 	required_device<mm58167_device> m_rtc;
 	optional_device_array<eeprom_serial_x24c44_16bit_device, 2> m_nov;
-	//required_device<am9516a_device> m_dma;
+	required_device<am9516_device> m_dma;
 	required_device<i82586_device> m_lan;
 
 	output_finder<> m_led;
@@ -173,7 +203,7 @@ class tek6100_state : public tekigw_state_base
 	template <typename T> T buf_r();
 	template <typename T> void buf_w(T data);
 
-	u32 screen_update(screen_device& screen, bitmap_rgb32& bitmap, rectangle const& cliprect) { return 0; }
+	u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, rectangle const &cliprect) { return 0; }
 
 	required_device<tms9914_device> m_gpib;
 	required_device<wd1770_device> m_fdc;
@@ -198,7 +228,7 @@ class tek4132_state : public tekigw_state_base
 	tek4132_state(machine_config const &mconfig, device_type type, char const *tag)
 		: tekigw_state_base(mconfig, type, tag)
 		, m_scsibus(*this, "scsi")
-		//, m_scsi(*this, "scsi:7:ncr5385")
+		, m_scsi(*this, "scsi:7:ncr5385")
 		, m_sdma(*this, "sdma")
 		, m_sirq(*this, "sirq")
 	{
@@ -218,7 +248,7 @@ class tek4132_state : public tekigw_state_base
 
 private:
 	required_device<nscsi_bus_device> m_scsibus;
-	//required_device<ncr5385_device> m_scsi;
+	required_device<ncr5385_device> m_scsi;
 	required_device<am9517a_device> m_sdma;
 
 	required_device<input_merger_all_high_device> m_sirq;
@@ -243,6 +273,10 @@ void tekigw_state_base::machine_reset()
 {
 	nov_w(0);
 	scr_w(0);
+
+	m_icu->g_w<0>(1); // mmu present
+	m_icu->g_w<7>(1); // fpu present
+	m_icu->ir_w<12>(0);
 }
 
 void tek6100_state::machine_start()
@@ -263,16 +297,6 @@ void tek6100_state::machine_reset()
 
 	hcr_w(0);
 	fcr_w(0);
-
-	m_icu->ir_w<0>(1); // mmu present
-	m_icu->ir_w<3>(1);
-	m_icu->ir_w<4>(1);
-	m_icu->ir_w<5>(1);
-	m_icu->ir_w<6>(1);
-	m_icu->ir_w<7>(1);
-	m_icu->ir_w<8>(1);
-	m_icu->ir_w<9>(1);
-	m_icu->ir_w<14>(1); // fpu present
 }
 
 void tekigw_state_base::common_init()
@@ -342,6 +366,8 @@ enum per_mask : u16
 
 void tekigw_state_base::scr_w(u8 data)
 {
+	LOG("scr_w 0x%02x (%s)\n", data, machine().describe_context());
+
 	if (!(m_scr & SCR_RAME) && (data & SCR_RAME))
 		m_cpu->space(0).install_ram(0, m_ram->mask(), m_ram->pointer());
 
@@ -556,6 +582,7 @@ template <unsigned ST> void tekigw_state_base::cpu_map(address_map &map)
 	map(0xfff00a, 0xfff00b).lr16([this]() { return m_per; }, "per_r");
 	map(0xfff00c, 0xfff00c).rw(FUNC(tekigw_state_base::scr_r), FUNC(tekigw_state_base::scr_w));
 	map(0xfff00e, 0xfff00e).r(FUNC(tekigw_state_base::ssr_r));
+	map(0xfff00f, 0xfff00f).lr8([]() { return 7; }, "mem_size"); // code at 804703 uses this to size memory
 
 	map(0xfff800, 0xfff83f).rw(m_rtc, FUNC(mm58167_device::read), FUNC(mm58167_device::write)).umask16(0xff);
 	map(0xfffa00, 0xfffa07).rw(m_scc, FUNC(z80scc_device::ab_dc_r), FUNC(z80scc_device::ab_dc_w)).umask16(0xff);
@@ -580,7 +607,7 @@ template <unsigned ST> void tek6100_state::cpu_map(address_map &map)
 			// 7 for CPU, but diagnostic expects F; maybe 4132 is different?
 			m_buserror->adjust(attotime::from_ticks(10, m_cpu->clock()), 0x7);
 
-			return 0; // space.unmap();
+			return space.unmap();
 		}, "buserror"); // expansion I/O
 
 	map(0xff0000, 0xff7fff).rw(FUNC(tek6100_state::buf_r<u16>), FUNC(tek6100_state::buf_w<u16>));
@@ -641,13 +668,16 @@ enum csr_mask : u8
 template <unsigned ST> void tek4132_state::cpu_map(address_map &map)
 {
 	map(0x000000, 0xffffff).lr8(
-		[this](address_space &space)
+		[this](address_space &space, offs_t offset)
 		{
-			// FIXME: Should be 20μs according to 6100 documentation; CPU is still
-			// too fast, and timing may differ on 4132. Also DMACH field should be
-			// 7 for CPU, but diagnostic expects F; maybe 4132 is different?
-			m_buserror->adjust(attotime::from_ticks(50, m_cpu->clock()), 0xf);
-
+			if (!machine().side_effects_disabled())
+			{
+				// FIXME: Should be 20μs according to 6100 documentation; CPU is still
+				// too fast, and timing may differ on 4132. Also DMACH field should be
+				// 7 for CPU, but diagnostic expects F; maybe 4132 is different?
+				m_buserror->adjust(attotime::from_ticks(20, m_cpu->clock()), 0xf);
+				logerror("buserror 0x%06x (%s)\n", offset, machine().describe_context());
+			}
 			return space.unmap();
 		}, "buserror");
 
@@ -658,23 +688,25 @@ template <unsigned ST> void tek4132_state::cpu_map(address_map &map)
 
 	//map(0xfff000, 0xfff000).w(FUNC(tek6100_state::fcr_w)); // rsaa_dmaaos serial dma address offset register
 	//map(0xfff002, 0xfff002).w(FUNC(tek6100_state::gcr_w)); // rsaa_auxlatch serial auxiliary control register
+	//map(0xfff008, 0xfff008).w(); // rsaa_irqreset
+	//map(0xfff00f, 0xfff00f).lr8([]() { return 0x7; }, "memsize"); // code at 804703 uses this to size memory
 
 	map(0xfff900, 0xfff91f).rw(m_sdma, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).umask16(0xff);
 	//map(0xfffa08, 0xfffa08); // rsaa_status
 
 	//map(0xfffc00, 0xfffc1f); // signature
 	map(0xfffc20, 0xfffc3f).lw8(
-		[this](u8 data)
+		[this](offs_t offset, u8 data)
 		{
-			LOG("csr_w 0x%02x (%s)\n", data, machine().describe_context());
+			LOG("csr_w 0x%02x offset 0x%x (%s)\n", data, offset, machine().describe_context());
 
-			//m_scsi->set_own_id(~data & CSR_IDENT);
-			//m_sirq->in_w<1>(bool(data & CSR_IENBL));
+			m_scsi->set_own_id(~data & CSR_IDENT);
+			m_sirq->in_w<0>(bool(data & CSR_IENBL));
 		}, "csr_w");
-	//map(0xfffc40, 0xfffc5f).m(m_scsi, FUNC(ncr5385_device::map)).umask16(0xff);
-	map(0xfffc60, 0xfffc61).ram(); // 9516 data
-	map(0xfffc62, 0xfffc63).ram(); // 9516 pointer
-	map(0xfffd00, 0xfffdff).ram(); // stub out 9516
+	map(0xfffc40, 0xfffc5f).m(m_scsi, FUNC(ncr5385_device::map)).umask16(0xff);
+	map(0xfffc60, 0xfffc61).rw(m_dma, FUNC(am9516_device::data_r), FUNC(am9516_device::data_w));
+	map(0xfffc62, 0xfffc63).rw(m_dma, FUNC(am9516_device::addr_r), FUNC(am9516_device::addr_w));
+	//map(0xfffd00, 0xfffdff).ram(); // stub out 9516
 
 	map(0xffff00, 0xffffff).rom().region("kernel", 0xff00);
 }
@@ -686,6 +718,24 @@ void tek4132_state::lan_map(address_map &map)
 	map(0x3fff00, 0x3fffff).rom().region("kernel", 0xff00); // 0xf00000-0xffffff
 }
 
+void tekigw_state_base::dma_map(address_map &map)
+{
+	map(0x000000, 0xffffff).lrw16(
+		[this](offs_t offset, u16 mem_mask)
+		{
+			return (mem_mask == 0xffff)
+				? m_cpu->space(0).read_word(offset << 1)
+				: swapendian_int16(m_cpu->space(0).read_word(offset << 1, swapendian_int16(mem_mask)));
+		}, "dma_r",
+		[this](offs_t offset, u16 data, u16 mem_mask)
+		{
+			if (mem_mask == 0xffff)
+				m_cpu->space(0).write_word(offset << 1, data, mem_mask);
+			else
+				m_cpu->space(0).write_word(offset << 1, swapendian_int16(data), swapendian_int16(mem_mask));
+		}, "dma_w");
+}
+
 void tekigw_state_base::common_config(machine_config &config)
 {
 	NS32016(config, m_cpu, 20_MHz_XTAL / 2);
@@ -722,13 +772,27 @@ void tekigw_state_base::common_config(machine_config &config)
 	m_scc->out_rtsb_callback().set(m_serial[1], FUNC(rs232_port_device::write_rts));
 	m_scc->out_txdb_callback().set(m_serial[1], FUNC(rs232_port_device::write_txd));
 
+	/*
+	 * non-volatile memory: xx yy mm mm mm mm mm mm ii ii ii ii
+	 *
+	 * where (bit order reversed):
+	 *   xx yy - checksum?
+	 *   mm    - mac address
+	 *   ii    - IP address
+	 */
 	MM58167(config, m_rtc, 32.768_kHz_XTAL);
 
 	EEPROM_X24C44_16BIT(config, m_nov[0]); // X2443P
 	m_nov[0]->do_callback().set(FUNC(tekigw_state_base::nov_do));
 
+	AM9516(config, m_dma, 16_MHz_XTAL / 4); // TODO: 4132 has Am9516A-8
+	m_dma->set_addrmap(am9516_device::SYSTEM_MEM, &tekigw_state_base::dma_map);
+	m_dma->set_addrmap(am9516_device::NORMAL_MEM, &tekigw_state_base::dma_map);
+
+	// TODO: channel B fdc
+
 	I82586(config, m_lan, 16_MHz_XTAL / 2);
-	m_lan->out_irq_cb().set(m_icu, FUNC(ns32202_device::ir_w<11>)).invert();
+	m_lan->out_irq_cb().set(m_icu, FUNC(ns32202_device::ir_w<11>));
 }
 
 void tek6100_state::tek6130(machine_config &config)
@@ -736,7 +800,7 @@ void tek6100_state::tek6130(machine_config &config)
 	tekigw_state_base::common_config(config);
 
 	m_cpu->set_addrmap(0, &tek6100_state::cpu_map<0>);
-	m_cpu->set_addrmap(6, &tek6100_state::cpu_map<6>);
+	m_cpu->set_addrmap(ns32000::ST_EIM, &tek6100_state::cpu_map<ns32000::ST_EIM>);
 
 	m_lan->set_addrmap(0, &tek6100_state::lan_map);
 
@@ -762,7 +826,7 @@ void tek6100_state::tek6130(machine_config &config)
 
 	WD1770(config, m_fdc, 8_MHz_XTAL); // clock?
 	m_fdc->intrq_wr_callback().set(m_icu, FUNC(ns32202_device::ir_w<13>));
-	//m_fdc->drq_wr_callback().set(m_dma, FUNC(::));
+	m_fdc->drq_wr_callback().set(m_dma, FUNC(am9516_device::dreq_w<1>));
 	FLOPPY_CONNECTOR(config, "fdc:0", "525dd", FLOPPY_525_DD, true, floppy_image_device::default_mfm_floppy_formats).enable_sound(true);
 
 	WD1010(config, m_hdc, 20_MHz_XTAL / 4);
@@ -848,7 +912,8 @@ void tek4132_state::tek4132(machine_config &config)
 	tekigw_state_base::common_config(config);
 
 	m_cpu->set_addrmap(0, &tek4132_state::cpu_map<0>);
-	m_cpu->set_addrmap(6, &tek4132_state::cpu_map<6>);
+	m_cpu->set_addrmap(ns32000::ST_EIM, &tek4132_state::cpu_map<ns32000::ST_EIM>);
+	//m_cpu->set_addrmap(ns32000::ST_ODT, &tek4132_state::cpu_map<ns32000::ST_ODT>);
 
 	m_lan->set_addrmap(0, &tek4132_state::lan_map);
 
@@ -874,12 +939,12 @@ void tek4132_state::tek4132(machine_config &config)
 	 * 15 software clock
 	 */
 
-	m_rtc->irq().set(m_icu, FUNC(ns32202_device::ir_w<13>));
+	m_rtc->irq().set(m_icu, FUNC(ns32202_device::ir_w<13>)).invert(); // device emulation has inverted polarity
 
 	EEPROM_X24C44_16BIT(config, m_nov[1]); // X2443P
 	m_nov[1]->do_callback().set(FUNC(tek4132_state::nov_do));
 
-	AM9517A(config, m_sdma, 4'000'000); // clock?
+	AM9517A(config, m_sdma, 4'000'000); // D8237A-5 (clock?)
 	m_sdma->dreq_active_low();
 
 	INPUT_MERGER_ALL_HIGH(config, m_sirq);
@@ -893,22 +958,19 @@ void tek4132_state::tek4132(machine_config &config)
 	NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr);
 	NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr);
 	NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr);
-#if 1
-	NSCSI_CONNECTOR(config, "scsi:7", scsi_devices, nullptr);
-#else
 	NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr5385", NCR5385).clock(10'000'000).machine_config(
 		[this](device_t *device)
 		{
 			ncr5385_device &adapter = downcast<ncr5385_device &>(*device);
 
-			//adapter.irq().set(m_sirq, FUNC(input_merger_all_high_device::in_w<0>));
+			//adapter.irq().set(m_sirq, FUNC(input_merger_all_high_device::in_w<1>));
 			adapter.irq().set(m_icu, FUNC(ns32202_device::ir_w<4>));
-			//adapter.drq_handler_cb().set(m_mct_adr, FUNC(mct_adr_device::drq<0>));
+			adapter.dreq().set(m_dma, FUNC(am9516_device::dreq_w<0>)).invert();
 
-			//subdevice<mct_adr_device>(":mct_adr")->dma_r_cb<0>().set(adapter, FUNC(ncr53c94_device::dma_r));
-			//subdevice<mct_adr_device>(":mct_adr")->dma_w_cb<0>().set(adapter, FUNC(ncr53c94_device::dma_w));
 		});
-#endif
+
+	m_dma->flyby_byte_r<0>().set(":scsi:7:ncr5385", FUNC(ncr5385_device::dma_r));
+	m_dma->flyby_byte_w<0>().set(":scsi:7:ncr5385", FUNC(ncr5385_device::dma_w));
 }
 
 static INPUT_PORTS_START(tekigw)
diff --git a/src/mame/unico/unianapc.cpp b/src/mame/unico/unianapc.cpp
index d2ced572652..7113b95a402 100644
--- a/src/mame/unico/unianapc.cpp
+++ b/src/mame/unico/unianapc.cpp
@@ -1,5 +1,5 @@
 // license:BSD-3-Clause
-// copyright-holders:Ivan Vangelista
+// copyright-holders:
 /*
     Uniana PC hardware (shared by other Korean companies)
 
diff --git a/src/mame/visual/xds.cpp b/src/mame/visual/xds.cpp
new file mode 100644
index 00000000000..b9fa325692e
--- /dev/null
+++ b/src/mame/visual/xds.cpp
@@ -0,0 +1,357 @@
+// license: BSD-3-Clause
+// copyright-holders: Dirk Best
+/***************************************************************************
+
+    Visual Technology X Display Station (XDS19P)
+
+    Hardware:
+    - MC68HC000P12F
+    - 2x 27C010L-15 EPROM on cartridge (+ 4 empty sockets)
+    - 32x KM44C256AP-8 / MCM514256AP80 / MT4C4256-8 (4M DRAM)
+    - 4x HM53461P-10 (128k VRAM)
+    - DS1225Y NVRAM
+    - AM7990PC LANCE
+    - MC68B45 CRTC
+    - SCN68681C1N40
+    - MC68B50P
+    - 16.667 MHz XTAL, 100 MHz XTAL
+    - XTAL X1 3.6864 MHz (assumed, unreadable), XTAL X2 (unreadable)
+    - 4 position DIP switch
+    - Buzzer
+
+    TODO:
+    - Verify and hook up irq mask
+    - Source and timing of clock interrupt
+    - What's irq1 connected to?
+    - Remaining DUART output/input port bits
+    - Real DIP switch meaning
+    - Buzzer
+    - Better screen rendering using the MC6845?
+    - Configurable RAM
+    - Mouse port loopback test
+    - "romboot" just reboots the system, something else needed?
+
+    Notes:
+    - PCB marked "VISUAL 55-0106-000 REV A  WL3-94V1"
+    - The diagnostic serial loopback test passes if you attach
+      the "dec_loopback" slot device
+
+***************************************************************************/
+
+#include "emu.h"
+
+#include "xds_kbd.h"
+
+#include "bus/rs232/hlemouse.h"
+#include "bus/rs232/rs232.h"
+#include "cpu/m68000/m68000.h"
+#include "machine/6850acia.h"
+#include "machine/am79c90.h"
+#include "machine/clock.h"
+#include "machine/mc68681.h"
+#include "machine/nvram.h"
+#include "video/mc6845.h"
+
+#include "screen.h"
+
+
+namespace {
+
+
+//**************************************************************************
+//  TYPE DEFINITIONS
+//**************************************************************************
+
+class xds_state : public driver_device
+{
+public:
+	xds_state(const machine_config &mconfig, device_type type, const char *tag) :
+		driver_device(mconfig, type, tag),
+		m_maincpu(*this, "maincpu"),
+		m_screen(*this, "screen"),
+		m_crtc(*this, "crtc"),
+		m_lance(*this, "lance"),
+		m_duart(*this, "duart"),
+		m_serialport(*this, "serialport"),
+		m_mouseport(*this, "mouseport"),
+		m_acia(*this, "acia"),
+		m_vram(*this, "vram"),
+		m_nvram(*this, "nvram", 0x2000, ENDIANNESS_BIG),
+		m_prom(*this, "prom"),
+		m_sw1(*this, "sw1")
+	{ }
+
+	void xds19p(machine_config &config);
+
+protected:
+	virtual void machine_start() override;
+	virtual void machine_reset() override;
+
+private:
+	required_device<m68000_device> m_maincpu;
+	required_device<screen_device> m_screen;
+	required_device<mc6845_device> m_crtc;
+	required_device<am7990_device> m_lance;
+	required_device<mc68681_device> m_duart;
+	required_device<rs232_port_device> m_serialport;
+	required_device<rs232_port_device> m_mouseport;
+	required_device<acia6850_device> m_acia;
+	required_shared_ptr<uint16_t> m_vram;
+	memory_share_creator<uint8_t> m_nvram;
+	required_memory_region m_prom;
+	required_ioport m_sw1;
+
+	uint8_t m_irq_mask = 0x00;
+
+	void mem_map(address_map &map);
+
+	uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+
+	uint16_t lance_dma_r(offs_t offset, uint16_t mem_mask);
+	void lance_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+	uint8_t dip_prom_r(offs_t offset);
+	void output_w(uint8_t data);
+	uint8_t nvram_r(offs_t offset);
+	void nvram_w(offs_t offset, uint8_t data);
+	uint8_t irq_mask_r();
+	void irq_mask_w(uint8_t data);
+};
+
+
+//**************************************************************************
+//  ADDRESS MAPS
+//**************************************************************************
+
+void xds_state::mem_map(address_map &map)
+{
+	map(0x000000, 0x03ffff).rom().region("maincpu", 0);
+	map(0x200000, 0x2001ff).r(FUNC(xds_state::dip_prom_r)).umask16(0x00ff);
+	map(0x400000, 0x400003).rw(m_lance, FUNC(am7990_device::regs_r), FUNC(am7990_device::regs_w));
+	map(0x500000, 0x500003).rw(m_acia, FUNC(acia6850_device::read), FUNC(acia6850_device::write)).umask16(0x00ff);
+	map(0x600000, 0x60001f).rw(m_duart, FUNC(mc68681_device::read), FUNC(mc68681_device::write)).umask16(0x00ff);
+	map(0x700000, 0x700001).rw(m_crtc, FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)).umask16(0x00ff);
+	map(0x700002, 0x700003).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)).umask16(0x00ff);
+	map(0x800000, 0xbfffff).ram(); // fixed 4M for now
+	map(0xc00000, 0xc00003).rw(FUNC(xds_state::irq_mask_r), FUNC(xds_state::irq_mask_w)).umask16(0xff00);
+	map(0xd00000, 0xd1ffff).ram().share("vram");
+	map(0xe00000, 0xe03fff).ram().rw(FUNC(xds_state::nvram_r), FUNC(xds_state::nvram_w)).umask16(0xff00);
+}
+
+
+//**************************************************************************
+//  INPUT PORT DEFINITIONS
+//**************************************************************************
+
+static INPUT_PORTS_START( xds )
+	PORT_START("sw1")
+	PORT_DIPNAME( 0xf, 0x5, "Video Mode?")
+	PORT_DIPSETTING(   0x0, "0" )
+	PORT_DIPSETTING(   0x1, "1 - 1152x904 @72" )
+	PORT_DIPSETTING(   0x2, "2 - 1024x864 @72" )
+	PORT_DIPSETTING(   0x3, "3" )
+	PORT_DIPSETTING(   0x4, "4" )
+	PORT_DIPSETTING(   0x5, "5 - 1152x904 @72" ) // this (and 1) seems to be correct for this model
+	PORT_DIPSETTING(   0x6, "6 - 1152x904 @66" )
+	PORT_DIPSETTING(   0x7, "7 - 1024x800 @88" )
+	PORT_DIPSETTING(   0x8, "8" )
+	PORT_DIPSETTING(   0x9, "9" )
+	PORT_DIPSETTING(   0xa, "a" )
+	PORT_DIPSETTING(   0xb, "b" )
+	PORT_DIPSETTING(   0xc, "c" )
+	PORT_DIPSETTING(   0xd, "d" )
+	PORT_DIPSETTING(   0xe, "e" )
+	PORT_DIPSETTING(   0xf, "f" )
+INPUT_PORTS_END
+
+
+//**************************************************************************
+//  VIDEO EMULATION
+//**************************************************************************
+
+uint32_t xds_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
+{
+	for (unsigned y = 0; y < 904; y++)
+	{
+		uint32_t *line = &bitmap.pix(y);
+
+		for (unsigned x = 0; x < 1152 / 16; x++)
+		{
+			uint16_t data = m_vram[y * (1152 / 16) + x];
+
+			for (unsigned b = 0; b < 16; b++)
+				*line++ = BIT(data, 15 - b) ? rgb_t::white() : rgb_t::black();
+		}
+	}
+
+	return 0;
+}
+
+
+//**************************************************************************
+//  NETWORK
+//**************************************************************************
+
+uint16_t xds_state::lance_dma_r(offs_t offset, uint16_t mem_mask)
+{
+	return m_maincpu->space(AS_PROGRAM).read_word(offset, mem_mask);
+}
+
+void xds_state::lance_dma_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+	m_maincpu->space(AS_PROGRAM).write_word(offset, data, mem_mask);
+}
+
+
+//**************************************************************************
+//  MACHINE EMULATION
+//**************************************************************************
+
+uint8_t xds_state::dip_prom_r(offs_t offset)
+{
+	uint8_t data = 0;
+
+	data |= (m_sw1->read() & 0xf) << 4;
+	data |= (m_prom->as_u8(offset) & 0xf);
+
+	return data;
+}
+
+void xds_state::output_w(uint8_t data)
+{
+	// 76------  unknown
+	// --5-----  serial port spds
+	// ---4----  unknown
+	// ----3---  toggles at a rate of 32 hz
+	// -----2--  unknown
+	// ------1-  serial rts
+	// -------0  serial dtr
+
+	// maybe, but gives ~80 instead of ~100 in the clocktest diagnostic
+	if (BIT(data, 3))
+		m_maincpu->pulse_input_line(2, attotime::from_usec(1));
+
+	m_serialport->write_dtr(BIT(~data, 0));
+	m_serialport->write_rts(BIT(data, 1));
+	m_serialport->write_spds(BIT(~data, 5));
+}
+
+uint8_t xds_state::nvram_r(offs_t offset)
+{
+	return m_nvram[offset];
+}
+
+void xds_state::nvram_w(offs_t offset, uint8_t data)
+{
+	m_nvram[offset] = data;
+}
+
+uint8_t xds_state::irq_mask_r()
+{
+	return m_irq_mask;
+}
+
+void xds_state::irq_mask_w(uint8_t data)
+{
+	logerror("irq_mask_w: %02x\n", data);
+	m_irq_mask = data;
+}
+
+void xds_state::machine_start()
+{
+	// register for save states
+	save_item(NAME(m_irq_mask));
+}
+
+void xds_state::machine_reset()
+{
+}
+
+
+//**************************************************************************
+//  MACHINE DEFINTIONS
+//**************************************************************************
+
+static void mouse_devices(device_slot_interface &device)
+{
+	device.option_add("msystems_mouse", MSYSTEMS_HLE_SERIAL_MOUSE);
+}
+
+void xds_state::xds19p(machine_config &config)
+{
+	M68000(config, m_maincpu, 16.667_MHz_XTAL);
+	m_maincpu->set_addrmap(AS_PROGRAM, &xds_state::mem_map);
+
+	NVRAM(config, "nvram");
+
+	// video hardware
+	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
+	m_screen->set_raw(100_MHz_XTAL, 1472, 0, 1152, 941, 0, 904);
+	m_screen->set_screen_update(FUNC(xds_state::screen_update));
+
+	MC6845(config, m_crtc, 100_MHz_XTAL / 64);
+	m_crtc->set_screen("screen");
+	m_crtc->set_show_border_area(false);
+	m_crtc->set_char_width(64);
+
+	AM7990(config, m_lance, 0);
+	m_lance->intr_out().set_inputline(m_maincpu, 5).invert();
+	m_lance->dma_in().set(FUNC(xds_state::lance_dma_r));
+	m_lance->dma_out().set(FUNC(xds_state::lance_dma_w));
+
+	MC68681(config, m_duart, 3.6864_MHz_XTAL); // xtal unreadable
+	m_duart->irq_cb().set_inputline(m_maincpu, 4);
+	m_duart->outport_cb().set(FUNC(xds_state::output_w));
+	m_duart->a_tx_cb().set(m_mouseport, FUNC(rs232_port_device::write_txd));
+	m_duart->b_tx_cb().set(m_serialport, FUNC(rs232_port_device::write_txd));
+
+	RS232_PORT(config, m_mouseport, mouse_devices, "msystems_mouse");
+	m_mouseport->rxd_handler().set(m_duart, FUNC(mc68681_device::rx_a_w));
+	m_mouseport->dsr_handler().set(m_duart, FUNC(mc68681_device::ip4_w));
+
+	RS232_PORT(config, m_serialport, default_rs232_devices, nullptr);
+	m_serialport->rxd_handler().set(m_duart, FUNC(mc68681_device::rx_b_w));
+	m_serialport->dsr_handler().set(m_duart, FUNC(mc68681_device::ip0_w));
+	m_serialport->cts_handler().set(m_duart, FUNC(mc68681_device::ip1_w));
+	m_serialport->dcd_handler().set(m_duart, FUNC(mc68681_device::ip2_w));
+	m_serialport->si_handler().set(m_duart, FUNC(mc68681_device::ip5_w));
+
+	ACIA6850(config, m_acia, 0);
+	m_acia->irq_handler().set_inputline(m_maincpu, 3);
+	m_acia->txd_handler().set("kbd", FUNC(xds_kbd_hle_device::rx_w));
+
+	// probably clocked externally instead
+	clock_device &acia_clock(CLOCK(config, "acia_clock", 1200 * 16));
+	acia_clock.signal_handler().set(m_acia, FUNC(acia6850_device::write_rxc));
+	acia_clock.signal_handler().append(m_acia, FUNC(acia6850_device::write_txc));
+
+	// keyboard
+	xds_kbd_hle_device &kbd(XDS_KBD_HLE(config, "kbd"));
+	kbd.tx_handler().set(m_acia, FUNC(acia6850_device::write_rxd));
+	kbd.cts_handler().set(m_acia, FUNC(acia6850_device::write_cts));
+}
+
+
+//**************************************************************************
+//  ROM DEFINITIONS
+//**************************************************************************
+
+ROM_START( xds19p )
+	ROM_REGION16_BE(0x40000, "maincpu", 0)
+	ROM_LOAD16_BYTE("boot_30.e6", 0x00000, 0x20000, CRC(32449da2) SHA1(e1bc41987fb9c7da5b7fed5d6714c3451be4438c))
+	ROM_LOAD16_BYTE("boot_30.e5", 0x00001, 0x20000, CRC(a577087f) SHA1(2fe9d4d49fd6e8ecd230f8097f7004238afbb626))
+
+	ROM_REGION(0x100, "prom", 0)
+	ROM_LOAD("1837.e06d", 0x000, 0x100, CRC(b5d9f883) SHA1(28303155c515ac2638a06123fbf7e55f89dd2af9))
+ROM_END
+
+
+} // anonymous namespace
+
+
+//**************************************************************************
+//  SYSTEM DRIVERS
+//**************************************************************************
+
+//    YEAR  NAME    PARENT  COMPAT  MACHINE  INPUT  CLASS      INIT        COMPANY              FULLNAME   FLAGS
+COMP( 1990, xds19p, 0,      0,      xds19p,  xds,   xds_state, empty_init, "Visual Technology", "XDS-19P", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
diff --git a/src/mame/visual/xds_kbd.cpp b/src/mame/visual/xds_kbd.cpp
new file mode 100644
index 00000000000..ed96caad39f
--- /dev/null
+++ b/src/mame/visual/xds_kbd.cpp
@@ -0,0 +1,295 @@
+// license: BSD-3-Clause
+// copyright-holders: Dirk Best
+/***************************************************************************
+
+    Visual X Display Station Keyboard (HLE)
+
+    TODO:
+    - Map unknown keys
+
+    Notes:
+    - Everything here is guessed, no picture of the keyboard available
+    - Possibly identical to the Visual 220 keyboard
+
+***************************************************************************/
+
+#include "emu.h"
+#include "xds_kbd.h"
+#include "machine/keyboard.ipp"
+
+
+//**************************************************************************
+//  DEVICE DEFINITIONS
+//**************************************************************************
+
+DEFINE_DEVICE_TYPE(XDS_KBD_HLE, xds_kbd_hle_device, "xds_kbd_hle", "XDS Keyboard (HLE)")
+
+
+//-------------------------------------------------
+//  input_ports - device-specific input ports
+//-------------------------------------------------
+
+static INPUT_PORTS_START( keyboard )
+	PORT_START("row_0")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 00 */ PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 01 */ PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 02 */ PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 03 */ PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 04 */ PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 05 */ PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 06 */ PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 07 */ PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 08 */ PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 09 */ PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 0a */ PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 0b */ PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 0c */ PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 0d */ PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 0e */ PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 0f */ PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
+
+	PORT_START("row_1")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 10 */ PORT_CODE(KEYCODE_Q)          PORT_CHAR('q') PORT_CHAR('Q')
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 11 */ PORT_CODE(KEYCODE_R)          PORT_CHAR('r') PORT_CHAR('R')
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 12 */ PORT_CODE(KEYCODE_S)          PORT_CHAR('s') PORT_CHAR('S')
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 13 */ PORT_CODE(KEYCODE_T)          PORT_CHAR('t') PORT_CHAR('T')
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 14 */ PORT_CODE(KEYCODE_U)          PORT_CHAR('u') PORT_CHAR('U')
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 15 */ PORT_CODE(KEYCODE_V)          PORT_CHAR('v') PORT_CHAR('V')
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 16 */ PORT_CODE(KEYCODE_W)          PORT_CHAR('w') PORT_CHAR('W')
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 17 */ PORT_CODE(KEYCODE_X)          PORT_CHAR('x') PORT_CHAR('X')
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 18 */ PORT_CODE(KEYCODE_Y)          PORT_CHAR('y') PORT_CHAR('Y')
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 19 */ PORT_CODE(KEYCODE_Z)          PORT_CHAR('z') PORT_CHAR('Z')
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 1a */ PORT_CODE(KEYCODE_COLON)      PORT_CHAR(';') PORT_CHAR(':')
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 1b */ PORT_CODE(KEYCODE_QUOTE)      PORT_CHAR('\'') PORT_CHAR('"')
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 1c */ PORT_CODE(KEYCODE_OPENBRACE)  PORT_CHAR('[') PORT_CHAR('{')
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 1d */ PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 1e */ PORT_CODE(KEYCODE_EQUALS)     PORT_CHAR('=') PORT_CHAR('+')
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 1f */ PORT_CODE(KEYCODE_BACKSLASH)  PORT_CHAR('\\') PORT_CHAR('|')
+
+	PORT_START("row_2")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 20 */ PORT_CODE(KEYCODE_0)          PORT_CHAR('0') PORT_CHAR(')')
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 21 */ PORT_CODE(KEYCODE_1)          PORT_CHAR('1') PORT_CHAR('!')
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 22 */ PORT_CODE(KEYCODE_2)          PORT_CHAR('2') PORT_CHAR('@')
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 23 */ PORT_CODE(KEYCODE_3)          PORT_CHAR('3') PORT_CHAR('#')
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 24 */ PORT_CODE(KEYCODE_4)          PORT_CHAR('4') PORT_CHAR('$')
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 25 */ PORT_CODE(KEYCODE_5)          PORT_CHAR('5') PORT_CHAR('%')
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 26 */ PORT_CODE(KEYCODE_6)          PORT_CHAR('6') PORT_CHAR('^')
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 27 */ PORT_CODE(KEYCODE_7)          PORT_CHAR('7') PORT_CHAR('&')
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 28 */ PORT_CODE(KEYCODE_8)          PORT_CHAR('8') PORT_CHAR('*')
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 29 */ PORT_CODE(KEYCODE_9)          PORT_CHAR('9') PORT_CHAR('(')
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 2a */ PORT_CODE(KEYCODE_TILDE)      PORT_CHAR('`') PORT_CHAR('~')
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 2b */ PORT_CODE(KEYCODE_MINUS)      PORT_CHAR('-') PORT_CHAR('_')
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 2c */ PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('<') PORT_CHAR('>')
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 2d */ PORT_CODE(KEYCODE_COMMA)      PORT_CHAR(',')
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 2e */ PORT_CODE(KEYCODE_STOP)       PORT_CHAR('.')
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 2f */ PORT_CODE(KEYCODE_SLASH)      PORT_CHAR('/') PORT_CHAR('?')
+
+	PORT_START("row_3")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 30 */ PORT_CODE(KEYCODE_SPACE)    PORT_CHAR(' ')
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 31 */ PORT_NAME("31") // shown in keyboard test
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 32 */ PORT_CODE(KEYCODE_TAB)      PORT_CHAR(9)
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 33 */ PORT_CODE(KEYCODE_ENTER)    PORT_CHAR(13)
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 34 */ PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2)
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 35 */ PORT_NAME("35")
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 36 */ PORT_CODE(KEYCODE_LSHIFT)   PORT_CHAR(UCHAR_SHIFT_1) // or rshift
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 37 */ PORT_NAME("37")
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 38 */ PORT_CODE(KEYCODE_RSHIFT)   PORT_CHAR(UCHAR_SHIFT_1) // or lshift
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 39 */ PORT_NAME("39")
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 3a */ PORT_NAME("3a") // shown in keyboard test
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 3b */ PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 3c */ PORT_NAME("PF1")
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 3d */ PORT_NAME("PF2")
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 3e */ PORT_NAME("PF3")
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 3f */ PORT_NAME("PF4")
+
+	PORT_START("row_4")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 40 */ PORT_CODE(KEYCODE_0_PAD)     PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 41 */ PORT_CODE(KEYCODE_1_PAD)     PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 42 */ PORT_CODE(KEYCODE_2_PAD)     PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 43 */ PORT_CODE(KEYCODE_3_PAD)     PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 44 */ PORT_CODE(KEYCODE_4_PAD)     PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 45 */ PORT_CODE(KEYCODE_5_PAD)     PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 46 */ PORT_CODE(KEYCODE_6_PAD)     PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 47 */ PORT_CODE(KEYCODE_7_PAD)     PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 48 */ PORT_CODE(KEYCODE_8_PAD)     PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 49 */ PORT_CODE(KEYCODE_9_PAD)     PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 4a */ PORT_CODE(KEYCODE_MINUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD))
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 4b */ PORT_CODE(KEYCODE_COMMA_PAD) PORT_CHAR(UCHAR_MAMEKEY(COMMA_PAD))
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 4c */ PORT_CODE(KEYCODE_PLUS_PAD)  PORT_NAME("Keypad .")
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 4d */ PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD))
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 4e */ PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8)
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 4f */ PORT_NAME("4f") // shown in keyboard test
+
+	PORT_START("row_5")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 50 */ PORT_CODE(KEYCODE_F1)  PORT_CHAR(UCHAR_MAMEKEY(F1))  PORT_NAME("F1 (HOLD SCREEN)")
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 51 */ PORT_CODE(KEYCODE_F2)  PORT_CHAR(UCHAR_MAMEKEY(F2))  PORT_NAME("F2 (PRINT SCREEN)")
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 52 */ PORT_CODE(KEYCODE_F3)  PORT_CHAR(UCHAR_MAMEKEY(F3))  PORT_NAME("F3 (SET-UP)")
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 53 */ PORT_CODE(KEYCODE_F4)  PORT_CHAR(UCHAR_MAMEKEY(F4))  PORT_NAME("F4 (DATA/TALK)")
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 54 */ PORT_CODE(KEYCODE_F5)  PORT_CHAR(UCHAR_MAMEKEY(F5))  PORT_NAME("F5 (BREAK)")
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 55 */ PORT_CODE(KEYCODE_F6)  PORT_CHAR(UCHAR_MAMEKEY(F6))
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 56 */ PORT_CODE(KEYCODE_F7)  PORT_CHAR(UCHAR_MAMEKEY(F7))
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 57 */ PORT_CODE(KEYCODE_F8)  PORT_CHAR(UCHAR_MAMEKEY(F8))
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 58 */ PORT_CODE(KEYCODE_F9)  PORT_CHAR(UCHAR_MAMEKEY(F9))
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 59 */ PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 5a */ PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11)) PORT_NAME("F11 (ESC)")
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 5b */ PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12)) PORT_NAME("F12 (BS)")
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 5c */ PORT_CODE(KEYCODE_F13) PORT_CHAR(UCHAR_MAMEKEY(F13)) PORT_NAME("F13 (LF)")
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 5d */ PORT_CODE(KEYCODE_F14) PORT_CHAR(UCHAR_MAMEKEY(F14))
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 5e */ PORT_CODE(KEYCODE_F15) PORT_CHAR(UCHAR_MAMEKEY(F15)) PORT_NAME("F15 (HELP)")
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 5f */ PORT_CODE(KEYCODE_F16) PORT_CHAR(UCHAR_MAMEKEY(F16)) PORT_NAME("F16 (DO)")
+
+	PORT_START("row_6")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 60 */ PORT_CODE(KEYCODE_F17)    PORT_CHAR(UCHAR_MAMEKEY(F17))
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 61 */ PORT_CODE(KEYCODE_F18)    PORT_CHAR(UCHAR_MAMEKEY(F18))
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 62 */ PORT_CODE(KEYCODE_F19)    PORT_CHAR(UCHAR_MAMEKEY(F19))
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 63 */ PORT_CODE(KEYCODE_F20)    PORT_CHAR(UCHAR_MAMEKEY(F20))
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 64 */ PORT_CODE(KEYCODE_UP)     PORT_CHAR(UCHAR_MAMEKEY(UP))
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 65 */ PORT_CODE(KEYCODE_DOWN)   PORT_CHAR(UCHAR_MAMEKEY(DOWN))
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 66 */ PORT_CODE(KEYCODE_LEFT)   PORT_CHAR(UCHAR_MAMEKEY(LEFT))
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 67 */ PORT_CODE(KEYCODE_RIGHT)  PORT_CHAR(UCHAR_MAMEKEY(RIGHT))
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 68 */ PORT_CODE(KEYCODE_HOME)   PORT_CHAR(UCHAR_MAMEKEY(HOME))
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 69 */ PORT_NAME("Find")
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 6a */ PORT_CODE(KEYCODE_INSERT) PORT_CHAR(UCHAR_MAMEKEY(INSERT)) PORT_NAME("Insert Here")
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 6b */ PORT_CODE(KEYCODE_DEL)    PORT_CHAR(UCHAR_MAMEKEY(DEL))    PORT_NAME("Remove")
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 6c */ PORT_NAME("Select")
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 6d */ PORT_CODE(KEYCODE_PGUP)   PORT_CHAR(UCHAR_MAMEKEY(PGUP))   PORT_NAME("Prev. Screen")
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_KEYBOARD) /* 6e */ PORT_CODE(KEYCODE_PGDN)   PORT_CHAR(UCHAR_MAMEKEY(PGDN))   PORT_NAME("Next Screen")
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_UNUSED) /* 6f */
+
+	PORT_START("row_7")
+	PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_UNUSED) /* 70 */
+	PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_UNUSED) /* 71 */
+	PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_UNUSED) /* 72 */
+	PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_UNUSED) /* 73 */
+	PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_UNUSED) /* 74 */
+	PORT_BIT(0x0020, IP_ACTIVE_HIGH, IPT_UNUSED) /* 75 */
+	PORT_BIT(0x0040, IP_ACTIVE_HIGH, IPT_UNUSED) /* 76 */
+	PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_UNUSED) /* 77 */
+	PORT_BIT(0x0100, IP_ACTIVE_HIGH, IPT_UNUSED) /* 78 */
+	PORT_BIT(0x0200, IP_ACTIVE_HIGH, IPT_UNUSED) /* 79 */
+	PORT_BIT(0x0400, IP_ACTIVE_HIGH, IPT_UNUSED) /* 7a */
+	PORT_BIT(0x0800, IP_ACTIVE_HIGH, IPT_UNUSED) /* 7b */
+	PORT_BIT(0x1000, IP_ACTIVE_HIGH, IPT_UNUSED) /* 7c */
+	PORT_BIT(0x2000, IP_ACTIVE_HIGH, IPT_UNUSED) /* 7d */
+	PORT_BIT(0x4000, IP_ACTIVE_HIGH, IPT_UNUSED) /* 7e */
+	PORT_BIT(0x8000, IP_ACTIVE_HIGH, IPT_UNUSED) /* 7f */
+INPUT_PORTS_END
+
+ioport_constructor xds_kbd_hle_device::device_input_ports() const
+{
+	return INPUT_PORTS_NAME( keyboard );
+}
+
+
+//**************************************************************************
+//  LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+//  xds_kbd_hle_device - constructor
+//-------------------------------------------------
+
+xds_kbd_hle_device::xds_kbd_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+	device_t(mconfig, XDS_KBD_HLE, tag, owner, clock),
+	device_buffered_serial_interface(mconfig, *this),
+	device_matrix_keyboard_interface(mconfig, *this, "row_0", "row_1", "row_2", "row_3", "row_4", "row_5", "row_6", "row_7"),
+	m_tx_handler(*this),
+	m_cts_handler(*this)
+{
+}
+
+//-------------------------------------------------
+//  device_start - device-specific startup
+//-------------------------------------------------
+
+void xds_kbd_hle_device::device_start()
+{
+	// signal ready
+	m_cts_handler(0);
+}
+
+//-------------------------------------------------
+//  device_reset - device-specific reset
+//-------------------------------------------------
+
+void xds_kbd_hle_device::device_reset()
+{
+	clear_fifo();
+
+	receive_register_reset();
+	transmit_register_reset();
+
+	set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
+	set_rcv_rate(1200);
+	set_tra_rate(1200);
+
+	reset_key_state();
+	start_processing(attotime::from_hz(1200));
+	typematic_stop();
+}
+
+//-------------------------------------------------
+//  tra_callback - send bit to host
+//-------------------------------------------------
+
+void xds_kbd_hle_device::tra_callback()
+{
+	m_tx_handler(transmit_register_get_data_bit());
+}
+
+//-------------------------------------------------
+//  received_byte - handle received byte
+//-------------------------------------------------
+
+void xds_kbd_hle_device::received_byte(uint8_t byte)
+{
+	logerror("Received from host: %02x\n", byte);
+}
+
+//-------------------------------------------------
+//  key_make - handle a key being pressed
+//-------------------------------------------------
+
+void xds_kbd_hle_device::key_make(uint8_t row, uint8_t column)
+{
+	// send the make code
+	uint8_t code = row * 16 + column;
+	transmit_byte(code);
+
+	// no typematic for modifier keys
+	if (code != 0x34 && code != 0x36 && code != 0x38)
+		typematic_start(row, column, attotime::from_msec(750), attotime::from_msec(50));
+}
+
+//-------------------------------------------------
+//  key_break - handle a key being released
+//-------------------------------------------------
+
+void xds_kbd_hle_device::key_break(uint8_t row, uint8_t column)
+{
+	// send the break code
+	uint8_t code = row * 16 + column;
+	transmit_byte(0x80 | code);
+
+	if (typematic_is(row, column))
+		typematic_stop();
+}
+
+//-------------------------------------------------
+//  key_repeat - handle a key being repeated
+//-------------------------------------------------
+
+void xds_kbd_hle_device::key_repeat(u8 row, u8 column)
+{
+	uint8_t code = row * 16 + column;
+	transmit_byte(code);
+}
+
+//-------------------------------------------------
+//  rx_w - receive bit from host
+//-------------------------------------------------
+
+void xds_kbd_hle_device::rx_w(int state)
+{
+	device_buffered_serial_interface::rx_w(state);
+}
diff --git a/src/mame/visual/xds_kbd.h b/src/mame/visual/xds_kbd.h
new file mode 100644
index 00000000000..85f61188d78
--- /dev/null
+++ b/src/mame/visual/xds_kbd.h
@@ -0,0 +1,61 @@
+// license: BSD-3-Clause
+// copyright-holders: Dirk Best
+/***************************************************************************
+
+    Visual X Display Station Keyboard (HLE)
+
+***************************************************************************/
+
+#ifndef MAME_VISUAL_XDS_KBD_H
+#define MAME_VISUAL_XDS_KBD_H
+
+#pragma once
+
+#include "machine/keyboard.h"
+#include "diserial.h"
+
+
+//**************************************************************************
+//  TYPE DEFINITIONS
+//**************************************************************************
+
+class xds_kbd_hle_device :
+	public device_t,
+	public device_buffered_serial_interface<16>,
+	protected device_matrix_keyboard_interface<8>
+{
+public:
+	// construction/destruction
+	xds_kbd_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+	// callbacks
+	auto tx_handler() { return m_tx_handler.bind(); }
+	auto cts_handler() { return m_cts_handler.bind(); }
+
+	// from host
+	void rx_w(int state);
+
+protected:
+	// device_t overrides
+	virtual ioport_constructor device_input_ports() const override;
+	virtual void device_start() override;
+	virtual void device_reset() override;
+
+	// device_buffered_serial_interface overrides
+	virtual void tra_callback() override;
+	virtual void received_byte(uint8_t byte) override;
+
+	// device_matrix_keyboard_interface overrides
+	virtual void key_make(uint8_t row, uint8_t column) override;
+	virtual void key_break(uint8_t row, uint8_t column) override;
+	virtual void key_repeat(uint8_t row, uint8_t column) override;
+
+private:
+	devcb_write_line m_tx_handler;
+	devcb_write_line m_cts_handler;
+};
+
+// device type definition
+DECLARE_DEVICE_TYPE(XDS_KBD_HLE, xds_kbd_hle_device)
+
+#endif // MAME_VISUAL_XDS_KBD_H
diff --git a/src/mame/yamaha/ymmu10.cpp b/src/mame/yamaha/ymmu10.cpp
index 4713707b0c1..736c4373ca5 100644
--- a/src/mame/yamaha/ymmu10.cpp
+++ b/src/mame/yamaha/ymmu10.cpp
@@ -53,9 +53,9 @@ class mu10_state : public driver_device
 	u16 adc_battery_r();
 	u16 adc_midisw_r();
 
-	void p6_w(u16 data);
-	void pa_w(u16 data);
-	void pb_w(u16 data);
+	void p6_w(u8 data);
+	void pa_w(u8 data);
+	void pb_w(u8 data);
 	u8 pb_r();
 
 	void mu10_map(address_map &map);
@@ -98,13 +98,13 @@ u16 mu10_state::adc_midisw_r()
 	return 0x000;
 }
 
-void mu10_state::p6_w(u16 data)
+void mu10_state::p6_w(u8 data)
 {
 	cur_p6 = data;
 	logerror("reset swp %d dac %d\n", BIT(data, 2), BIT(data, 0));
 }
 
-void mu10_state::pb_w(u16 data)
+void mu10_state::pb_w(u8 data)
 {
 	cur_pb = data;
 	logerror("led %d gain %d\n", BIT(data, 0), BIT(data, 2));
@@ -116,7 +116,7 @@ u8 mu10_state::pb_r()
 	return 8;
 }
 
-void mu10_state::pa_w(u16 data)
+void mu10_state::pa_w(u8 data)
 {
 	cur_pa = data;
 	logerror("mac host pin 1 %d\n", !BIT(data, 2));
diff --git a/src/mame/yamaha/ymmu100.cpp b/src/mame/yamaha/ymmu100.cpp
index d82d134770e..a6e2dae03c9 100644
--- a/src/mame/yamaha/ymmu100.cpp
+++ b/src/mame/yamaha/ymmu100.cpp
@@ -199,19 +199,19 @@ class mu100_state : public driver_device
 	u16 adc_midisw_r();
 	u16 adc_battery_r();
 
-	void p1_w(u16 data);
-	u16 p1_r();
-	void p2_w(u16 data);
-	void p3_w(u16 data);
-	void p5_w(u16 data);
-	void p6_w(u16 data);
-	u16 p6_r();
-	void pa_w(u16 data);
-	u16 pa_r();
-	void pb_w(u16 data);
-	u16 pb_r();
-	void pf_w(u16 data);
-	void pg_w(u16 data);
+	void p1_w(u8 data);
+	u8 p1_r();
+	void p2_w(u8 data);
+	void p3_w(u8 data);
+	void p5_w(u8 data);
+	void p6_w(u8 data);
+	u8 p6_r();
+	void pa_w(u8 data);
+	u8 pa_r();
+	void pb_w(u8 data);
+	u8 pb_r();
+	void pf_w(u8 data);
+	void pg_w(u8 data);
 
 	void ext_serial_update();
 	void h8_tx(int state);
@@ -305,12 +305,12 @@ u16 mu100r_state::adc_type_r()
 	return 0x3ff;
 }
 
-void mu100_state::p1_w(u16 data)
+void mu100_state::p1_w(u8 data)
 {
 	m_cur_p1 = data;
 }
 
-u16 mu100_state::p1_r()
+u8 mu100_state::p1_r()
 {
 	if((m_cur_p2 & P2_LCD_ENABLE)) {
 		if(m_cur_p2 & P2_LCD_RW) {
@@ -334,10 +334,10 @@ u16 mu100_state::p1_r()
 	return 0xff;
 }
 
-void mu100_state::p2_w(u16 data)
+void mu100_state::p2_w(u8 data)
 {
-	// LCB enable edge
-	if(!(m_cur_p2 & P2_LCD_ENABLE) && (data & P2_LCD_ENABLE)) {
+	// LCD enable edge
+	if((m_cur_p2 & P2_LCD_ENABLE) && !(data & P2_LCD_ENABLE)) {
 		if(!(m_cur_p2 & P2_LCD_RW)) {
 			if(m_cur_p2 & P2_LCD_RS)
 				m_lcd->data_write(m_cur_p1);
@@ -349,44 +349,44 @@ void mu100_state::p2_w(u16 data)
 	m_cur_p2 = data;
 }
 
-void mu100_state::p3_w(u16 data)
+void mu100_state::p3_w(u8 data)
 {
 	m_cur_p3 = data;
 	logerror("A/D gain control %d\n", (data >> 4) & 3);
 }
 
-void mu100_state::p5_w(u16 data)
+void mu100_state::p5_w(u8 data)
 {
 	m_cur_p5 = data;
 	logerror("Rotary reset %d\n", (data >> 3) & 1);
 }
 
-void mu100_state::p6_w(u16 data)
+void mu100_state::p6_w(u8 data)
 {
 	m_cur_p6 = data;
 	m_cur_sw = (m_cur_sw & 0xc) | BIT(m_cur_pf, 2, 2);
 	ext_serial_update();
 }
 
-u16 mu100_state::p6_r()
+u8 mu100_state::p6_r()
 {
 	//  logerror("plug in detect read\n");
 	return 0x00;
 }
 
-void mu100_state::pa_w(u16 data)
+void mu100_state::pa_w(u8 data)
 {
 	m_cur_pa = data;
 	logerror("rotary encoder %d\n", (data >> 6) & 3);
 }
 
-u16 mu100_state::pa_r()
+u8 mu100_state::pa_r()
 {
 	logerror("offline detect read\n");
 	return 0x00;
 }
 
-void mu100_state::pf_w(u16 data)
+void mu100_state::pf_w(u8 data)
 {
 	if(!(m_cur_pf & 0x01) && (data & 0x01)) {
 		m_cur_ic32 = m_cur_p1;
@@ -397,7 +397,7 @@ void mu100_state::pf_w(u16 data)
 	ext_serial_update();
 }
 
-void mu100_state::pg_w(u16 data)
+void mu100_state::pg_w(u8 data)
 {
 	m_cur_pg = data;
 	m_cur_sw = (m_cur_sw & 0xb) | (BIT(m_cur_pg, 0) << 2);
diff --git a/src/mame/yamaha/ymmu128.cpp b/src/mame/yamaha/ymmu128.cpp
index 8743612aadc..94c402028ee 100644
--- a/src/mame/yamaha/ymmu128.cpp
+++ b/src/mame/yamaha/ymmu128.cpp
@@ -60,17 +60,17 @@ class mu128_state : public driver_device
 
 	virtual void machine_start() override;
 	virtual void machine_reset() override;
-	
+
 	u16 pe_r();
 	void pe_w(u16 data);
 };
-	
+
 void mu128_state::machine_start()
 {
 	save_item(NAME(m_pe));
 	m_pe = 0;
 }
-	
+
 void mu128_state::machine_reset()
 {
 }
@@ -107,16 +107,16 @@ u16 mu128_state::pe_r()
 
 void mu128_state::pe_w(u16 data)
 {
-	u16 prev = m_pe;
-	m_pe = data;
-	if(BIT(m_pe, 4) && !BIT(prev, 4)) {
-		if(!BIT(m_pe, 0)) {
-			if(BIT(m_pe, 2))
-				m_lcd->data_write(m_pe >> 8);
+	if(BIT(m_pe, 4) && !BIT(data, 4)) {
+		if(!BIT(data, 0)) {
+			if(BIT(data, 2))
+				m_lcd->data_write(data >> 8);
 			else
-				m_lcd->control_write(m_pe >> 8);
+				m_lcd->control_write(data >> 8);
 		}
-	}	
+	}
+
+	m_pe = data;
 }
 
 void mu128_state::map(address_map &map)
diff --git a/src/mame/yamaha/ymmu15.cpp b/src/mame/yamaha/ymmu15.cpp
index 03e7a912931..88506fe47d2 100644
--- a/src/mame/yamaha/ymmu15.cpp
+++ b/src/mame/yamaha/ymmu15.cpp
@@ -34,7 +34,7 @@ class mu15_state : public driver_device
 	mu15_state(const machine_config &mconfig, device_type type, const char *tag)
 		: driver_device(mconfig, type, tag)
 		, m_maincpu(*this, "maincpu")
-			  //        , m_nvram(*this, "ram")
+		//, m_nvram(*this, "ram")
 		, m_lcd(*this, "lcd")
 		, m_ram1(*this, "ram1")
 		, m_ram2(*this, "ram2")
@@ -106,10 +106,10 @@ u16 mu15_state::adc_battery_r()
 	return 0x200;
 }
 
-void mu15_state::p6_w(u16 data)
+void mu15_state::p6_w(u8 data)
 {
 	data ^= P6_LCD_ENABLE;
-	if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
+	if((cur_p6 & P6_LCD_ENABLE) && !(data & P6_LCD_ENABLE)) {
 		if(!(cur_p6 & P6_LCD_RW)) {
 			if(cur_p6 & P6_LCD_RS)
 				m_lcd->data_write(cur_pa);
@@ -121,32 +121,32 @@ void mu15_state::p6_w(u16 data)
 	cur_p6 = data;
 }
 
-u16 mu15_state::p6_r()
+u8 mu15_state::p6_r()
 {
 	return cur_p6;
 }
 
-u16 mu15_state::pb_r()
+u8 mu15_state::pb_r()
 {
 	return cur_pb;
 }
 
-void mu15_state::pb_w(u16 data)
+void mu15_state::pb_w(u8 data)
 {
 	cur_pb = data;
 }
 
-void mu15_state::pa_w(u16 data)
+void mu15_state::pa_w(u8 data)
 {
 	cur_pa = data;
 }
 
-void mu15_state::pc_w(u16 data)
+void mu15_state::pc_w(u8 data)
 {
 	cur_pc = data;
 }
 
-u16 mu15_state::pa_r()
+u8 mu15_state::pa_r()
 {
 	if((cur_p6 & P6_LCD_ENABLE)) {
 		if(cur_p6 & P6_LCD_RW)
@@ -161,9 +161,9 @@ u16 mu15_state::pa_r()
 	return cur_pa;
 }
 
-u16 mu15_state::pc_r()
+u8 mu15_state::pc_r()
 {
-	u16 res = cur_pc | 0x7c;
+	u8 res = cur_pc | 0x7c;
 	if(!(cur_pc & 0x01))
 		res &= m_ioport_o0->read();
 	if(!(cur_pc & 0x02))
diff --git a/src/mame/yamaha/ymmu5.cpp b/src/mame/yamaha/ymmu5.cpp
index 2e08762e818..7c86d67f189 100644
--- a/src/mame/yamaha/ymmu5.cpp
+++ b/src/mame/yamaha/ymmu5.cpp
@@ -52,10 +52,10 @@ class mu5_state : public driver_device
 	u8 m_lcd_ctrl = 0U;
 	u8 m_lcd_data = 0U;
 
-	void lcd_ctrl_w(u16 data);
-	u16 lcd_ctrl_r();
-	void lcd_data_w(u16 data);
-	u16 lcd_data_r();
+	void lcd_ctrl_w(u8 data);
+	u8 lcd_ctrl_r();
+	void lcd_data_w(u8 data);
+	u8 lcd_data_r();
 
 	u8 m_matrixsel;
 	u8 matrix_r();
@@ -98,7 +98,7 @@ u8 mu5_state::matrix_r()
 	return data;
 }
 
-void mu5_state::lcd_ctrl_w(u16 data)
+void mu5_state::lcd_ctrl_w(u8 data)
 {
 	// bit 2 = rs
 	// bit 1 = r/w
@@ -124,17 +124,17 @@ void mu5_state::lcd_ctrl_w(u16 data)
 	}
 }
 
-u16 mu5_state::lcd_ctrl_r()
+u8 mu5_state::lcd_ctrl_r()
 {
 	return m_lcd_ctrl;
 }
 
-void mu5_state::lcd_data_w(u16 data)
+void mu5_state::lcd_data_w(u8 data)
 {
 	m_lcd_data = data;
 }
 
-u16 mu5_state::lcd_data_r()
+u8 mu5_state::lcd_data_r()
 {
 	return m_lcd_data;
 }
diff --git a/src/mame/yamaha/ymmu50.cpp b/src/mame/yamaha/ymmu50.cpp
index 27c1b9dcc6b..16586faaeef 100644
--- a/src/mame/yamaha/ymmu50.cpp
+++ b/src/mame/yamaha/ymmu50.cpp
@@ -96,14 +96,14 @@ class mu50_state : public driver_device
 	u16 adc_midisw_r();
 	u16 adc_battery_r();
 
-	void p6_w(u16 data);
-	u16 p6_r();
-	void pa_w(u16 data);
-	u16 pa_r();
-	void pb_w(u16 data);
-	u16 pb_r();
-	void pc_w(u16 data);
-	u16 pc_r();
+	void p6_w(u8 data);
+	u8 p6_r();
+	void pa_w(u8 data);
+	u8 pa_r();
+	void pb_w(u8 data);
+	u8 pb_r();
+	void pc_w(u8 data);
+	u8 pc_r();
 
 	void mu50_map(address_map &map);
 
@@ -157,10 +157,10 @@ u16 mu50_state::adc_battery_r()
 	return 0x200;
 }
 
-void mu50_state::p6_w(u16 data)
+void mu50_state::p6_w(u8 data)
 {
 	data ^= P6_LCD_ENABLE;
-	if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
+	if((cur_p6 & P6_LCD_ENABLE) && !(data & P6_LCD_ENABLE)) {
 		if(!(cur_p6 & P6_LCD_RW)) {
 			if(cur_p6 & P6_LCD_RS)
 				m_lcd->data_write(cur_pa);
@@ -172,32 +172,32 @@ void mu50_state::p6_w(u16 data)
 	cur_p6 = data;
 }
 
-u16 mu50_state::p6_r()
+u8 mu50_state::p6_r()
 {
 	return cur_p6;
 }
 
-u16 mu50_state::pb_r()
+u8 mu50_state::pb_r()
 {
 	return cur_pb;
 }
 
-void mu50_state::pb_w(u16 data)
+void mu50_state::pb_w(u8 data)
 {
 	cur_pb = data;
 }
 
-void mu50_state::pa_w(u16 data)
+void mu50_state::pa_w(u8 data)
 {
 	cur_pa = data;
 }
 
-void mu50_state::pc_w(u16 data)
+void mu50_state::pc_w(u8 data)
 {
 	cur_pc = data;
 }
 
-u16 mu50_state::pa_r()
+u8 mu50_state::pa_r()
 {
 	if((cur_p6 & P6_LCD_ENABLE)) {
 		if(cur_p6 & P6_LCD_RW)
@@ -212,9 +212,9 @@ u16 mu50_state::pa_r()
 	return cur_pa;
 }
 
-u16 mu50_state::pc_r()
+u8 mu50_state::pc_r()
 {
-	u16 res = cur_pc | 0x7c;
+	u8 res = cur_pc | 0x7c;
 	if(!(cur_pc & 0x01))
 		res &= m_ioport_o0->read();
 	if(!(cur_pc & 0x02))
diff --git a/src/mame/yamaha/ymmu80.cpp b/src/mame/yamaha/ymmu80.cpp
index cb73283ab56..065fcc63cb8 100644
--- a/src/mame/yamaha/ymmu80.cpp
+++ b/src/mame/yamaha/ymmu80.cpp
@@ -178,18 +178,6 @@ class mu80_state : public driver_device
 	void mu80(machine_config &config);
 
 private:
-	enum {
-		P2_LCD_RS     = 0x01,
-		P2_LCD_RW     = 0x02,
-		P2_LCD_ENABLE = 0x04
-	};
-
-	enum {
-		P6_LCD_RS     = 0x04,
-		P6_LCD_RW     = 0x02,
-		P6_LCD_ENABLE = 0x01
-	};
-
 	enum {
 		PA_LCD_RS     = 0x02,
 		PA_LCD_ENABLE = 0x20,
@@ -211,12 +199,12 @@ class mu80_state : public driver_device
 	u16 adc_midisw_r();
 	u16 adc_battery_r();
 
-	void p6_w(u16 data);
-	u16 p6_r();
-	void pa_w(u16 data);
-	u16 pa_r();
-	void pb_w(u16 data);
-	u16 pb_r();
+	void p6_w(u8 data);
+	u8 p6_r();
+	void pa_w(u8 data);
+	u8 pa_r();
+	void pb_w(u8 data);
+	u8 pb_r();
 
 	virtual void machine_start() override;
 	virtual void machine_reset() override;
@@ -267,12 +255,12 @@ u16 mu80_state::adc_battery_r()
 	return 0x200;
 }
 
-void mu80_state::pb_w(u16 data)
+void mu80_state::pb_w(u8 data)
 {
 	cur_pb = data;
 }
 
-u16 mu80_state::pb_r()
+u8 mu80_state::pb_r()
 {
 	if((cur_pa & PA_LCD_ENABLE)) {
 		if(cur_pa & PA_LCD_RW) {
@@ -297,20 +285,20 @@ u16 mu80_state::pb_r()
 	return cur_pb;
 }
 
-void mu80_state::p6_w(u16 data)
+void mu80_state::p6_w(u8 data)
 {
 	cur_p6 = data;
 }
 
-u16 mu80_state::p6_r()
+u8 mu80_state::p6_r()
 {
 	return cur_p6;
 }
 
-void mu80_state::pa_w(u16 data)
+void mu80_state::pa_w(u8 data)
 {
 	data ^= PA_LCD_ENABLE;
-	if(!(cur_pa & PA_LCD_ENABLE) && (data & PA_LCD_ENABLE)) {
+	if((cur_pa & PA_LCD_ENABLE) && !(data & PA_LCD_ENABLE)) {
 		if(!(cur_pa & PA_LCD_RW)) {
 			if(cur_pa & PA_LCD_RS)
 				m_lcd->data_write(cur_pb);
@@ -325,7 +313,7 @@ void mu80_state::pa_w(u16 data)
 	cur_pa = data;
 }
 
-u16 mu80_state::pa_r()
+u8 mu80_state::pa_r()
 {
 	return cur_pa;
 }
diff --git a/src/mame/yamaha/ymmu90.cpp b/src/mame/yamaha/ymmu90.cpp
index cc0b759143f..d29708bd899 100644
--- a/src/mame/yamaha/ymmu90.cpp
+++ b/src/mame/yamaha/ymmu90.cpp
@@ -83,9 +83,9 @@ class mu90_state : public driver_device
 	u16 adc_midisw_r();
 	u16 adc_battery_r();
 
-	void pa_w(u16 data);
-	void pb_w(u16 data);
-	u16 pb_r();
+	void pa_w(u8 data);
+	void pb_w(u8 data);
+	u8 pb_r();
 
 	virtual void machine_start() override;
 	virtual void machine_reset() override;
@@ -140,12 +140,12 @@ u16 mu90_state::adc_battery_r()
 	return 0x200;
 }
 
-void mu90_state::pb_w(u16 data)
+void mu90_state::pb_w(u8 data)
 {
 	cur_pb = data;
 }
 
-u16 mu90_state::pb_r()
+u8 mu90_state::pb_r()
 {
 	u8 res = 0xff;
 	if((cur_pa & 0x20)) {
@@ -167,7 +167,7 @@ u16 mu90_state::pb_r()
 	return res;
 }
 
-void mu90_state::pa_w(u16 data)
+void mu90_state::pa_w(u8 data)
 {
 	if(!(cur_pa & 0x01) && (data & 0x01)) {
 		m_lcd->set_contrast(cur_pb & 7);
@@ -175,7 +175,7 @@ void mu90_state::pa_w(u16 data)
 		logerror("ad2 input level %s\n", cur_pb & 0x40 ? "line" : "mic");
 	}
 
-	if(!(cur_pa & 0x20) && (data & 0x20)) {
+	if((cur_pa & 0x20) && !(data & 0x20)) {
 		if(!(cur_pa & 0x40)) {
 			if(cur_pa & 0x02)
 				m_lcd->data_write(cur_pb);
diff --git a/src/mame/yamaha/ympsr2000.cpp b/src/mame/yamaha/ympsr2000.cpp
index 4edbed9cbec..89bc48c01de 100644
--- a/src/mame/yamaha/ympsr2000.cpp
+++ b/src/mame/yamaha/ympsr2000.cpp
@@ -7,11 +7,15 @@
 #include "bus/midi/midioutport.h"
 #include "cpu/sh/sh4.h"
 #include "video/sed1330.h"
+
 #include "debugger.h"
 #include "emupal.h"
 #include "screen.h"
 #include "speaker.h"
 
+
+namespace {
+
 class psr2000_state : public driver_device {
 public:
 	psr2000_state(const machine_config &mconfig, device_type type, const char *tag)
@@ -97,4 +101,6 @@ ROM_START( psr2000 )
 	ROM_LOAD32_WORD_SWAP( "x004110.ic407", 2, 0x800000, CRC(fae720fe) SHA1(df80a9a75308f0ab1ab33248b5e8cd6563e6aed5))
 ROM_END
 
+} // anonymous namespace
+
 SYST( 2001, psr2000, 0, 0, psr2000, psr2000, psr2000_state, empty_init, "Yamaha", "PSR2000", MACHINE_IS_SKELETON )
diff --git a/src/mame/yamaha/ymqy70.cpp b/src/mame/yamaha/ymqy70.cpp
index 7b27bac96fd..458f5583612 100644
--- a/src/mame/yamaha/ymqy70.cpp
+++ b/src/mame/yamaha/ymqy70.cpp
@@ -107,7 +107,7 @@ class qy70_state : public driver_device
 
 	u8 sw_sel;
 
-	void pa_w(u16 data) { if (data) sw_sel = data; }
+	void pa_w(u8 data) { if (data) sw_sel = data; }
 	u8 sw_in();
 	u16 adc_bkupbat_r() { return 0x2a0; }
 	void mem_map(address_map &map);
diff --git a/src/mame/yamaha/ymvl70.cpp b/src/mame/yamaha/ymvl70.cpp
index 5cf5c151ceb..3938f6714bb 100644
--- a/src/mame/yamaha/ymvl70.cpp
+++ b/src/mame/yamaha/ymvl70.cpp
@@ -59,24 +59,12 @@ class vl70_state : public driver_device
 	void vl70(machine_config &config);
 
 private:
-	enum {
-		P2_LCD_RS     = 0x01,
-		P2_LCD_RW     = 0x02,
-		P2_LCD_ENABLE = 0x04
-	};
-
 	enum {
 		P6_LCD_RS     = 0x04,
 		P6_LCD_RW     = 0x02,
 		P6_LCD_ENABLE = 0x01
 	};
 
-	enum {
-		PA_LCD_RS     = 0x02,
-		PA_LCD_ENABLE = 0x20,
-		PA_LCD_RW     = 0x40
-	};
-
 	required_device<h83003_device> m_vl70cpu;
 	required_device<dspv_device> m_dspv;
 	required_device<meg_device> m_meg;
@@ -85,20 +73,18 @@ class vl70_state : public driver_device
 	required_ioport m_ioport_b1;
 	required_ioport m_ioport_b2;
 
-	u8 cur_p1, cur_p2, cur_p3, cur_p5, cur_p6, cur_pa, cur_pc, cur_pf, cur_pg;
-	u8 cur_ic32;
+	u8 cur_p6, cur_pa, cur_pc;
 
 	u16 adc_midisw_r();
 	u16 adc_battery_r();
 	u16 adc_breath_r();
 
-	void p6_w(u16 data);
-	u16 p6_r();
-	void pa_w(u16 data);
-	u16 pa_r();
-	void pb_w(u16 data);
-	void pc_w(u16 data);
-	u16 pc_r();
+	void p6_w(u8 data);
+	void pa_w(u8 data);
+	u8 pa_r();
+	void pb_w(u8 data);
+	void pc_w(u8 data);
+	u8 pc_r();
 
 	virtual void machine_start() override;
 	void vl70_map(address_map &map);
@@ -106,7 +92,7 @@ class vl70_state : public driver_device
 
 void vl70_state::machine_start()
 {
-	cur_p1 = cur_p2 = cur_p3 = cur_p5 = cur_p6 = cur_pa = cur_pc = cur_pf = cur_pg = cur_ic32 = 0xff;
+	cur_p6 = cur_pa = cur_pc = 0xff;
 }
 
 void vl70_state::vl70_map(address_map &map)
@@ -135,31 +121,31 @@ u16 vl70_state::adc_breath_r()
 	return 0x000;
 }
 
-void vl70_state::p6_w(u16 data)
+void vl70_state::p6_w(u8 data)
 {
-	if(!(cur_p6 & P6_LCD_ENABLE) && (data & P6_LCD_ENABLE)) {
-	if(!(cur_p6 & P6_LCD_RW)) {
-		if(cur_p6 & P6_LCD_RS)
-			m_lcd->data_write(cur_pa);
-		else
-			m_lcd->control_write(cur_pa);
+	if((cur_p6 & P6_LCD_ENABLE) && !(data & P6_LCD_ENABLE)) {
+		if(!(cur_p6 & P6_LCD_RW)) {
+			if(cur_p6 & P6_LCD_RS)
+				m_lcd->data_write(cur_pa);
+			else
+				m_lcd->control_write(cur_pa);
 		}
 	}
 
 	cur_p6 = data;
 }
 
-void vl70_state::pb_w(u16 data)
+void vl70_state::pb_w(u8 data)
 {
 	m_lcd->set_leds(bitswap<6>((data >> 2) ^ 0x3f, 5, 3, 1, 4, 2, 0));
 }
 
-void vl70_state::pc_w(u16 data)
+void vl70_state::pc_w(u8 data)
 {
 	cur_pc = data;
 }
 
-u16 vl70_state::pc_r()
+u8 vl70_state::pc_r()
 {
 	u8 r = 0xff;
 	if(!(cur_pc & 0x01))
@@ -171,17 +157,12 @@ u16 vl70_state::pc_r()
 	return r;
 }
 
-u16 vl70_state::p6_r()
-{
-	return cur_p6;
-}
-
-void vl70_state::pa_w(u16 data)
+void vl70_state::pa_w(u8 data)
 {
 	cur_pa = data;
 }
 
-u16 vl70_state::pa_r()
+u8 vl70_state::pa_r()
 {
 	if((cur_p6 & P6_LCD_ENABLE)) {
 		if(cur_p6 & P6_LCD_RW)
@@ -209,7 +190,6 @@ void vl70_state::vl70(machine_config &config)
 	m_vl70cpu->read_adc<5>().set_constant(0);
 	m_vl70cpu->read_adc<6>().set_constant(0);
 	m_vl70cpu->read_adc<7>().set_constant(0);
-	m_vl70cpu->read_port6().set(FUNC(vl70_state::p6_r));
 	m_vl70cpu->write_port6().set(FUNC(vl70_state::p6_w));
 	m_vl70cpu->read_porta().set(FUNC(vl70_state::pa_r));
 	m_vl70cpu->write_porta().set(FUNC(vl70_state::pa_w));
diff --git a/src/tools/unidasm.cpp b/src/tools/unidasm.cpp
index f6314420652..cd68c78adee 100644
--- a/src/tools/unidasm.cpp
+++ b/src/tools/unidasm.cpp
@@ -210,6 +210,7 @@ using util::BIT;
 #include "cpu/xtensa/xtensad.h"
 #include "cpu/z180/z180dasm.h"
 #include "cpu/z8/z8dasm.h"
+#include "cpu/z80/r800dasm.h"
 #include "cpu/z80/z80dasm.h"
 #include "cpu/z8000/8000dasm.h"
 
@@ -584,6 +585,7 @@ static const dasm_table_entry dasm_table[] =
 	{ "psxcpu",          le,  0, []() -> util::disasm_interface * { return new psxcpu_disassembler; } },
 	{ "r65c02",          le,  0, []() -> util::disasm_interface * { return new r65c02_disassembler; } },
 	{ "r65c19",          le,  0, []() -> util::disasm_interface * { return new r65c19_disassembler; } },
+	{ "r800",            le,  0, []() -> util::disasm_interface * { return new r800_disassembler; } },
 	{ "romp",            be,  0, []() -> util::disasm_interface * { return new romp_disassembler; } },
 	{ "rsp",             le,  0, []() -> util::disasm_interface * { return new rsp_disassembler; } },
 	{ "rupi44",          le,  0, []() -> util::disasm_interface * { return new rupi44_disassembler; } },