diff --git a/boards/esp32s3-seeedstudio/Kconfig b/boards/esp32s3-seeedstudio/Kconfig new file mode 100644 index 000000000000..eaf84d44b831 --- /dev/null +++ b/boards/esp32s3-seeedstudio/Kconfig @@ -0,0 +1,17 @@ +# Copyright (c) 2024 TUDresden +# 2024 Isikcan 'Jon' Yilmaz - TUDresden +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. + +config BOARD + default "esp32s3-seeedstudio" if BOARD_ESP32S3_SEEEDSTUDIO + +config BOARD_ESP32S3_SEEEDSTUDIO + bool + default y + select BOARD_COMMON_ESP32S3 + select CPU_MODEL_ESP32S3 + +source "$(RIOTBOARD)/common/esp32s3/Kconfig" diff --git a/boards/esp32s3-seeedstudio/Makefile b/boards/esp32s3-seeedstudio/Makefile new file mode 100644 index 000000000000..a8b9d8fbed28 --- /dev/null +++ b/boards/esp32s3-seeedstudio/Makefile @@ -0,0 +1,5 @@ +MODULE = board + +DIRS = $(RIOTBOARD)/common/esp32s3 + +include $(RIOTBASE)/Makefile.base diff --git a/boards/esp32s3-seeedstudio/Makefile.dep b/boards/esp32s3-seeedstudio/Makefile.dep new file mode 100644 index 000000000000..4159038b8def --- /dev/null +++ b/boards/esp32s3-seeedstudio/Makefile.dep @@ -0,0 +1,18 @@ +ifeq (,$(filter stdio_% slipdev_stdio usbus usbus% tinyusb_device,$(USEMODULE))) + # Use stdio_usb_serial_jtag if no other stdio is requested explicitly + # and neither USBUS nor tinyusb_device are used + USEMODULE += stdio_usb_serial_jtag + # Even if only stdio_usb_serial_jtag is enabled, usb_board_reset is enabled + # since there should be a CDC ACM interface in any case. This is necessary, + # for example, to reset the board if stdio_cdc_acm or stdio_tinyusb_cdc_acm + # was previously used. + USEMODULE += usb_board_reset + include $(RIOTMAKE)/tools/usb_board_reset.mk +endif + +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif + +include $(RIOTBOARD)/common/esp32s3/Makefile.dep +include $(RIOTBOARD)/common/makefiles/stdio_cdc_acm.dep.mk diff --git a/boards/esp32s3-seeedstudio/Makefile.features b/boards/esp32s3-seeedstudio/Makefile.features new file mode 100644 index 000000000000..e8eb675d05bf --- /dev/null +++ b/boards/esp32s3-seeedstudio/Makefile.features @@ -0,0 +1,18 @@ +# the board uses a ESP32-S3 with a 16MB QSPI Flash and a 8MB QSPI PSRAM +CPU_MODEL = esp32s3 +FEATURES_PROVIDED += esp_spi_ram + +# common board and CPU features +include $(RIOTBOARD)/common/esp32s3/Makefile.features + +# peripherals provided by the board +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_usbdev + +# other features provided by the board +FEATURES_PROVIDED += esp_jtag +FEATURES_PROVIDED += highlevel_stdio +FEATURES_PROVIDED += tinyusb_device diff --git a/boards/esp32s3-seeedstudio/Makefile.include b/boards/esp32s3-seeedstudio/Makefile.include new file mode 100644 index 000000000000..30fe489f8fd8 --- /dev/null +++ b/boards/esp32s3-seeedstudio/Makefile.include @@ -0,0 +1,8 @@ +# The board uses a ESP32-S3 with a 16MB QSPI Flash and a 8MB QSPI PSRAM +FLASH_SIZE ?= 16 + +PORT_LINUX ?= /dev/ttyACM0 + +OPENOCD_CONFIG ?= board/esp32s3-builtin.cfg + +include $(RIOTBOARD)/common/esp32s3/Makefile.include diff --git a/boards/esp32s3-seeedstudio/doc.txt b/boards/esp32s3-seeedstudio/doc.txt new file mode 100644 index 000000000000..597e81aa1b95 --- /dev/null +++ b/boards/esp32s3-seeedstudio/doc.txt @@ -0,0 +1,136 @@ +/* + * Copyright (C) 2024 Isikcan 'Jon' Yilmaz + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @defgroup boards_esp32s3_seeedstudio ESP32 Seeed Studio XIAO Board + * @ingroup boards_esp32s3 + * @brief Support for the Seeed Studio Xiao ESP32S3 + * @author Isikcan 'Jon' Yilmaz + +\section esp32s3_seeedstudio Seeed Studio Xiao ESP32 + +## Table of Contents {#esp32s3_seeedstudio_toc} + +1. [Overview](#esp32s3_seeedstudio_overview) +2. [Hardware](#esp32s3_seeedstudio_hardware) + 1. [MCU](#esp32s3_seeedstudio_mcu) + 2. [Board Configuration](#esp32s3_seeedstudio_board_configuration) + 3. [Board Pinout](#esp32s3_seeedstudio_pinout) +3. [Flashing the Device](#esp32s3_seeedstudio_flashing) +4. [Using STDIO](#esp32s3_seeedstudio_stdio) + +## Overview {#esp32s3_seeedstudio_overview} + +The Seeed Studio ESP32S3 is one of the ESP32-S3 boards from Seeed Studio. +\image html https://files.seeedstudio.com/wiki/SeeedStudio-XIAO-ESP32S3/img/xiaoesp32s3.jpg "Seeed Studio ESP32S3" width=800px + +Vendor's info page for the board [here](https://wiki.seeedstudio.com/xiao_esp32s3_getting_started/) + +The main features of the board are: + +- ESP32-S3 SoC with 2.4 GHz WiFi 802.11b/g/n and Bluetooth5, BLE +- 8 MByte Flash +- 8 MByte QSPI RAM +- Native USB and USB Serial JTAG +- 21 x 17.8 mm footprint + +[Back to table of contents](#esp32s3_seeedstudio_toc) + +## Hardware {#esp32s3_seeedstudio_hardware} + +This section describes + +- the [MCU](#esp32s3_seeedstudio_mcu), +- the default [board configuration](#esp32s3_seeedstudio_board_configuration), +- the [board pinout](#esp32s3_seeedstudio_pinout). + +[Back to table of contents](#esp32s3_seeedstudio_toc) + +### MCU {#esp32s3_seeedstudio_mcu} + +Most features of the board are provided by the ESP32-S3 SoC. For detailed +information about the ESP32-S3 SoC variant (family) and ESP32x SoCs, +see section \ref esp32_mcu_esp32 "ESP32 SoC Series". + +[Back to table of contents](#esp32s3_seeedstudio_toc) + +### Board Configuration {#esp32s3_seeedstudio_board_configuration} + +Seeed Studio Xiao ESP32S3 boards have no special hardware on board, besides a yellow LED connected to GPIO21. + +The default board configuration provides: + +- 9 x ADC +- 1 x SPI +- 1 x I2C +- 1 x UART +- 10 x PWM, 4 channels each + +For detailed information about the peripheral configurations of ESP32-S3 +boards, see section \ref esp32_peripherals "Common Peripherals". + +[Back to table of contents](#esp32s3_seeedstudio_toc) + +### Board Pinout {#esp32s3_seeedstudio_pinout} + +The following figure shows the pinout as configured by board definition (excluding the camera module). + +@image html https://files.seeedstudio.com/wiki/SeeedStudio-XIAO-ESP32S3/img/2.jpg "Seeed Studio Xiao ESP32S3 Pinout" width=900px + +The corresponding board schematic can be found +[here](https://files.seeedstudio.com/wiki/SeeedStudio-XIAO-ESP32S3/res/XIAO_ESP32S3_SCH_v1.2.pdf) + +[Back to table of contents](#esp32s3_seeedstudio_toc) + +## Flashing the Device {#esp32s3_seeedstudio_flashing} + +Since the board does not have a USB-to-Serial chip, the easiest way to flash +the board is using the USB Serial/JTAG interface. Just connect the board to +your host computer and use the following command: +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +BOARD=esp32s3-seeedstudio make flash ... +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +@note Usually the make system resets the board before flashing to enable the +USB Serial/JTAG interface. In some special cases this reset does not work so +that the programmer cannot connect to the board and the flashing is aborted +with a timeout: +``` +Serial port /dev/ttyACM0 +Connecting... +... +serial.serialutil.SerialTimeoutException: Write timeout +``` +This can happen for example if the board is not yet flashed with RIOT or the +USB interface is used for another purpose. In this case, restart the board +manually in download mode by pressing and releasing the RESET button while +holding down the BOOT button. In download mode, the USB Serial/JTAG interface is +always available. + +For detailed information about ESP32-S3 as well as configuring and compiling +RIOT for ESP32-S3 boards, see \ref esp32_riot. + +[Back to table of contents](#esp32s3_seeedstudio_toc) + +## Using STDIO {#esp32s3_seeedstudio_stdio} + +Since the board does not have a USB-to-Serial chip, the USB Serial/JTAG +interface is used by default for the STDIO (module `stdio_usb_serial_jtag`) +which provides an USB CDC ACM interface. + +If the USB port is used by the USBUS stack or the tinyUSB stack, implicitly +the module `stdio_cdc_acm` or `stdio_tinyusb_cdc_acm` is used for the STDIO +via the USB CDC ACM interface. + +Alternatively, the UART interface could be used with an external USB-to-Serial +adapter. Simply add `stdio_uart` to the list of used modules for this purpose: +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +BOARD=esp32s3-seeedstudio USEMODULE=stdio_uart make flash ... +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + */ diff --git a/boards/esp32s3-seeedstudio/include/board.h b/boards/esp32s3-seeedstudio/include/board.h new file mode 100644 index 000000000000..2c22e569c052 --- /dev/null +++ b/boards/esp32s3-seeedstudio/include/board.h @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2024 Isikcan 'Jon' Yilmaz + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_esp32s3_seeedstudio + * @brief Board definitions for Seeed Studio Xiao ESP32S3 board + * @{ + * + * The board definitions in this file are valid for the Seeed Studio Xiao ESP32S3 board. + * + * Any modifications required for specific applications + * can be overridden by \ref esp32_application_specific_configurations + * "application-specific board configuration". + * + * @file + * @author Isikcan 'Jon' Yilmaz + */ + +#ifndef BOARD_H +#define BOARD_H + +#include + +/** + * @name Button pin definitions + * @{ + */ + +/** + * @brief Default button GPIO pin definition + * + * Seeed Studio Xiao ESP32S3 boards have a BOOT button connected to GPIO0, which can be + * used as button during normal operation. Since the GPIO0 pin is pulled up, + * the button signal is inverted, i.e., pressing the button will give a + * low signal. + */ +#define BTN0_PIN GPIO0 + +/** + * @brief Default button GPIO mode definition + * + * Since the GPIO of the button is pulled up with an external resistor, the + * mode for the GPIO pin has to be GPIO_IN. + */ +#define BTN0_MODE GPIO_IN_PU + +/** + * @brief Default interrupt flank definition for the button GPIO + */ +#ifndef BTN0_INT_FLANK +#define BTN0_INT_FLANK GPIO_FALLING +#endif + +/** + * @brief Definition for compatibility with previous versions + */ +#define BUTTON0_PIN BTN0_PIN + +/** @} */ + +/** + * @name LED (on-board) configuration + * + * The Seeed Studio Xiao ESP32S3 board has one red LED connected to GPIO21. + * @{ + */ +/** @} */ +#ifndef LED0_PIN +#define LED0_PIN GPIO21 +#define LED0_ACTIVE (0) +#endif + +/* include common board definitions as last step */ +#include "board_common.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/esp32s3-seeedstudio/include/gpio_params.h b/boards/esp32s3-seeedstudio/include/gpio_params.h new file mode 100644 index 000000000000..082c0c97a914 --- /dev/null +++ b/boards/esp32s3-seeedstudio/include/gpio_params.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2024 Isikcan 'Jon' Yilmaz + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +/** + * @ingroup boards_esp32s3_seeedstudio + * @brief Board specific configuration of direct mapped GPIOs + * @file + * @author Isikcan 'Jon' Yilmaz + * @{ + */ + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief LED and Button configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "BOOT", + .pin = BTN0_PIN, + .mode = BTN0_MODE, + .flags = SAUL_GPIO_INVERTED + }, + { + .name = "LED", + .pin = LED0_PIN, + .mode = GPIO_OUT, + .flags = SAUL_GPIO_INIT_CLEAR + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/esp32s3-seeedstudio/include/periph_conf.h b/boards/esp32s3-seeedstudio/include/periph_conf.h new file mode 100644 index 000000000000..da38f00690f6 --- /dev/null +++ b/boards/esp32s3-seeedstudio/include/periph_conf.h @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2024 Isikcan 'Jon' Yilmaz + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_esp32s3_seeedstudio + * @brief Peripheral configurations for Seeed Studio Xiao ESP32S3 boards + * @{ + * + * Any modifications required for specific applications + * can be overridden by \ref esp32_application_specific_configurations + * "application-specific board configuration". + * + * For detailed information about the peripheral configuration for ESP32-S3 + * boards, see section \ref esp32_peripherals "Common Peripherals". + * + * @note + * Most definitions can be overridden by an \ref esp32_application_specific_configurations + * "application-specific board configuration" if necessary. + * + * @file + * @author Isikcan 'Jon' Yilmaz + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name ADC and DAC channel configuration + * @{ + */ +/** + * @brief Declaration of GPIOs that can be used as ADC channels + * + * All pins of ADC1 are declared as ADC channels. Keep in mind that GPIO10 is + * not broken out and used as VBAT signal. GPIO3 is a strapping pin if + * `EFUSE_STRAP_JTAG_SEL` is set, see \ref esp32_gpio_pins_esp32s3_strapping. + * + * @note As long as the GPIOs listed in ADC_GPIOS are not initialized as ADC + * channels with the `adc_init` function, they can be used for other + * purposes. + */ +#ifndef ADC_GPIOS +#define ADC_GPIOS { GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9 } +#endif +/** @} */ + +/** + * @name I2C configuration + * + * For generic boards, only one I2C interface I2C_DEV(0) is defined. + * + * The GPIOs listed in the configuration are only initialized as I2C signals + * when module `periph_i2c` is used. Otherwise they are not allocated and + * can be used for other purposes. + * + * @{ + */ +#ifndef I2C0_SPEED +#define I2C0_SPEED I2C_SPEED_FAST /**< I2C bus speed of I2C_DEV(0) */ +#endif +#ifndef I2C0_SCL +#define I2C0_SCL GPIO6 /**< SCL signal of I2C_DEV(0) */ +#endif +#ifndef I2C0_SDA +#define I2C0_SDA GPIO5 /**< SDA signal of I2C_DEV(0) */ +#endif +/** @} */ + +/** + * @name PWM channel configuration + * + * Two PWM devices are configured. These devices can use all GPIOs that are not + * defined as I2C, SPI or UART for this board. Generally, all outputs pins + * could be used as PWM channels. + * + * @note As long as the according PWM device is not initialized with + * the `pwm_init`, the GPIOs declared for this device can be used + * for other purposes. + * + * @{ + */ + +/** TODO all gpios are pwm in seeed esp32s3 + * @brief Declaration of the channels for device PWM_DEV(0), + * at maximum PWM_CHANNEL_NUM_DEV_MAX. + */ +// #ifndef PWM0_GPIOS +// #define PWM0_GPIOS { GPIO12, GPIO13, GPIO14, GPIO15, GPIO16 } +// #endif + +/** + * @brief Declaration of the channels for device PWM_DEV(1), + * at maximum PWM_CHANNEL_NUM_DEV_MAX. + */ +// #ifndef PWM1_GPIOS +// #define PWM1_GPIOS { GPIO6, GPIO7, GPIO21, GPIO38 } +// #endif + +/** @} */ + +/** + * @name SPI configuration + * + * @note The GPIOs listed in the configuration are first initialized as SPI + * signals when the corresponding SPI interface is used for the first time + * by either calling the `spi_init_cs` function or the `spi_acquire` + * function. That is, they are not allocated as SPI signals before and can + * be used for other purposes as long as the SPI interface is not used. + * @{ TODO SPI pins + */ +// #ifndef SPI0_CTRL +// #define SPI0_CTRL FSPI /**< FSPI is used as SPI_DEV(0) */ +// #endif +// #ifndef SPI0_SCK +// #define SPI0_SCK GPIO36 /**< FSPI SCK (pin FSPICLK) */ +// #endif +// #ifndef SPI0_MISO +// #define SPI0_MISO GPIO37 /**< FSPI MISO (pin FSPIQ) */ +// #endif +// #ifndef SPI0_MOSI +// #define SPI0_MOSI GPIO35 /**< FSPI MOSI (pin FSPID) */ +// #endif +// #ifndef SPI0_CS0 +// #define SPI0_CS0 GPIO34 /**< FSPI CS0 (pin FSPICS0) */ +// #endif +/** @} */ + +/** + * @name UART configuration + * + * ESP32-S3 provides 3 UART interfaces at maximum: + * + * UART_DEV(0) uses fixed standard configuration.
+ * UART_DEV(1) is not used.
+ * + * @{ + */ +#define UART0_TXD GPIO43 /**< direct I/O pin for UART_DEV(0) TxD, can't be changed */ +#define UART0_RXD GPIO44 /**< direct I/O pin for UART_DEV(0) RxD, can't be changed */ + +/** @} */ + +/** + * @name Camera configurations and pins + * TODO also mic pins + */ + +#ifdef __cplusplus +} /* end extern "C" */ +#endif + +/* include common peripheral definitions as last step */ +#include "periph_conf_common.h" + +#endif /* PERIPH_CONF_H */ +/** @} */