From 5d3c3d6018cd1ee13dd4024e47fc8979093c31ff Mon Sep 17 00:00:00 2001 From: Wouter Vlothuizen Date: Fri, 23 Jul 2021 13:16:19 +0200 Subject: [PATCH 1/4] working on RUS in cQASM (and cleaning up test directory) --- src/ql/ir/new_to_old.cc | 27 +- src/ql/ir/ops.cc | 1 + src/ql/utils/json.cc | 4 +- .../cc/config_cc_s17_direct_iq_cqasm1.2.json | 1453 +++++++++++++++++ tests/cc/test_cfg_cc_demo.json | 697 ++++++++ tests/cc/test_cqasm.py | 41 + tests/cc/test_rus_elements.cq | 52 + .../test_std_experiments_CCL.py | 0 tests/{ => cc_light}/test_wait.py | 2 +- tests/{ => compat}/golden/basic.qasm | 0 .../{ => compat}/golden/basic_scheduled.qasm | 0 .../{ => compat}/golden/test_1_ALAP_last.qasm | 0 tests/{ => compat}/golden/test_1_qubit.qasm | 0 tests/{ => compat}/golden/test_2_qubit.qasm | 0 tests/{ => compat}/golden/test_3_qubit.qasm | 0 .../{ => compat}/golden/test_barrier_all.qasm | 0 .../golden/test_barrier_last.qasm | 0 .../golden/test_cqasm_custom_gates.qasm | 0 .../test_cqasm_custom_gates_scheduled.qasm | 0 .../golden/test_cqasm_default_gates.qasm | 0 .../test_cqasm_default_gates_scheduled.qasm | 0 .../golden/test_edge_available_last.qasm | 0 .../golden/test_edge_busy_last.qasm | 0 .../golden/test_fast_feedback_last.qasm | 0 .../golden/test_flux_all_last.qasm | 0 .../golden/test_measure_available01_last.qasm | 0 .../golden/test_measure_available02_last.qasm | 0 .../golden/test_measure_busy_last.qasm | 0 .../golden/test_qubit_busy_last.qasm | 0 .../golden/test_qwg_available_01_last.qasm | 0 .../golden/test_qwg_available_02_last.qasm | 0 .../golden/test_qwg_busy_last.qasm | 0 .../golden/test_smis_all_bundled_last.qasm | 0 tests/{ => compat}/golden/test_smis_last.qasm | 0 .../golden/test_smis_multi_kernel_last.qasm | 0 .../test_smis_with_custom_gates_last.qasm | 0 .../golden/test_smit_all_bundled.qasm | 0 .../golden/test_smit_all_bundled_last.qasm | 0 tests/{ => compat}/golden/test_smit_last.qasm | 0 .../golden/test_wait_barrier_last.qasm | 0 tests/{ => compat}/spin_demo_2811.json | 0 tests/{ => compat}/test_barrier.py | 0 tests/{ => compat}/test_basics.py | 0 tests/{ => compat}/test_bugs.py | 0 tests/{ => compat}/test_cc_light.py | 0 tests/{ => compat}/test_cfg_none.json | 0 tests/{ => compat}/test_config_default.json | 0 tests/{ => compat}/test_cqasm.py | 0 tests/{ => compat}/test_exceptions.py | 0 tests/{ => compat}/test_flux.py | 0 tests/{ => compat}/test_gate_decomposition.py | 0 tests/{ => compat}/test_minimal.py | 0 tests/{ => compat}/test_options.py | 0 tests/{ => compat}/test_parallel_triggers.py | 0 tests/{ => compat}/test_qubits.py | 0 tests/compat/utils.py | 25 + 56 files changed, 2293 insertions(+), 9 deletions(-) create mode 100644 tests/cc/config_cc_s17_direct_iq_cqasm1.2.json create mode 100644 tests/cc/test_cfg_cc_demo.json create mode 100644 tests/cc/test_cqasm.py create mode 100644 tests/cc/test_rus_elements.cq rename tests/{ => cc_light}/test_std_experiments_CCL.py (100%) rename tests/{ => cc_light}/test_wait.py (99%) rename tests/{ => compat}/golden/basic.qasm (100%) rename tests/{ => compat}/golden/basic_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_1_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_1_qubit.qasm (100%) rename tests/{ => compat}/golden/test_2_qubit.qasm (100%) rename tests/{ => compat}/golden/test_3_qubit.qasm (100%) rename tests/{ => compat}/golden/test_barrier_all.qasm (100%) rename tests/{ => compat}/golden/test_barrier_last.qasm (100%) rename tests/{ => compat}/golden/test_cqasm_custom_gates.qasm (100%) rename tests/{ => compat}/golden/test_cqasm_custom_gates_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_cqasm_default_gates.qasm (100%) rename tests/{ => compat}/golden/test_cqasm_default_gates_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_edge_available_last.qasm (100%) rename tests/{ => compat}/golden/test_edge_busy_last.qasm (100%) rename tests/{ => compat}/golden/test_fast_feedback_last.qasm (100%) rename tests/{ => compat}/golden/test_flux_all_last.qasm (100%) rename tests/{ => compat}/golden/test_measure_available01_last.qasm (100%) rename tests/{ => compat}/golden/test_measure_available02_last.qasm (100%) rename tests/{ => compat}/golden/test_measure_busy_last.qasm (100%) rename tests/{ => compat}/golden/test_qubit_busy_last.qasm (100%) rename tests/{ => compat}/golden/test_qwg_available_01_last.qasm (100%) rename tests/{ => compat}/golden/test_qwg_available_02_last.qasm (100%) rename tests/{ => compat}/golden/test_qwg_busy_last.qasm (100%) rename tests/{ => compat}/golden/test_smis_all_bundled_last.qasm (100%) rename tests/{ => compat}/golden/test_smis_last.qasm (100%) rename tests/{ => compat}/golden/test_smis_multi_kernel_last.qasm (100%) rename tests/{ => compat}/golden/test_smis_with_custom_gates_last.qasm (100%) rename tests/{ => compat}/golden/test_smit_all_bundled.qasm (100%) rename tests/{ => compat}/golden/test_smit_all_bundled_last.qasm (100%) rename tests/{ => compat}/golden/test_smit_last.qasm (100%) rename tests/{ => compat}/golden/test_wait_barrier_last.qasm (100%) rename tests/{ => compat}/spin_demo_2811.json (100%) rename tests/{ => compat}/test_barrier.py (100%) rename tests/{ => compat}/test_basics.py (100%) rename tests/{ => compat}/test_bugs.py (100%) rename tests/{ => compat}/test_cc_light.py (100%) rename tests/{ => compat}/test_cfg_none.json (100%) rename tests/{ => compat}/test_config_default.json (100%) rename tests/{ => compat}/test_cqasm.py (100%) rename tests/{ => compat}/test_exceptions.py (100%) rename tests/{ => compat}/test_flux.py (100%) rename tests/{ => compat}/test_gate_decomposition.py (100%) rename tests/{ => compat}/test_minimal.py (100%) rename tests/{ => compat}/test_options.py (100%) rename tests/{ => compat}/test_parallel_triggers.py (100%) rename tests/{ => compat}/test_qubits.py (100%) create mode 100644 tests/compat/utils.py diff --git a/src/ql/ir/new_to_old.cc b/src/ql/ir/new_to_old.cc index ffa7b7233..c226a7562 100644 --- a/src/ql/ir/new_to_old.cc +++ b/src/ql/ir/new_to_old.cc @@ -483,10 +483,24 @@ void NewToOldConverter::convert_block( // Handle the normal operands for custom instructions. Operands ops; for (const auto &ob : custom->instruction_type->template_operands) { - ops.append(*this, ob); + try { + ops.append(*this, ob); + } catch (utils::Exception &e) { + e.add_context("name="+custom->instruction_type->name+", qubits="+ops.qubits.to_string()); + throw; + } } for (utils::UInt i = 0; i < custom->operands.size() - diamond_op_count; i++) { - ops.append(*this, custom->operands[i]); + try { + ops.append(*this, custom->operands[i]); + } catch (utils::Exception &e) { + e.add_context( + "name=" + custom->instruction_type->name + + ", qubits=" + ops.qubits.to_string() + + ", operand=" + std::to_string(i) + ); + throw; + } } kernel->gate( custom->instruction_type->name, ops.qubits, ops.cregs, @@ -933,8 +947,9 @@ void Operands::append(const NewToOldConverter &conv, const ExpressionRef &expr) } else if (auto ref = expr->as_reference()) { if (ref->indices.size() != 1 || !ref->indices[0]->as_int_literal()) { QL_ICE( - "encountered incompatible object reference " - "to " << ref->target->name + "encountered incompatible object reference to " + << ref->target->name + << " (size=" << ref->indices.size() << ")" ); } else if ( ref->target == conv.ir->platform->qubits && @@ -958,8 +973,8 @@ void Operands::append(const NewToOldConverter &conv, const ExpressionRef &expr) cregs.push_back(ref->indices[0].as()->value); } else { QL_ICE( - "encountered incompatible object reference " - "to " << ref->target->name + "encountered unknown object reference to " + << ref->target->name ); } } else if (expr->as_function_call()) { diff --git a/src/ql/ir/ops.cc b/src/ql/ir/ops.cc index 971cbd756..077c5699d 100644 --- a/src/ql/ir/ops.cc +++ b/src/ql/ir/ops.cc @@ -343,6 +343,7 @@ InstructionTypeLink find_instruction_type( // If we shouldn't generate an overload if only the name matches, stop now. if (!generate_overload_if_needed || !(*first)->has_annotation()) { + QL_DOUT("not generating overload for instruction '" + name + "'"); // NB: key '"prototype"' may be missing in instruction definition return {}; } diff --git a/src/ql/utils/json.cc b/src/ql/utils/json.cc index 7a2afa45a..e00fce1a5 100644 --- a/src/ql/utils/json.cc +++ b/src/ql/utils/json.cc @@ -44,7 +44,7 @@ Json parse_json(std::istream &is) { if (e.byte >= absPos && e.byte < absPos + line.size()) { unsigned int relPos = e.byte - absPos; line = utils::replace_all(line, "\t", " "); // make a TAB take one position - QL_FATAL( + QL_JSON_FATAL( "in line " << lineNr << " at position " << relPos << ":" << std::endl << line << std::endl @@ -60,7 +60,7 @@ Json parse_json(std::istream &is) { } } catch (Json::exception &e) { - QL_FATAL("malformed JSON file : \n\t" << e.what()); + QL_JSON_FATAL("malformed JSON file : \n\t" << e.what()); } return j; } diff --git a/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json b/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json new file mode 100644 index 000000000..a7b6a2d2f --- /dev/null +++ b/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json @@ -0,0 +1,1453 @@ + + // This is a generated file, do NOT EDIT + // + // Generated by generate_CC_cfg_modular.py on 2021-03-29 15:17:40.512303. + // + // Parameters were: + // out_filename = 'config_cc_s17_direct_iq.json' + // mw_pulse_duration = 20 + // flux_pulse_duration = 40 + // ro_duration = 800 + // init_duration = 200000 + // in_filename = 'config/config_cc_s17_direct_iq.json.in' + + { + // File: config_cc_s17_direct_iq.json.in + // notes: see https://openql.readthedocs.io/en/latest/platform.html#ccplatform for documentation of this file + // author: Wouter Vlothuizen e.a. + + "eqasm_compiler" : "cc", + + "hardware_settings": { + "qubit_number": 17, + "creg_number": 32, + "breg_number": 32, + "cycle_time" : 20, // in [ns] + + + "eqasm_backend_cc": { + + // Instruments used in this setup, their configuration and connectivity. + "instruments": [ + // readout. + { + "name": "ro_0", + "qubits": [[1], [4], [5], [8], [10], [7], [11], [14], [15]], + "signal_type": "measure", + "ref_instrument_definition": "zi-uhfqa", + "ref_control_mode": "uhfqa-9ch", + "controller": { + "name": "cc", + "slot": 2, + "io_module": "CC-CONN-DIO" + } + }, + { + "name": "ro_1", + "qubits": [[0], [2], [3], [6], [9], [12], [], [], []], + "signal_type": "measure", + "ref_instrument_definition": "zi-uhfqa", + "ref_control_mode": "uhfqa-9ch", + "controller": { + "name": "cc", + "slot": 4, + "io_module": "CC-CONN-DIO" + } + }, + { + "name": "ro_2", + "qubits": [[13], [16], [], [], [], [], [], [], []], + "signal_type": "measure", + "ref_instrument_definition": "zi-uhfqa", + "ref_control_mode": "uhfqa-9ch", + "controller": { + "name": "cc", + "slot": 5, + "io_module": "CC-CONN-DIO" + } + }, + + // microwave. + { + "name": "mw_0", + "qubits": [ // data qubits: + [8], + [9], + [14], + [15] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-direct-iq", + "controller": { + "name": "cc", + "slot": 0, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "mw_1", + "qubits": [ // ancilla qubits: + [11], + [10], + [12], + [] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-direct-iq", + "controller": { + "name": "cc", + "slot": 1, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "mw_2", + "qubits": [ // data qubits: + [0], + [1], + [2], + [3] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-direct-iq", + "controller": { + "name": "cc", + "slot": 6, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "mw_3", + "qubits": [ // ancilla qubits: + [4], + [5], + [6], + [7] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-direct-iq", + "controller": { + "name": "cc", + "slot": 7, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "mw_4", + "qubits": [ // ancilla qubits: + [13], + [16], + [], + [] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-direct-iq", + "controller": { + "name": "cc", + "slot": 8, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + // flux + { + "name": "flux_0", + "qubits": [[8], [9], [10], [11], [12], [13], [14], [15]], + "signal_type": "flux", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-flux", + "controller": { + "name": "cc", + "slot": 3, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "flux_1", + "qubits": [[0], [1], [2], [3], [4], [5], [6], [7]], + "signal_type": "flux", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-flux", + "controller": { + "name": "cc", + "slot": 9, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "flux_2", + "qubits": [[16], [], [], [], [], [], [], []], + "signal_type": "flux", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-flux", + "controller": { + "name": "cc", + "slot": 10, + "io_module": "CC-CONN-DIO-DIFF" + } + } + ], // instruments + +//--- start of include file 'config/common_eqasm_backend_cc.json.in' --- +//{ + // File: common_eqasm_backend_cc.json.in + // notes: this file specifies commonalities between different setups for key "eqasm_backend_cc" + // see https://openql.readthedocs.io/en/latest/platform.html#ccplatform for documentation of this file + // author: Wouter Vlothuizen e.a. + + +// "hardware_settings": { +// "eqasm_backend_cc": { + "instrument_definitions": { + "qutech-qwg": { + "channels": 4, + "control_group_sizes": [1, 4] + }, + "zi-hdawg": { + "channels": 8, + "control_group_sizes": [1, 2, 4, 8] // NB: size=1 needs special treatment of waveforms because one AWG unit drives 2 channels + }, + "qutech-vsm": { + "channels": 32, + "control_group_sizes": [1] + }, + "zi-uhfqa": { + "channels": 9, + "control_group_sizes": [1] + } + }, // instrument_definitions + + + "control_modes": { + "awg8-mw-vsm-hack": { // ZI_HDAWG8.py::cfg_codeword_protocol() == 'microwave'. Old hack to skip DIO[8]. Doesn't support QWG + "control_bits": [ + [7,6,5,4,3,2,1,0], // group 0 + [16,15,14,13,12,11,10,9] // group 1 + ], + "trigger_bits": [31] + }, + "awg8-mw-vsm": { // the way the mode above should have been and support for QWG + "control_bits": [ + [7,6,5,4,3,2,1,0], // group 0 + [23,22,21,20,19,18,17,16] // group 1 + ], + "trigger_bits": [31,15] + }, + "awg8-mw-direct-iq": { // just I&Q to generate microwave without VSM. HDAWG8: "new_novsm_microwave" + "control_bits": [ + [6,5,4,3,2,1,0], // group 0 + [13,12,11,10,9,8,7], // group 1 + [22,21,20,19,18,17,16], // group 2. NB: starts at bit 16 so twin-QWG can also support it + [29,28,27,26,25,24,23] // group 4 + ], + "trigger_bits": [31,15] + }, + "awg8-flux": { // ZI_HDAWG8.py::cfg_codeword_protocol() == 'flux' + // NB: please note that internally one AWG unit handles 2 channels, which requires special handling of the waveforms + "control_bits": [ + [2,1,0], // group 0 + [5,4,3], + [8,7,6], + [11,10,9], + [18,17,16], // group 4. NB: starts at bit 16 so twin-QWG can also support it + [21,20,19], + [24,23,22], + [27,26,25] // group 7 + ], + "trigger_bits": [31,15] + }, + "awg8-flux-vector-8": { // single code word for 8 flux channels. FIXME: no official mode yet + "control_bits": [ + [7,6,5,4,3,2,1,0] // FIXME: how many bits are available + ], + "trigger_bits": [31] + }, + "uhfqa-9ch": { + "control_bits": [[17],[18],[19],[20],[21],[22],[23],[24],[25]], // group[0:8] + "trigger_bits": [16], + "result_bits": [[1],[2],[3],[4],[5],[6],[7],[8],[9]], // group[0:8] + "data_valid_bits": [0] + }, + "vsm-32ch":{ + "control_bits": [ + [0],[1],[2],[3],[4],[5],[6],[7], // group[0:7] + [8],[9],[10],[11],[12],[13],[14],[15], // group[8:15] + [16],[17],[18],[19],[20],[21],[22],[23], // group[16:23] + [24],[25],[26],[27],[28],[28],[30],[31] // group[24:31] + ], + "trigger_bits": [] // no trigger + } + }, // control_modes + + + "signals": { + "single-qubit-mw": [ + { "type": "mw", + "operand_idx": 0, + "value": [ + "{gateName}-{instrumentName}:{instrumentGroup}-i", + "{gateName}-{instrumentName}:{instrumentGroup}-q" + ] + } + ], + "two-qubit-flux": [ + { "type": "flux", + "operand_idx": 0, // control + "value": ["flux-0-{qubit}"] + }, + { "type": "flux", + "operand_idx": 1, // target + "value": ["flux-1-{qubit}"] + } + ], + "single-qubit-flux": [ + { "type": "flux", + "operand_idx": 0, + "value": ["flux-0-{qubit}"] + } + ] + } // signals + +// } // eqasm_backend_cc +// }, // hardware_settings +//} + +//--- end of include file 'config/common_eqasm_backend_cc.json.in' --- + + } // eqasm_backend_cc + }, // hardware_settings + + "gate_decomposition": { +//--- start of include file 'config/common_gate_decomposition.json.in' --- +//{ + // File: common_gate_decomposition.json.in + // notes: this file specifies commonalities between different setups for key "gate_decomposition" + // see https://openql.readthedocs.io/en/latest/platform.html#ccplatform for documentation of this file + // author: Wouter Vlothuizen e.a. + + // extracted from PyqQED_py3 'generate_CCL_cfg.py' +// "gate_decomposition": { + "x %0": ["rx180 %0"], + "y %0": ["ry180 %0"], + "roty90 %0": ["ry90 %0"], + + // To support other forms of writing the same gates + "x180 %0": ["rx180 %0"], + "y180 %0": ["ry180 %0"], + "y90 %0": ["ry90 %0"], + "x90 %0": ["rx90 %0"], + "my90 %0": ["rym90 %0"], + "mx90 %0": ["rxm90 %0"], + + // Clifford decomposition per Epstein et al. Phys. Rev. A 89, 062321 (2014) + "cl_0 %0": ["i %0"], + "cl_1 %0": ["ry90 %0", "rx90 %0"], + "cl_2 %0": ["rxm90 %0", "rym90 %0"], + "cl_3 %0": ["rx180 %0"], + "cl_4 %0": ["rym90 %0", "rxm90 %0"], + "cl_5 %0": ["rx90 %0", "rym90 %0"], + "cl_6 %0": ["ry180 %0"], + "cl_7 %0": ["rym90 %0", "rx90 %0"], + "cl_8 %0": ["rx90 %0", "ry90 %0"], + "cl_9 %0": ["rx180 %0", "ry180 %0"], + "cl_10 %0": ["ry90 %0", "rxm90 %0"], + "cl_11 %0": ["rxm90 %0", "ry90 %0"], + "cl_12 %0": ["ry90 %0", "rx180 %0"], + "cl_13 %0": ["rxm90 %0"], + "cl_14 %0": ["rx90 %0", "rym90 %0", "rxm90 %0"], + "cl_15 %0": ["rym90 %0"], + "cl_16 %0": ["rx90 %0"], + "cl_17 %0": ["rx90 %0", "ry90 %0", "rx90 %0"], + "cl_18 %0": ["rym90 %0", "rx180 %0"], + "cl_19 %0": ["rx90 %0", "ry180 %0"], + "cl_20 %0": ["rx90 %0", "rym90 %0", "rx90 %0"], + "cl_21 %0": ["ry90 %0"], + "cl_22 %0": ["rxm90 %0", "ry180 %0"], + "cl_23 %0": ["rx90 %0", "ry90 %0", "rxm90 %0"], + + // feedback + "measure_fb %0": ["measure %0", "_wait_uhfqa %0", "_dist_dsm %0", "_wait_dsm %0"], + + // RUS + "rx2theta %0": ["cw_27 %0"], + "rxm2theta %0": ["cw_28 %0"], + "rx2thetaalpha %0": ["cw_29 %0"], + "rphi180 %0": ["cw_27 %0"], + "rphi180beta %0": ["cw_28 %0"], + "rx180beta %0": ["cw_29 %0"], + "rphi180beta2 %0": ["cw_30 %0"], + "ry90beta %0": ["cw_28 %0"], + "rym90alpha %0": ["cw_29 %0"], + "ry90betapi %0": ["cw_30 %0"], + "rphi180alpha %0": ["cw_31 %0"], + "rx90alpha %0": ["cw_26 %0"], + "rx180alpha2 %0": ["cw_25 %0"], + "rphim2theta %0": ["cw_28 %0"] + +// }, // gate_decomposition +//} + +//--- end of include file 'config/common_gate_decomposition.json.in' --- + , + // gate decompositions for S17 + "cz q8,q10": ["barrier q8,q10,q11", "sf_cz_sw q8", "sf_cz_ne q10", "sf_park q11", "barrier q8,q10,q11"], + "cz q10,q8": ["barrier q8,q10,q11", "sf_cz_sw q8", "sf_cz_ne q10", "sf_park q11", "barrier q8,q10,q11"], + "cz q8,q11": ["barrier q8,q10,q11", "sf_cz_se q8", "sf_cz_nw q11", "sf_park q10", "barrier q8,q10,q11"], + "cz q11,q8": ["barrier q8,q10,q11", "sf_cz_se q8", "sf_cz_nw q11", "sf_park q10", "barrier q8,q10,q11"], + "cz q11,q14": ["barrier q11,q14,q15", "sf_cz_sw q11", "sf_cz_ne q14", "sf_park q15", "barrier q11,q14,q15"], + "cz q14,q11": ["barrier q11,q14,q15", "sf_cz_sw q11", "sf_cz_ne q14", "sf_park q15", "barrier q11,q14,q15"], + "cz q10,q14": ["barrier q10,q14", "sf_cz_se q10", "sf_cz_nw q14", "barrier q10,q14"], + "cz q14,q10": ["barrier q10,q14", "sf_cz_se q10", "sf_cz_nw q14", "barrier q10,q14"], + "cz q9,q11": ["barrier q9,q11,q12", "sf_cz_sw q9", "sf_cz_ne q11", "sf_park q12", "barrier q9,q11,q12"], + "cz q11,q9": ["barrier q9,q11,q12", "sf_cz_sw q9", "sf_cz_ne q11", "sf_park q12", "barrier q9,q11,q12"], + "cz q9,q12": ["barrier q9,q11,q12", "sf_cz_se q9", "sf_cz_nw q12", "sf_park q11", "barrier q9,q11,q12"], + "cz q12,q9": ["barrier q9,q11,q12", "sf_cz_se q9", "sf_cz_nw q12", "sf_park q11", "barrier q9,q11,q12"], + "cz q11,q15": ["barrier q11,q14,q15", "sf_cz_se q11", "sf_cz_nw q15", "sf_park q14", "barrier q11,q14,q15"], + "cz q15,q11": ["barrier q11,q14,q15", "sf_cz_se q11", "sf_cz_nw q15", "sf_park q14", "barrier q11,q14,q15"], + + "cz q12,q15": ["barrier q12,q15", "sf_cz_sw q12", "sf_cz_ne q15", "barrier q12,q15"], + "cz q15,q12": ["barrier q12,q15", "sf_cz_sw q12", "sf_cz_ne q15", "barrier q12,q15"] + }, // gate_decomposition + + "instructions": { +//--- start of include file 'config/common_instructions.json.in' --- +//{ + // File: common_instructions.json.in + // notes: this file specifies commonalities between different setups for key "instructions" + // see https://openql.readthedocs.io/en/latest/platform.html#ccplatform for documentation of this file + // author: Wouter Vlothuizen e.a. + +// "instructions": { + // based on PyqQED_py3 'mw_lutman.py' and 'generate_CCL_cfg.py': + "i": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "i", + "cc": { +// "ref_signal": "single-qubit-mw", + "signal": [], // no signal, to prevent conflicts with other gates (NB: will output nothing because VSM stays off) + "static_codeword_override": [0] + } + }, + "rx45": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "x", + "cc": { + "ref_signal": "single-qubit-mw", // NB: reference, instead of defining "signal" here + "static_codeword_override": [13] + } + }, + "rx180": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "x", + "cc": { + "ref_signal": "single-qubit-mw", // NB: reference, instead of defining "signal" here + "static_codeword_override": [1] + } + }, + "ry180": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "y", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [2] + } + }, + "rx90": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "x90", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [3] + } + }, + "ry90": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "y90", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [4] + } + }, + "rxm90": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "xm90", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [5] + } + }, + "rym90": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "ym90", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [6] + } + }, + + + "cz_park": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "cz", + "cc": { + "signal": [ + { "type": "flux", + "operand_idx": 0, // control + "value": ["flux-0-{qubit}"] + }, + { "type": "flux", + "operand_idx": 1, // target + "value": ["flux-1-{qubit}"] + }, + { "type": "flux", + "operand_idx": 2, // park + "value": ["park_cz-{qubit}"] + } + ], + "static_codeword_override": [0,0,0] // FIXME + } + }, + + // additions from 'CC-software-implementation.docx' + // flux pulses, see: + // - https://github.com/QE-Lab/OpenQL/issues/176 + // - https://github.com/QE-Lab/OpenQL/issues/224 + // - https://github.com/QE-Lab/OpenQL/pull/238 + + "park_cz" : { // park signal with same length as cz gate + "duration" : 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc_light_instr": "park_cz", + "type": "measure", // FIXME + "cc": { + "signal": [ + { "type": "flux", + "operand_idx": 0, + "value": ["park_cz-{qubit}"] + } + ], + "static_codeword_override": [0] // FIXME + } + }, + + "park_measure" : { // park signal with same length as measurement + "duration" : 800, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "signal": [ + { "type": "flux", + "operand_idx": 0, + "value": ["park_measure-{qubit}"] + } + ], + "static_codeword_override": [0] // FIXME + } + }, + + + // based on PyqQED_py3 'generate_CCL_cfg.py': + "prepz": { + "duration": 200000, +// "prototype": ["U:qubit"], + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "readout", + "cc_light_instr": "prepz", + "cc": { +// "ref_signal": "single-qubit-mw" + "signal": [], // FIXME: no signal, pycQED::test_multi_qubit_oql_CC.py fails otherwise on scheduling issues + "static_codeword_override": [0] // FIXME + } + }, + + "measure": { + "duration": 800, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "readout", + "cc_light_instr": "measz", + "cc": { + "signal": [ + { "type": "measure", + "operand_idx": 0, + "value": ["dummy"] // Future extension: specify output and weight, and generate code word + } + ], + "static_codeword_override": [0] // FIXME + } + }, + + // additions for pycQED::test_single_qubit_oql_CC.py + // FIXME: contents untested + "square": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "square", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [10] + } + }, + "spec": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "spec", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [0] + } + }, + "rx12": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "rx12", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [0] + } + }, + // cw_00 .. cw_31 + "cw_00": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_00", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [0] + } + }, + "cw_01": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_01", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [1] + } + }, + "cw_02": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_02", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [2] + } + }, + "cw_03": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_03", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [3] + } + }, + "cw_04": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_04", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [4] + } + }, + "cw_05": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_05", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [5] + } + }, + "cw_06": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_06", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [6] + } + }, + "cw_07": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_07", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [7] + } + }, + "cw_08": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_08", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [8] + } + }, + "cw_09": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_09", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [9] + } + }, + "cw_10": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_10", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [10] + } + }, + "cw_11": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_11", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [11] + } + }, + "cw_12": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_12", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [12] + } + }, + "cw_13": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_13", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [13] + } + }, + "cw_14": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_14", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [14] + } + }, + "cw_15": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_15", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [15] + } + }, + "cw_16": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_16", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [16] + } + }, + "cw_17": { + "duration": 20, + "prototype": ["U:qubit"], + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_17", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [17] + } + }, + "cw_18": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_18", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [18] + } + }, + "cw_19": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_19", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [19] + } + }, + "cw_20": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_20", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [20] + } + }, + "cw_21": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_21", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [21] + } + }, + "cw_22": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_22", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [22] + } + }, + "cw_23": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_23", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [23] + } + }, + "cw_24": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_24", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [24] + } + }, + "cw_25": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_25", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [25] + } + }, + "cw_26": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_26", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [26] + } + }, + "cw_27": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_27", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [27] + } + }, + "cw_28": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_28", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [28] + } + }, + "cw_29": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_29", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [29] + } + }, + "cw_30": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_30", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [30] + } + }, + "cw_31": { + "duration": 20, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr": "cw_31", + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + + //**************************************************************** + // hack for RUS. FIXME: codewords make no sense + //**************************************************************** + +// // RUS +// "rx2theta %0": ["cw_27 %0"], +// "rxm2theta %0": ["cw_28 %0"], +// "rx2thetaalpha %0": ["cw_29 %0"], +// "rphi180 %0": ["cw_27 %0"], +// "rphi180beta %0": ["cw_28 %0"], +// "rx180beta %0": ["cw_29 %0"], +// "rphi180beta2 %0": ["cw_30 %0"], +// "ry90beta %0": ["cw_28 %0"], +// "rym90alpha %0": ["cw_29 %0"], +// "ry90betapi %0": ["cw_30 %0"], +// "rphi180alpha %0": ["cw_31 %0"], +// "rx90alpha %0": ["cw_26 %0"], +// "rx180alpha2 %0": ["cw_25 %0"], +// "rphim2theta %0": ["cw_28 %0"], + + "rxw2": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "rxw1": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "rx2b": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "ry2b": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "ryw1": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "ryw2": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "rmX180": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + "rmY180": { + "duration": 20, + "type": "mw", + "prototype": ["U:qubit"], + "cc": { + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + } + }, + + //**************************************************************** + // decompositions + //**************************************************************** + + + // was: "measure_fb %0": ["measure %0", "_wait_uhfqa %0", "_dist_dsm %0", "_wait_dsm %0"], + "measure_fb": { + "prototype": ["U:qubit", "U:bit"], + "duration_cycles": 100, // FIXME: note the *_cycles*, should match duration of "into" + "cc": { // FIXME: key is required + "ref_signal": "single-qubit-mw", + "static_codeword_override": [31] + }, + "decomposition": { + "name": "_measure_fb", + "into": "measure op(0),op(1); _wait_uhfqa op(0); _dist_dsm op(0); _wait_dsm op(0)" + } + }, + + + //**************************************************************** + // end hack for RUS + //**************************************************************** + + + // fl_cw_00 .. fl_cw_07 + "fl_cw_00": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_00", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [0,0] // FIXME + } + }, + "fl_cw_01": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_01", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [1] + } + }, + "fl_cw_02": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_02", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [2] + } + }, + "fl_cw_03": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_03", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [3] + } + }, + "fl_cw_04": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_04", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [4] + } + }, + "fl_cw_05": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_05", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [5] + } + }, + "fl_cw_06": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_06", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [6] + } + }, + "fl_cw_07": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "fl_cw_07", + "cc": { + "ref_signal": "two-qubit-flux", + "static_codeword_override": [7] + } + }, + + // single qubit flux hacks (compatible with QCC demo/flux lutman) + "sf_square": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_square", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [6] + } + }, + + + + // aditions for feedback + "_wait_dsm": { + "duration": 280, + "prototype": ["U:qubit"], + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "signal": [] + } + }, + "if_1_break": { + "duration": 60, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "signal": [], + "pragma": { + "break": 1 + } + } + }, + "if_0_break": { + "duration": 60, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "signal": [], + "pragma": { + "break": 0 + } + } + }, + "_wait_uhfqa": { + "duration": 720, + "prototype": ["U:qubit"], + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "signal": [] + } + }, + "_dist_dsm": { + "duration": 20, + "prototype": ["U:qubit"], + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "readout_mode": "feedback", + "signal": [ + { "type": "measure", + "operand_idx": 0, + "value": [] + } + ] + } + } + +// }, // end of "instructions" + + +//--- end of include file 'config/common_instructions.json.in' --- + , + // instructions for S17 + "sf_cz_ne q10": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_ne", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [1] + } + }, + "sf_cz_ne q11": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_ne", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [1] + } + }, + "sf_cz_ne q14": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_ne", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [1] + } + }, + "sf_cz_ne q15": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_ne", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [1] + } + }, + "sf_cz_nw q11": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_nw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [4] + } + }, + "sf_cz_nw q12": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_nw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [4] + } + }, + "sf_cz_nw q14": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_nw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [4] + } + }, + "sf_cz_nw q15": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_nw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [4] + } + }, + "sf_cz_sw q8": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_sw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [3] + } + }, + "sf_cz_sw q9": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_sw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [3] + } + }, + "sf_cz_sw q11": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_sw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [3] + } + }, + "sf_cz_sw q12": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_sw", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [3] + } + }, + "sf_cz_se q8": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_se", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [2] + } + }, + "sf_cz_se q9": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_se", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [2] + } + }, + "sf_cz_se q10": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_se", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [2] + } + }, + "sf_cz_se q11": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_cz_se", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [2] + } + }, + "sf_park q11": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_park", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [5] + } + }, + "sf_park q12": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_park", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [5] + } + }, + "sf_park q14": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_park", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [5] + } + }, + "sf_park q15": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_park", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [5] + } + }, + "sf_park q13": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_park", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [5] + } + }, + "sf_park q10": { + "duration": 40, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr": "sf_park", + "cc": { + "ref_signal": "single-qubit-flux", + "static_codeword_override": [5] + } + } + + } // instructions + + + } // hardware_settings +} + diff --git a/tests/cc/test_cfg_cc_demo.json b/tests/cc/test_cfg_cc_demo.json new file mode 100644 index 000000000..1775ec6fd --- /dev/null +++ b/tests/cc/test_cfg_cc_demo.json @@ -0,0 +1,697 @@ +{ + // author: Wouter Vlothuizen + // notes: + + + // The qubits in our setup have the following roles: + // - D = data + // - X = ancilla's performing X-type parity checks + // - Z = idem, Z-type + // + // The S-17 layout is shown below, connectivity is between horizontal and vertical neighbors. + // Based on references: + // 1) Figure 1 of '1612.08208v1.pdf', rotated by 45 deg + // 2) 'S17 design considerations_for_Xiang.pdf', renumbered from 0 + // + // -- Z0 D0 -- -- + // -- D3 X1 D1 X0 + // D6 Z2 D4 Z1 D2 + // X3 D7 X2 D5 -- + // -- -- D8 Z3 -- + // + // The frequency assignment of the qubits is (L=low, Mg/My=medium green/yellow, H=high), based on reference 2) : + // - Mg H - - + // - L My H Mg + // H My L Mg H + // My H Mg L - + // - - H My - + // + // We propose the following grid based qubit numbering scheme with the following properties: + // - starts at 0 and exceeds the number of qubits actually implemented + // - data quits have even numbers + // - qubit N is connected to N-1, N+1, N-5, N+5 (insofar present) + // + // - 1 2 - - + // - 6 7 8 9 + // 10 11 12 13 14 + // 15 16 17 18 - + // - - 22 23 - + // + // Combining the above (and taking the feed lines from reference 2), we arrive at the following table + // + // index qubit name Freq feed line + // ---------------------------------------- + // 0 1 Z0 Mg 1 + // 1 2 D0 H 1 + // 2 6 D3 L 1 + // 3 7 X1 My 1 + // 4 8 D1 H 2 + // 5 9 X0 Mg 2 + // 6 10 D6 H 0 + // 7 11 Z2 My 1 + // 8 12 D4 L 1 + // 9 13 Z1 Mg 2 + // 10 14 D2 H 2 + // 11 15 X3 My 0 + // 12 16 D7 H 1 + // 13 17 X2 Mg 1 + // 14 18 D5 L 2 + // 15 22 D8 H 1 + // 16 23 Z3 My 2 + + + // FIXME: proposed header, not used + "file_type": "OpenQL-config", + "file_version": "1.1", + "min_version_openql": "0.5.3", + + "eqasm_compiler" : "eqasm_backend_cc", + + "hardware_settings": { + "qubit_number": 25, // of which 17 are used + "cycle_time" : 20, + // FIXME: the settings below don't seem to be used on CClight either + // "mw_mw_buffer": 0, + // "mw_flux_buffer": 0, + // "mw_readout_buffer": 0, + // "flux_mw_buffer": 0, + // "flux_flux_buffer": 0, + // "flux_readout_buffer": 0, + // "readout_mw_buffer": 0, + // "readout_flux_buffer": 0, + // "readout_readout_buffer": 0, + + // FIXME: we put this key inside "hardware_settings" for now, but it should preferably be below "backend" or so + "eqasm_backend_cc": { + // Immutable properties of instruments. + // FIXME: introduce 'controller_definitions' for CC and friends? + "instrument_definitions": { + "qutech-qwg": { + "channels": 4, + "control_group_sizes": [1,4], + "latency": 50 // FIXME: check + }, + "zi-hdawg": { + "channels": 8, + "control_group_sizes": [1, 4, 8], + "latency": 300 // FIXME: check. If latency depends on FW version, several definitions must be present + }, + "qutech-vsm": { + "channels": 32, + "control_group_sizes": [1], + "latency": 10 // FIXME: check + }, + "zi-uhfqa": { + "channels": 9, + "control_group_sizes": [1], + "latency": 150 // FIXME: check + } + }, // instrument_definitions + + // Modes to control instruments. These define which bits are used to + // control groups of channels and/or get back measurement results + "control_modes": { + "awg8-mw-vsm": { // ZI_HDAWG8.py::cfg_codeword_protocol() == 'microwave' + "control_bits": [ + [7,6,5,4,3,2,1,0], + [15,14,13,12,11,10,9,8] + ], + "trigger_bits": [31] + }, + "awg8-mw-direct-iq": { // just I&Q to generate microwave without VSM + "control_bits": [ + [6,5,4,3,2,1,0], // FIXME: no official mode yet + [13,12,11,10,9,8,7], + [20,19,18,17,16,15,14], + [27,26,25,24,23,22,21] + ], + "trigger_bits": [31] + }, + "awg8-flux": { // ZI_HDAWG8.py::cfg_codeword_protocol() == 'flux' + "control_bits": [ + [2,1,0], + [5,4,3], + [8,7,6], + [11,10,9], + [14,13,12], + [17,16,15], + [20,19,18], + [23,22,21] + ], + "trigger_bits": [31] + }, + "awg8-flux-vector": { // single code word for 8 flux channels + "control_bits": [ + [7,6,5,4,3,2,1,0] + ], + "trigger_bits": [31] + }, + "uhfqa-9ch": { + "control_bits": [[25],[24],[23],[22],[21],[20],[19],[18],[17]], + "trigger_bits": [16], + "result_bits": [[9],[8],[7],[6],[5],[4],[3],[2],[1]], + "data_valid_bits": [0] + }, + "vsm-32ch":{ + "control_bits": [ + [0],[1],[2],[3],[4],[5],[6],[7], + [8],[9],[10],[11],[12],[13],[14],[15], + [16],[17],[18],[19],[20],[21],[22],[23], + [24],[25],[26],[27],[28],[28],[30],[31] + ], + "trigger_bits": [] // no trigger + } + }, // control_modes + + // Signal library that gate definitions can refer to. + // Supports the following macro expansions for key "value": + // * {gateName} + // * {instrumentName} + // * {instrumentGroup} + // * {qubit} + // NB: our JSON library does not yet support JSON pointers like: + // "signal": {"$ref": "#/hardware_settings/eqasm_backend_cc/signals/single-qubit"} + "signals": { + "single-qubit": [ + { "type": "mw", + "operand_idx": 0, + "value": [ + "{gateName}-{instrumentName}:{instrumentGroup}-gi", + "{gateName}-{instrumentName}:{instrumentGroup}-gq", + "{gateName}-{instrumentName}:{instrumentGroup}-di", + "{gateName}-{instrumentName}:{instrumentGroup}-dq" + ] + }, + { "type": "switch", + "operand_idx": 0, + "value": ["dummy"] // NB: no actual signal is generated + } + ], + "two-qubit": [ + { "type": "flux", + "operand_idx": 0, // control + "value": ["flux-0-{qubit}"] + }, + { "type": "flux", + "operand_idx": 1, // target + "value": ["flux-1-{qubit}"] + } + ] + }, // signals + + // Instruments used in this setup, their configuration and connectivity. + "instruments": [ + // readout. FIXME: must match 'resources/meas_units' + { + "name": "uhfqa-0", + "qubits": [[10], [15], [], [], [], [], [], [], []], + "signal_type": "measure", + "ref_instrument_definition": "zi-uhfqa", + "ref_control_mode": "uhfqa-9ch", + "controller": { + "name": "cc", // FIXME + "slot": 0, + "io_module": "CC-CONN-DIO" + } + }, + { + "name": "uhfqa-1", + "qubits": [[1], [2], [6], [7], [11], [12], [16], [17], [22]], + "signal_type": "measure", + "ref_instrument_definition": "zi-uhfqa", + "ref_control_mode": "uhfqa-9ch", + "controller": { + "name": "cc", // FIXME + "slot": 1, + "io_module": "CC-CONN-DIO" + } + }, + { + "name": "uhfqa-2", + "qubits": [[8], [9], [13], [14], [18], [23], [], [], []], + "signal_type": "measure", + "ref_instrument_definition": "zi-uhfqa", + "ref_control_mode": "uhfqa-9ch", + "controller": { + "name": "cc", // FIXME + "slot": 2, + "io_module": "CC-CONN-DIO" + } + }, + + // microwave. FIXME: must match 'resources/qwgs' + { + "name": "awg8-mw-0", + "qubits": [ // data qubits: +// [6, 12, 18], // [freq L] + [2, 8, 10, 14, 16, 22], // [freq H] + [6, 12, 18] // [freq L] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-vsm", + "controller": { + "name": "cc", // FIXME + "slot": 8, //3, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "awg8-mw-1", + "qubits": [ // ancilla qubits: + [1, 9, 13, 17], // [freq Mg] + [7, 11, 15, 23] // [freq My] + ], + "signal_type": "mw", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-mw-vsm", + "controller": { + "name": "cc", // FIXME + "slot": 4, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + + // VSM + { + "name": "vsm-0", + "qubits": [ + [6, 12, 18], // [freq L] + [2, 8, 10, 14, 16, 22], // [freq H] + [1, 9, 13, 17], // [freq Mg] + [7, 11, 15, 23] // [freq My] + ], + "signal_type": "switch", + "ref_instrument_definition": "qutech-vsm", + "ref_control_mode": "vsm-32ch", + "controller": { + "name": "cc", // FIXME + "slot": 5, + "io_module": "cc-conn-vsm" + } + }, + + // flux + { + "name": "awg8-flux-0", + "qubits": [[1], [2], [6], [7], [8], [9], [10], [11]], + "signal_type": "flux", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-flux", + "controller": { + "name": "cc", // FIXME + "slot": 6, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "awg8-flux-1", + "qubits": [[12], [13], [14], [15], [16], [17], [18], [22]], + "signal_type": "flux", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-flux", + "controller": { + "name": "cc", // FIXME + "slot": 7, + "io_module": "CC-CONN-DIO-DIFF" + } + }, + { + "name": "awg8-flux-2", + "qubits": [[23], [], [], [], [], [], [], []], + "signal_type": "flux", + "ref_instrument_definition": "zi-hdawg", + "ref_control_mode": "awg8-flux", + "controller": { + "name": "cc", // FIXME + "slot": 3, //8, + "io_module": "CC-CONN-DIO-DIFF" + } + } + ] // instruments + } + }, + + // NB: the "topology" keyword must be present, but the contents are only interpreted by + // the 'resource constraint' scheduler (TBC) + "topology": { + // FIXME: apparently unused: + // "x_size": 5, + // "y_size": 3, + // "qubits": [ + // { "id": 0, "x": 1, "y": 2 }, + // { "id": 1, "x": 3, "y": 2 }, + // { "id": 2, "x": 0, "y": 1 }, + // { "id": 3, "x": 2, "y": 1 }, + // { "id": 4, "x": 4, "y": 1 }, + // { "id": 5, "x": 1, "y": 0 }, + // { "id": 6, "x": 3, "y": 0 } + // ], + + // Directed edges between qubits (from "src" to "dst") define allowable + // two qubit operations. + // see: + // - https://github.com/DiCarloLab-Delft/ElecPrj_CCLight/wiki/Qubit-number-and-directed-edge-number + // - https://github.com/QE-Lab/OpenQL/blob/847ff7d373b5fe7ce23c0669cb194c79525aad2e/ql/arch/cc_light/cc_light_resource_manager.h#L352 + // NB: the actual edge numbering is irrelevant to the CC, which has no knowledge about edges + "edges": [ + { "id": 0, "src": 1, "dst": 2 }, + { "id": 1, "src": 1, "dst": 6 }, + { "id": 2, "src": 2, "dst": 1 }, + { "id": 3, "src": 2, "dst": 7 }, + { "id": 4, "src": 6, "dst": 1 }, + { "id": 5, "src": 6, "dst": 7 }, + { "id": 6, "src": 6, "dst": 11 }, + { "id": 7, "src": 7, "dst": 2 }, + { "id": 8, "src": 7, "dst": 6 }, + { "id": 9, "src": 7, "dst": 8 }, + { "id": 10, "src": 7, "dst": 12 }, + { "id": 11, "src": 8, "dst": 7 }, + { "id": 12, "src": 8, "dst": 9 }, + { "id": 13, "src": 8, "dst": 13 }, + { "id": 14, "src": 9, "dst": 8 }, + { "id": 15, "src": 9, "dst": 14 }, + { "id": 16, "src": 10, "dst": 11 }, + { "id": 17, "src": 10, "dst": 15 }, + { "id": 18, "src": 11, "dst": 6 }, + { "id": 19, "src": 11, "dst": 10 }, + { "id": 20, "src": 11, "dst": 12 }, + { "id": 21, "src": 11, "dst": 16 }, + { "id": 22, "src": 12, "dst": 7 }, + { "id": 23, "src": 12, "dst": 11 }, + { "id": 24, "src": 12, "dst": 13 }, + { "id": 25, "src": 12, "dst": 17 }, + { "id": 26, "src": 13, "dst": 8 }, + { "id": 27, "src": 13, "dst": 12 }, + { "id": 28, "src": 13, "dst": 14 }, + { "id": 29, "src": 13, "dst": 18 }, + { "id": 30, "src": 14, "dst": 9 }, + { "id": 31, "src": 14, "dst": 13 }, + { "id": 32, "src": 15, "dst": 10 }, + { "id": 33, "src": 15, "dst": 16 }, + { "id": 34, "src": 16, "dst": 11 }, + { "id": 35, "src": 16, "dst": 15 }, + { "id": 36, "src": 16, "dst": 17 }, + { "id": 37, "src": 17, "dst": 12 }, + { "id": 38, "src": 17, "dst": 16 }, + { "id": 39, "src": 17, "dst": 18 }, + { "id": 40, "src": 17, "dst": 22 }, + { "id": 41, "src": 18, "dst": 13 }, + { "id": 42, "src": 18, "dst": 17 }, + { "id": 43, "src": 18, "dst": 23 }, + { "id": 44, "src": 22, "dst": 17 }, + { "id": 45, "src": 22, "dst": 23 }, + { "id": 46, "src": 23, "dst": 18 }, + { "id": 47, "src": 23, "dst": 22 } + ] + }, + + + // NB: the "resources" keyword must be present, but the contents are only interpreted by + // the 'resource constraint' scheduler (TBC) + "resources": { // see: https://github.com/QE-Lab/OpenQL/blob/847ff7d373b5fe7ce23c0669cb194c79525aad2e/ql/arch/cc_light/cc_light_resource_manager.h#L724 + "qubits": { + "count": 25 // of which 17 are used. FIXME: duplicates 'hardware_settings/qubit_number' + }, + "qwgs" : { + "count": 4, + "connection_map": { // FIXME: must match "instruments" + "0": [6, 12, 18], // [freq L] + "1": [2, 8, 10, 14, 16, 22], // [freq H] + "2": [1, 9, 13, 17], // [freq Mg] + "3": [7, 11, 15, 23] // [freq My] + } + }, + "meas_units" : { + "count": 3, + "connection_map": { // FIXME: must match "instruments" + "0": [10, 15], + "1": [1, 2, 6, 7, 11, 12, 16, 17, 22], + "2": [8, 9, 13, 14, 18, 23] + } + }, + "edges": { + "count": 48, // FIXME: must be present and at least match size of 'topology/edges', see edge_resource_t + // connection_map: + // "0": [2, 10] means that edge 0 'connects' to edges 2 and 10, where edges + // refer to the "id" in 'topology/edges' + // The term 'connect' in this context means that an operation on edge 0 + // blocks operations on edges 2 and 10 + // see: https://github.com/QE-Lab/OpenQL/blob/847ff7d373b5fe7ce23c0669cb194c79525aad2e/ql/arch/cc_light/cc_light_resource_manager.h#L371 + "connection_map": { + // "0": [], + // "1": [], + // "2": [], + // "3": [], + // "4": [], + // "5": [], + // "6": [], + // "7": [], + // "8": [], + // "9": [], + // "10": [], + // "11": [], + // "12": [], + // "13": [], + // "14": [], + // "15": [], + } + } + + //"detuned_qubits" FIXME: required? + }, + + // extracted from PyqQED_py3 'generate_CCL_cfg.py' + "gate_decomposition": { + "x %0": ["rx180 %0"], + "y %0": ["ry180 %0"], + "roty90 %0": ["ry90 %0"], + "cnot %0,%1": ["ry90 %1", "cz %0,%1", "ry90 %1"], + + // To support other forms of writing the same gates + "x180 %0": ["rx180 %0"], + "y180 %0": ["ry180 %0"], + "y90 %0": ["ry90 %0"], + "x90 %0": ["rx90 %0"], + "my90 %0": ["rym90 %0"], + "mx90 %0": ["rxm90 %0"], + + // Clifford decomposition per Epstein et al. Phys. Rev. A 89, 062321 (2014) + "cl_0 %0": ["i %0"], + "cl_1 %0": ["ry90 %0", "rx90 %0"], + "cl_2 %0": ["rxm90 %0", "rym90 %0"], + "cl_3 %0": ["rx180 %0"], + "cl_4 %0": ["rym90 %0", "rxm90 %0"], + "cl_5 %0": ["rx90 %0", "rym90 %0"], + "cl_6 %0": ["ry180 %0"], + "cl_7 %0": ["rym90 %0", "rx90 %0"], + "cl_8 %0": ["rx90 %0", "ry90 %0"], + "cl_9 %0": ["rx180 %0", "ry180 %0"], + "cl_10 %0": ["ry90 %0", "rxm90 %0"], + "cl_11 %0": ["rxm90 %0", "ry90 %0"], + "cl_12 %0": ["ry90 %0", "rx180 %0"], + "cl_13 %0": ["rxm90 %0"], + "cl_14 %0": ["rx90 %0", "rym90 %0", "rxm90 %0"], + "cl_15 %0": ["rym90 %0"], + "cl_16 %0": ["rx90 %0"], + "cl_17 %0": ["rx90 %0", "ry90 %0", "rx90 %0"], + "cl_18 %0": ["rym90 %0", "rx180 %0"], + "cl_19 %0": ["rx90 %0", "ry180 %0"], + "cl_20 %0": ["rx90 %0", "rym90 %0", "rx90 %0"], + "cl_21 %0": ["ry90 %0"], + "cl_22 %0": ["rxm90 %0", "ry180 %0"], + "cl_23 %0": ["rx90 %0", "ry90 %0", "rxm90 %0"], + + // CC additions + "cnot_park1 %0,%1,%2": ["ry90 %1", "cz %0,%1", "park_cz %2", "ry90 %1"], + "cnot_park2 %0,%1,%2": ["ry90 %1", "cz_park %0,%1,%2", "ry90 %1"], + "cz_park1 %0,%1,%2": ["cz %0,%1", "park_cz %2"] + }, + + + // FIXME: allow AWG8 setPrecompClear with wave + // FIXME: key 'matrix' is required, but does not contain useful information + "instructions": { + // additions from 'CC-software-implementation.docx', these are single-qubit + // flux pulses, see issue #176: + "park_cz" : { // park signal with same length as cz gate + "duration" : 40, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc_light_instr": "park_cz", + "type": "measure", // FIXME + "cc": { + "signal": [ + { "type": "flux", + "operand_idx": 0, + "value": ["park_cz-{qubit}"] + } + ] + } + }, + + "park_measure" : { // park signal with same length as measurement + "duration" : 300, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "cc": { + "signal": [ + { "type": "flux", + "operand_idx": 0, + "value": ["park_measure-{qubit}"] + } + ] + } + }, + + + // based on PyqQED_py3 'generate_CCL_cfg.py': + "prepz": { + "duration": 200000, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "readout", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "prepz" + }, + + "measure": { + "duration": 400, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "readout", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "measz", + "cc": { + "signal": [ + { "type": "measure", + "operand_idx": 0, + "value": ["dummy"] // Future extension: specify output and weight, and generate code word + } + ] + } + }, + + // based on PyqQED_py3 'mw_lutman.py' and 'generate_CCL_cfg.py': + // FIXME: also add conditional single qubit gates? + "i": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "i", + "cc": { + "ref_signal": "single-qubit" + } + }, + "rx180": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "x", + "cc": { + "ref_signal": "single-qubit" // NB: reference, instead of defining "signal" here + } + }, + "ry180": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "y", + "cc": { + "ref_signal": "single-qubit" + } + }, + "rx90": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "x90", + "cc": { + "ref_signal": "single-qubit" + } + }, + "ry90": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "y90", + "cc": { + "ref_signal": "single-qubit" + } + }, + "rxm90": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "xm90", + "cc": { + "ref_signal": "single-qubit" + } + }, + "rym90": { + "duration": 20, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "mw", + "cc_light_instr_type": "single_qubit_gate", + "cc_light_instr": "ym90", + "cc": { + "ref_signal": "single-qubit" + } + }, + + + + // should handle: + // https://github.com/QE-Lab/OpenQL/issues/166 + // https://github.com/QE-Lab/OpenQL/issues/180 + "cz": { + "duration": 40, +// "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr_type": "two_qubit_gate", + "cc_light_instr": "cz", + "cc": { + "ref_signal": "two-qubit" // NB: reference, instead of defining "signal" here + } + }, + "cz_park": { + "duration": 40, + "latency": 0, + "matrix": [ [0.0,1.0], [1.0,0.0], [1.0,0.0], [0.0,0.0] ], + "type": "flux", + "cc_light_instr_type": "two_qubit_gate", + "cc_light_instr": "cz", + "cc": { + "signal": [ + { "type": "flux", + "operand_idx": 0, // control + "value": ["flux-0-{qubit}"] + }, + { "type": "flux", + "operand_idx": 1, // target + "value": ["flux-1-{qubit}"] + }, + { "type": "flux", + "operand_idx": 2, // park + "value": ["park_cz-{qubit}"] + } + ] + } + } + } // end of "instructions" +} + diff --git a/tests/cc/test_cqasm.py b/tests/cc/test_cqasm.py new file mode 100644 index 000000000..9e4010c50 --- /dev/null +++ b/tests/cc/test_cqasm.py @@ -0,0 +1,41 @@ +# File: test_rus_private.py +# Purpose: test RUS using cQASM1.2 +# Based on: test_structure_decomposition.py + +import os +import unittest +#from utils import file_compare + +import openql as ql + + +curdir = os.path.dirname(os.path.realpath(__file__)) +output_dir = os.path.join(curdir, 'test_output') + + +class Test_cQASM(unittest.TestCase): + + def run_test_case(self, name): + old_wd = os.getcwd() + try: + os.chdir(curdir) + + in_fn = 'test_' + name + '.cq' + out_fn = 'test_output/' + name + '_out.cq' + gold_fn = 'golden/' + name + '_out.cq' + + # ql.set_option('log_level', 'LOG_INFO') + # ql.set_option('log_level', 'LOG_DEBUG') + ql.compile(in_fn) + +# self.assertTrue(file_compare(out_fn, gold_fn)) + + finally: + os.chdir(old_wd) + + def test_rus_private(self): + self.run_test_case('rus_private') + + +if __name__ == '__main__': + unittest.main() diff --git a/tests/cc/test_rus_elements.cq b/tests/cc/test_rus_elements.cq new file mode 100644 index 000000000..b6fc3cec4 --- /dev/null +++ b/tests/cc/test_rus_elements.cq @@ -0,0 +1,52 @@ +# File: test_rus_elements.cq +# Purpose: test elements of Repeat Until Success +# Notes: +# - gate definitions require prototype, e.g. '"prototype": ["U:qubit"],' +# - legacy gate decompositions (like 'measure_fb') are not recognized, use new instruction key "decomposition" +# - make up mind about preferred gate names in cQASM versus API +# - gates with upper case (e.g. rmX180) don't work + +version 1.2 + +pragma @ql.name("test_rus_elements") +pragma @ql.platform("config_cc_s17_direct_iq_cqasm1.2.json") + + +var qInput1, qInput2, qAncilla3, qOutput4: qubit +var mAncilla3: bool + +################################################ +# preparation +################################################ +prepz qInput1 +prepz qInput2 +prepz qAncilla3 +prepz qOutput4 + +################################################ +# repeatuntilsuccess +################################################ +#for (; ; ) { # FIXME: cannot have empty condition +#for (; creg(0)<10; ) { # FIXME: RuntimeError: Unknown error: dereferencing empty Maybe/One object or type N2ql2ir9StatementE (from EventGatherer::add_statement) +#for (creg(0)=0; creg(0)<10000; creg(0)=creg(0)+1) { # FIXME: RuntimeError: Assertion failure: assert !nc.get().commutes_with(incoming) failed +###while(creg(0)<10000) { + cz qInput2, qAncilla3 + rx180 qOutput4 + i qOutput4 + rx180 qOutput4 + barrier + + measure_fb qAncilla3, mAncilla3 + rx180 qOutput4 +# for _ in range(8): +# FIXME: repeat as intended + i qOutput4 + barrier + +### if (!mAncilla3) { +### break +### } + barrier + + rx180 qAncilla3 +###} diff --git a/tests/test_std_experiments_CCL.py b/tests/cc_light/test_std_experiments_CCL.py similarity index 100% rename from tests/test_std_experiments_CCL.py rename to tests/cc_light/test_std_experiments_CCL.py diff --git a/tests/test_wait.py b/tests/cc_light/test_wait.py similarity index 99% rename from tests/test_wait.py rename to tests/cc_light/test_wait.py index 3ee3a4bbe..f812ae5ba 100644 --- a/tests/test_wait.py +++ b/tests/cc_light/test_wait.py @@ -1,7 +1,7 @@ import os import unittest from openql import openql as ql -from utils import file_compare +#from utils import file_compare curdir = os.path.dirname(os.path.realpath(__file__)) output_dir = os.path.join(curdir, 'test_output') diff --git a/tests/golden/basic.qasm b/tests/compat/golden/basic.qasm similarity index 100% rename from tests/golden/basic.qasm rename to tests/compat/golden/basic.qasm diff --git a/tests/golden/basic_scheduled.qasm b/tests/compat/golden/basic_scheduled.qasm similarity index 100% rename from tests/golden/basic_scheduled.qasm rename to tests/compat/golden/basic_scheduled.qasm diff --git a/tests/golden/test_1_ALAP_last.qasm b/tests/compat/golden/test_1_ALAP_last.qasm similarity index 100% rename from tests/golden/test_1_ALAP_last.qasm rename to tests/compat/golden/test_1_ALAP_last.qasm diff --git a/tests/golden/test_1_qubit.qasm b/tests/compat/golden/test_1_qubit.qasm similarity index 100% rename from tests/golden/test_1_qubit.qasm rename to tests/compat/golden/test_1_qubit.qasm diff --git a/tests/golden/test_2_qubit.qasm b/tests/compat/golden/test_2_qubit.qasm similarity index 100% rename from tests/golden/test_2_qubit.qasm rename to tests/compat/golden/test_2_qubit.qasm diff --git a/tests/golden/test_3_qubit.qasm b/tests/compat/golden/test_3_qubit.qasm similarity index 100% rename from tests/golden/test_3_qubit.qasm rename to tests/compat/golden/test_3_qubit.qasm diff --git a/tests/golden/test_barrier_all.qasm b/tests/compat/golden/test_barrier_all.qasm similarity index 100% rename from tests/golden/test_barrier_all.qasm rename to tests/compat/golden/test_barrier_all.qasm diff --git a/tests/golden/test_barrier_last.qasm b/tests/compat/golden/test_barrier_last.qasm similarity index 100% rename from tests/golden/test_barrier_last.qasm rename to tests/compat/golden/test_barrier_last.qasm diff --git a/tests/golden/test_cqasm_custom_gates.qasm b/tests/compat/golden/test_cqasm_custom_gates.qasm similarity index 100% rename from tests/golden/test_cqasm_custom_gates.qasm rename to tests/compat/golden/test_cqasm_custom_gates.qasm diff --git a/tests/golden/test_cqasm_custom_gates_scheduled.qasm b/tests/compat/golden/test_cqasm_custom_gates_scheduled.qasm similarity index 100% rename from tests/golden/test_cqasm_custom_gates_scheduled.qasm rename to tests/compat/golden/test_cqasm_custom_gates_scheduled.qasm diff --git a/tests/golden/test_cqasm_default_gates.qasm b/tests/compat/golden/test_cqasm_default_gates.qasm similarity index 100% rename from tests/golden/test_cqasm_default_gates.qasm rename to tests/compat/golden/test_cqasm_default_gates.qasm diff --git a/tests/golden/test_cqasm_default_gates_scheduled.qasm b/tests/compat/golden/test_cqasm_default_gates_scheduled.qasm similarity index 100% rename from tests/golden/test_cqasm_default_gates_scheduled.qasm rename to tests/compat/golden/test_cqasm_default_gates_scheduled.qasm diff --git a/tests/golden/test_edge_available_last.qasm b/tests/compat/golden/test_edge_available_last.qasm similarity index 100% rename from tests/golden/test_edge_available_last.qasm rename to tests/compat/golden/test_edge_available_last.qasm diff --git a/tests/golden/test_edge_busy_last.qasm b/tests/compat/golden/test_edge_busy_last.qasm similarity index 100% rename from tests/golden/test_edge_busy_last.qasm rename to tests/compat/golden/test_edge_busy_last.qasm diff --git a/tests/golden/test_fast_feedback_last.qasm b/tests/compat/golden/test_fast_feedback_last.qasm similarity index 100% rename from tests/golden/test_fast_feedback_last.qasm rename to tests/compat/golden/test_fast_feedback_last.qasm diff --git a/tests/golden/test_flux_all_last.qasm b/tests/compat/golden/test_flux_all_last.qasm similarity index 100% rename from tests/golden/test_flux_all_last.qasm rename to tests/compat/golden/test_flux_all_last.qasm diff --git a/tests/golden/test_measure_available01_last.qasm b/tests/compat/golden/test_measure_available01_last.qasm similarity index 100% rename from tests/golden/test_measure_available01_last.qasm rename to tests/compat/golden/test_measure_available01_last.qasm diff --git a/tests/golden/test_measure_available02_last.qasm b/tests/compat/golden/test_measure_available02_last.qasm similarity index 100% rename from tests/golden/test_measure_available02_last.qasm rename to tests/compat/golden/test_measure_available02_last.qasm diff --git a/tests/golden/test_measure_busy_last.qasm b/tests/compat/golden/test_measure_busy_last.qasm similarity index 100% rename from tests/golden/test_measure_busy_last.qasm rename to tests/compat/golden/test_measure_busy_last.qasm diff --git a/tests/golden/test_qubit_busy_last.qasm b/tests/compat/golden/test_qubit_busy_last.qasm similarity index 100% rename from tests/golden/test_qubit_busy_last.qasm rename to tests/compat/golden/test_qubit_busy_last.qasm diff --git a/tests/golden/test_qwg_available_01_last.qasm b/tests/compat/golden/test_qwg_available_01_last.qasm similarity index 100% rename from tests/golden/test_qwg_available_01_last.qasm rename to tests/compat/golden/test_qwg_available_01_last.qasm diff --git a/tests/golden/test_qwg_available_02_last.qasm b/tests/compat/golden/test_qwg_available_02_last.qasm similarity index 100% rename from tests/golden/test_qwg_available_02_last.qasm rename to tests/compat/golden/test_qwg_available_02_last.qasm diff --git a/tests/golden/test_qwg_busy_last.qasm b/tests/compat/golden/test_qwg_busy_last.qasm similarity index 100% rename from tests/golden/test_qwg_busy_last.qasm rename to tests/compat/golden/test_qwg_busy_last.qasm diff --git a/tests/golden/test_smis_all_bundled_last.qasm b/tests/compat/golden/test_smis_all_bundled_last.qasm similarity index 100% rename from tests/golden/test_smis_all_bundled_last.qasm rename to tests/compat/golden/test_smis_all_bundled_last.qasm diff --git a/tests/golden/test_smis_last.qasm b/tests/compat/golden/test_smis_last.qasm similarity index 100% rename from tests/golden/test_smis_last.qasm rename to tests/compat/golden/test_smis_last.qasm diff --git a/tests/golden/test_smis_multi_kernel_last.qasm b/tests/compat/golden/test_smis_multi_kernel_last.qasm similarity index 100% rename from tests/golden/test_smis_multi_kernel_last.qasm rename to tests/compat/golden/test_smis_multi_kernel_last.qasm diff --git a/tests/golden/test_smis_with_custom_gates_last.qasm b/tests/compat/golden/test_smis_with_custom_gates_last.qasm similarity index 100% rename from tests/golden/test_smis_with_custom_gates_last.qasm rename to tests/compat/golden/test_smis_with_custom_gates_last.qasm diff --git a/tests/golden/test_smit_all_bundled.qasm b/tests/compat/golden/test_smit_all_bundled.qasm similarity index 100% rename from tests/golden/test_smit_all_bundled.qasm rename to tests/compat/golden/test_smit_all_bundled.qasm diff --git a/tests/golden/test_smit_all_bundled_last.qasm b/tests/compat/golden/test_smit_all_bundled_last.qasm similarity index 100% rename from tests/golden/test_smit_all_bundled_last.qasm rename to tests/compat/golden/test_smit_all_bundled_last.qasm diff --git a/tests/golden/test_smit_last.qasm b/tests/compat/golden/test_smit_last.qasm similarity index 100% rename from tests/golden/test_smit_last.qasm rename to tests/compat/golden/test_smit_last.qasm diff --git a/tests/golden/test_wait_barrier_last.qasm b/tests/compat/golden/test_wait_barrier_last.qasm similarity index 100% rename from tests/golden/test_wait_barrier_last.qasm rename to tests/compat/golden/test_wait_barrier_last.qasm diff --git a/tests/spin_demo_2811.json b/tests/compat/spin_demo_2811.json similarity index 100% rename from tests/spin_demo_2811.json rename to tests/compat/spin_demo_2811.json diff --git a/tests/test_barrier.py b/tests/compat/test_barrier.py similarity index 100% rename from tests/test_barrier.py rename to tests/compat/test_barrier.py diff --git a/tests/test_basics.py b/tests/compat/test_basics.py similarity index 100% rename from tests/test_basics.py rename to tests/compat/test_basics.py diff --git a/tests/test_bugs.py b/tests/compat/test_bugs.py similarity index 100% rename from tests/test_bugs.py rename to tests/compat/test_bugs.py diff --git a/tests/test_cc_light.py b/tests/compat/test_cc_light.py similarity index 100% rename from tests/test_cc_light.py rename to tests/compat/test_cc_light.py diff --git a/tests/test_cfg_none.json b/tests/compat/test_cfg_none.json similarity index 100% rename from tests/test_cfg_none.json rename to tests/compat/test_cfg_none.json diff --git a/tests/test_config_default.json b/tests/compat/test_config_default.json similarity index 100% rename from tests/test_config_default.json rename to tests/compat/test_config_default.json diff --git a/tests/test_cqasm.py b/tests/compat/test_cqasm.py similarity index 100% rename from tests/test_cqasm.py rename to tests/compat/test_cqasm.py diff --git a/tests/test_exceptions.py b/tests/compat/test_exceptions.py similarity index 100% rename from tests/test_exceptions.py rename to tests/compat/test_exceptions.py diff --git a/tests/test_flux.py b/tests/compat/test_flux.py similarity index 100% rename from tests/test_flux.py rename to tests/compat/test_flux.py diff --git a/tests/test_gate_decomposition.py b/tests/compat/test_gate_decomposition.py similarity index 100% rename from tests/test_gate_decomposition.py rename to tests/compat/test_gate_decomposition.py diff --git a/tests/test_minimal.py b/tests/compat/test_minimal.py similarity index 100% rename from tests/test_minimal.py rename to tests/compat/test_minimal.py diff --git a/tests/test_options.py b/tests/compat/test_options.py similarity index 100% rename from tests/test_options.py rename to tests/compat/test_options.py diff --git a/tests/test_parallel_triggers.py b/tests/compat/test_parallel_triggers.py similarity index 100% rename from tests/test_parallel_triggers.py rename to tests/compat/test_parallel_triggers.py diff --git a/tests/test_qubits.py b/tests/compat/test_qubits.py similarity index 100% rename from tests/test_qubits.py rename to tests/compat/test_qubits.py diff --git a/tests/compat/utils.py b/tests/compat/utils.py new file mode 100644 index 000000000..cc5e3803c --- /dev/null +++ b/tests/compat/utils.py @@ -0,0 +1,25 @@ +import difflib + + +def file_compare(fn1, fn2): + """ + Compare two cQASM files and raise an Assertion error if they are different, + but ignoring for the # comment block that the files start with. + + The assertion error contains a diff of the files. + """ + with open(fn1) as f, open(fn2) as g: + flines = list(f.readlines()) + while flines and flines[0].startswith('#'): + flines.pop(0) + glines = list(g.readlines()) + while glines and glines[0].startswith('#'): + glines.pop(0) + d = difflib.Differ() + diffs = [x for x in d.compare(flines, glines) if x[0] in ('+', '-')] + if diffs: + # all rows with changes + raise AssertionError("Files not equal\n"+"".join(diffs)) + return False + else: + return True From b4f2721b5f5096945fb535ceac0534afcf9ba38d Mon Sep 17 00:00:00 2001 From: Wouter Vlothuizen Date: Mon, 26 Jul 2021 12:08:59 +0200 Subject: [PATCH 2/4] moved more tests to directory compat --- docs/manual/first_program.rst | 2 +- .../cc/config_cc_s17_direct_iq_cqasm1.2.json | 2 +- tests/cc/test_cqasm.py | 22 ++++++++++++++++--- tests/{ => compat}/cqasm_config_cc_light.json | 0 .../golden/AllXYLongDuration_last.qasm | 0 .../{ => compat}/golden/test_7_ALAP_last.qasm | 0 .../golden/test_RAR_Control_ASAP.qasm | 0 tests/{ => compat}/golden/test_RAW_ASAP.qasm | 0 tests/{ => compat}/golden/test_WAR_ASAP.qasm | 0 tests/{ => compat}/golden/test_WAW_ASAP.qasm | 0 .../golden/test_adriaan_ALAP_last.qasm | 0 .../golden/test_condex_basic_scheduled.qasm | 0 .../golden/test_condex_cnot_last.qasm | 0 .../golden/test_condex_measure_last.qasm | 0 .../test_condex_toffoli_composgate_last.qasm | 0 tests/{ => compat}/golden/test_conjugate.qasm | 0 .../test_controlled_rotations_scheduled.qasm | 0 ...ntrolled_single_qubit_gates_scheduled.qasm | 0 ..._controlled_two_qubit_gates_scheduled.qasm | 0 .../golden/test_cqasm_conditions.qasm | 0 .../golden/test_cqasm_real_numbers.qasm | 0 .../golden/test_detuned2_ALAP_last.qasm | 0 .../golden/test_detuned_ALAP_last.qasm | 0 .../golden/test_edge_ALAP_last.qasm | 0 .../golden/test_independence.qasm | 0 .../golden/test_issue179_ALAP_last.qasm | 0 .../test_multi_controlled_scheduled.qasm | 0 .../golden/test_multiple_programs.qasm | 0 .../golden/test_parallel_programs.qasm | 0 .../golden/test_qwg2_ALAP_last.qasm | 0 .../golden/test_qwg_ALAP_last.qasm | 0 .../test_single_bit_kernel_operations.qasm | 0 .../golden/test_skip_yes_scheduled.qasm | 0 .../golden/test_sub_circuit_programs.qasm | 0 .../golden/test_swap_multi_ASAP.qasm | 0 .../golden/test_swap_single_ASAP.qasm | 0 tests/{ => compat}/test_alap_rc_schedule.py | 0 .../test_cc_light_long_duration.py | 0 .../test_cfg_CCL_long_duration.json | 0 tests/{ => compat}/test_cfg_none_s7.json | 0 tests/{ => compat}/test_cfg_none_simple.json | 0 tests/{ => compat}/test_condex.py | 0 tests/{ => compat}/test_configuration.py | 0 tests/{ => compat}/test_conjugate.py | 0 tests/{ => compat}/test_controlled_kernel.py | 0 tests/{ => compat}/test_cqasm_reader.cc | 0 tests/{ => compat}/test_cqasm_reader.py | 0 tests/{ => compat}/test_custom_gate.py | 0 tests/{ => compat}/test_dependence.py | 0 tests/{ => compat}/test_skip.py | 0 tests/{ => compat}/test_sweep_points.py | 0 tests/{ => compat}/test_uniform_sched.py | 0 tests/test_Kernel.py | 4 ++-- tests/test_Program.py | 12 +++++----- 54 files changed, 29 insertions(+), 13 deletions(-) rename tests/{ => compat}/cqasm_config_cc_light.json (100%) rename tests/{ => compat}/golden/AllXYLongDuration_last.qasm (100%) rename tests/{ => compat}/golden/test_7_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_RAR_Control_ASAP.qasm (100%) rename tests/{ => compat}/golden/test_RAW_ASAP.qasm (100%) rename tests/{ => compat}/golden/test_WAR_ASAP.qasm (100%) rename tests/{ => compat}/golden/test_WAW_ASAP.qasm (100%) rename tests/{ => compat}/golden/test_adriaan_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_condex_basic_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_condex_cnot_last.qasm (100%) rename tests/{ => compat}/golden/test_condex_measure_last.qasm (100%) rename tests/{ => compat}/golden/test_condex_toffoli_composgate_last.qasm (100%) rename tests/{ => compat}/golden/test_conjugate.qasm (100%) rename tests/{ => compat}/golden/test_controlled_rotations_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_controlled_single_qubit_gates_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_controlled_two_qubit_gates_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_cqasm_conditions.qasm (100%) rename tests/{ => compat}/golden/test_cqasm_real_numbers.qasm (100%) rename tests/{ => compat}/golden/test_detuned2_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_detuned_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_edge_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_independence.qasm (100%) rename tests/{ => compat}/golden/test_issue179_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_multi_controlled_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_multiple_programs.qasm (100%) rename tests/{ => compat}/golden/test_parallel_programs.qasm (100%) rename tests/{ => compat}/golden/test_qwg2_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_qwg_ALAP_last.qasm (100%) rename tests/{ => compat}/golden/test_single_bit_kernel_operations.qasm (100%) rename tests/{ => compat}/golden/test_skip_yes_scheduled.qasm (100%) rename tests/{ => compat}/golden/test_sub_circuit_programs.qasm (100%) rename tests/{ => compat}/golden/test_swap_multi_ASAP.qasm (100%) rename tests/{ => compat}/golden/test_swap_single_ASAP.qasm (100%) rename tests/{ => compat}/test_alap_rc_schedule.py (100%) rename tests/{ => compat}/test_cc_light_long_duration.py (100%) rename tests/{ => compat}/test_cfg_CCL_long_duration.json (100%) rename tests/{ => compat}/test_cfg_none_s7.json (100%) rename tests/{ => compat}/test_cfg_none_simple.json (100%) rename tests/{ => compat}/test_condex.py (100%) rename tests/{ => compat}/test_configuration.py (100%) rename tests/{ => compat}/test_conjugate.py (100%) rename tests/{ => compat}/test_controlled_kernel.py (100%) rename tests/{ => compat}/test_cqasm_reader.cc (100%) rename tests/{ => compat}/test_cqasm_reader.py (100%) rename tests/{ => compat}/test_custom_gate.py (100%) rename tests/{ => compat}/test_dependence.py (100%) rename tests/{ => compat}/test_skip.py (100%) rename tests/{ => compat}/test_sweep_points.py (100%) rename tests/{ => compat}/test_uniform_sched.py (100%) diff --git a/docs/manual/first_program.rst b/docs/manual/first_program.rst index 7524fac62..d642634f9 100644 --- a/docs/manual/first_program.rst +++ b/docs/manual/first_program.rst @@ -190,5 +190,5 @@ configuration file for the "none" architecture. Depending on the architecture and compiler configuration, different output files may be generated. The above only applies because of the default pass -list doe the "none" architecture: a cQASM writer, followed by a scheduler, +list for the "none" architecture: a cQASM writer, followed by a scheduler, followed by another cQASM writer. This is fully configurable. diff --git a/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json b/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json index a7b6a2d2f..2e384dc1f 100644 --- a/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json +++ b/tests/cc/config_cc_s17_direct_iq_cqasm1.2.json @@ -1059,7 +1059,7 @@ "static_codeword_override": [31] }, "decomposition": { - "name": "_measure_fb", +// "name": "_measure_fb", "into": "measure op(0),op(1); _wait_uhfqa op(0); _dist_dsm op(0); _wait_dsm op(0)" } }, diff --git a/tests/cc/test_cqasm.py b/tests/cc/test_cqasm.py index 9e4010c50..10d18e392 100644 --- a/tests/cc/test_cqasm.py +++ b/tests/cc/test_cqasm.py @@ -24,8 +24,24 @@ def run_test_case(self, name): out_fn = 'test_output/' + name + '_out.cq' gold_fn = 'golden/' + name + '_out.cq' + ql.initialize() # ql.set_option('log_level', 'LOG_INFO') - # ql.set_option('log_level', 'LOG_DEBUG') + ql.set_option('log_level', 'LOG_DEBUG') + + if 0: + ql.set_option("write_qasm_files", "yes") + ql.set_option("write_report_files", "yes") + #ql.Pass.set_option() + # ql.Pass.set_option("ALL", "debug", "yes") + c = ql.Compiler() + if 0: + p = c.get_pass("sch.ListSchedule") + print(p.get_name()) + p.set_option("debug", "yes") + if 0: + c.set_option('sch.ListSchedule.debug', 'yes') + + # ql.compile(in_fn, {"debug": "yes"}) ql.compile(in_fn) # self.assertTrue(file_compare(out_fn, gold_fn)) @@ -33,8 +49,8 @@ def run_test_case(self, name): finally: os.chdir(old_wd) - def test_rus_private(self): - self.run_test_case('rus_private') + def test_rus_elements(self): + self.run_test_case('rus_elements') if __name__ == '__main__': diff --git a/tests/cqasm_config_cc_light.json b/tests/compat/cqasm_config_cc_light.json similarity index 100% rename from tests/cqasm_config_cc_light.json rename to tests/compat/cqasm_config_cc_light.json diff --git a/tests/golden/AllXYLongDuration_last.qasm b/tests/compat/golden/AllXYLongDuration_last.qasm similarity index 100% rename from tests/golden/AllXYLongDuration_last.qasm rename to tests/compat/golden/AllXYLongDuration_last.qasm diff --git a/tests/golden/test_7_ALAP_last.qasm b/tests/compat/golden/test_7_ALAP_last.qasm similarity index 100% rename from tests/golden/test_7_ALAP_last.qasm rename to tests/compat/golden/test_7_ALAP_last.qasm diff --git a/tests/golden/test_RAR_Control_ASAP.qasm b/tests/compat/golden/test_RAR_Control_ASAP.qasm similarity index 100% rename from tests/golden/test_RAR_Control_ASAP.qasm rename to tests/compat/golden/test_RAR_Control_ASAP.qasm diff --git a/tests/golden/test_RAW_ASAP.qasm b/tests/compat/golden/test_RAW_ASAP.qasm similarity index 100% rename from tests/golden/test_RAW_ASAP.qasm rename to tests/compat/golden/test_RAW_ASAP.qasm diff --git a/tests/golden/test_WAR_ASAP.qasm b/tests/compat/golden/test_WAR_ASAP.qasm similarity index 100% rename from tests/golden/test_WAR_ASAP.qasm rename to tests/compat/golden/test_WAR_ASAP.qasm diff --git a/tests/golden/test_WAW_ASAP.qasm b/tests/compat/golden/test_WAW_ASAP.qasm similarity index 100% rename from tests/golden/test_WAW_ASAP.qasm rename to tests/compat/golden/test_WAW_ASAP.qasm diff --git a/tests/golden/test_adriaan_ALAP_last.qasm b/tests/compat/golden/test_adriaan_ALAP_last.qasm similarity index 100% rename from tests/golden/test_adriaan_ALAP_last.qasm rename to tests/compat/golden/test_adriaan_ALAP_last.qasm diff --git a/tests/golden/test_condex_basic_scheduled.qasm b/tests/compat/golden/test_condex_basic_scheduled.qasm similarity index 100% rename from tests/golden/test_condex_basic_scheduled.qasm rename to tests/compat/golden/test_condex_basic_scheduled.qasm diff --git a/tests/golden/test_condex_cnot_last.qasm b/tests/compat/golden/test_condex_cnot_last.qasm similarity index 100% rename from tests/golden/test_condex_cnot_last.qasm rename to tests/compat/golden/test_condex_cnot_last.qasm diff --git a/tests/golden/test_condex_measure_last.qasm b/tests/compat/golden/test_condex_measure_last.qasm similarity index 100% rename from tests/golden/test_condex_measure_last.qasm rename to tests/compat/golden/test_condex_measure_last.qasm diff --git a/tests/golden/test_condex_toffoli_composgate_last.qasm b/tests/compat/golden/test_condex_toffoli_composgate_last.qasm similarity index 100% rename from tests/golden/test_condex_toffoli_composgate_last.qasm rename to tests/compat/golden/test_condex_toffoli_composgate_last.qasm diff --git a/tests/golden/test_conjugate.qasm b/tests/compat/golden/test_conjugate.qasm similarity index 100% rename from tests/golden/test_conjugate.qasm rename to tests/compat/golden/test_conjugate.qasm diff --git a/tests/golden/test_controlled_rotations_scheduled.qasm b/tests/compat/golden/test_controlled_rotations_scheduled.qasm similarity index 100% rename from tests/golden/test_controlled_rotations_scheduled.qasm rename to tests/compat/golden/test_controlled_rotations_scheduled.qasm diff --git a/tests/golden/test_controlled_single_qubit_gates_scheduled.qasm b/tests/compat/golden/test_controlled_single_qubit_gates_scheduled.qasm similarity index 100% rename from tests/golden/test_controlled_single_qubit_gates_scheduled.qasm rename to tests/compat/golden/test_controlled_single_qubit_gates_scheduled.qasm diff --git a/tests/golden/test_controlled_two_qubit_gates_scheduled.qasm b/tests/compat/golden/test_controlled_two_qubit_gates_scheduled.qasm similarity index 100% rename from tests/golden/test_controlled_two_qubit_gates_scheduled.qasm rename to tests/compat/golden/test_controlled_two_qubit_gates_scheduled.qasm diff --git a/tests/golden/test_cqasm_conditions.qasm b/tests/compat/golden/test_cqasm_conditions.qasm similarity index 100% rename from tests/golden/test_cqasm_conditions.qasm rename to tests/compat/golden/test_cqasm_conditions.qasm diff --git a/tests/golden/test_cqasm_real_numbers.qasm b/tests/compat/golden/test_cqasm_real_numbers.qasm similarity index 100% rename from tests/golden/test_cqasm_real_numbers.qasm rename to tests/compat/golden/test_cqasm_real_numbers.qasm diff --git a/tests/golden/test_detuned2_ALAP_last.qasm b/tests/compat/golden/test_detuned2_ALAP_last.qasm similarity index 100% rename from tests/golden/test_detuned2_ALAP_last.qasm rename to tests/compat/golden/test_detuned2_ALAP_last.qasm diff --git a/tests/golden/test_detuned_ALAP_last.qasm b/tests/compat/golden/test_detuned_ALAP_last.qasm similarity index 100% rename from tests/golden/test_detuned_ALAP_last.qasm rename to tests/compat/golden/test_detuned_ALAP_last.qasm diff --git a/tests/golden/test_edge_ALAP_last.qasm b/tests/compat/golden/test_edge_ALAP_last.qasm similarity index 100% rename from tests/golden/test_edge_ALAP_last.qasm rename to tests/compat/golden/test_edge_ALAP_last.qasm diff --git a/tests/golden/test_independence.qasm b/tests/compat/golden/test_independence.qasm similarity index 100% rename from tests/golden/test_independence.qasm rename to tests/compat/golden/test_independence.qasm diff --git a/tests/golden/test_issue179_ALAP_last.qasm b/tests/compat/golden/test_issue179_ALAP_last.qasm similarity index 100% rename from tests/golden/test_issue179_ALAP_last.qasm rename to tests/compat/golden/test_issue179_ALAP_last.qasm diff --git a/tests/golden/test_multi_controlled_scheduled.qasm b/tests/compat/golden/test_multi_controlled_scheduled.qasm similarity index 100% rename from tests/golden/test_multi_controlled_scheduled.qasm rename to tests/compat/golden/test_multi_controlled_scheduled.qasm diff --git a/tests/golden/test_multiple_programs.qasm b/tests/compat/golden/test_multiple_programs.qasm similarity index 100% rename from tests/golden/test_multiple_programs.qasm rename to tests/compat/golden/test_multiple_programs.qasm diff --git a/tests/golden/test_parallel_programs.qasm b/tests/compat/golden/test_parallel_programs.qasm similarity index 100% rename from tests/golden/test_parallel_programs.qasm rename to tests/compat/golden/test_parallel_programs.qasm diff --git a/tests/golden/test_qwg2_ALAP_last.qasm b/tests/compat/golden/test_qwg2_ALAP_last.qasm similarity index 100% rename from tests/golden/test_qwg2_ALAP_last.qasm rename to tests/compat/golden/test_qwg2_ALAP_last.qasm diff --git a/tests/golden/test_qwg_ALAP_last.qasm b/tests/compat/golden/test_qwg_ALAP_last.qasm similarity index 100% rename from tests/golden/test_qwg_ALAP_last.qasm rename to tests/compat/golden/test_qwg_ALAP_last.qasm diff --git a/tests/golden/test_single_bit_kernel_operations.qasm b/tests/compat/golden/test_single_bit_kernel_operations.qasm similarity index 100% rename from tests/golden/test_single_bit_kernel_operations.qasm rename to tests/compat/golden/test_single_bit_kernel_operations.qasm diff --git a/tests/golden/test_skip_yes_scheduled.qasm b/tests/compat/golden/test_skip_yes_scheduled.qasm similarity index 100% rename from tests/golden/test_skip_yes_scheduled.qasm rename to tests/compat/golden/test_skip_yes_scheduled.qasm diff --git a/tests/golden/test_sub_circuit_programs.qasm b/tests/compat/golden/test_sub_circuit_programs.qasm similarity index 100% rename from tests/golden/test_sub_circuit_programs.qasm rename to tests/compat/golden/test_sub_circuit_programs.qasm diff --git a/tests/golden/test_swap_multi_ASAP.qasm b/tests/compat/golden/test_swap_multi_ASAP.qasm similarity index 100% rename from tests/golden/test_swap_multi_ASAP.qasm rename to tests/compat/golden/test_swap_multi_ASAP.qasm diff --git a/tests/golden/test_swap_single_ASAP.qasm b/tests/compat/golden/test_swap_single_ASAP.qasm similarity index 100% rename from tests/golden/test_swap_single_ASAP.qasm rename to tests/compat/golden/test_swap_single_ASAP.qasm diff --git a/tests/test_alap_rc_schedule.py b/tests/compat/test_alap_rc_schedule.py similarity index 100% rename from tests/test_alap_rc_schedule.py rename to tests/compat/test_alap_rc_schedule.py diff --git a/tests/test_cc_light_long_duration.py b/tests/compat/test_cc_light_long_duration.py similarity index 100% rename from tests/test_cc_light_long_duration.py rename to tests/compat/test_cc_light_long_duration.py diff --git a/tests/test_cfg_CCL_long_duration.json b/tests/compat/test_cfg_CCL_long_duration.json similarity index 100% rename from tests/test_cfg_CCL_long_duration.json rename to tests/compat/test_cfg_CCL_long_duration.json diff --git a/tests/test_cfg_none_s7.json b/tests/compat/test_cfg_none_s7.json similarity index 100% rename from tests/test_cfg_none_s7.json rename to tests/compat/test_cfg_none_s7.json diff --git a/tests/test_cfg_none_simple.json b/tests/compat/test_cfg_none_simple.json similarity index 100% rename from tests/test_cfg_none_simple.json rename to tests/compat/test_cfg_none_simple.json diff --git a/tests/test_condex.py b/tests/compat/test_condex.py similarity index 100% rename from tests/test_condex.py rename to tests/compat/test_condex.py diff --git a/tests/test_configuration.py b/tests/compat/test_configuration.py similarity index 100% rename from tests/test_configuration.py rename to tests/compat/test_configuration.py diff --git a/tests/test_conjugate.py b/tests/compat/test_conjugate.py similarity index 100% rename from tests/test_conjugate.py rename to tests/compat/test_conjugate.py diff --git a/tests/test_controlled_kernel.py b/tests/compat/test_controlled_kernel.py similarity index 100% rename from tests/test_controlled_kernel.py rename to tests/compat/test_controlled_kernel.py diff --git a/tests/test_cqasm_reader.cc b/tests/compat/test_cqasm_reader.cc similarity index 100% rename from tests/test_cqasm_reader.cc rename to tests/compat/test_cqasm_reader.cc diff --git a/tests/test_cqasm_reader.py b/tests/compat/test_cqasm_reader.py similarity index 100% rename from tests/test_cqasm_reader.py rename to tests/compat/test_cqasm_reader.py diff --git a/tests/test_custom_gate.py b/tests/compat/test_custom_gate.py similarity index 100% rename from tests/test_custom_gate.py rename to tests/compat/test_custom_gate.py diff --git a/tests/test_dependence.py b/tests/compat/test_dependence.py similarity index 100% rename from tests/test_dependence.py rename to tests/compat/test_dependence.py diff --git a/tests/test_skip.py b/tests/compat/test_skip.py similarity index 100% rename from tests/test_skip.py rename to tests/compat/test_skip.py diff --git a/tests/test_sweep_points.py b/tests/compat/test_sweep_points.py similarity index 100% rename from tests/test_sweep_points.py rename to tests/compat/test_sweep_points.py diff --git a/tests/test_uniform_sched.py b/tests/compat/test_uniform_sched.py similarity index 100% rename from tests/test_uniform_sched.py rename to tests/compat/test_uniform_sched.py diff --git a/tests/test_Kernel.py b/tests/test_Kernel.py index 1c58d3382..4761396aa 100644 --- a/tests/test_Kernel.py +++ b/tests/test_Kernel.py @@ -26,13 +26,13 @@ def test_kernel_name(self): def test_kernel_qubit_count(self): name = "kernel1" - nqubits=3 + nqubits = 3 k = ql.Kernel(name, platf, nqubits) self.assertEqual(k.qubit_count, nqubits) def test_kernel_creg_count(self): name = "kernel1" - nqubits=2 + nqubits = 2 ncreg = 3 k = ql.Kernel(name, platf, nqubits, ncreg) self.assertEqual(k.creg_count, ncreg) diff --git a/tests/test_Program.py b/tests/test_Program.py index 2989c94cb..302310086 100644 --- a/tests/test_Program.py +++ b/tests/test_Program.py @@ -21,26 +21,26 @@ def setUp(self): def test_program_name(self): name = "program1" - nqubits=1 + nqubits = 1 p = ql.Program(name, platf, nqubits) self.assertEqual(p.name, name) def test_program_qubit_count(self): name = "program1" - nqubits=3 + nqubits = 3 p = ql.Program(name, platf, nqubits) self.assertEqual(p.qubit_count, nqubits) def test_program_creg_count(self): name = "program1" - nqubits=2 + nqubits = 2 ncreg = 3 p = ql.Program(name, platf, nqubits, ncreg) self.assertEqual(p.creg_count, ncreg) def test_add_kernel(self): # test that this does not raise any error - nqubits=5 + nqubits = 5 k = ql.Kernel("kernel1", platf, nqubits) p = ql.Program('program1', platf, nqubits) p.add_kernel(k) @@ -57,7 +57,7 @@ def test_sweep_points(self): def test_program_methods(self): # This tests for the existence of the right methods in the wrapping - nqubits=5 + nqubits = 5 p = ql.Program('program1', platf, nqubits) program_methods = [ 'add_kernel', @@ -93,7 +93,7 @@ def test_simple_program(self): def test_5qubit_program(self): - nqubits=5 + nqubits = 5 p = ql.Program("a_program", platf, nqubits) k = ql.Kernel("a_kernel", platf, nqubits) From 723be1bd5883dc339ad7896b9b9a6816ffe53cdf Mon Sep 17 00:00:00 2001 From: Wouter Vlothuizen Date: Mon, 21 Mar 2022 13:51:55 +0100 Subject: [PATCH 3/4] reverted some files --- docs/manual/first_program.rst | 2 +- src/ql/ir/new_to_old.cc | 49 +++++++++++++++++++---------------- src/ql/ir/ops.cc | 1 - src/ql/utils/json.cc | 4 +-- 4 files changed, 30 insertions(+), 26 deletions(-) diff --git a/docs/manual/first_program.rst b/docs/manual/first_program.rst index d642634f9..7524fac62 100644 --- a/docs/manual/first_program.rst +++ b/docs/manual/first_program.rst @@ -190,5 +190,5 @@ configuration file for the "none" architecture. Depending on the architecture and compiler configuration, different output files may be generated. The above only applies because of the default pass -list for the "none" architecture: a cQASM writer, followed by a scheduler, +list doe the "none" architecture: a cQASM writer, followed by a scheduler, followed by another cQASM writer. This is fully configurable. diff --git a/src/ql/ir/new_to_old.cc b/src/ql/ir/new_to_old.cc index c226a7562..54bc8d51a 100644 --- a/src/ql/ir/new_to_old.cc +++ b/src/ql/ir/new_to_old.cc @@ -10,6 +10,9 @@ #include "ql/ir/describe.h" #include "ql/arch/diamond/annotations.h" +// #define MULTI_LINE_LOG_DEBUG to enable multi-line dumping +#undef MULTI_LINE_LOG_DEBUG + namespace ql { namespace ir { @@ -483,24 +486,10 @@ void NewToOldConverter::convert_block( // Handle the normal operands for custom instructions. Operands ops; for (const auto &ob : custom->instruction_type->template_operands) { - try { - ops.append(*this, ob); - } catch (utils::Exception &e) { - e.add_context("name="+custom->instruction_type->name+", qubits="+ops.qubits.to_string()); - throw; - } + ops.append(*this, ob); } for (utils::UInt i = 0; i < custom->operands.size() - diamond_op_count; i++) { - try { - ops.append(*this, custom->operands[i]); - } catch (utils::Exception &e) { - e.add_context( - "name=" + custom->instruction_type->name - + ", qubits=" + ops.qubits.to_string() - + ", operand=" + std::to_string(i) - ); - throw; - } + ops.append(*this, custom->operands[i]); } kernel->gate( custom->instruction_type->name, ops.qubits, ops.cregs, @@ -815,18 +804,34 @@ NewToOldConverter::NewToOldConverter(const Ref &ir) : ir(ir) { // would already have happened to the raw JSON data associated with // ir->platform. compat::PlatformRef old_platform; + QL_DOUT("NewToOldConverter"); if (ir->platform->has_annotation()) { old_platform = ir->platform->get_annotation(); + QL_DOUT("NewToOldConverter: got old_platform from annotation of new platform"); } else { old_platform = compat::Platform::build( ir->platform->name, ir->platform->data.data ); + QL_DOUT("NewToOldConverter: got old_platform by building it (compat::Platform::build) from new platform data"); } +#ifdef MULTI_LINE_LOG_DEBUG + QL_IF_LOG_DEBUG { + QL_DOUT("NewToOldConvertor old instruction_map:"); + for (const auto &i : old_platform->instruction_map) { + QL_DOUT("NewToOldConvertor.old_platform.instruction_map[]" << i.first); + } + } +#else + QL_DOUT("NewToOldConvertor old instruction_map (disabled)"); +#endif + + // If the program node is empty, build an empty dummy program. if (ir->program.empty()) { old.emplace("empty", old_platform, num_qubits); + QL_DOUT("NewToOldConverter (empty program node) [DONE]"); return; } @@ -907,6 +912,7 @@ NewToOldConverter::NewToOldConverter(const Ref &ir) : ir(ir) { "program has unsupported nontrivial goto-based control-flow: " "last block does not end program" ); + QL_DOUT("NewToOldConverter: about to start converting blocks"); // Convert all the blocks and add them to the root program. for (const auto &block : ir->program->blocks) { @@ -917,7 +923,7 @@ NewToOldConverter::NewToOldConverter(const Ref &ir) : ir(ir) { throw; } } - + QL_DOUT("NewToOldConverter [DONE]"); } /** @@ -947,9 +953,8 @@ void Operands::append(const NewToOldConverter &conv, const ExpressionRef &expr) } else if (auto ref = expr->as_reference()) { if (ref->indices.size() != 1 || !ref->indices[0]->as_int_literal()) { QL_ICE( - "encountered incompatible object reference to " - << ref->target->name - << " (size=" << ref->indices.size() << ")" + "encountered incompatible object reference " + "to " << ref->target->name ); } else if ( ref->target == conv.ir->platform->qubits && @@ -973,8 +978,8 @@ void Operands::append(const NewToOldConverter &conv, const ExpressionRef &expr) cregs.push_back(ref->indices[0].as()->value); } else { QL_ICE( - "encountered unknown object reference to " - << ref->target->name + "encountered incompatible object reference " + "to " << ref->target->name ); } } else if (expr->as_function_call()) { diff --git a/src/ql/ir/ops.cc b/src/ql/ir/ops.cc index 077c5699d..971cbd756 100644 --- a/src/ql/ir/ops.cc +++ b/src/ql/ir/ops.cc @@ -343,7 +343,6 @@ InstructionTypeLink find_instruction_type( // If we shouldn't generate an overload if only the name matches, stop now. if (!generate_overload_if_needed || !(*first)->has_annotation()) { - QL_DOUT("not generating overload for instruction '" + name + "'"); // NB: key '"prototype"' may be missing in instruction definition return {}; } diff --git a/src/ql/utils/json.cc b/src/ql/utils/json.cc index e00fce1a5..7a2afa45a 100644 --- a/src/ql/utils/json.cc +++ b/src/ql/utils/json.cc @@ -44,7 +44,7 @@ Json parse_json(std::istream &is) { if (e.byte >= absPos && e.byte < absPos + line.size()) { unsigned int relPos = e.byte - absPos; line = utils::replace_all(line, "\t", " "); // make a TAB take one position - QL_JSON_FATAL( + QL_FATAL( "in line " << lineNr << " at position " << relPos << ":" << std::endl << line << std::endl @@ -60,7 +60,7 @@ Json parse_json(std::istream &is) { } } catch (Json::exception &e) { - QL_JSON_FATAL("malformed JSON file : \n\t" << e.what()); + QL_FATAL("malformed JSON file : \n\t" << e.what()); } return j; } From d4e4abacfd5a8d5f121e5b2722c9017269f581cf Mon Sep 17 00:00:00 2001 From: Wouter Vlothuizen Date: Thu, 31 Mar 2022 10:58:49 +0200 Subject: [PATCH 4/4] fixed a few issues (rest awaits merge of PR #433) --- tests/cc/{test_cqasm.py => test_cc_cqasm.py} | 0 tests/{ => compat}/test_Kernel.py | 0 tests/{ => compat}/test_Program.py | 0 tests/{ => compat}/test_unitary.py | 0 4 files changed, 0 insertions(+), 0 deletions(-) rename tests/cc/{test_cqasm.py => test_cc_cqasm.py} (100%) rename tests/{ => compat}/test_Kernel.py (100%) rename tests/{ => compat}/test_Program.py (100%) rename tests/{ => compat}/test_unitary.py (100%) diff --git a/tests/cc/test_cqasm.py b/tests/cc/test_cc_cqasm.py similarity index 100% rename from tests/cc/test_cqasm.py rename to tests/cc/test_cc_cqasm.py diff --git a/tests/test_Kernel.py b/tests/compat/test_Kernel.py similarity index 100% rename from tests/test_Kernel.py rename to tests/compat/test_Kernel.py diff --git a/tests/test_Program.py b/tests/compat/test_Program.py similarity index 100% rename from tests/test_Program.py rename to tests/compat/test_Program.py diff --git a/tests/test_unitary.py b/tests/compat/test_unitary.py similarity index 100% rename from tests/test_unitary.py rename to tests/compat/test_unitary.py