0.0.2-alpha

integer alu ops for Tensor.arange

58f6a3c v_add_nc_u32, v_subrev_nc_u32
49149c2 exec_lo, `v_mad_i32_i24`, `s_not_b32`
c272d5b unsigned left shift, resolve vcclo

0.0.1-alpha

more specific debug mode