diff --git a/scm_v3c/applications/ble_tx/ble_tx.c b/scm_v3c/applications/ble_tx/ble_tx.c new file mode 100644 index 00000000..c524910a --- /dev/null +++ b/scm_v3c/applications/ble_tx/ble_tx.c @@ -0,0 +1,162 @@ +/** +\brief This program lets SCuM transmit BLE packets. +*/ + +#include + +#include "scm3c_hw_interface.h" +#include "memory_map.h" +#include "ble.h" +#include "rftimer.h" +#include "radio.h" +#include "optical.h" + +//=========================== defines ========================================= + +#define CRC_VALUE (*((unsigned int *) 0x0000FFFC)) +#define CODE_LENGTH (*((unsigned int *) 0x0000FFF8)) + +#define TIMER_PERIOD 50000 ///< 500 = 1ms@500kHz + +#define BLE_CALIBRATE_LC false +#define BLE_SWEEP_FINE true + +//=========================== variables ======================================= + +typedef struct { + uint8_t tx_coarse; + uint8_t tx_mid; + uint8_t tx_fine; + + bool txNext; +} app_vars_t; + +app_vars_t app_vars; + +//=========================== prototypes ====================================== + +void cb_timer(void); +void transmit_ble_packet(void); + +//=========================== main ============================================ + +int main(void) { + + uint32_t calc_crc; + + memset(&app_vars, 0, sizeof(app_vars_t)); + + printf("Initializing..."); + + // Set up mote configuration + // This function handles all the analog scan chain setup + initialize_mote(); + ble_init_tx(); + + rftimer_set_callback(cb_timer); + + // Disable interrupts for the radio and rftimer + radio_disable_interrupts(); + rftimer_disable_interrupts(); + + // Check CRC to ensure there were no errors during optical programming + printf("\r\n-------------------\r\n"); + printf("Validating program integrity..."); + + calc_crc = crc32c(0x0000,CODE_LENGTH); + + if (calc_crc == CRC_VALUE){ + printf("CRC OK\r\n"); + } else { + printf("\r\nProgramming Error - CRC DOES NOT MATCH - Halting Execution\r\n"); + while(1); + } + + // Debug output + // printf("\r\nCode length is %u bytes",code_length); + // printf("\r\nCRC calculated by SCM is: 0x%X",calc_crc); + + //printf("done\r\n"); + + // After bootloading the next thing that happens is frequency calibration using optical + printf("Calibrating frequencies...\r\n"); + + // Initial frequency calibration will tune the frequencies for HCLK, the RX/TX chip clocks, and the LO + +#if BLE_CALIBRATE_LC + optical_enableLCCalibration(); + + // Turn on LO, DIV, PA, and IF + ANALOG_CFG_REG__10 = 0x78; + + // Turn off polyphase and disable mixer + ANALOG_CFG_REG__16 = 0x6; + + // For TX, LC target freq = 2.402G - 0.25M = 2.40175 GHz. + optical_setLCTarget(250020); +#endif + + // Enable optical SFD interrupt for optical calibration + optical_enable(); + + // Wait for optical cal to finish + while(!optical_getCalibrationFinished()); + + printf("Cal complete\r\n"); + + // Disable static divider to save power + divProgram(480, 0, 0); + + // Configure coarse, mid, and fine codes for TX. +#if BLE_CALIBRATE_LC + app_vars.tx_coarse = optical_getLCCoarse(); + app_vars.tx_mid = optical_getLCMid(); + app_vars.tx_fine = optical_getLCFine(); +#else + // CHANGE THESE VALUES AFTER LC CALIBRATION. + app_vars.tx_coarse = 23; + app_vars.tx_mid = 11; + app_vars.tx_fine = 23; +#endif + + ble_gen_packet(); + + while (1) { + transmit_ble_packet(); + rftimer_setCompareIn(rftimer_readCounter() + TIMER_PERIOD); + app_vars.txNext = false; + while (!app_vars.txNext); + } +} + +//=========================== public ========================================== + +//=========================== private ========================================= + +void cb_timer(void) { + app_vars.txNext = true; +} + +void transmit_ble_packet(void) { + int t, tx_fine; + +#if BLE_SWEEP_FINE + for (tx_fine = 0; tx_fine < 32; ++tx_fine) { + LC_FREQCHANGE(app_vars.tx_coarse, app_vars.tx_mid, tx_fine); + printf("Transmitting on %u %u %u\n", app_vars.tx_coarse, app_vars.tx_mid, tx_fine); + + // Wait for frequency to settle. + for (t = 0; t < 5000; ++t); + + ble_transmit(); + } +#else + LC_FREQCHANGE(app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + printf("Transmitting on %u %u %u\n", app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + + // Wait for frequency to settle. + for (t = 0; t < 5000; ++t); + + ble_transmit(); +#endif +} diff --git a/scm_v3c/applications/ble_tx/ble_tx.uvoptx b/scm_v3c/applications/ble_tx/ble_tx.uvoptx new file mode 100644 index 00000000..2600d9aa --- /dev/null +++ b/scm_v3c/applications/ble_tx/ble_tx.uvoptx @@ -0,0 +1,440 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ble_tx + 0x4 + ARM-ADS + + 10000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\UL2CM3.DLL + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + app + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ble_tx.c + ble_tx.c + 0 + 0 + + + + + drv + 1 + 0 + 0 + 0 + + 2 + 2 + 2 + 0 + 0 + 0 + ..\..\cm0dsasm.s + cm0dsasm.s + 0 + 0 + + + 2 + 3 + 5 + 0 + 0 + 0 + ..\..\Memory_Map.h + Memory_Map.h + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\retarget.c + retarget.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\optical.c + optical.c + 0 + 0 + + + 2 + 6 + 5 + 0 + 0 + 0 + ..\..\optical.h + optical.h + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\radio.c + radio.c + 0 + 0 + + + 2 + 8 + 5 + 0 + 0 + 0 + ..\..\radio.h + radio.h + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\adc.c + adc.c + 0 + 0 + + + 2 + 10 + 5 + 0 + 0 + 0 + ..\..\adc.h + adc.h + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + ..\..\gpio.c + gpio.c + 0 + 0 + + + 2 + 12 + 5 + 0 + 0 + 0 + ..\..\gpio.h + gpio.h + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + ..\..\uart.c + uart.c + 0 + 0 + + + 2 + 14 + 5 + 0 + 0 + 0 + ..\..\uart.h + uart.h + 0 + 0 + + + 2 + 15 + 1 + 0 + 0 + 0 + ..\..\rftimer.c + rftimer.c + 0 + 0 + + + 2 + 16 + 5 + 0 + 0 + 0 + ..\..\rftimer.h + rftimer.h + 0 + 0 + + + 2 + 17 + 5 + 0 + 0 + 0 + ..\..\scum_defs.h + scum_defs.h + 0 + 0 + + + 2 + 18 + 5 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.h + scm3c_hw_interface.h + 0 + 0 + + + 2 + 19 + 1 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.c + scm3c_hw_interface.c + 0 + 0 + + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + + + + diff --git a/scm_v3c/applications/ble_tx/ble_tx.uvprojx b/scm_v3c/applications/ble_tx/ble_tx.uvprojx new file mode 100644 index 00000000..38764fd1 --- /dev/null +++ b/scm_v3c/applications/ble_tx/ble_tx.uvprojx @@ -0,0 +1,549 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ble_tx + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.3.0 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(10000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Flash\NEW_DEVICE.flm)) + 0 + $$Device:ARMCM0$Device\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + ble_tx + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 1 + fromelf --bin .\Objects\ble_tx.axf -o .\Objects\ble_tx.bin + fromelf -cvf .\Objects\ble_tx.axf -o .\Objects\disasm.txt + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x10000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + ../../ + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + freq_sweep_rx.sct + + + + + + + + + + + app + + + ble_tx.c + 1 + .\ble_tx.c + + + + + drv + + + cm0dsasm.s + 2 + ..\..\cm0dsasm.s + + + Memory_Map.h + 5 + ..\..\Memory_Map.h + + + retarget.c + 1 + ..\..\retarget.c + + + optical.c + 1 + ..\..\optical.c + + + optical.h + 5 + ..\..\optical.h + + + radio.c + 1 + ..\..\radio.c + + + radio.h + 5 + ..\..\radio.h + + + adc.c + 1 + ..\..\adc.c + + + adc.h + 5 + ..\..\adc.h + + + gpio.c + 1 + ..\..\gpio.c + + + gpio.h + 5 + ..\..\gpio.h + + + uart.c + 1 + ..\..\uart.c + + + uart.h + 5 + ..\..\uart.h + + + rftimer.c + 1 + ..\..\rftimer.c + + + rftimer.h + 5 + ..\..\rftimer.h + + + scum_defs.h + 5 + ..\..\scum_defs.h + + + scm3c_hw_interface.h + 5 + ..\..\scm3c_hw_interface.h + + + scm3c_hw_interface.c + 1 + ..\..\scm3c_hw_interface.c + + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + RTE\Drivers\NAND_MemBus_Config.h + + + + + + RTE\Drivers\OneNAND_Config.h + + + + + + RTE\File_System\FS_Config.c + + + + + + RTE\File_System\FS_Config_RAM.h + + + + + + + + diff --git a/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.c b/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.c new file mode 100644 index 00000000..96e6c24b --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.c @@ -0,0 +1,279 @@ +/** +\brief This program lets SCuM receive 15.4 packets and broadcast them as a BLE packet. +*/ + +#include + +#include "scm3c_hw_interface.h" +#include "memory_map.h" +#include "ble.h" +#include "rftimer.h" +#include "radio.h" +#include "optical.h" + +//=========================== defines ========================================= + +#define CRC_VALUE (*((unsigned int *) 0x0000FFFC)) +#define CODE_LENGTH (*((unsigned int *) 0x0000FFF8)) + +#define LENGTH_PACKET 125 + LENGTH_CRC ///< maximum length is 127 bytes +#define LEN_RX_PKT 20 + LENGTH_CRC ///< length of rx packet + +#define TIMER_PERIOD 200000 ///< 500 = 1ms@500kHz +#define BLE_TX_PERIOD 1 + +#define BLE_CALIBRATE_LC false +#define BLE_SWEEP_FINE false +#define BLE_NUM_REPEAT 1 // Number of times to repeat packet when not sweeping + +//=========================== variables ======================================= + +typedef struct { + uint8_t packet[LENGTH_PACKET]; + uint8_t packet_len; + int8_t rxpk_rssi; + uint8_t rxpk_lqi; + + volatile bool rxpk_crc; + // a flag to mark when to change configure + volatile bool changeConfig; + // a flag to avoid change configure during receiving frame + volatile bool rxFrameStarted; + + volatile uint32_t IF_estimate; + volatile uint32_t LQI_chip_errors; + volatile uint32_t cdr_tau_value; + + uint8_t rx_coarse; + uint8_t rx_mid; + uint8_t rx_fine; + + uint8_t tx_coarse; + uint8_t tx_mid; + uint8_t tx_fine; + + uint16_t rx_iteration; +} app_vars_t; + +app_vars_t app_vars; + +//=========================== prototypes ====================================== + +void cb_startFrame_rx(uint32_t timestamp); +void cb_endFrame_rx(uint32_t timestamp); +void cb_timer(void); +void receive_154_packet(void); +void transmit_ble_packet(void); + +//=========================== main ============================================ + +int main(void) { + + uint32_t calc_crc; + + uint8_t i; + uint8_t j; + uint8_t offset; + int t; + + memset(&app_vars, 0, sizeof(app_vars_t)); + + printf("Initializing..."); + + // Set up mote configuration + // This function handles all the analog scan chain setup + initialize_mote(); + ble_init_tx(); + + radio_setStartFrameRxCb(cb_startFrame_rx); + radio_setEndFrameRxCb(cb_endFrame_rx); + rftimer_set_callback(cb_timer); + + // Disable interrupts for the radio and rftimer + radio_disable_interrupts(); + rftimer_disable_interrupts(); + + // Check CRC to ensure there were no errors during optical programming + printf("\r\n-------------------\r\n"); + printf("Validating program integrity..."); + + calc_crc = crc32c(0x0000,CODE_LENGTH); + + if (calc_crc == CRC_VALUE){ + printf("CRC OK\r\n"); + } else { + printf("\r\nProgramming Error - CRC DOES NOT MATCH - Halting Execution\r\n"); + while(1); + } + + // Debug output + // printf("\r\nCode length is %u bytes",code_length); + // printf("\r\nCRC calculated by SCM is: 0x%X",calc_crc); + + //printf("done\r\n"); + + // After bootloading the next thing that happens is frequency calibration using optical + printf("Calibrating frequencies...\r\n"); + + // Initial frequency calibration will tune the frequencies for HCLK, the RX/TX chip clocks, and the LO + + // For the LO, calibration for RX channel 11, so turn on AUX, IF, and LO LDOs + // by calling radio rxEnable + radio_rxEnable(); + +#if BLE_CALIBRATE_LC + optical_enableLCCalibration(); + + // Turn on LDOs for calibration + radio_txEnable(); + + // Turn on LO, DIV, PA, and IF + ANALOG_CFG_REG__10 = 0x78; + + // For TX, LC target freq = 2.402G - 0.25M = 2.40175 GHz. + optical_setLCTarget(250020); +#endif + + // Enable optical SFD interrupt for optical calibration + optical_enable(); + + // Wait for optical cal to finish + while(!optical_getCalibrationFinished()); + + printf("Cal complete\r\n"); + + // Disable static divider to save power + divProgram(480, 0, 0); + + // Enable interrupts for the radio FSM + radio_enable_interrupts(); + + // Configure coarse, mid, and fine codes for RX. + app_vars.rx_coarse = 23; + app_vars.rx_mid = 15; + app_vars.rx_fine = 15; + + // Configure coarse, mid, and fine codes for TX. +#if BLE_CALIBRATE_LC + app_vars.tx_coarse = optical_getLCCoarse(); + app_vars.tx_mid = optical_getLCMid(); + app_vars.tx_fine = optical_getLCFine(); +#else + // CHANGE THESE VALUES AFTER LC CALIBRATION. + app_vars.tx_coarse = 23; + app_vars.tx_mid = 11; + app_vars.tx_fine = 23; +#endif + + while (1) { + receive_154_packet(); + rftimer_setCompareIn(rftimer_readCounter() + TIMER_PERIOD); + app_vars.changeConfig = false; + while (!app_vars.changeConfig); + + ++app_vars.rx_iteration; + if (app_vars.rx_iteration % BLE_TX_PERIOD == 0) { + transmit_ble_packet(); + } + } +} + +//=========================== public ========================================== + +//=========================== private ========================================= + +void cb_startFrame_rx(uint32_t timestamp){ + app_vars.rxFrameStarted = true; +} + +void cb_endFrame_rx(uint32_t timestamp){ + + uint8_t i; + uint32_t IF_estimate, LQI_chip_errors; + + radio_getReceivedFrame( + &(app_vars.packet[0]), + &app_vars.packet_len, + sizeof(app_vars.packet), + &app_vars.rxpk_rssi, + &app_vars.rxpk_lqi + ); + + // Read IF estimate, and LQI + IF_estimate = radio_getIFestimate(); + LQI_chip_errors = radio_getLQIchipErrors(); + + radio_rfOff(); + + if ( + app_vars.packet_len == LEN_RX_PKT && (radio_getCrcOk()) + ) { + // Only record IF estimate, LQI, and CDR tau for valid packets + app_vars.IF_estimate = IF_estimate; + app_vars.LQI_chip_errors = LQI_chip_errors; + + printf( + "pkt received on ch%d %d%d%d%d.%d.%d.%d\r\n", + app_vars.packet[4], + app_vars.packet[0], + app_vars.packet[1], + app_vars.packet[2], + app_vars.packet[3], + app_vars.rx_coarse, + app_vars.rx_mid, + app_vars.rx_fine + ); + + ble_set_data(app_vars.packet); + ble_set_data_tx_en(true); + + app_vars.packet_len = 0; + memset(&app_vars.packet[0], 0, LENGTH_PACKET); + } + + radio_rxEnable(); + radio_rxNow(); + + app_vars.rxFrameStarted = false; +} + +void cb_timer(void) { + app_vars.changeConfig = true; +} + +void receive_154_packet(void) { + printf("Receiving on %u %u %u\n", app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + while (app_vars.rxFrameStarted); + radio_rfOff(); + LC_FREQCHANGE(app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + radio_rxEnable(); + radio_rxNow(); +} + +void transmit_ble_packet(void) { + int i, t, tx_fine; + + ble_gen_packet(); + +#if BLE_SWEEP_FINE + for (tx_fine = 0; tx_fine < 32; ++tx_fine) { + LC_FREQCHANGE(app_vars.tx_coarse, app_vars.tx_mid, tx_fine); + printf("Transmitting on %u %u %u\n", app_vars.tx_coarse, app_vars.tx_mid, tx_fine); + + // Wait for frequency to settle. + for (t = 0; t < 5000; ++t); + + ble_transmit(); + } +#else + for (i = 0; i < BLE_NUM_REPEAT; ++i) { + LC_FREQCHANGE(app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + printf("Transmitting on %u %u %u\n", app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + + // Wait for frequency to settle. + for (t = 0; t < 5000; ++t); + + ble_transmit(); + } +#endif +} diff --git a/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.uvoptx b/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.uvoptx new file mode 100644 index 00000000..1a8a2987 --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.uvoptx @@ -0,0 +1,440 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ble_tx_154_rx + 0x4 + ARM-ADS + + 10000000 + + 0 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\UL2CM3.DLL + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + app + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + .\ble_tx_154_rx.c + ble_tx_154_rx.c + 0 + 0 + + + + + drv + 1 + 0 + 0 + 0 + + 2 + 2 + 2 + 0 + 0 + 0 + ..\..\cm0dsasm.s + cm0dsasm.s + 0 + 0 + + + 2 + 3 + 5 + 0 + 0 + 0 + ..\..\Memory_Map.h + Memory_Map.h + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\retarget.c + retarget.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\optical.c + optical.c + 0 + 0 + + + 2 + 6 + 5 + 0 + 0 + 0 + ..\..\optical.h + optical.h + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\radio.c + radio.c + 0 + 0 + + + 2 + 8 + 5 + 0 + 0 + 0 + ..\..\radio.h + radio.h + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\adc.c + adc.c + 0 + 0 + + + 2 + 10 + 5 + 0 + 0 + 0 + ..\..\adc.h + adc.h + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + ..\..\gpio.c + gpio.c + 0 + 0 + + + 2 + 12 + 5 + 0 + 0 + 0 + ..\..\gpio.h + gpio.h + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + ..\..\uart.c + uart.c + 0 + 0 + + + 2 + 14 + 5 + 0 + 0 + 0 + ..\..\uart.h + uart.h + 0 + 0 + + + 2 + 15 + 1 + 0 + 0 + 0 + ..\..\rftimer.c + rftimer.c + 0 + 0 + + + 2 + 16 + 5 + 0 + 0 + 0 + ..\..\rftimer.h + rftimer.h + 0 + 0 + + + 2 + 17 + 5 + 0 + 0 + 0 + ..\..\scum_defs.h + scum_defs.h + 0 + 0 + + + 2 + 18 + 5 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.h + scm3c_hw_interface.h + 0 + 0 + + + 2 + 19 + 1 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.c + scm3c_hw_interface.c + 0 + 0 + + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + + + + diff --git a/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.uvprojx b/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.uvprojx new file mode 100644 index 00000000..1ac6357f --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx/ble_tx_154_rx.uvprojx @@ -0,0 +1,549 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ble_tx_154_rx + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.3.0 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(10000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Flash\NEW_DEVICE.flm)) + 0 + $$Device:ARMCM0$Device\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + ble_tx_154_rx + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 1 + fromelf --bin .\Objects\ble_tx_154_rx.axf -o .\Objects\ble_tx_154_rx.bin + fromelf -cvf .\Objects\ble_tx_154_rx.axf -o .\Objects\disasm.txt + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x10000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + ../../ + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + freq_sweep_rx.sct + + + + + + + + + + + app + + + ble_tx_154_rx.c + 1 + .\ble_tx_154_rx.c + + + + + drv + + + cm0dsasm.s + 2 + ..\..\cm0dsasm.s + + + Memory_Map.h + 5 + ..\..\Memory_Map.h + + + retarget.c + 1 + ..\..\retarget.c + + + optical.c + 1 + ..\..\optical.c + + + optical.h + 5 + ..\..\optical.h + + + radio.c + 1 + ..\..\radio.c + + + radio.h + 5 + ..\..\radio.h + + + adc.c + 1 + ..\..\adc.c + + + adc.h + 5 + ..\..\adc.h + + + gpio.c + 1 + ..\..\gpio.c + + + gpio.h + 5 + ..\..\gpio.h + + + uart.c + 1 + ..\..\uart.c + + + uart.h + 5 + ..\..\uart.h + + + rftimer.c + 1 + ..\..\rftimer.c + + + rftimer.h + 5 + ..\..\rftimer.h + + + scum_defs.h + 5 + ..\..\scum_defs.h + + + scm3c_hw_interface.h + 5 + ..\..\scm3c_hw_interface.h + + + scm3c_hw_interface.c + 1 + ..\..\scm3c_hw_interface.c + + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + RTE\Drivers\NAND_MemBus_Config.h + + + + + + RTE\Drivers\OneNAND_Config.h + + + + + + RTE\File_System\FS_Config.c + + + + + + RTE\File_System\FS_Config_RAM.h + + + + + + + + diff --git a/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.c b/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.c new file mode 100644 index 00000000..ad8cac12 --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.c @@ -0,0 +1,300 @@ +/** +\brief This program lets SCuM receive 15.4 packets and broadcast them as a BLE packet. +It tracks the RX frequency by tuning the RX fine code, such that the IF frequency is +at 2.5MHz (IF offset of 500). It then adjusts the TX fine code by the same difference. +*/ + +#include + +#include "scm3c_hw_interface.h" +#include "memory_map.h" +#include "ble.h" +#include "rftimer.h" +#include "radio.h" +#include "optical.h" + +//=========================== defines ========================================= + +#define CRC_VALUE (*((unsigned int *) 0x0000FFFC)) +#define CODE_LENGTH (*((unsigned int *) 0x0000FFF8)) + +#define LENGTH_PACKET 125 + LENGTH_CRC ///< maximum length is 127 bytes +#define LEN_RX_PKT 20 + LENGTH_CRC ///< length of rx packet + +#define TIMER_PERIOD 200000 ///< 500 = 1ms@500kHz + +#define BLE_TX_PERIOD 1 +#define BLE_CALIBRATE_LC false + +#define CALIBRATE_PERIOD 2 + +//=========================== variables ======================================= + +typedef struct { + uint8_t packet[LENGTH_PACKET]; + uint8_t packet_len; + int8_t rxpk_rssi; + uint8_t rxpk_lqi; + + volatile bool rxpk_crc; + // a flag to mark when to change configure + volatile bool changeConfig; + // a flag to avoid change configure during receiving frame + volatile bool rxFrameStarted; + + volatile uint32_t IF_estimate; + volatile uint32_t LQI_chip_errors; + volatile uint32_t cdr_tau_value; + + uint8_t rx_coarse; + uint8_t rx_mid; + uint8_t rx_fine; + + uint8_t tx_coarse; + uint8_t tx_mid; + uint8_t tx_fine; + + uint16_t rx_iteration; + bool rx_received; + uint8_t rx_num_received; + + int IF_offset; + int IF_offset_prev; +} app_vars_t; + +app_vars_t app_vars; + +//=========================== prototypes ====================================== + +void cb_startFrame_rx(uint32_t timestamp); +void cb_endFrame_rx(uint32_t timestamp); +void cb_timer(void); +void receive_154_packet(void); +void transmit_ble_packet(void); +void calibrate_fine_code(void); + +//=========================== main ============================================ + +int main(void) { + + uint32_t calc_crc; + + uint8_t i; + uint8_t j; + uint8_t offset; + int t; + + memset(&app_vars, 0, sizeof(app_vars_t)); + + printf("Initializing..."); + + // Set up mote configuration + // This function handles all the analog scan chain setup + initialize_mote(); + ble_init_tx(); + + radio_setStartFrameRxCb(cb_startFrame_rx); + radio_setEndFrameRxCb(cb_endFrame_rx); + rftimer_set_callback(cb_timer); + + // Disable interrupts for the radio and rftimer + radio_disable_interrupts(); + rftimer_disable_interrupts(); + + // Check CRC to ensure there were no errors during optical programming + printf("\r\n-------------------\r\n"); + printf("Validating program integrity..."); + + calc_crc = crc32c(0x0000,CODE_LENGTH); + + if (calc_crc == CRC_VALUE){ + printf("CRC OK\r\n"); + } else { + printf("\r\nProgramming Error - CRC DOES NOT MATCH - Halting Execution\r\n"); + while(1); + } + + // Debug output + // printf("\r\nCode length is %u bytes",code_length); + // printf("\r\nCRC calculated by SCM is: 0x%X",calc_crc); + + //printf("done\r\n"); + + // After bootloading the next thing that happens is frequency calibration using optical + printf("Calibrating frequencies...\r\n"); + + // Initial frequency calibration will tune the frequencies for HCLK, the RX/TX chip clocks, and the LO + + // For the LO, calibration for RX channel 11, so turn on AUX, IF, and LO LDOs + // by calling radio rxEnable + radio_rxEnable(); + +#if BLE_CALIBRATE_LC + optical_enableLCCalibration(); + + // Turn on LDOs for calibration + radio_txEnable(); + + // Turn on LO, DIV, PA, and IF + ANALOG_CFG_REG__10 = 0x78; + + // For TX, LC target freq = 2.402G - 0.25M = 2.40175 GHz. + optical_setLCTarget(250020); +#endif + + // Enable optical SFD interrupt for optical calibration + optical_enable(); + + // Wait for optical cal to finish + while(!optical_getCalibrationFinished()); + + printf("Cal complete\r\n"); + + // Disable static divider to save power + divProgram(480, 0, 0); + + // Enable interrupts for the radio FSM + radio_enable_interrupts(); + + // Configure coarse, mid, and fine codes for RX. + app_vars.rx_coarse = 23; + app_vars.rx_mid = 15; + app_vars.rx_fine = 15; + + // Configure coarse, mid, and fine codes for TX. +#if BLE_CALIBRATE_LC + app_vars.tx_coarse = optical_getLCCoarse(); + app_vars.tx_mid = optical_getLCMid(); + app_vars.tx_fine = optical_getLCFine(); +#else + // CHANGE THESE VALUES AFTER LC CALIBRATION. + app_vars.tx_coarse = 23; + app_vars.tx_mid = 11; + app_vars.tx_fine = 23; +#endif + + while (1) { + receive_154_packet(); + rftimer_setCompareIn(rftimer_readCounter() + TIMER_PERIOD); + app_vars.changeConfig = false; + while (!app_vars.changeConfig); + + ++app_vars.rx_iteration; + if ((app_vars.rx_iteration % BLE_TX_PERIOD == 0)) { + transmit_ble_packet(); + } + if (app_vars.rx_iteration % CALIBRATE_PERIOD == 0) { + calibrate_fine_code(); + } + } +} + +//=========================== public ========================================== + +//=========================== private ========================================= + +void cb_startFrame_rx(uint32_t timestamp){ + app_vars.rxFrameStarted = true; +} + +void cb_endFrame_rx(uint32_t timestamp){ + + uint8_t i; + uint32_t IF_estimate, LQI_chip_errors; + + radio_getReceivedFrame( + &(app_vars.packet[0]), + &app_vars.packet_len, + sizeof(app_vars.packet), + &app_vars.rxpk_rssi, + &app_vars.rxpk_lqi + ); + + // Read IF estimate and LQI chip errors. + IF_estimate = radio_getIFestimate(); + LQI_chip_errors = radio_getLQIchipErrors(); + + radio_rfOff(); + + if ( + app_vars.packet_len == LEN_RX_PKT && (radio_getCrcOk()) + ) { + // Only record IF estimate, LQI chip errors, and CDR tau for valid packets. + app_vars.IF_estimate = IF_estimate; + app_vars.LQI_chip_errors = LQI_chip_errors; + + printf( + "pkt received on ch%d %d%d%d%d.%d.%d.%d\r\n", + app_vars.packet[4], + app_vars.packet[0], + app_vars.packet[1], + app_vars.packet[2], + app_vars.packet[3], + app_vars.rx_coarse, + app_vars.rx_mid, + app_vars.rx_fine + ); + printf("IF estimate: %u, LQI: %d\n", app_vars.IF_estimate, app_vars.LQI_chip_errors); + + ble_set_data(app_vars.packet); + ble_set_data_tx_en(true); + + app_vars.packet_len = 0; + memset(&app_vars.packet[0], 0, LENGTH_PACKET); + + app_vars.rx_received = true; + ++app_vars.rx_num_received; + + radio_update_IF_estimate(app_vars.IF_estimate, app_vars.LQI_chip_errors); + } + + radio_rxEnable(); + radio_rxNow(); + + app_vars.rxFrameStarted = false; +} + +void cb_timer(void) { + app_vars.changeConfig = true; +} + +void receive_154_packet(void) { + printf("Receiving on %u %u %u\n", app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + while (app_vars.rxFrameStarted); + radio_rfOff(); + app_vars.rx_received = false; + app_vars.rx_num_received = 0; + LC_FREQCHANGE(app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + radio_rxEnable(); + radio_rxNow(); +} + +void transmit_ble_packet(void) { + int t; + + ble_gen_packet(); + + LC_FREQCHANGE(app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + printf("Transmitting on %u %u %u\n", app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + + // Wait for frequency to settle. + for (t = 0; t < 5000; ++t); + + ble_transmit(); +} + +void calibrate_fine_code(void) { + if (radio_get_IF_estimate_ready()) { + int diff; + + app_vars.IF_offset_prev = app_vars.IF_offset; + app_vars.IF_offset = radio_get_IF_estimate(); + + diff = app_vars.IF_offset / 12; // empirically tuned + app_vars.rx_fine += diff; + app_vars.tx_fine += diff; + printf("IF offset: %d, previous IF offset: %d, ", app_vars.IF_offset, app_vars.IF_offset_prev); + } + + printf("RX fine: %u, TX fine: %u\n", app_vars.rx_fine, app_vars.tx_fine); +} diff --git a/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.uvoptx b/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.uvoptx new file mode 100644 index 00000000..24f3cc31 --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.uvoptx @@ -0,0 +1,440 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ble_tx_154_rx_track_if + 0x4 + ARM-ADS + + 10000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\UL2CM3.DLL + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + app + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 1 + 0 + 0 + .\ble_tx_154_rx_track_if.c + ble_tx_154_rx_track_if.c + 0 + 0 + + + + + drv + 1 + 0 + 0 + 0 + + 2 + 2 + 2 + 0 + 0 + 0 + ..\..\cm0dsasm.s + cm0dsasm.s + 0 + 0 + + + 2 + 3 + 5 + 0 + 0 + 0 + ..\..\Memory_Map.h + Memory_Map.h + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\retarget.c + retarget.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\optical.c + optical.c + 0 + 0 + + + 2 + 6 + 5 + 0 + 0 + 0 + ..\..\optical.h + optical.h + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\radio.c + radio.c + 0 + 0 + + + 2 + 8 + 5 + 0 + 0 + 0 + ..\..\radio.h + radio.h + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\adc.c + adc.c + 0 + 0 + + + 2 + 10 + 5 + 0 + 0 + 0 + ..\..\adc.h + adc.h + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + ..\..\gpio.c + gpio.c + 0 + 0 + + + 2 + 12 + 5 + 0 + 0 + 0 + ..\..\gpio.h + gpio.h + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + ..\..\uart.c + uart.c + 0 + 0 + + + 2 + 14 + 5 + 0 + 0 + 0 + ..\..\uart.h + uart.h + 0 + 0 + + + 2 + 15 + 1 + 0 + 0 + 0 + ..\..\rftimer.c + rftimer.c + 0 + 0 + + + 2 + 16 + 5 + 0 + 0 + 0 + ..\..\rftimer.h + rftimer.h + 0 + 0 + + + 2 + 17 + 5 + 0 + 0 + 0 + ..\..\scum_defs.h + scum_defs.h + 0 + 0 + + + 2 + 18 + 5 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.h + scm3c_hw_interface.h + 0 + 0 + + + 2 + 19 + 1 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.c + scm3c_hw_interface.c + 0 + 0 + + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + + + + diff --git a/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.uvprojx b/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.uvprojx new file mode 100644 index 00000000..ace3c9d2 --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx_track_if/ble_tx_154_rx_track_if.uvprojx @@ -0,0 +1,549 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ble_tx_154_rx_track_if + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.3.0 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(10000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Flash\NEW_DEVICE.flm)) + 0 + $$Device:ARMCM0$Device\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + ble_tx_154_rx_track_if + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 1 + fromelf --bin .\Objects\ble_tx_154_rx_track_if.axf -o .\Objects\ble_tx_154_rx_track_if.bin + fromelf -cvf .\Objects\ble_tx_154_rx_track_if.axf -o .\Objects\disasm.txt + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x10000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + ../../ + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + freq_sweep_rx.sct + + + + + + + + + + + app + + + ble_tx_154_rx_track_if.c + 1 + .\ble_tx_154_rx_track_if.c + + + + + drv + + + cm0dsasm.s + 2 + ..\..\cm0dsasm.s + + + Memory_Map.h + 5 + ..\..\Memory_Map.h + + + retarget.c + 1 + ..\..\retarget.c + + + optical.c + 1 + ..\..\optical.c + + + optical.h + 5 + ..\..\optical.h + + + radio.c + 1 + ..\..\radio.c + + + radio.h + 5 + ..\..\radio.h + + + adc.c + 1 + ..\..\adc.c + + + adc.h + 5 + ..\..\adc.h + + + gpio.c + 1 + ..\..\gpio.c + + + gpio.h + 5 + ..\..\gpio.h + + + uart.c + 1 + ..\..\uart.c + + + uart.h + 5 + ..\..\uart.h + + + rftimer.c + 1 + ..\..\rftimer.c + + + rftimer.h + 5 + ..\..\rftimer.h + + + scum_defs.h + 5 + ..\..\scum_defs.h + + + scm3c_hw_interface.h + 5 + ..\..\scm3c_hw_interface.h + + + scm3c_hw_interface.c + 1 + ..\..\scm3c_hw_interface.c + + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + RTE\Drivers\NAND_MemBus_Config.h + + + + + + RTE\Drivers\OneNAND_Config.h + + + + + + RTE\File_System\FS_Config.c + + + + + + RTE\File_System\FS_Config_RAM.h + + + + + + + + diff --git a/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.c b/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.c new file mode 100644 index 00000000..84cf2443 --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.c @@ -0,0 +1,324 @@ +/** +\brief This program lets SCuM receive 15.4 packets and broadcast them as a BLE packet. +It tracks the RX frequency by averaging over received packets in a a range around the current +fine code. It then finds the difference in the RX fine code and adjusts the TX fine code. +*/ + +#include + +#include "scm3c_hw_interface.h" +#include "memory_map.h" +#include "ble.h" +#include "rftimer.h" +#include "radio.h" +#include "optical.h" + +//=========================== defines ========================================= + +#define CRC_VALUE (*((unsigned int *) 0x0000FFFC)) +#define CODE_LENGTH (*((unsigned int *) 0x0000FFF8)) + +#define LENGTH_PACKET 125 + LENGTH_CRC ///< maximum length is 127 bytes +#define LEN_RX_PKT 20 + LENGTH_CRC ///< length of rx packet + +#define TIMER_PERIOD 200000 ///< 500 = 1ms@500kHz + +#define BLE_TX_PERIOD 1 +#define BLE_CALIBRATE_LC false + +#define CALIBRATE_PERIOD 10 +#define CALIBRATE_RX_DIFF 5 / 2 ///< calibrate up to +-2 fine codes +#define CALIBRATE_MIN_SUCCESS 10 ///< total number of received frames for calibration success + +//=========================== variables ======================================= + +typedef struct { + uint8_t packet[LENGTH_PACKET]; + uint8_t packet_len; + int8_t rxpk_rssi; + uint8_t rxpk_lqi; + + volatile bool rxpk_crc; + // a flag to mark when to change configure + volatile bool changeConfig; + // a flag to avoid change configure during receiving frame + volatile bool rxFrameStarted; + + volatile uint32_t IF_estimate; + volatile uint32_t LQI_chip_errors; + volatile uint32_t cdr_tau_value; + + uint8_t rx_coarse; + uint8_t rx_mid; + uint8_t rx_fine; + + uint8_t tx_coarse; + uint8_t tx_mid; + uint8_t tx_fine; + + uint16_t rx_iteration; + bool rx_received; + uint8_t rx_num_received; +} app_vars_t; + +app_vars_t app_vars; + +//=========================== prototypes ====================================== + +void cb_startFrame_rx(uint32_t timestamp); +void cb_endFrame_rx(uint32_t timestamp); +void cb_timer(void); +void receive_154_packet(void); +void transmit_ble_packet(void); +void calibrate_fine_code(void); + +//=========================== main ============================================ + +int main(void) { + + uint32_t calc_crc; + + uint8_t i; + uint8_t j; + uint8_t offset; + int t; + + memset(&app_vars, 0, sizeof(app_vars_t)); + + printf("Initializing..."); + + // Set up mote configuration + // This function handles all the analog scan chain setup + initialize_mote(); + ble_init_tx(); + + radio_setStartFrameRxCb(cb_startFrame_rx); + radio_setEndFrameRxCb(cb_endFrame_rx); + rftimer_set_callback(cb_timer); + + // Disable interrupts for the radio and rftimer + radio_disable_interrupts(); + rftimer_disable_interrupts(); + + // Check CRC to ensure there were no errors during optical programming + printf("\r\n-------------------\r\n"); + printf("Validating program integrity..."); + + calc_crc = crc32c(0x0000,CODE_LENGTH); + + if (calc_crc == CRC_VALUE){ + printf("CRC OK\r\n"); + } else { + printf("\r\nProgramming Error - CRC DOES NOT MATCH - Halting Execution\r\n"); + while(1); + } + + // Debug output + // printf("\r\nCode length is %u bytes",code_length); + // printf("\r\nCRC calculated by SCM is: 0x%X",calc_crc); + + //printf("done\r\n"); + + // After bootloading the next thing that happens is frequency calibration using optical + printf("Calibrating frequencies...\r\n"); + + // Initial frequency calibration will tune the frequencies for HCLK, the RX/TX chip clocks, and the LO + + // For the LO, calibration for RX channel 11, so turn on AUX, IF, and LO LDOs + // by calling radio rxEnable + radio_rxEnable(); + +#if BLE_CALIBRATE_LC + optical_enableLCCalibration(); + + // Turn on LDOs for calibration + radio_txEnable(); + + // Turn on LO, DIV, PA, and IF + ANALOG_CFG_REG__10 = 0x78; + + // For TX, LC target freq = 2.402G - 0.25M = 2.40175 GHz. + optical_setLCTarget(250020); +#endif + + // Enable optical SFD interrupt for optical calibration + optical_enable(); + + // Wait for optical cal to finish + while(!optical_getCalibrationFinished()); + + printf("Cal complete\r\n"); + + // Disable static divider to save power + divProgram(480, 0, 0); + + // Enable interrupts for the radio FSM + radio_enable_interrupts(); + + // Configure coarse, mid, and fine codes for RX. + app_vars.rx_coarse = 23; + app_vars.rx_mid = 15; + app_vars.rx_fine = 15; + + // Configure coarse, mid, and fine codes for TX. +#if BLE_CALIBRATE_LC + app_vars.tx_coarse = optical_getLCCoarse(); + app_vars.tx_mid = optical_getLCMid(); + app_vars.tx_fine = optical_getLCFine(); +#else + // CHANGE THESE VALUES AFTER LC CALIBRATION. + app_vars.tx_coarse = 23; + app_vars.tx_mid = 11; + app_vars.tx_fine = 23; +#endif + + while (1) { + receive_154_packet(); + rftimer_setCompareIn(rftimer_readCounter() + TIMER_PERIOD); + app_vars.changeConfig = false; + while (!app_vars.changeConfig); + + ++app_vars.rx_iteration; + if (app_vars.rx_iteration % BLE_TX_PERIOD == 0) { + transmit_ble_packet(); + } + if (app_vars.rx_iteration % CALIBRATE_PERIOD == 0) { + calibrate_fine_code(); + } + } +} + +//=========================== public ========================================== + +//=========================== private ========================================= + +void cb_startFrame_rx(uint32_t timestamp){ + app_vars.rxFrameStarted = true; +} + +void cb_endFrame_rx(uint32_t timestamp){ + + uint8_t i; + uint32_t IF_estimate, LQI_chip_errors; + + radio_getReceivedFrame( + &(app_vars.packet[0]), + &app_vars.packet_len, + sizeof(app_vars.packet), + &app_vars.rxpk_rssi, + &app_vars.rxpk_lqi + ); + + // Read IF estimate, and LQI. + IF_estimate = radio_getIFestimate(); + LQI_chip_errors = radio_getLQIchipErrors(); + + radio_rfOff(); + + if ( + app_vars.packet_len == LEN_RX_PKT && (radio_getCrcOk()) + ) { + // Only record IF estimate, LQI, and CDR tau for valid packets. + app_vars.IF_estimate = IF_estimate; + app_vars.LQI_chip_errors = LQI_chip_errors; + + printf( + "pkt received on ch%d %d%d%d%d.%d.%d.%d\r\n", + app_vars.packet[4], + app_vars.packet[0], + app_vars.packet[1], + app_vars.packet[2], + app_vars.packet[3], + app_vars.rx_coarse, + app_vars.rx_mid, + app_vars.rx_fine + ); + + ble_set_data(app_vars.packet); + ble_set_data_tx_en(true); + + app_vars.packet_len = 0; + memset(&app_vars.packet[0], 0, LENGTH_PACKET); + + app_vars.rx_received = true; + ++app_vars.rx_num_received; + } + + radio_rxEnable(); + radio_rxNow(); + + app_vars.rxFrameStarted = false; +} + +void cb_timer(void) { + app_vars.changeConfig = true; +} + +void receive_154_packet(void) { + printf("Receiving on %u %u %u\n", app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + while (app_vars.rxFrameStarted); + radio_rfOff(); + app_vars.rx_received = false; + app_vars.rx_num_received = 0; + LC_FREQCHANGE(app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + radio_rxEnable(); + radio_rxNow(); +} + +void transmit_ble_packet(void) { + int t; + + ble_gen_packet(); + + LC_FREQCHANGE(app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + printf("Transmitting on %u %u %u\n", app_vars.tx_coarse, app_vars.tx_mid, app_vars.tx_fine); + + // Wait for frequency to settle. + for (t = 0; t < 5000; ++t); + + ble_transmit(); +} + +void calibrate_fine_code(void) { + uint8_t fine, current_fine; + int diff_fine; + uint16_t cumulative_fines, received_frames; + + // Find the middle of the set of fines codes to calibrate with. + if (app_vars.rx_fine > 31 - CALIBRATE_RX_DIFF) { + fine = 31 - CALIBRATE_RX_DIFF; + } else if (app_vars.rx_fine < CALIBRATE_RX_DIFF) { + fine = CALIBRATE_RX_DIFF; + } else { + fine = app_vars.rx_fine; + } + + // Listen for 2 * TIMER_PERIOD at +-CALIBRATE_RX_DIFF fine codes for packets. + // Note the fine codes where packets were received and set the new fine code as their mean. + // Adjust the TX fine code by the same amount. + // Note that fine code adjustment only works if at least CALIBRATE_MIN_SUCCESS packets were received. + current_fine = app_vars.rx_fine; + cumulative_fines = 0; + received_frames = 0; + for (app_vars.rx_fine = fine - CALIBRATE_RX_DIFF; app_vars.rx_fine <= fine + CALIBRATE_RX_DIFF; ++app_vars.rx_fine) { + printf("Calibrating on %u %u %u\n", app_vars.rx_coarse, app_vars.rx_mid, app_vars.rx_fine); + receive_154_packet(); + rftimer_setCompareIn(rftimer_readCounter() + 2 * TIMER_PERIOD); + app_vars.changeConfig = false; + while (!app_vars.changeConfig); + if (app_vars.rx_received) { + cumulative_fines += app_vars.rx_num_received * app_vars.rx_fine; + received_frames += app_vars.rx_num_received; + } + } + printf("Cumulative fines: %u, received frames: %u\n", cumulative_fines, received_frames); + + if (received_frames >= CALIBRATE_MIN_SUCCESS) { + app_vars.rx_fine = (uint8_t) ((((double) cumulative_fines) / received_frames) + 0.5); + diff_fine = (int) app_vars.rx_fine - current_fine; + app_vars.tx_fine += diff_fine; + printf("Diff fine: %d, RX fine: %u, TX fine: %u\n", diff_fine, app_vars.rx_fine, app_vars.tx_fine); + } else { + app_vars.rx_fine = current_fine; + } +} diff --git a/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.uvoptx b/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.uvoptx new file mode 100644 index 00000000..1f663724 --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.uvoptx @@ -0,0 +1,440 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + ble_tx_154_rx_track_mean + 0x4 + ARM-ADS + + 10000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 7 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + + + + + + + + + + + BIN\UL2CM3.DLL + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + app + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 1 + 0 + 0 + .\ble_tx_154_rx_track_mean.c + ble_tx_154_rx_track_mean.c + 0 + 0 + + + + + drv + 1 + 0 + 0 + 0 + + 2 + 2 + 2 + 0 + 0 + 0 + ..\..\cm0dsasm.s + cm0dsasm.s + 0 + 0 + + + 2 + 3 + 5 + 0 + 0 + 0 + ..\..\Memory_Map.h + Memory_Map.h + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\retarget.c + retarget.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\optical.c + optical.c + 0 + 0 + + + 2 + 6 + 5 + 0 + 0 + 0 + ..\..\optical.h + optical.h + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\radio.c + radio.c + 0 + 0 + + + 2 + 8 + 5 + 0 + 0 + 0 + ..\..\radio.h + radio.h + 0 + 0 + + + 2 + 9 + 1 + 0 + 0 + 0 + ..\..\adc.c + adc.c + 0 + 0 + + + 2 + 10 + 5 + 0 + 0 + 0 + ..\..\adc.h + adc.h + 0 + 0 + + + 2 + 11 + 1 + 0 + 0 + 0 + ..\..\gpio.c + gpio.c + 0 + 0 + + + 2 + 12 + 5 + 0 + 0 + 0 + ..\..\gpio.h + gpio.h + 0 + 0 + + + 2 + 13 + 1 + 0 + 0 + 0 + ..\..\uart.c + uart.c + 0 + 0 + + + 2 + 14 + 5 + 0 + 0 + 0 + ..\..\uart.h + uart.h + 0 + 0 + + + 2 + 15 + 1 + 0 + 0 + 0 + ..\..\rftimer.c + rftimer.c + 0 + 0 + + + 2 + 16 + 5 + 0 + 0 + 0 + ..\..\rftimer.h + rftimer.h + 0 + 0 + + + 2 + 17 + 5 + 0 + 0 + 0 + ..\..\scum_defs.h + scum_defs.h + 0 + 0 + + + 2 + 18 + 5 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.h + scm3c_hw_interface.h + 0 + 0 + + + 2 + 19 + 1 + 0 + 0 + 0 + ..\..\scm3c_hw_interface.c + scm3c_hw_interface.c + 0 + 0 + + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + + + + diff --git a/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.uvprojx b/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.uvprojx new file mode 100644 index 00000000..5cce121f --- /dev/null +++ b/scm_v3c/applications/ble_tx_154_rx_track_mean/ble_tx_154_rx_track_mean.uvprojx @@ -0,0 +1,549 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ble_tx_154_rx_track_mean + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.3.0 + http://www.keil.com/pack/ + IROM(0x00000000,0x80000) IRAM(0x20000000,0x20000) CPUTYPE("Cortex-M0") CLOCK(10000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0NEW_DEVICE -FS00 -FL040000 -FP0($$Device:ARMCM0$Flash\NEW_DEVICE.flm)) + 0 + $$Device:ARMCM0$Device\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + ble_tx_154_rx_track_mean + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 1 + fromelf --bin .\Objects\ble_tx_154_rx_track_mean.axf -o .\Objects\ble_tx_154_rx_track_mean.bin + fromelf -cvf .\Objects\ble_tx_154_rx_track_mean.axf -o .\Objects\disasm.txt + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x10000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + ../../ + + + + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + freq_sweep_rx.sct + + + + + + + + + + + app + + + ble_tx_154_rx_track_mean.c + 1 + .\ble_tx_154_rx_track_mean.c + + + + + drv + + + cm0dsasm.s + 2 + ..\..\cm0dsasm.s + + + Memory_Map.h + 5 + ..\..\Memory_Map.h + + + retarget.c + 1 + ..\..\retarget.c + + + optical.c + 1 + ..\..\optical.c + + + optical.h + 5 + ..\..\optical.h + + + radio.c + 1 + ..\..\radio.c + + + radio.h + 5 + ..\..\radio.h + + + adc.c + 1 + ..\..\adc.c + + + adc.h + 5 + ..\..\adc.h + + + gpio.c + 1 + ..\..\gpio.c + + + gpio.h + 5 + ..\..\gpio.h + + + uart.c + 1 + ..\..\uart.c + + + uart.h + 5 + ..\..\uart.h + + + rftimer.c + 1 + ..\..\rftimer.c + + + rftimer.h + 5 + ..\..\rftimer.h + + + scum_defs.h + 5 + ..\..\scum_defs.h + + + scm3c_hw_interface.h + 5 + ..\..\scm3c_hw_interface.h + + + scm3c_hw_interface.c + 1 + ..\..\scm3c_hw_interface.c + + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + + + + + + + + + + + + + RTE\CMSIS\RTX_Conf_CM.c + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + RTE\Drivers\NAND_MemBus_Config.h + + + + + + RTE\Drivers\OneNAND_Config.h + + + + + + RTE\File_System\FS_Config.c + + + + + + RTE\File_System\FS_Config_RAM.h + + + + + + + + diff --git a/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.c b/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.c index 16d95dcb..15ef1572 100644 --- a/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.c +++ b/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.c @@ -114,7 +114,7 @@ int main(void) { optical_enable(); // Wait for optical cal to finish - while(optical_getCalibrationFinshed() == 0); + while(optical_getCalibrationFinished() == 0); printf("Cal complete\r\n"); diff --git a/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvoptx b/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvoptx index 06ebca09..3b08ccac 100644 --- a/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvoptx +++ b/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvoptx @@ -411,6 +411,30 @@ 0 0 + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + diff --git a/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvprojx b/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvprojx index fe5e6fb2..21f65979 100644 --- a/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvprojx +++ b/scm_v3c/applications/freq_sweep_lc_count/freq_sweep_lc_count.uvprojx @@ -481,6 +481,16 @@ 1 ..\..\scm3c_hw_interface.c + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + diff --git a/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.c b/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.c index cd766239..5da26c30 100644 --- a/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.c +++ b/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.c @@ -121,7 +121,7 @@ int main(void) { optical_enable(); // Wait for optical cal to finish - while(optical_getCalibrationFinshed() == 0); + while(optical_getCalibrationFinished() == 0); printf("Cal complete\r\n"); @@ -168,7 +168,8 @@ void cb_startFrame_rx(uint32_t timestamp){ void cb_endFrame_rx(uint32_t timestamp){ uint8_t i; - + uint32_t IF_estimate, LQI_chip_errors; + radio_getReceivedFrame( &(app_vars.packet[0]), &app_vars.packet_len, @@ -176,15 +177,19 @@ void cb_endFrame_rx(uint32_t timestamp){ &app_vars.rxpk_rssi, &app_vars.rxpk_lqi ); - + + // Read IF estimate, and LQI + IF_estimate = radio_getIFestimate(); + LQI_chip_errors = radio_getLQIchipErrors(); + radio_rfOff(); if( app_vars.packet_len == LEN_RX_PKT && (radio_getCrcOk()) ){ // Only record IF estimate, LQI, and CDR tau for valid packets - app_vars.IF_estimate = radio_getIFestimate(); - app_vars.LQI_chip_errors = radio_getLQIchipErrors(); + app_vars.IF_estimate = IF_estimate; + app_vars.LQI_chip_errors = LQI_chip_errors; printf( "pkt received on ch%d %c%c%c%c.%d.%d.%d\r\n", diff --git a/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvoptx b/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvoptx index ea55370c..44c6aa13 100644 --- a/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvoptx +++ b/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvoptx @@ -411,6 +411,30 @@ 0 0 + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + diff --git a/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvprojx b/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvprojx index cf5d8db9..ffea37d3 100644 --- a/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvprojx +++ b/scm_v3c/applications/freq_sweep_rx/freq_sweep_rx.uvprojx @@ -481,6 +481,16 @@ 1 ..\..\scm3c_hw_interface.c + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + diff --git a/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.c b/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.c index 56d13358..33d7d328 100644 --- a/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.c +++ b/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.c @@ -108,7 +108,7 @@ int main(void) { optical_enable(); // Wait for optical cal to finish - while(optical_getCalibrationFinshed() == 0); + while(optical_getCalibrationFinished() == 0); printf("Cal complete\r\n"); diff --git a/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvoptx b/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvoptx index 1bb251ac..5740c3fb 100644 --- a/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvoptx +++ b/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvoptx @@ -411,6 +411,30 @@ 0 0 + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + diff --git a/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvprojx b/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvprojx index 06aed430..132e3e32 100644 --- a/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvprojx +++ b/scm_v3c/applications/freq_sweep_tx/freq_sweep_tx.uvprojx @@ -481,6 +481,16 @@ 1 ..\..\scm3c_hw_interface.c + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + diff --git a/scm_v3c/applications/pingpong_test/pingpong_test.c b/scm_v3c/applications/pingpong_test/pingpong_test.c index 610acb1a..21798a8c 100644 --- a/scm_v3c/applications/pingpong_test/pingpong_test.c +++ b/scm_v3c/applications/pingpong_test/pingpong_test.c @@ -117,7 +117,7 @@ int main(void) { optical_enable(); // Wait for optical cal to finish - while(optical_getCalibrationFinshed() == 0); + while(optical_getCalibrationFinished() == 0); printf("Cal complete\r\n"); diff --git a/scm_v3c/applications/pingpong_test/pingpong_test.uvoptx b/scm_v3c/applications/pingpong_test/pingpong_test.uvoptx index 114421e5..eeb3897a 100644 --- a/scm_v3c/applications/pingpong_test/pingpong_test.uvoptx +++ b/scm_v3c/applications/pingpong_test/pingpong_test.uvoptx @@ -411,6 +411,30 @@ 0 0 + + 2 + 20 + 1 + 0 + 0 + 0 + ..\..\ble.c + ble.c + 0 + 0 + + + 2 + 21 + 5 + 0 + 0 + 0 + ..\..\ble.h + ble.h + 0 + 0 + diff --git a/scm_v3c/applications/pingpong_test/pingpong_test.uvprojx b/scm_v3c/applications/pingpong_test/pingpong_test.uvprojx index d05664e9..dbb4b43d 100644 --- a/scm_v3c/applications/pingpong_test/pingpong_test.uvprojx +++ b/scm_v3c/applications/pingpong_test/pingpong_test.uvprojx @@ -481,6 +481,16 @@ 1 ..\..\scm3c_hw_interface.c + + ble.c + 1 + ..\..\ble.c + + + ble.h + 5 + ..\..\ble.h + diff --git a/scm_v3c/ble.c b/scm_v3c/ble.c new file mode 100644 index 00000000..090f44a2 --- /dev/null +++ b/scm_v3c/ble.c @@ -0,0 +1,448 @@ +#include +#include +#include +#include + +#include "memory_map.h" +#include "scm3c_hw_interface.h" +#include "ble.h" +#include "radio.h" + +//=========================== definition ====================================== + +//=========================== variables ======================================= + +typedef struct { + uint8_t packet[64]; + uint8_t AdvA[ADVA_LENGTH]; + uint8_t channel; + + // BLE packet contents enable. + // The total data length cannot exceed 31 bytes. + bool name_tx_en; + bool lc_freq_codes_tx_en; + bool counters_tx_en; + bool temp_tx_en; + bool data_tx_en; + + // BLE packet data. + char name[NAME_LENGTH]; + uint16_t lc_freq_codes; + uint32_t count_2M; + uint32_t count_32k; + double temp; + uint8_t data[CUSTOM_DATA_LENGTH]; +} ble_vars_t; + +ble_vars_t ble_vars; + +//=========================== prototypes ====================================== + +void load_tx_arb_fifo(void); +void transmit_tx_arb_fifo(void); + +//=========================== public ========================================== + +void ble_init(void) { + // Clear variables. + memset(&ble_vars, 0, sizeof(ble_vars)); + + // Set default advertiser address. + ble_vars.AdvA[0] = 0x00; + ble_vars.AdvA[1] = 0x02; + ble_vars.AdvA[2] = 0x72; + ble_vars.AdvA[3] = 0x32; + ble_vars.AdvA[4] = 0x80; + ble_vars.AdvA[5] = 0xC6; + + // Set default channel. + ble_vars.channel = 37; + + // Set default name. + ble_vars.name_tx_en = true; + ble_vars.name[0] = 'S'; + ble_vars.name[1] = 'C'; + ble_vars.name[2] = 'U'; + ble_vars.name[3] = 'M'; + ble_vars.name[4] = '3'; +} + +void ble_gen_packet(void) { + uint8_t i = 0, j = 0; + + int k; + uint8_t common; + uint8_t crc3 = 0xAA; + uint8_t crc2 = 0xAA; + uint8_t crc1 = 0xAA; + + uint8_t pdu_crc[PDU_LENGTH + CRC_LENGTH]; + + uint8_t lfsr = (ble_vars.channel & 0x3F) | (1 << 6); // [1 channel[6]] + + memset(ble_vars.packet, 0, 64 * sizeof(uint8_t)); + memset(pdu_crc, 0, (PDU_LENGTH + CRC_LENGTH) * sizeof(uint8_t)); + + ble_vars.packet[i++] = BPREAMBLE; + + ble_vars.packet[i++] = BACCESS_ADDRESS1; + ble_vars.packet[i++] = BACCESS_ADDRESS2; + ble_vars.packet[i++] = BACCESS_ADDRESS3; + ble_vars.packet[i++] = BACCESS_ADDRESS4; + + pdu_crc[j++] = PDU_HEADER1; + pdu_crc[j++] = PDU_HEADER2; + + for (k = ADVA_LENGTH - 1; k >= 0; --k) { + pdu_crc[j++] = flipChar(ble_vars.AdvA[k]); + } + + if (ble_vars.name_tx_en) { + pdu_crc[j++] = NAME_HEADER; + pdu_crc[j++] = NAME_GAP_CODE; + + for (k = 0; k < NAME_LENGTH; ++k) { + pdu_crc[j++] = flipChar(ble_vars.name[k]); + } + } + + if (ble_vars.lc_freq_codes_tx_en) { + pdu_crc[j++] = LC_FREQCODES_HEADER; + pdu_crc[j++] = LC_FREQCODES_GAP_CODE; + + pdu_crc[j++] = flipChar((ble_vars.lc_freq_codes >> 8) & 0xFF); // LC freq codes MSB + pdu_crc[j++] = flipChar(ble_vars.lc_freq_codes & 0xFF); // LC freq codes LSB + } + + if (ble_vars.counters_tx_en) { + pdu_crc[j++] = COUNTERS_HEADER; + pdu_crc[j++] = COUNTERS_GAP_CODE; + + pdu_crc[j++] = flipChar((ble_vars.count_2M >> 24) & 0xFF); // count_2M MSB + pdu_crc[j++] = flipChar((ble_vars.count_2M >> 16) & 0xFF); + pdu_crc[j++] = flipChar((ble_vars.count_2M >> 8) & 0xFF); + pdu_crc[j++] = flipChar(ble_vars.count_2M & 0xFF); // count_2M LSB + + pdu_crc[j++] = flipChar((ble_vars.count_32k >> 24) & 0xFF); // count_32k MSB + pdu_crc[j++] = flipChar((ble_vars.count_32k >> 16) & 0xFF); + pdu_crc[j++] = flipChar((ble_vars.count_32k >> 8) & 0xFF); + pdu_crc[j++] = flipChar(ble_vars.count_32k & 0xFF); // count_32k LSB + } + + if (ble_vars.temp_tx_en) { + double temp_kelvin = ble_vars.temp + 273.15; // Temperature in Kelvin + int temp_payload = 100 * temp_kelvin + 1; // Floating point error + + pdu_crc[j++] = TEMP_HEADER; + pdu_crc[j++] = TEMP_GAP_CODE; + + pdu_crc[j++] = flipChar((temp_payload >> 8) & 0xFF); // Temperature MSB + pdu_crc[j++] = flipChar(temp_payload & 0xFF); // Temperature LSB + } + + if (ble_vars.data_tx_en) { + pdu_crc[j++] = CUSTOM_DATA_HEADER; + pdu_crc[j++] = CUSTOM_DATA_GAP_CODE; + + for (k = 0; k < CUSTOM_DATA_LENGTH; ++k) { + pdu_crc[j++] = flipChar(ble_vars.data[k]); + } + } + + for (j = 0; j < PDU_LENGTH; ++j) { + for (k = 7; k >= 0; --k) { + common = (crc1 & 1) ^ ((pdu_crc[j] & (1 << k)) >> k); + crc1 = (crc1 >> 1) | ((crc2 & 1) << 7); + crc2 = ((crc2 >> 1) | ((crc3 & 1) << 7)) ^ (common << 6) ^ (common << 5); + crc3 = ((crc3 >> 1) | (common << 7)) ^ (common << 6) ^ (common << 4) ^ (common << 3) ^ (common << 1); + } + } + + crc1 = flipChar(crc1); + crc2 = flipChar(crc2); + crc3 = flipChar(crc3); + + pdu_crc[j++] = crc1; + pdu_crc[j++] = crc2; + pdu_crc[j++] = crc3; + + for (j = 0; j < PDU_LENGTH + CRC_LENGTH; ++j) { + for (k = 7; k >= 0; --k) { + pdu_crc[j] = (pdu_crc[j] & ~(1 << k)) | ((pdu_crc[j] & (1 << k)) ^ ((lfsr & 1) << k)); + lfsr = ((lfsr >> 1) | ((lfsr & 1) << 6)) ^ ((lfsr & 1) << 2); + } + } + + memcpy(&ble_vars.packet[i], pdu_crc, PDU_LENGTH + CRC_LENGTH); +} + +void ble_gen_test_packet(void) { + uint8_t i = 0; + + memset(ble_vars.packet, 0, sizeof(ble_vars.packet) * sizeof(uint8_t)); + + ble_vars.packet[i++] = 0x1D; + ble_vars.packet[i++] = 0x55; + ble_vars.packet[i++] = 0xAD; + ble_vars.packet[i++] = 0xF6; + ble_vars.packet[i++] = 0x45; + ble_vars.packet[i++] = 0xC7; + ble_vars.packet[i++] = 0xC5; + ble_vars.packet[i++] = 0x0E; + ble_vars.packet[i++] = 0x26; + ble_vars.packet[i++] = 0x13; + ble_vars.packet[i++] = 0xC2; + ble_vars.packet[i++] = 0xAC; + ble_vars.packet[i++] = 0x98; + ble_vars.packet[i++] = 0x37; + ble_vars.packet[i++] = 0xB8; + ble_vars.packet[i++] = 0x30; + ble_vars.packet[i++] = 0xA1; + ble_vars.packet[i++] = 0xC9; + ble_vars.packet[i++] = 0xE4; + ble_vars.packet[i++] = 0x93; + ble_vars.packet[i++] = 0x75; + ble_vars.packet[i++] = 0xB7; + ble_vars.packet[i++] = 0x41; + ble_vars.packet[i++] = 0x6C; + ble_vars.packet[i++] = 0xD1; + ble_vars.packet[i++] = 0x2D; + ble_vars.packet[i++] = 0xB8; +} + +void ble_set_AdvA(uint8_t *AdvA) { + memcpy(ble_vars.AdvA, AdvA, ADVA_LENGTH); +} + +void ble_set_channel(uint8_t channel) { + ble_vars.channel = channel; +} + +void ble_set_name_tx_en(bool name_tx_en) { + ble_vars.name_tx_en = name_tx_en; +} + +void ble_set_name(char *name) { + memcpy(ble_vars.name, name, NAME_LENGTH); +} + +void ble_set_lc_freq_codes_tx_en(bool lc_freq_codes_tx_en) { + ble_vars.lc_freq_codes_tx_en = lc_freq_codes_tx_en; +} + +void ble_set_lc_freq_codes(uint16_t lc_freq_codes) { + ble_vars.lc_freq_codes = lc_freq_codes; +} + +void ble_set_counters_tx_en(bool counters_tx_en) { + ble_vars.counters_tx_en = counters_tx_en; +} + +void ble_set_count_2M(uint32_t count_2M) { + ble_vars.count_2M = count_2M; +} + +void ble_set_count_32k(uint32_t count_32k) { + ble_vars.count_32k = count_32k; +} + +void ble_set_temp_tx_en(bool temp_tx_en) { + ble_vars.temp_tx_en = temp_tx_en; +} + +void ble_set_temp(double temp) { + ble_vars.temp = temp; +} + +void ble_set_data_tx_en(bool data_tx_en) { + ble_vars.data_tx_en = data_tx_en; +} + +void ble_set_data(uint8_t *data) { + memcpy(ble_vars.data, data, CUSTOM_DATA_LENGTH); +} + +void ble_init_tx(void) { + // Set up BLE modulation source. + // ---- + // mod_logic<3:0> = ASC<996:999> + // The two LSBs change the mux from cortex mod (00) source to pad (11). + // They can also be used to set the modulation to 0 (10) or 1 (01). + // The other bits are used for inverting the modulation bitstream and can be cleared. + // The goal is to remove the 15.4 DAC from the modulation path. + /* + clear_asc_bit(996); + set_asc_bit(997); + clear_asc_bit(998); + clear_asc_bit(999); + */ + set_asc_bit(996); + clear_asc_bit(997); + clear_asc_bit(998); + clear_asc_bit(999); + + clear_asc_bit(1000); + clear_asc_bit(1001); + clear_asc_bit(1002); + clear_asc_bit(1003); + + // Make sure the BLE modulation mux is set. + // Bit 1013 sets the BLE mod dac to cortex control. + // The BLE tone spacing cannot be set, it is a fixed DAC. + set_asc_bit(1013); + // ---- + + // Set the bypass scan bits of the BLE FIFO and GFSK modules. + set_asc_bit(1041); + set_asc_bit(1042); + + // Ensure cortex control of LO. + clear_asc_bit(964); + + // Ensure cortex control of divider. + clear_asc_bit(1081); + + // Need to set analog_cfg<183> to 0 to select BLE for chips out. + ANALOG_CFG_REG__11 = 0x0000; + + // Set current in LC tank. + set_LC_current(127); + + // Set LDO voltages for PA and LO. + set_PA_supply(127); + set_LO_supply(63,0); + + // Program analog scan chain. + analog_scan_chain_write(); + analog_scan_chain_load(); +} + +// Must set IF clock frequency AFTER calling this function. +void ble_init_rx(void) { + radio_init_rx_ZCC(); + + // Set clock mux to internal RC oscillator. + clear_asc_bit(424); + set_asc_bit(425); + + // Need to turn on ADC clock generation to get /4 output for clock calibration. + set_asc_bit(422); + + // Set gain for I and Q. + set_IF_gain_ASC(63,63); + + // Set gm for stg3 ADC drivers. + set_IF_stg3gm_ASC(7, 7); //(I, Q) + + // Set comparator trims. + //set_IF_comparator_trim_I(0, 7); //(p,n) + //set_IF_comparator_trim_Q(15, 0); //(p,n) + + // Set clock divider value for zcc. + // The IF clock divided by this value must equal 1 MHz for BLE 1M PHY. + set_IF_ZCC_clkdiv(76); + + // Disable feedback. + clear_asc_bit(123); + + // Mixer and polyphase control settings can be driven from either ASC or memory mapped I/O. + // Mixers and polyphase should both be enabled for RX and both disabled for TX. + // -- + // For polyphase (1=enabled), + // mux select signal ASC<746>=0 gives control to ASC<971>. + // mux select signal ASC<746>=1 gives control to analog_cfg<256> (bit 0 of ANALOG_CFG_REG__16). + // -- + // For mixers (0=enabled), both I and Q should be enabled for matched filter mode. + // mux select signals ASC<744>=0 and ASC<745>=0 give control to ASC<298> and ASC<307>. + // mux select signals ASC<744>=1 and ASC<745>=1 give control to analog_cfg<257> analog_cfg<258> (bits 1 and 2 in ANALOG_CFG_REG__16). + + // Set mixer and polyphase control signals to memory mapped I/O. + set_asc_bit(744); + set_asc_bit(745); + set_asc_bit(746); + + // Enable both polyphase and mixers via memory mapped IO (...001 = 0x1). + // To disable both you would invert these values (...110 = 0x6). + ANALOG_CFG_REG__16 = 0x1; + + // Program analog scan chain. + analog_scan_chain_write(); + analog_scan_chain_load(); +} + +void ble_transmit(void) { + int t; + + load_tx_arb_fifo(); + + // Turn on LO, PA, and DIV. + radio_txEnable(); + + // Wait for LDOs to turn on. + for (t = 0; t < 50; ++t); + + // Send the packet. + transmit_tx_arb_fifo(); + + // Wait for transmission to finish. + // Don't know if there is some way to know when this has finished or just busy wait (?). + // This was determined empirically using trial and error. + for (t = 0; t < 1000; ++t); + + radio_rfOff(); +} + +//=========================== private ========================================= + +void load_tx_arb_fifo(void) { + // Initialize variables. + int i; // used to loop through the bytes + int j; // used to loop through the 8 bits of each individual byte + + uint8_t current_byte; // temporary variable used to get through each byte at a time + uint8_t current_bit; // temporary variable to put the current bit into the GPIO + uint32_t fifo_ctrl_reg = 0x00000000; // local storage for analog CFG register + + // Prepare FIFO for loading. + fifo_ctrl_reg |= 0x00000001; // raise LSB - data in valid + fifo_ctrl_reg &= 0xFFFFFFFB; // lower 3rd bit - data out ready + fifo_ctrl_reg &= 0xFFFFFFDF; // lower clock select bit to clock in from Cortex + + ANALOG_CFG_REG__11 = fifo_ctrl_reg; // load in the configuration settings + + // Load packet into FIFO. + for (i = 0; i < 64; ++i) { + current_byte = ble_vars.packet[i]; // put a byte into the temporary storage + + for (j = 7; j >= 0; --j) { + // current_bit = ((current_byte << (j - 1)) & 0x80) >> 7; + current_bit = (current_byte >> j) & 0x1; + + if (current_bit == 0) { + fifo_ctrl_reg &= 0xFFFFFFFD; + ANALOG_CFG_REG__11 = fifo_ctrl_reg; + } + if (current_bit == 1) { + fifo_ctrl_reg |= 0x00000002; + ANALOG_CFG_REG__11 = fifo_ctrl_reg; + } + + fifo_ctrl_reg |= 0x00000008; + ANALOG_CFG_REG__11 = fifo_ctrl_reg; + fifo_ctrl_reg &= 0xFFFFFFF7; + ANALOG_CFG_REG__11 = fifo_ctrl_reg; // toggle the clock! + } + } +} + +void transmit_tx_arb_fifo(void) { + uint32_t fifo_ctrl_reg = 0x00000000; // local storage for analog CFG register + + // Release data from FIFO + fifo_ctrl_reg |= 0x00000010; // enable div-by-2 + fifo_ctrl_reg &= 0xFFFFFFFE; // lower data in valid (set FIFO to output mode) + fifo_ctrl_reg |= 0x00000004; // raise data out ready (set FIFO to output mode) + fifo_ctrl_reg |= 0x00000020; // set choose clk to 1 + + ANALOG_CFG_REG__11 = fifo_ctrl_reg; +} diff --git a/scm_v3c/ble.h b/scm_v3c/ble.h new file mode 100644 index 00000000..a42e554c --- /dev/null +++ b/scm_v3c/ble.h @@ -0,0 +1,77 @@ +#ifndef __BLE_H +#define __BLE_H + +#include +#include + +//=========================== define ========================================== + +// BLE packet assembly globals. +#define BPREAMBLE 0x55 +// Split BACCESS_ADDRESS into bytes to avoid big-/little-endianness issue. +#define BACCESS_ADDRESS1 0x6B +#define BACCESS_ADDRESS2 0x7D +#define BACCESS_ADDRESS3 0x91 +#define BACCESS_ADDRESS4 0x71 + +#define PDU_HEADER1 0x40 +#define PDU_HEADER2 0xA4 // PDU is 37 bytes long (6 bytes advertiser address + 31 bytes data). + +// Short name. +#define NAME_LENGTH 5 +#define NAME_HEADER 0x60 // Name is 6 bytes long (1 byte GAP code + 5 bytes data). +#define NAME_GAP_CODE 0x10 + +// LC frequency codes (coarse+mid+fine). +#define LC_FREQCODES_LENGTH 2 +#define LC_FREQCODES_HEADER 0xC0 // LC freq codes are 3 bytes long (1 byte GAP code + 2 bytes data/15 bits). +#define LC_FREQCODES_GAP_CODE 0x03 // Custom GAP code for LC freq codes (0xC0 LSB first). + +// Counters (2M and 32kHz). +#define COUNTERS_LENGTH 8 +#define COUNTERS_HEADER 0x90 // Counters are 9 bytes long (1 byte GAP code + 4 bytes 2M counter + 4 bytes 32k counter). +#define COUNTERS_GAP_CODE 0x43 // Custom GAP code for counters (0xC2 LSB first). + +// Temperature. +#define TEMP_LENGTH 2 +#define TEMP_HEADER 0xC0 // Temperature is 3 bytes long (1 byte GAP code + 2 bytes data). +#define TEMP_GAP_CODE 0x83 // Custom GAP code for temperature (0xC1 LSB first). + +// Custom data. +#define CUSTOM_DATA_LENGTH 4 +#define CUSTOM_DATA_HEADER 0xA0 // Custom data is 5 bytes long (1 byte GAP code + 4 bytes data). +#define CUSTOM_DATA_GAP_CODE 0xC3 // Custom GAP code for custom data (0xC3 LSB first). + +#define ADVA_LENGTH 6 // Advertiser address is 6 bytes long. +#define PDU_LENGTH 39 // 2 byte PDU header + 37 bytes PDU. +#define CRC_LENGTH 3 // CRC is 3 bytes long. + +#define MAX_DATA_LENGTH 31 // Maximum data length is 31 bytes. + +//=========================== typedef ========================================= + +//=========================== variables ======================================= + +//=========================== prototypes ====================================== + +void ble_init(void); +void ble_init_tx(void); +void ble_init_rx(void); +void ble_gen_packet(void); +void ble_gen_test_packet(void); +void ble_set_AdvA(uint8_t *AdvA); +void ble_set_channel(uint8_t channel); +void ble_set_name_tx_en(bool name_tx_en); +void ble_set_name(char *name); +void ble_set_lc_freq_codes_tx_en(bool lc_freq_codes_tx_en); +void ble_set_lc_freq_codes(uint16_t lc_freq_codes); +void ble_set_counters_tx_en(bool counters_tx_en); +void ble_set_count_2M(uint32_t count_2M); +void ble_set_count_32k(uint32_t count_32k); +void ble_set_temp_tx_en(bool temp_tx_en); +void ble_set_temp(double temp); +void ble_set_data_tx_en(bool data_tx_en); +void ble_set_data(uint8_t *data); +void ble_transmit(void); + +#endif diff --git a/scm_v3c/optical.c b/scm_v3c/optical.c index 93ad387e..7efdd9c1 100644 --- a/scm_v3c/optical.c +++ b/scm_v3c/optical.c @@ -9,12 +9,26 @@ //=========================== defines ========================================= +#define LC_CAL_COARSE_MIN 23 +#define LC_CAL_COARSE_MAX 25 +#define LC_CAL_MID_MIN 0 +#define LC_CAL_MID_MAX 31 +#define LC_CAL_FINE_MIN 15 +#define LC_CAL_FINE_MAX 15 + //=========================== variables ======================================= typedef struct { uint8_t optical_cal_iteration; - uint8_t optical_cal_finished; - + bool optical_cal_finished; + + bool optical_LC_cal_enable; + bool optical_LC_cal_finished; + uint8_t cal_LC_coarse; + uint8_t cal_LC_mid; + uint8_t cal_LC_fine; + uint32_t cal_LC_diff; + uint32_t num_32k_ticks_in_100ms; uint32_t num_2MRC_ticks_in_100ms; uint32_t num_IFclk_ticks_in_100ms; @@ -23,7 +37,9 @@ typedef struct { // reference to calibrate uint32_t LC_target; - uint32_t LC_code; + uint8_t LC_coarse; + uint8_t LC_mid; + uint8_t LC_fine; } optical_vars_t; optical_vars_t optical_vars; @@ -35,18 +51,46 @@ optical_vars_t optical_vars; void optical_init(void) { memset(&optical_vars, 0, sizeof(optical_vars_t)); - - // Target radio LO freq = 2.4025G + // Divide ratio is currently 480*2 // Calibration counts for 100ms - optical_vars.LC_target = REFERENCE_LC_TARGET; - optical_vars.LC_code = DEFUALT_INIT_LC_CODE; + optical_vars.LC_target = REFERENCE_LC_TARGET; + optical_vars.LC_coarse = DEFAULT_INIT_LC_COARSE; + optical_vars.LC_mid = DEFAULT_INIT_LC_MID; + optical_vars.LC_fine = DEFAULT_INIT_LC_FINE; } -uint8_t optical_getCalibrationFinshed(void) { +void optical_enableLCCalibration(void) { + optical_vars.optical_LC_cal_enable = true; + optical_vars.optical_LC_cal_finished = false; + + optical_vars.cal_LC_coarse = LC_CAL_COARSE_MIN; + optical_vars.cal_LC_mid = LC_CAL_MID_MIN; + optical_vars.cal_LC_fine = LC_CAL_FINE_MIN; + optical_vars.cal_LC_diff = 0xFFFFFFFF; + LC_FREQCHANGE(optical_vars.cal_LC_coarse, optical_vars.cal_LC_mid, optical_vars.cal_LC_fine); +} + +bool optical_getCalibrationFinished(void) { return optical_vars.optical_cal_finished; } +void optical_setLCTarget(uint32_t LC_target) { + optical_vars.LC_target = LC_target; +} + +uint8_t optical_getLCCoarse(void) { + return optical_vars.LC_coarse & 0x1F; +} + +uint8_t optical_getLCMid(void) { + return optical_vars.LC_mid & 0x1F; +} + +uint8_t optical_getLCFine(void) { + return optical_vars.LC_fine & 0x1F; +} + void optical_enable(void){ ISER = 0x0800; } @@ -129,13 +173,13 @@ void optical_sfd_isr(){ rdata_lsb = *(unsigned int*)(APB_ANALOG_CFG_BASE + 0x300000); rdata_msb = *(unsigned int*)(APB_ANALOG_CFG_BASE + 0x340000); count_IF = rdata_lsb + (rdata_msb << 16); - + // Reset all counters ANALOG_CFG_REG__0 = 0x0000; - + // Enable all counters ANALOG_CFG_REG__0 = 0x3FFF; - + // Don't make updates on the first two executions of this ISR if(optical_vars.optical_cal_iteration > 2){ @@ -147,20 +191,48 @@ void optical_sfd_isr(){ if(count_HFclock > 2003000) { HF_CLOCK_fine++; } - + set_sys_clk_secondary_freq(HF_CLOCK_coarse, HF_CLOCK_fine); scm3c_hw_interface_set_HF_CLOCK_coarse(HF_CLOCK_coarse); scm3c_hw_interface_set_HF_CLOCK_fine(HF_CLOCK_fine); - + // Do correction on LC - if(count_LC > (optical_vars.LC_target + 0)) { - optical_vars.LC_code -= 1; - } - if(count_LC < (optical_vars.LC_target - 0)) { - optical_vars.LC_code += 1; + if (optical_vars.optical_LC_cal_enable && !optical_vars.optical_LC_cal_finished) { + if ((count_LC <= optical_vars.LC_target) && (optical_vars.LC_target - count_LC < optical_vars.cal_LC_diff)) { + optical_vars.cal_LC_diff = optical_vars.LC_target - count_LC; + optical_vars.LC_coarse = optical_vars.cal_LC_coarse; + optical_vars.LC_mid = optical_vars.cal_LC_mid; + optical_vars.LC_fine = optical_vars.cal_LC_fine; + } else if ((count_LC > optical_vars.LC_target) && (count_LC - optical_vars.LC_target < optical_vars.cal_LC_diff)) { + optical_vars.cal_LC_diff = count_LC - optical_vars.LC_target; + optical_vars.LC_coarse = optical_vars.cal_LC_coarse; + optical_vars.LC_mid = optical_vars.cal_LC_mid; + optical_vars.LC_fine = optical_vars.cal_LC_fine; + } + + printf("count_LC: %u, LC_target: %u, LC_diff: %u\n", count_LC, optical_vars.LC_target, optical_vars.cal_LC_diff); + + ++optical_vars.cal_LC_fine; + if (optical_vars.cal_LC_fine > LC_CAL_FINE_MAX) { + optical_vars.cal_LC_fine = LC_CAL_FINE_MIN; + ++optical_vars.cal_LC_mid; + if (optical_vars.cal_LC_mid > LC_CAL_MID_MAX) { + optical_vars.cal_LC_mid = LC_CAL_MID_MIN; + ++optical_vars.cal_LC_coarse; + if (optical_vars.cal_LC_coarse > LC_CAL_COARSE_MAX) { + optical_vars.optical_LC_cal_finished = true; + printf("coarse: %u, mid: %u, fine: %u\n", optical_vars.LC_coarse, optical_vars.LC_mid, optical_vars.LC_fine); + } + } + } + + if (!optical_vars.optical_LC_cal_finished) { + LC_FREQCHANGE(optical_vars.cal_LC_coarse, optical_vars.cal_LC_mid, optical_vars.cal_LC_fine); + } else { + LC_FREQCHANGE(optical_vars.LC_coarse, optical_vars.LC_mid, optical_vars.LC_fine); + } } - LC_monotonic(optical_vars.LC_code); - + // Do correction on 2M RC // Coarse step ~1100 counts, fine ~150 counts, superfine ~25 // Too fast @@ -208,17 +280,17 @@ void optical_sfd_isr(){ scm3c_hw_interface_set_IF_fine(IF_fine); analog_scan_chain_write(); - analog_scan_chain_load(); + analog_scan_chain_load(); } // Debugging output - printf("HF=%d-%d 2M=%d-%d,%d,%d LC=%d-%d IF=%d-%d\r\n",count_HFclock,HF_CLOCK_fine,count_2M,RC2M_coarse,RC2M_fine,RC2M_superfine,count_LC,optical_vars.LC_code,count_IF,IF_fine); + printf("HF=%d-%d 2M=%d-%d,%d,%d LC=%d IF=%d-%d\r\n",count_HFclock,HF_CLOCK_fine,count_2M,RC2M_coarse,RC2M_fine,RC2M_superfine,count_LC,count_IF,IF_fine); - if(optical_vars.optical_cal_iteration == 25){ + if(optical_vars.optical_cal_iteration >= 25 && (!optical_vars.optical_LC_cal_enable || optical_vars.optical_LC_cal_finished)){ // Disable this ISR ICER = 0x0800; optical_vars.optical_cal_iteration = 0; - optical_vars.optical_cal_finished = 1; + optical_vars.optical_cal_finished = true; // Store the last count values optical_vars.num_32k_ticks_in_100ms = count_32k; @@ -246,4 +318,4 @@ void optical_sfd_isr(){ // Halt all counters ANALOG_CFG_REG__0 = 0x0000; } -} \ No newline at end of file +} diff --git a/scm_v3c/optical.h b/scm_v3c/optical.h index ffd1de37..b166cc18 100644 --- a/scm_v3c/optical.h +++ b/scm_v3c/optical.h @@ -1,6 +1,7 @@ #ifndef __OPTICAL_H #define __OPTICAL_H +#include #include //=========================== define ========================================== @@ -13,7 +14,12 @@ //==== admin void optical_init(void); -uint8_t optical_getCalibrationFinshed(void); +void optical_enableLCCalibration(void); +bool optical_getCalibrationFinished(void); +void optical_setLCTarget(uint32_t LC_target); +uint8_t optical_getLCCoarse(void); +uint8_t optical_getLCMid(void); +uint8_t optical_getLCFine(void); void optical_enable(void); #endif \ No newline at end of file diff --git a/scm_v3c/radio.c b/scm_v3c/radio.c index 647e3954..2c33f9b9 100644 --- a/scm_v3c/radio.c +++ b/scm_v3c/radio.c @@ -18,9 +18,11 @@ unsigned int acfg3_val; // These coefficients are used for filtering frequency feedback information // These are no necessarily the ideal values to use; situationally dependent -unsigned char FIR_coeff[11] = {4,16,37,64,87,96,87,64,37,16,4}; -unsigned int IF_estimate_history[11] = {500,500,500,500,500,500,500,500,500,500}; -signed short cdr_tau_history[11] = {0}; +#define FILTER_WINDOWS_LEN 11 + +uint8_t FIR_coeff[FILTER_WINDOWS_LEN] = {4,16,37,64,87,96,87,64,37,16,4}; +uint32_t IF_estimate_history[FILTER_WINDOWS_LEN] = {500,500,500,500,500,500,500,500,500,500}; +int16_t cdr_tau_history[FILTER_WINDOWS_LEN] = {0}; //=========================== definition ====================================== @@ -48,7 +50,6 @@ signed short cdr_tau_history[11] = {0}; #define IF_FREQ_UPDATE_TIMEOUT 10 #define LO_FREQ_UPDATE_TIMEOUT 10 -#define FILTER_WINDOWS_LEN 11 #define FIR_COEFF_SCALE 512 // determined by FIR_coeff #define LC_CODE_RX 700 //Board Q3: tested at Inria A102 room (Oct, 16 2019) @@ -79,11 +80,14 @@ typedef struct { uint32_t rx_channel_codes[NUM_CHANNELS]; uint32_t tx_channel_codes[NUM_CHANNELS]; - + // How many packets must be received before adjusting RX clock rates // Should be at least as long as the FIR filters volatile uint16_t frequency_update_rate; volatile uint16_t frequency_update_cooldown_timer; + + int IF_est_filtered; + bool IF_est_filtered_ready; } radio_vars_t; radio_vars_t radio_vars; @@ -185,19 +189,16 @@ void radio_loadPacket(uint8_t* packet, uint16_t len){ // Turn on the radio for transmit // This should be done at least ~50 us before txNow() -void radio_txEnable(){ - +void radio_txEnable(){ // Turn on LO, PA, and AUX LDOs - #ifdef DIV_ON - - // Turn on DIV if need read LC_count + // Turn on DIV to read LC_count ANALOG_CFG_REG__10 = 0x0068; #else // Turn on LO, PA, and AUX LDOs ANALOG_CFG_REG__10 = 0x0028; #endif - + // Turn off polyphase and disable mixer ANALOG_CFG_REG__16 = 0x6; } @@ -215,7 +216,7 @@ void radio_rxEnable(){ // Turn on LO, IF, and AUX LDOs via memory mapped register - // Turn on DIV on if need to read LC_div counter + // Turn on DIV to read LC_div counter // Aux is inverted (0 = on) // Memory-mapped LDO control @@ -282,6 +283,52 @@ void radio_rfOff(){ ANALOG_CFG_REG__10 = 0x0000; } +int radio_update_IF_estimate(uint32_t IF_estimate, uint32_t LQI_chip_errors) { + int sum = 0; + int i; + + // Only make adjustments when the chip error rate is <10% (this value was picked as an arbitrary choice) + if (LQI_chip_errors < 25) { + // When updating LO and IF clock frequncies, must wait long enough for the changes to propagate before changing again + // Need to receive as many packets as there are taps in the FIR filter + ++radio_vars.frequency_update_cooldown_timer; + + // Shift old samples + for (i = 9; i >= 0; --i){ + IF_estimate_history[i + 1] = IF_estimate_history[i]; + } + + // New sample + IF_estimate_history[0] = IF_estimate; + + // Do FIR convolution + for (i = 0; i < FILTER_WINDOWS_LEN; ++i){ + sum = sum + IF_estimate_history[i] * FIR_coeff[i]; + } + + // Divide by 512 (sum of the coefficients) to scale output + radio_vars.IF_est_filtered = sum / 512; + + if (radio_vars.frequency_update_cooldown_timer >= radio_vars.frequency_update_rate) { + radio_vars.IF_est_filtered_ready = true; + } + } +} + +bool radio_get_IF_estimate_ready(void) { + return radio_vars.IF_est_filtered_ready; +} + +int radio_get_IF_estimate(void) { + radio_vars.IF_est_filtered_ready = false; + radio_vars.frequency_update_cooldown_timer = 0; + + // Reset IF_est_filtered until as many packets arrive as there are taps in the FIR filter + // The IF estimate reports how many zero crossings (both pos and neg) there were in a 100us period + // The IF should on average be 2.5 MHz, which means the IF estimate will return ~500 when there is no IF error + return radio_vars.IF_est_filtered - 500; +} + void radio_frequency_housekeeping( uint32_t IF_estimate, uint32_t LQI_chip_errors, @@ -424,7 +471,7 @@ uint32_t radio_getIFestimate(void){ } uint32_t radio_getLQIchipErrors(void){ - return ANALOG_CFG_REG__21; + return read_LQI(); } int16_t radio_get_cdr_tau_value(void){ diff --git a/scm_v3c/radio.h b/scm_v3c/radio.h index c00c6455..20ee9a5f 100644 --- a/scm_v3c/radio.h +++ b/scm_v3c/radio.h @@ -40,6 +40,9 @@ uint32_t radio_getLQIchipErrors(void); int16_t radio_get_cdr_tau_value(void); //==== frequency +int radio_update_IF_estimate(uint32_t IF_estimate, uint32_t LQI_chip_errors); +bool radio_get_IF_estimate_ready(void); +int radio_get_IF_estimate(void); void radio_frequency_housekeeping( uint32_t IF_estimate, uint32_t LQI_chip_errors, diff --git a/scm_v3c/rftimer.c b/scm_v3c/rftimer.c index 13412054..73aadf4d 100644 --- a/scm_v3c/rftimer.c +++ b/scm_v3c/rftimer.c @@ -8,7 +8,7 @@ // ========================== definition ====================================== -#define MINIMUM_COMPAREVALE_ADVANCE 5 +#define MINIMUM_COMPAREVALUE_ADVANCE 5 #define LARGEST_INTERVAL 0xffff // ========================== variable ======================================== diff --git a/scm_v3c/scm3c_hw_interface.c b/scm_v3c/scm3c_hw_interface.c index 8c884fce..d103ab04 100644 --- a/scm_v3c/scm3c_hw_interface.c +++ b/scm_v3c/scm3c_hw_interface.c @@ -3,6 +3,7 @@ #include "memory_map.h" #include "scm3c_hw_interface.h" +#include "ble.h" #include "radio.h" #include "optical.h" #include "rftimer.h" @@ -845,7 +846,7 @@ void radio_init_rx_MF(){ // Enable both polyphase and mixers via memory mapped IO (...001 = 0x1) // To disable both you would invert these values (...110 = 0x6) ANALOG_CFG_REG__16 = 0x1; - + } // Must set IF clock frequency AFTER calling this function @@ -974,15 +975,15 @@ void radio_init_tx(){ set_LC_current(127); // Set LDO voltages for PA and LO - set_PA_supply(63); - set_LO_supply(127,0); + set_PA_supply(127); + set_LO_supply(63,0); } void radio_init_divider(unsigned int div_value){ // Set divider LDO value to max - set_DIV_supply(63,0); + set_DIV_supply(127,0); // Set prescaler to div-by-2 prescaler(4); @@ -1138,7 +1139,8 @@ void initialize_mote(){ optical_init(); radio_init(); rftimer_init(); - + ble_init(); + //-------------------------------------------------------- // SCM3C Analog Scan Chain Initialization //-------------------------------------------------------- @@ -1149,20 +1151,20 @@ void initialize_mote(){ // set_VDDD_LDO_voltage(0); // set_AUX_LDO_voltage(0); // set_ALWAYSON_LDO_voltage(0); - + // Select banks for GPIO inputs GPI_control(0,0,0,0); - + // Select banks for GPIO outputs GPO_control(6,6,6,0); - + // Set all GPIOs as outputs GPI_enables(0x0000); GPO_enables(0xFFFF); // Set HCLK source as HF_CLOCK set_asc_bit(1147); - + // Set initial coarse/fine on HF_CLOCK //coarse 0:4 = 860 861 875b 876b 877b //fine 0:4 870 871 872 873 874b @@ -1170,13 +1172,13 @@ void initialize_mote(){ scm3c_hw_interface_vars.HF_CLOCK_coarse, scm3c_hw_interface_vars.HF_CLOCK_fine ); - + // Set RFTimer source as HF_CLOCK set_asc_bit(1151); // Disable LF_CLOCK set_asc_bit(553); - + // HF_CLOCK will be trimmed to 20MHz, so set RFTimer div value to 40 to get 500kHz (inverted, so 1101 0111) set_asc_bit(49); set_asc_bit(48); @@ -1186,27 +1188,27 @@ void initialize_mote(){ set_asc_bit(44); set_asc_bit(43); set_asc_bit(42); - + // Set 2M RC as source for chip CLK set_asc_bit(1156); - + // Enable 32k for cal set_asc_bit(623); - + // Enable passthrough on chip CLK divider set_asc_bit(41); - + // Init counter setup - set all to analog_cfg control // scm3c_hw_interface_vars.ASC[0] is leftmost //scm3c_hw_interface_vars.ASC[0] |= 0x6F800000; for(t=2; t<9; t++) set_asc_bit(t); - + // Init RX radio_init_rx_MF(); - + // Init TX radio_init_tx(); - + // Set initial IF ADC clock frequency set_IF_clock_frequency( scm3c_hw_interface_vars.IF_coarse, @@ -1225,18 +1227,17 @@ void initialize_mote(){ // Turn on RC 2M for cal set_asc_bit(1114); - + // Set initial LO frequency - LC_monotonic(DEFUALT_INIT_LC_CODE); - + LC_FREQCHANGE(DEFAULT_INIT_LC_COARSE, DEFAULT_INIT_LC_MID, DEFAULT_INIT_LC_FINE); + // Init divider settings radio_init_divider(2000); - + // Program analog scan chain analog_scan_chain_write(); analog_scan_chain_load(); //-------------------------------------------------------- - } unsigned int estimate_temperature_2M_32k(){ @@ -1473,6 +1474,14 @@ void clear_asc_bit(unsigned int position){ //scm3c_hw_interface_vars.ASC[position/32] &= ~(1 << (position%32)); } +void dump_asc(void){ + + unsigned int i; + for (i = 0; i < ASC_LEN; ++i){ + printf("ASC[%u] = 0x%x\n", i, scm3c_hw_interface_vars.ASC[i]); + } +} + //==== from bucket_o_functions.h @@ -1597,27 +1606,29 @@ void enable_1mhz_ble_ASC() { void disable_1mhz_ble_ASC() { scm3c_hw_interface_vars.ASC[32] |= 0x00060000; } + void set_PA_supply(unsigned int code) { // 7-bit setting (between 0 and 127) // MSB is a "panic" bit that engages the high-voltage settings unsigned int code_ASC = ((~code)&0x0000007F) << 13; scm3c_hw_interface_vars.ASC[30] &= 0xFFF01FFF; scm3c_hw_interface_vars.ASC[30] |= code_ASC; - } + void set_LO_supply(unsigned int code, unsigned char panic) { // 7-bit setting (between 0 and 127) // MSB is a "panic" bit that engages the high-voltage settings unsigned int code_ASC = ((~code)&0x0000007F) << 5; - scm3c_hw_interface_vars.ASC[30] &= 0xFFFFF017; + scm3c_hw_interface_vars.ASC[30] &= 0xFFFFF01F; scm3c_hw_interface_vars.ASC[30] |= code_ASC; } + void set_DIV_supply(unsigned int code, unsigned char panic) { // 7-bit setting (between 0 and 127) // MSB is a "panic" bit that engages the high-voltage settings - unsigned int code_ASC = ((~code)&0x0000007F) << 5; - scm3c_hw_interface_vars.ASC[30] &= 0xFFF01FFF; - scm3c_hw_interface_vars.ASC[30] |= code_ASC; + unsigned int code_ASC = ((~code)&0x0000007F) << 13; + scm3c_hw_interface_vars.ASC[31] &= 0xFFF01FFF; + scm3c_hw_interface_vars.ASC[31] |= code_ASC; } void prescaler(int code) { diff --git a/scm_v3c/scm3c_hw_interface.h b/scm_v3c/scm3c_hw_interface.h index 8d217704..e774fe98 100644 --- a/scm_v3c/scm3c_hw_interface.h +++ b/scm_v3c/scm3c_hw_interface.h @@ -88,6 +88,7 @@ unsigned int flip_lsb8(unsigned int in); void update_PN31_byte(unsigned int* current_lfsr); void set_asc_bit(unsigned int position); void clear_asc_bit(unsigned int position); +void dump_asc(void); //==== from bucket_o_functions.h diff --git a/scm_v3c/scum_defs.h b/scm_v3c/scum_defs.h index f1489006..5483ce36 100644 --- a/scm_v3c/scum_defs.h +++ b/scm_v3c/scum_defs.h @@ -7,8 +7,9 @@ //=========================== define ========================================== -// LC_code used to the initial LC frequency, before optical calibration -#define DEFUALT_INIT_LC_CODE 698 +#define DEFAULT_INIT_LC_COARSE 23 +#define DEFAULT_INIT_LC_MID 12 +#define DEFAULT_INIT_LC_FINE 15 #define REFERENCE_LC_TARGET 250260 //=========================== typedef =========================================