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Maybe Tom Watson, Jr. wasn't so brilliant #21
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Interesting essay! I have the impression IBM did quite well for themselves in spite of their initial lack of timesharing options. The first PDP-10 was powered on March 9th 1967. See #2. "Late 1967" may well have been early customer deliveries. Maybe that's when the AI lab got theirs, because ITS was running by summer 1968. |
Sorry, I was confused. I don't know when ITS was running on the PDP-10. MAC Progress Report IV from 1967 says a PDP-10 purchase was planned for the following year. |
From: Lars Brinkhoff ***@***.***>
Date: Fri, 28 Sep 2018 05:12:45 -0700
Interesting essay!
I have the impression IBM did quite well for themselves in spite of
their initial lack of timesharing options.
Thanks. They did do quite well for a long time, but their own home
grown time sharing option never did well, there was a U of Michigan
based system that was OK I think, by the time I showed up at MIT in the
fall of 1978 VM/CMS was what ran on the 370/168 (developed at the IBM
research center in the same technology park where the PDP-6 and PDP-10s
lived), which is ... very much not the same thing, everyone got their
own virtual machine, to communicate between them you punched virtual
cards to a virtual card reader, etc. etc. ... but it was good at selling
inefficiently used IBM disks, compared to the efficient (conventional)
way Multics used storage in the same machine room. They also had a
"Terminal Facility" into which you could type your BASIC or PL/1 and
maybe other language programs, which ran as a program on one or more of
their 370 batch operating systems. But it was very limited.
The point is they for example passed on the Multics project, which
inspired UNIX, and locked themselves into a ghetto that after a while
steadily declined compared to the rest of the industry. Before then,
they *owned* a great deal of academic computing, e.g. LISP was developed
on a vacuum tube IBM 704 there, as was FORTRAN a year earlier at IBM.
One of the first 2 or so time sharing systems, MIT's Compatible Time
Sharing System (CTSS), so named because it also supported batch
processing (which the Incompatible Time Sharing System didn't really,
although you could run long programs in the background), ran first on
the IBM 7090, a transistorized IBM 709 (the 701 -> 704 -> 790 being
their 36 bit line of binary scientific computers).
The first PDP-10 was powered on March 9th 1967. See
#2. "Late 1967" may well
have been early customer deliveries. Maybe that's when the AI lab got
theirs, because ITS was running by summer 1968.> From: Lars Brinkhoff ***@***.***>
Date: Fri, 28 Sep 2018 05:16:49 -0700
Sorry, I was confused. I don't know when ITS was running on the PDP-
10. MAC Progress Report IV from 1967 says a PDP-10 purchase was
planned for the following year.
MIT got I think the first delivered PDP-6, helped specify the
instruction set so it would, for example, run LISP well, as far as I
know ITS was first developed on it, as well as MACLISP, etc. They only
sold 23 of them, for a bunch of reasons including horrible mechanical
design, but they seeded the field for PDP-10s after engineers at DEC
convinced management they could make a KA10 that wasn't a nightmare.
Wikipedia explains the PDP-6 problem well[1] whereas, and I know this
because a student run computer center I started inherited the MIT-AI
KA10 hardware, was build from Flip Chips[2] that were plugged into
**huge* *wire wrapped backplanes, on the order of 3x3 feet. A key
development there as I remember hearing was a Gardner Denver semi-
automatic wire wrapping machine that could accommodate backplanes of
that size, they'd follow a CNC program that would point out a position,
then ladies (as a rule) would start a wire, then it would point out the
next post to wrap, etc.
Ah, the CONS, and the CADR Lisp Machines which by then were in serial
production, were also wire wrapped, but connecting 7400 TTL chips. The
initial wire wrapping was automated and done by a contractor, then a
finished Lisp Machine would test every connection with a couple of
probes driven by stepper motors, this was quite cool to watch, plus wire
wrapping was how the next generation Lisp Machines were prototyped, so I
learned a fair amount about the technique.
- Harold
Links:
1. https://en.wikipedia.org/wiki/PDP-6#Construction
2. https://en.wikipedia.org/wiki/Flip_Chip_(trademark)
|
That agrees with information I read. @philbudne has a list of PDP-6 serial numbers, and the AI lab machine is number 2. @aap got an email from Peter Samson about his involvement in the instruction set design. |
This is based in on a lot of recent reading of IBM's history through the early System/370s days. Also factor in MIT's core memory patent licencee and IBM being in a nasty legal battle as IBM was doing its you bet your company System/360 project, the economics of which were very dependent on its cost for core memory.
Anyway, an essay I've been working on for a while, here's its current form, ask for more details if you wish:
Under him, IBM all but completely blew virtual memory and thus time sharing. That cost them both MIT and Bell Labs which in theory was a very big deal (not so much if you note how it didn't actually prompt IBM to change their minds), and according to Fred Brooks in his Mythical Man-Month, implicitly was the biggest technical reason the OS/360 project was such a disaster, not just in various sorts of direct costs, but also in producing sometime very hard to use, which they're living with today ... but not in very many new applications written for it.
Inside IBM there was a major, visible fight between the proponents of pure batch and time-sharing, and the former won, with the exception of the mid-range System/360-67. This went on to the point that the System/370 line was officially launched without virtual memory support, although it seems that for the System/370-145 someone snuck in the necessary raw hardware for a Translation Lookaside Buffer (TLB), that's a small cache of the last N translations from virtual memory to physical memory. Note AMD initial Barcelona CPU steppings had to turn that off, for a reported 25% performance hit.
And I have to wonder about the System/370 only officially starting to support virtual memory the year after Watson left the company due to health; if it was not his decision, it would seem likely it was someone he was supporting for whatever reason.
And of course by mostly losing the university time-sharing market IBM lost tremendous mind share, and while the market it boxed itself into was big and important, and needed its seriousness and reliability, it of course became a very small fraction of the total general computer market, and in disruptive technology style people eventually figured out how to make PC based technology as solid as mainframe technology, modulo for a long time with very heavy duty storage systems, the whole Storage Area Network (SAN), Fiber Channel thing. Some things like that happened before then with superminicomputers like the DEC VAX.
In fact, starting with the Stretch supercomputer, which ended up being about 1/2 the projected speed, maybe IBM started losing the plot when it came to architecture,
The decision to reduce all their computers above the 1401 series to one architecture was brilliant, as were many details that set the standards to come, like a 32 bit macro-architecture with 8 bit bytes, byte addressable ... but that also made doing anything with the System/360 more political than before, for such decisions touched on a vastly larger part of the company.
How much of this is 20/20 hindsight? Well, not listening to your customers, especially when one of them is MIT, is generally unwise.
And what MIT was asking for had perhaps been sufficient proven by the Manchester Atlas, officially commissioned in 1962, before the System/360 at this level was set in stone (virtual memory is something that's wrapped around the core of a processor, in those days and for some time it was frequently implemented by adding a box to a basic CPU between it and main memory, see e.g. the Multics "Appending Unit").
[ The following is more of an outline. ]
Wikipedia:
The PDP-6 was a mechanical/repair disaster, project started in 1963, looks like the first delivered was shipped to MIT in very late 1964 or very early 1965.
The PDP-10 KA10 looks like late 1967, and the (few) shipments of the balky PDP-6 meant a great deal of software would have been quickly available for the PDP-10. Its physical hardware architecture was also very amenable to adding virtual memory, whereas IBM's Solid Logic had traces on both external sides of the cards its modules were plugged into, plus posts for wire-wrapping. Not impossible, but much harder than the KA10, and I'm sure IBM was much less interested than DEC in supporting such modifications given their political stance against time-sharing and virtual memory at the time.
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