diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index 8cdeb072b..78f4ec49c 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -1761,8 +1761,11 @@ stimecmp_csr_t::stimecmp_csr_t(processor_t* const proc, const reg_t addr, const
 }
 
 bool stimecmp_csr_t::unlogged_write(const reg_t val) noexcept {
+  // When difftesting, ref should never generate any time interrupt.
+#ifndef DIFFTEST
   const reg_t mask = ((state->menvcfg->read() & MENVCFG_STCE) ? MIP_STIP : 0) | ((state->henvcfg->read() & HENVCFG_STCE) ? MIP_VSTIP : 0);
   state->mip->backdoor_write_with_mask(mask, state->time->read() >= val ? intr_mask : 0);
+#endif // DIFFTEST
   return basic_csr_t::unlogged_write(val);
 }