Preliminary lowering support for M68kISD::(S|U)MUL

[mshockwave]

In some cases, specifically when lowering select, we will lower to our own M68kISD::(U|S)MUL first before isel-ing to real instructions. In order to account for overflow bit usages. For instance:

entry:
  %1 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 8)
  %2 = extractvalue { i32, i1 } %1, 1
  %3 = select i1 %2, i32 0, i32 %0

However we never bothered (or forgot) to do the isel part 😛 . This patch add preliminary supports for such thing

Local commit: 278701a