From b365621a188ae37e1729e26947b9fbb0d3a0e976 Mon Sep 17 00:00:00 2001 From: Atul Dhudase Date: Tue, 14 Nov 2023 18:16:35 +0530 Subject: [PATCH] linux-yocto: add support for QCM6490 RB3 board Add necessary configuration and kernel patches to the linux-yocto recipe to enable support for Qualcomm QCM6490 RB3 board. This enables boot to shell on QCM6490 RB3 board with initramfs. Signed-off-by: Atul Dhudase --- conf/machine/include/qcom-common.inc | 2 +- conf/machine/qcom-armv8a.conf | 2 + ...ts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch | 387 ++++++++++++++ ...ings-arm-qcom-Add-QCM6490-Fairphone-.patch | 48 ++ ...dings-arm-qcom-Add-QCM6490-IDP-board.patch | 34 ++ ...-arm64-dts-qcom-Add-qcm6490-dts-file.patch | 483 ++++++++++++++++++ ...s-qcom-Add-board-id-and-msm-id-for-Q.patch | 37 ++ ...ts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch | 100 ++++ ...-qmp-ufs-Add-Phy-Configuration-suppo.patch | 193 +++++++ ...s-qcom-Remove-voltage-vote-support-f.patch | 47 ++ ...s-qcm6490-Remove-voltage-voting-for-.patch | 52 ++ ...s-qcom-qcm6490-disable-sdhc1-for-ufs.patch | 37 ++ ...arm64-dts-qcom-qcm6490-Add-UFS-nodes.patch | 50 ++ ...p-Add-proper-kref-handling-on-dma-bu.patch | 148 ++++++ ...p-Provide-accessors-so-that-in-kerne.patch | 183 +++++++ ...s-qcom-sc7280-Add-interconnect-paths.patch | 32 ++ ...dings-arm-qcom-Add-QCM6490-RB3-board.patch | 30 ++ ...m64-dts-qcom-Add-qcm6490-rb3-support.patch | 354 +++++++++++++ ...s-qcom-Add-board-id-and-msm-id-for-q.patch | 35 ++ ...s-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch | 50 ++ ...s-qcom-Remove-voltage-vote-support-f.patch | 46 ++ ...s-qcm6490-rb3-Remove-voltage-voting-.patch | 58 +++ ...-gcc-Enable-the-force-mem-core-for-U.patch | 211 ++++++++ ...s-qcm6490-Update-the-protected-clock.patch | 80 +++ ...-lpassaudiocc-Add-support-to-skip-PL.patch | 60 +++ ...ngs-clock-Add-qcom-adsp-skip-pll-pro.patch | 36 ++ ...ngs-pinctrl-qcom-sc7280-pinctrl-add-.patch | 34 ++ ...s-qcom-qcm6490-Add-gpio-reserved-ran.patch | 33 ++ .../bsp/qcom-armv8a/qcom-armv8a.scc | 1 + .../bsp/qcom-armv8a/qcom-qcm6490.cfg | 19 + .../bsp/qcom-armv8a/qcom-qcm6490.scc | 4 + recipes-kernel/linux/linux-yocto_6.5.bbappend | 26 + 32 files changed, 2911 insertions(+), 1 deletion(-) create mode 100644 recipes-kernel/linux/linux-yocto/0001-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch create mode 100644 recipes-kernel/linux/linux-yocto/0002-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch create mode 100644 recipes-kernel/linux/linux-yocto/0003-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch create mode 100644 recipes-kernel/linux/linux-yocto/0004-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch create mode 100644 recipes-kernel/linux/linux-yocto/0005-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch create mode 100644 recipes-kernel/linux/linux-yocto/0006-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch create mode 100644 recipes-kernel/linux/linux-yocto/0007-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch create mode 100644 recipes-kernel/linux/linux-yocto/0008-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch create mode 100644 recipes-kernel/linux/linux-yocto/0009-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch create mode 100644 recipes-kernel/linux/linux-yocto/0010-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch create mode 100644 recipes-kernel/linux/linux-yocto/0011-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes.patch create mode 100644 recipes-kernel/linux/linux-yocto/0012-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch create mode 100644 recipes-kernel/linux/linux-yocto/0013-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch create mode 100644 recipes-kernel/linux/linux-yocto/0014-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch create mode 100644 recipes-kernel/linux/linux-yocto/0015-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch create mode 100644 recipes-kernel/linux/linux-yocto/0016-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch create mode 100644 recipes-kernel/linux/linux-yocto/0017-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch create mode 100644 recipes-kernel/linux/linux-yocto/0018-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch create mode 100644 recipes-kernel/linux/linux-yocto/0019-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch create mode 100644 recipes-kernel/linux/linux-yocto/0020-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch create mode 100644 recipes-kernel/linux/linux-yocto/0021-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch create mode 100644 recipes-kernel/linux/linux-yocto/0022-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch create mode 100644 recipes-kernel/linux/linux-yocto/0023-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch create mode 100644 recipes-kernel/linux/linux-yocto/0024-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch create mode 100644 recipes-kernel/linux/linux-yocto/0025-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch create mode 100644 recipes-kernel/linux/linux-yocto/0026-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch create mode 100644 recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg create mode 100644 recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc diff --git a/conf/machine/include/qcom-common.inc b/conf/machine/include/qcom-common.inc index 14613532f..88d1353aa 100644 --- a/conf/machine/include/qcom-common.inc +++ b/conf/machine/include/qcom-common.inc @@ -18,7 +18,7 @@ PREFERRED_PROVIDER_virtual/libgl ?= "mesa" PREFERRED_PROVIDER_virtual/libgles1 ?= "mesa" PREFERRED_PROVIDER_virtual/libgles2 ?= "mesa" PREFERRED_PROVIDER_virtual/xserver ?= "xserver-xorg" -PREFERRED_PROVIDER_virtual/kernel ?= "linux-linaro-qcomlt" +PREFERRED_PROVIDER_virtual/kernel ?= "linux-yocto" PREFERRED_PROVIDER_android-tools-conf = "android-tools-conf-configfs" diff --git a/conf/machine/qcom-armv8a.conf b/conf/machine/qcom-armv8a.conf index 326dcc4b2..df7c553b9 100644 --- a/conf/machine/qcom-armv8a.conf +++ b/conf/machine/qcom-armv8a.conf @@ -18,6 +18,7 @@ KERNEL_DEVICETREE ?= " \ qcom/qrb4210-rb2.dtb \ qcom/qrb5165-rb5.dtb \ qcom/sm8450-hdk.dtb \ + qcom/qcm6490-rb3.dtb \ " QCOM_BOOTIMG_PAGE_SIZE[apq8016-sbc] ?= "2048" @@ -29,6 +30,7 @@ QCOM_BOOTIMG_ROOTFS[qrb2210-rb1] ?= "PARTLABEL=userdata" QCOM_BOOTIMG_ROOTFS[qrb4210-rb2] ?= "PARTLABEL=userdata" SD_QCOM_BOOTIMG_ROOTFS[apq8016-sbc] ?= "/dev/mmcblk1p7" KERNEL_CMDLINE_EXTRA[sdm845-db845c] ?= "clk_ignore_unused pd_ignore_unused" +KERNEL_CMDLINE_EXTRA[qcm6490-rb3] ?= "pcie_pme=nomsi earlycon" # Userspace tools MACHINE_ESSENTIAL_EXTRA_RRECOMMENDS += " \ diff --git a/recipes-kernel/linux/linux-yocto/0001-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch b/recipes-kernel/linux/linux-yocto/0001-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch new file mode 100644 index 000000000..67e0d063a --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0001-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch @@ -0,0 +1,387 @@ +From f401b67ba892963d08ae0a51a46e47df55d5c011 Mon Sep 17 00:00:00 2001 +From: Luca Weiss +Date: Thu, 5 Oct 2023 16:47:31 +0530 +Subject: [PATCH 01/27] FROMLIST: arm64: dts: qcom: Use QCOM_SCM_VMID defines + for qcom,vmid + +Since we have those defines available in a header, let's use them +everywhere where qcom,vmid property is used. + +Change-Id: I87b39d69a48b40b068fede86ceb51fe8c057c85b +Signed-off-by: Luca Weiss +Reviewed-by: Bryan O'Donoghue +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/linux-arm-msm/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com/ +Patch-mainline: linux-arm-kernel @ 08/18/23, 10:06 +Signed-off-by: Komal Bajaj +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20230818-qcom-vmid-defines-v1-1-45b610c96b13@fairphone.com/] +--- + arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/msm8998.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts | 3 ++- + arch/arm64/boot/dts/qcom/sc8180x-primus.dts | 3 ++- + arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts | 2 +- + arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 3 ++- + arch/arm64/boot/dts/qcom/sm8150.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sm8350.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi | 2 +- + arch/arm64/boot/dts/qcom/sm8450.dtsi | 3 ++- + arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 ++- + 19 files changed, 31 insertions(+), 19 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +index 3c5719640fab..1a55f84bbb90 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +@@ -115,7 +115,7 @@ rmtfs@f6c00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + /delete-node/ mba@91500000; +diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi +index 2ea3117438c3..9478ce84d1c5 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -431,7 +432,7 @@ rmtfs_mem: rmtfs { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + mpss_mem: mpss@88800000 { +diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi +index ed764d02819f..f3e1dc5f67e3 100644 +--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi +@@ -6,6 +6,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -56,7 +57,7 @@ rmtfs_mem: memory@88f00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + spss_mem: memory@8ab00000 { +diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi +index 06df931d8cad..63b6300844a9 100644 +--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -620,7 +621,7 @@ rmtfs_mem: memory@94600000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 925428a5f6ae..042908048d09 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -156,7 +157,7 @@ rmtfs_mem: memory@9c900000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts +index fe3b366e1435..3f459d685f26 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts ++++ b/arch/arm64/boot/dts/qcom/sc8180x-lenovo-flex-5g.dts +@@ -6,6 +6,7 @@ + + /dts-v1/; + ++#include + #include + #include + #include +@@ -52,7 +53,7 @@ rmtfs_mem: rmtfs-region@85500000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + wlan_mem: wlan-region@8bc00000 { +diff --git a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts +index fc038474cb71..8e06df27a344 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x-primus.dts ++++ b/arch/arm64/boot/dts/qcom/sc8180x-primus.dts +@@ -6,6 +6,7 @@ + + /dts-v1/; + ++#include + #include + #include + #include +@@ -57,7 +58,7 @@ rmtfs_mem: rmtfs-region@85500000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + wlan_mem: wlan-region@8bc00000 { +diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi +index 759b3a5964cc..691cddd02897 100644 +--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -385,7 +386,7 @@ rmtfs_mem: memory@85e00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + smem_region: smem-mem@86000000 { +diff --git a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +index f942c5afea9b..99dafc6716e7 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845-lg-common.dtsi +@@ -111,7 +111,7 @@ rmtfs_mem: memory@f0801000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + /* rmtfs upper guard */ +diff --git a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +index 122c7128dea9..b523b5fff702 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +@@ -90,7 +90,7 @@ rmtfs_mem: rmtfs-mem@f5b01000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + rmtfs_upper_guard: rmtfs-upper-guard@f5d01000 { + no-map; +diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +index 9d6faeb65624..93b1582e807d 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +@@ -111,7 +111,7 @@ rmtfs_mem: memory@f6301000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +index 6db12abaa88d..e386b504e978 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts ++++ b/arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +@@ -108,7 +108,7 @@ rmtfs_mem: memory@f6301000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi +index 89520a9fe1e3..862d1cf6c63c 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi +@@ -813,7 +813,7 @@ rmtfs_mem: rmtfs@88f00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + qseecom_mem: qseecom@8ab00000 { +diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +index e3dc49951523..45951810fa82 100644 +--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts ++++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +@@ -8,6 +8,7 @@ + /* PMK8350 (in reality a PMK8003) is configured to use SID6 instead of 0 */ + #define PMK8350_SID 6 + ++#include + #include + #include + #include +@@ -75,7 +76,7 @@ memory@efe01000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi +index 06c53000bb74..ef072f0413d4 100644 +--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi +@@ -5,6 +5,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -720,7 +721,7 @@ rmtfs_mem: memory@89b00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + camera_mem: memory@8b700000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi +index c236967725c1..ff92901f587e 100644 +--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -492,7 +493,7 @@ rmtfs_mem: memory@9b800000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + hyp_reserved_mem: memory@d0000000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi +index 001fb2723fbb..8b29fcf483a3 100644 +--- a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara.dtsi +@@ -80,7 +80,7 @@ rmtfs_mem: memory@f3300000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + ramoops@ffc00000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi +index 42b23ba7a573..e1b768d6ad3b 100644 +--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -538,7 +539,7 @@ rmtfs_mem: memory@9fd00000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + xbl_sc_mem2: memory@a6e00000 { +diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi +index 6e8aba256931..681abf91e8a7 100644 +--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -569,7 +570,7 @@ rmtfs_mem: rmtfs-region@d4a80000 { + no-map; + + qcom,client-id = <1>; +- qcom,vmid = <15>; ++ qcom,vmid = ; + }; + + mpss_dsm_mem: mpss-dsm-region@d4d00000 { +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0002-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch b/recipes-kernel/linux/linux-yocto/0002-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch new file mode 100644 index 000000000..56beb3168 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0002-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch @@ -0,0 +1,48 @@ +From 4b158792041876feffe6138b402f7b7b81ea8ee6 Mon Sep 17 00:00:00 2001 +From: Luca Weiss +Date: Tue, 19 Sep 2023 14:46:00 +0200 +Subject: [PATCH 02/27] FROMLIST: dt-bindings: arm: qcom: Add QCM6490 Fairphone + 5 + +Fairphone 5 is a smartphone based on the QCM6490 SoC. + +Change-Id: I729b1f72557f940283a6302e76b02afe74b929e5 +Signed-off-by: Luca Weiss +Reviewed-by: Krzysztof Kozlowski +Link: https://lore.kernel.org/linux-arm-msm/20230919-fp5-initial-v2-6-14bb7cedadf5@fairphone.com/ +Patch-mainline: linux-arm-kernel @ 09/19/23, 14:46 +Signed-off-by: Komal Bajaj +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20230919-fp5-initial-v2-6-14bb7cedadf5@fairphone.com/] +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index 450f616774e0..5d2cbddb6ab8 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -49,6 +49,7 @@ description: | + msm8998 + qcs404 + qcm2290 ++ qcm6490 + qdu1000 + qrb2210 + qrb4210 +@@ -382,6 +383,11 @@ properties: + - const: qcom,qrb2210 + - const: qcom,qcm2290 + ++ - items: ++ - enum: ++ - fairphone,fp5 ++ - const: qcom,qcm6490 ++ + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform + items: + - enum: +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0003-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch b/recipes-kernel/linux/linux-yocto/0003-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch new file mode 100644 index 000000000..6e48ba9b1 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0003-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch @@ -0,0 +1,34 @@ +From 29d56533dfec317a4c0895e14555ed8de8c0ae86 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj +Date: Wed, 27 Sep 2023 10:53:52 +0530 +Subject: [PATCH 03/27] FROMLIST: dt-bindings: arm: qcom: Add QCM6490 IDP board + +Document the qcom,qcm6490-idp board based off qcm6490 SoC. + +Change-Id: I9e7340f21f19cb181be95775b9a9dd0d1c064270 +Signed-off-by: Komal Bajaj +Reviewed-by: Krzysztof Kozlowski +Link: https://lore.kernel.org/linux-arm-msm/20231003175456.14774-2-quic_kbajaj@quicinc.com/ +Signed-off-by: Komal Bajaj +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20231003175456.14774-2-quic_kbajaj@quicinc.com/] +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index 5d2cbddb6ab8..fcc301d8c4b5 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -386,6 +386,7 @@ properties: + - items: + - enum: + - fairphone,fp5 ++ - qcom,qcm6490-idp + - const: qcom,qcm6490 + + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0004-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch b/recipes-kernel/linux/linux-yocto/0004-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch new file mode 100644 index 000000000..8be8f7885 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0004-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch @@ -0,0 +1,483 @@ +From e9269b9776bb80447448c35773bd0b961681e5a1 Mon Sep 17 00:00:00 2001 +From: Komal Bajaj +Date: Thu, 5 Oct 2023 18:37:05 +0530 +Subject: [PATCH 04/27] FROMLIST: arm64: dts: qcom: Add qcm6490 dts file + +Add qcm6490 devicetree file for QCM6490 SoC and QCM6490 IDP +platform. QCM6490 is derived from SC7280 meant for various +form factor including IoT. + +Supported features are, as of now: +* Debug UART +* eMMC +* USB + +Change-Id: I997308fccfab682ada28e1c19c6110a9616e1d20 +Signed-off-by: Komal Bajaj +Link: https://lore.kernel.org/linux-arm-msm/20231003175456.14774-3-quic_kbajaj@quicinc.com/ +Signed-off-by: Komal Bajaj +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/linux-arm-msm/20231003175456.14774-3-quic_kbajaj@quicinc.com/] +--- + arch/arm64/boot/dts/qcom/Makefile | 1 + + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 333 +++++++++++++++++++++++ + arch/arm64/boot/dts/qcom/qcm6490.dtsi | 94 +++++++ + 3 files changed, 428 insertions(+) + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490-idp.dts + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490.dtsi + +diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile +index 337abc4ceb17..f597224e3dcb 100644 +--- a/arch/arm64/boot/dts/qcom/Makefile ++++ b/arch/arm64/boot/dts/qcom/Makefile +@@ -78,6 +78,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-lilac.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb ++dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +new file mode 100644 +index 000000000000..9b1bf7d1c98d +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -0,0 +1,333 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include "qcm6490.dtsi" ++#include "pm7325.dtsi" ++#include "pm8350c.dtsi" ++#include "pmk8350.dtsi" ++ ++/ { ++ model = "Qualcomm Technologies, Inc. QCM6490 IDP"; ++ compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; ++ ++ aliases { ++ serial0 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++}; ++ ++&apps_rsc { ++ regulators-0 { ++ compatible = "qcom,pm7325-rpmh-regulators"; ++ qcom,pmic-id = "b"; ++ ++ vreg_s1b_1p8: smps1 { ++ regulator-min-microvolt = <1856000>; ++ regulator-max-microvolt = <2040000>; ++ }; ++ ++ vreg_s7b_0p9: smps7 { ++ regulator-min-microvolt = <535000>; ++ regulator-max-microvolt = <1120000>; ++ }; ++ ++ vreg_s8b_1p2: smps8 { ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l1b_0p8: ldo1 { ++ regulator-min-microvolt = <825000>; ++ regulator-max-microvolt = <925000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l2b_3p0: ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l6b_1p2: ldo6 { ++ regulator-min-microvolt = <1140000>; ++ regulator-max-microvolt = <1260000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l7b_2p9: ldo7 { ++ regulator-min-microvolt = <2960000>; ++ regulator-max-microvolt = <2960000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l8b_0p9: ldo8 { ++ regulator-min-microvolt = <870000>; ++ regulator-max-microvolt = <970000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l9b_1p2: ldo9 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l11b_1p7: ldo11 { ++ regulator-min-microvolt = <1504000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l12b_0p8: ldo12 { ++ regulator-min-microvolt = <751000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l13b_0p8: ldo13 { ++ regulator-min-microvolt = <530000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l14b_1p2: ldo14 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l15b_0p8: ldo15 { ++ regulator-min-microvolt = <765000>; ++ regulator-max-microvolt = <1020000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l16b_1p2: ldo16 { ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l17b_1p8: ldo17 { ++ regulator-min-microvolt = <1700000>; ++ regulator-max-microvolt = <1900000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l18b_1p8: ldo18 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l19b_1p8: ldo19 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-initial-mode = ; ++ }; ++ }; ++ ++ regulators-1 { ++ compatible = "qcom,pm8350c-rpmh-regulators"; ++ qcom,pmic-id = "c"; ++ ++ vreg_s1c_2p2: smps1 { ++ regulator-min-microvolt = <2190000>; ++ regulator-max-microvolt = <2210000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_s9c_1p0: smps9 { ++ regulator-min-microvolt = <1010000>; ++ regulator-max-microvolt = <1170000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l1c_1p8: ldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l2c_1p8: ldo2 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l3c_3p0: ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3540000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l4c_1p8: ldo4 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l5c_1p8: ldo5 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l6c_2p9: ldo6 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2950000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l7c_3p0: ldo7 { ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l8c_1p8: ldo8 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l9c_2p9: ldo9 { ++ regulator-min-microvolt = <2960000>; ++ regulator-max-microvolt = <2960000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l10c_0p8: ldo10 { ++ regulator-min-microvolt = <720000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l11c_2p8: ldo11 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l12c_1p8: ldo12 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l13c_3p0: ldo13 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_bob: bob { ++ regulator-min-microvolt = <3008000>; ++ regulator-max-microvolt = <3960000>; ++ }; ++ }; ++}; ++ ++&gpi_dma0 { ++ status = "okay"; ++}; ++ ++&gpi_dma1 { ++ status = "okay"; ++}; ++ ++&pm8350c_pwm { ++ status = "okay"; ++}; ++ ++&qup_uart5_rx { ++ drive-strength = <2>; ++ bias-pull-up; ++}; ++ ++&qup_uart5_tx { ++ drive-strength = <2>; ++ bias-disable; ++}; ++ ++&qupv3_id_0 { ++ status = "okay"; ++}; ++ ++&qupv3_id_1 { ++ status = "okay"; ++}; ++ ++&sdc1_clk { ++ bias-disable; ++ drive-strength = <16>; ++}; ++ ++&sdc1_cmd { ++ bias-pull-up; ++ drive-strength = <10>; ++}; ++ ++&sdc1_data { ++ bias-pull-up; ++ drive-strength = <10>; ++}; ++ ++&sdc1_rclk { ++ bias-pull-down; ++}; ++ ++&sdhc_1 { ++ non-removable; ++ no-sd; ++ no-sdio; ++ ++ vmmc-supply = <&vreg_l7b_2p9>; ++ vqmmc-supply = <&vreg_l19b_1p8>; ++ ++ status = "okay"; ++}; ++ ++&uart5 { ++ compatible = "qcom,geni-debug-uart"; ++ status = "okay"; ++}; ++ ++&usb_1 { ++ status = "okay"; ++}; ++ ++&usb_1_dwc3 { ++ dr_mode = "peripheral"; ++}; ++ ++&usb_1_hsphy { ++ vdda-pll-supply = <&vreg_l10c_0p8>; ++ vdda33-supply = <&vreg_l2b_3p0>; ++ vdda18-supply = <&vreg_l1c_1p8>; ++ qcom,hs-rise-fall-time-bp = <0>; ++ qcom,squelch-detector-bp = <(-2090)>; ++ qcom,hs-disconnect-bp = <1743>; ++ qcom,hs-amplitude-bp = <1780>; ++ qcom,hs-crossover-voltage-microvolt = <(-31000)>; ++ qcom,hs-output-impedance-micro-ohms = <2600000>; ++ ++ status = "okay"; ++}; ++ ++&usb_1_qmpphy { ++ vdda-phy-supply = <&vreg_l6b_1p2>; ++ vdda-pll-supply = <&vreg_l1b_0p8>; ++ ++ status = "okay"; ++}; +diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +new file mode 100644 +index 000000000000..b93270cae9ae +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +@@ -0,0 +1,94 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++#include "sc7280.dtsi" ++ ++/* ++ * Delete unused sc7280 memory nodes and define the memory regions ++ * required by qcm6490 ++ */ ++/delete-node/ &rmtfs_mem; ++/delete-node/ &wlan_ce_mem; ++ ++/{ ++ reserved-memory { ++ cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { ++ reg = <0x0 0x81800000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ camera_mem: camera@84300000 { ++ reg = <0x0 0x84300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ wpss_mem: wpss@0x84800000 { ++ reg = <0x0 0x84800000 0x0 0x1900000>; ++ no-map; ++ }; ++ ++ adsp_mem: adsp@86100000 { ++ reg = <0x0 0x86100000 0x0 0x2800000>; ++ no-map; ++ }; ++ ++ cdsp_mem: cdsp@88900000 { ++ reg = <0x0 0x88900000 0x0 0x1e00000>; ++ no-map; ++ }; ++ ++ cvp_mem: cvp@8ac00000 { ++ reg = <0x0 0x8ac00000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ ipa_gsi_mem: ipa-gsi@8b110000 { ++ reg = <0x0 0x8b110000 0x0 0xa000>; ++ no-map; ++ }; ++ ++ gpu_microcode_mem: gpu-microcode@8b11a000 { ++ reg = <0x0 0x8b11a000 0x0 0x2000>; ++ no-map; ++ }; ++ ++ mpss_mem: mpss@8b800000 { ++ reg = <0x0 0x8b800000 0x0 0xf600000>; ++ no-map; ++ }; ++ ++ tz_stat_mem: tz-stat@c0000000 { ++ reg = <0x0 0xc0000000 0x0 0x100000>; ++ no-map; ++ }; ++ ++ tags_mem: tags@c0100000 { ++ reg = <0x0 0xc0100000 0x0 0x1200000>; ++ no-map; ++ }; ++ ++ qtee_mem: qtee@c1300000 { ++ reg = <0x0 0xc1300000 0x0 0x500000>; ++ no-map; ++ }; ++ ++ trusted_apps_mem: trusted_apps@c1800000 { ++ reg = <0x0 0xc1800000 0x0 0x3900000>; ++ no-map; ++ }; ++ }; ++}; ++ ++&video_mem { ++ reg = <0x0 0x8a700000 0x0 0x500000>; ++}; ++ ++&wifi { ++ memory-region = <&wlan_fw_mem>; ++}; ++ ++&xbl_mem { ++ reg = <0x0 0x80700000 0x0 0x100000>; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0005-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch b/recipes-kernel/linux/linux-yocto/0005-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch new file mode 100644 index 000000000..6b00899ad --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0005-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch @@ -0,0 +1,37 @@ +From 3a87568927cf622376207b6786ae7db465e0aacf Mon Sep 17 00:00:00 2001 +From: Komal Bajaj +Date: Wed, 11 Oct 2023 12:11:35 +0530 +Subject: [PATCH 05/27] QCLINUX: arm64: dts: qcom: Add board-id and msm-id for + QCM6490 + +Add board-id and msm-id for QCM6490-idp for now. This is only a +workaround, that shall be replaced by the compatible string +check approach to pick the correct DTB. + +Change-Id: If7b1590b9ea41d607752b59db1f49bbb0b204d7b +Signed-off-by: Komal Bajaj +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 9b1bf7d1c98d..02643bd5b78d 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -16,6 +16,10 @@ / { + model = "Qualcomm Technologies, Inc. QCM6490 IDP"; + compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; + ++ /* This will be deprecated soon */ ++ qcom,msm-id = <497 0x10000>, <498 0x10000>, <475 0x10000>, <515 0x10000>; ++ qcom,board-id = <34 0>, <34 1>; ++ + aliases { + serial0 = &uart5; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0006-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch b/recipes-kernel/linux/linux-yocto/0006-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch new file mode 100644 index 000000000..1a8c10973 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0006-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch @@ -0,0 +1,100 @@ +From 1359cd9003b81180c7f9860274a092e11ef78083 Mon Sep 17 00:00:00 2001 +From: Nitin Rawat +Date: Fri, 29 Sep 2023 18:49:34 +0530 +Subject: [PATCH 06/27] FROMLIST: arm64: dts: qcom: sc7280: Add UFS nodes for + sc7280 soc + +Add UFS host controller and PHY nodes for sc7280 soc. + +Signed-off-by: Nitin Rawat +Link: https://lore.kernel.org/all/20230929131936.29421-3-quic_nitirawa@quicinc.com/ + +Change-Id: I66426054b4409a84822d7c845331e79bdfe14cd0 +Signed-off-by: Manish Pandey +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/all/20230929131936.29421-3-quic_nitirawa@quicinc.com/] +--- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 66 ++++++++++++++++++++++++++++ + 1 file changed, 66 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 042908048d09..19705df517dd 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -3321,6 +3321,72 @@ opp-202000000 { + }; + }; + ++ ufs_mem_hc: ufs@1d84000 { ++ compatible = "qcom,sc7280-ufshc", "qcom,ufshc", ++ "jedec,ufs-2.0"; ++ reg = <0x0 0x01d84000 0x0 0x3000>; ++ interrupts = ; ++ phys = <&ufs_mem_phy>; ++ phy-names = "ufsphy"; ++ lanes-per-direction = <2>; ++ #reset-cells = <1>; ++ resets = <&gcc GCC_UFS_PHY_BCR>; ++ reset-names = "rst"; ++ ++ power-domains = <&gcc GCC_UFS_PHY_GDSC>; ++ required-opps = <&rpmhpd_opp_nom>; ++ ++ iommus = <&apps_smmu 0x80 0x0>; ++ dma-coherent; ++ ++ interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, ++ <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_UFS_MEM_CFG 0>; ++ ++ clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, ++ <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, ++ <&gcc GCC_UFS_PHY_AHB_CLK>, ++ <&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, ++ <&rpmhcc RPMH_CXO_CLK>, ++ <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, ++ <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, ++ <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; ++ clock-names = "core_clk", ++ "bus_aggr_clk", ++ "iface_clk", ++ "core_clk_unipro", ++ "ref_clk", ++ "tx_lane0_sync_clk", ++ "rx_lane0_sync_clk", ++ "rx_lane1_sync_clk"; ++ freq-table-hz = ++ <75000000 300000000>, ++ <0 0>, ++ <0 0>, ++ <75000000 300000000>, ++ <0 0>, ++ <0 0>, ++ <0 0>, ++ <0 0>; ++ status = "disabled"; ++ }; ++ ++ ufs_mem_phy: phy@1d87000 { ++ compatible = "qcom,sc7280-qmp-ufs-phy"; ++ reg = <0x0 0x01d87000 0x0 0xe00>; ++ clocks = <&rpmhcc RPMH_CXO_CLK>, ++ <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, ++ <&gcc GCC_UFS_1_CLKREF_EN>; ++ clock-names = "ref", "ref_aux", "qref"; ++ ++ resets = <&ufs_mem_hc 0>; ++ reset-names = "ufsphy"; ++ ++ #clock-cells = <1>; ++ #phy-cells = <0>; ++ ++ status = "disabled"; ++ }; ++ + usb_1_hsphy: phy@88e3000 { + compatible = "qcom,sc7280-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0007-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch b/recipes-kernel/linux/linux-yocto/0007-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch new file mode 100644 index 000000000..8ecb8c3d0 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0007-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch @@ -0,0 +1,193 @@ +From c5330b51114a2191385104b4c64927434bd6a749 Mon Sep 17 00:00:00 2001 +From: Nitin Rawat +Date: Tue, 19 Sep 2023 02:20:37 +0530 +Subject: [PATCH 07/27] FROMGIT: phy: qcom-qmp-ufs: Add Phy Configuration + support for SC7280 + +Add SC7280 specific register layout and table configs. + +Co-developed-by: Manish Pandey +Signed-off-by: Manish Pandey +Signed-off-by: Nitin Rawat +Git-commit: 8abe9792d1ff7e60f911b56e8a2537be7e903576 +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git . + +Change-Id: I72ba081502ec5e8e47d16cc45e70d265cc31c9a4 +Signed-off-by: Manish Pandey +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Backport [https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git 8abe9792d1ff7e60f911b56e8a2537be7e903576] +--- + drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 142 ++++++++++++++++++++++++ + 1 file changed, 142 insertions(+) + +diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +index 8c877b668bb9..0aca2abd77d3 100644 +--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c ++++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c +@@ -178,6 +178,111 @@ static const struct qmp_phy_init_tbl msm8996_ufsphy_rx[] = { + QMP_PHY_INIT_CFG(QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0E), + }; + ++static const struct qmp_phy_init_tbl sc7280_ufsphy_tx[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_1_DIVIDER_BAND0_1, 0x06), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_2_DIVIDER_BAND0_1, 0x03), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_3_DIVIDER_BAND0_1, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_PWM_GEAR_4_DIVIDER_BAND0_1, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_LANE_MODE_1, 0x35), ++ QMP_PHY_INIT_CFG(QSERDES_V4_TX_TRAN_DRVR_EMP_EN, 0x0c), ++}; ++ ++static const struct qmp_phy_init_tbl sc7280_ufsphy_rx[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_LVL, 0x24), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_CNTRL, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_BAND, 0x18), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN, 0x0a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CONTROLS, 0xf1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CTRL2, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FO_GAIN, 0x0e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_GAIN, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_TERM_BW, 0x1b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2, 0x06), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4, 0x1d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_MEASURE_TIME, 0x10), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW, 0xc0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_LOW, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH2, 0xed), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH4, 0x3c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_LOW, 0xe0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH2, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH4, 0xb1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_LOW, 0xe0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH2, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH4, 0xb1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_DCC_CTRL1, 0x0c), ++}; ++ ++static const struct qmp_phy_init_tbl sc7280_ufsphy_pcs[] = { ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_RX_SIGDET_CTRL2, 0x6d), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_LARGE_AMP_DRV_LVL, 0x0a), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_SMALL_AMP_DRV_LVL, 0x02), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_MID_TERM_CTRL1, 0x43), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_DEBUG_BUS_CLKSEL, 0x1f), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_RX_MIN_HIBERN8_TIME, 0xff), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_MULTI_LANE_CTRL1, 0x02), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_PLL_CNTL, 0x03), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_MSB, 0x16), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TIMER_20US_CORECLK_STEPS_LSB, 0xd8), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_PWM_GEAR_BAND, 0xaa), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_HS_GEAR_BAND, 0x06), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_TX_HSGEAR_CAPABILITY, 0x03), ++ QMP_PHY_INIT_CFG(QPHY_V4_PCS_UFS_RX_HSGEAR_CAPABILITY, 0x03), ++}; ++ ++static const struct qmp_phy_init_tbl sc7280_ufsphy_hs_g4_rx[] = { ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_LVL, 0x24), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_CNTRL, 0x0f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL, 0x1e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_BAND, 0x18), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN, 0x0a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x5a), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CONTROLS, 0xf1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CTRL2, 0x81), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FO_GAIN, 0x0e), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_GAIN, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_TERM_BW, 0x6f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL1, 0x04), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3, 0x09), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4, 0x07), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x17), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_MEASURE_TIME, 0x20), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW, 0x80), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH, 0x01), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_LOW, 0x3f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH, 0xff), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH2, 0xff), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH3, 0x7f), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_00_HIGH4, 0x2c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_LOW, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH, 0x6d), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH2, 0xed), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH4, 0x3c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_LOW, 0xe0), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH2, 0xc8), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH3, 0x3b), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_10_HIGH4, 0xb1), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_DCC_CTRL1, 0x0c), ++ QMP_PHY_INIT_CFG(QSERDES_V4_RX_GM_CAL, 0x0f), ++}; ++ + static const struct qmp_phy_init_tbl sm6115_ufsphy_serdes[] = { + QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x0e), + QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0x14), +@@ -887,6 +992,40 @@ static const struct qmp_phy_cfg sa8775p_ufsphy_cfg = { + .regs = ufsphy_v5_regs_layout, + }; + ++static const struct qmp_phy_cfg sc7280_ufsphy_cfg = { ++ .lanes = 2, ++ ++ .offsets = &qmp_ufs_offsets, ++ ++ .tbls = { ++ .serdes = sm8150_ufsphy_serdes, ++ .serdes_num = ARRAY_SIZE(sm8150_ufsphy_serdes), ++ .tx = sc7280_ufsphy_tx, ++ .tx_num = ARRAY_SIZE(sc7280_ufsphy_tx), ++ .rx = sc7280_ufsphy_rx, ++ .rx_num = ARRAY_SIZE(sc7280_ufsphy_rx), ++ .pcs = sc7280_ufsphy_pcs, ++ .pcs_num = ARRAY_SIZE(sc7280_ufsphy_pcs), ++ }, ++ .tbls_hs_b = { ++ .serdes = sm8150_ufsphy_hs_b_serdes, ++ .serdes_num = ARRAY_SIZE(sm8150_ufsphy_hs_b_serdes), ++ }, ++ .tbls_hs_g4 = { ++ .tx = sm8250_ufsphy_hs_g4_tx, ++ .tx_num = ARRAY_SIZE(sm8250_ufsphy_hs_g4_tx), ++ .rx = sc7280_ufsphy_hs_g4_rx, ++ .rx_num = ARRAY_SIZE(sc7280_ufsphy_hs_g4_rx), ++ .pcs = sm8150_ufsphy_hs_g4_pcs, ++ .pcs_num = ARRAY_SIZE(sm8150_ufsphy_hs_g4_pcs), ++ }, ++ .clk_list = sm8450_ufs_phy_clk_l, ++ .num_clks = ARRAY_SIZE(sm8450_ufs_phy_clk_l), ++ .vreg_list = qmp_phy_vreg_l, ++ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), ++ .regs = ufsphy_v4_regs_layout, ++}; ++ + static const struct qmp_phy_cfg sc8280xp_ufsphy_cfg = { + .lanes = 2, + +@@ -1637,6 +1776,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = { + }, { + .compatible = "qcom,sa8775p-qmp-ufs-phy", + .data = &sa8775p_ufsphy_cfg, ++ }, { ++ .compatible = "qcom,sc7280-qmp-ufs-phy", ++ .data = &sc7280_ufsphy_cfg, + }, { + .compatible = "qcom,sc8180x-qmp-ufs-phy", + .data = &sm8150_ufsphy_cfg, +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0008-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch b/recipes-kernel/linux/linux-yocto/0008-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch new file mode 100644 index 000000000..34fbcd7f1 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0008-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch @@ -0,0 +1,47 @@ +From cc9925b50a2ae2abaec93736cbc09f709374d77a Mon Sep 17 00:00:00 2001 +From: Umang Chheda +Date: Wed, 11 Oct 2023 20:32:47 +0530 +Subject: [PATCH 08/27] PENDING: arm64: dts: qcom: Remove voltage vote support + for UFS + +UFS rails have different voltage requirement for UFS2.x v/s UFS3.x. +Bootloader sets the proper voltage based on UFS type. There can be +case where the voltage set by bootloader is overridden by HLOS client. + +To prevent above issue, Add change to remove voltage voting support +for UFS rails. + +Change-Id: I599b30d8257023f72c603b252163bb6588c17d1a +Signed-off-by: Umang Chheda +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 02643bd5b78d..5c3be34cb42b 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -335,3 +335,17 @@ &usb_1_qmpphy { + + status = "okay"; + }; ++ ++&vreg_l7b_2p9 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; ++ ++&vreg_l9b_1p2 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0009-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch b/recipes-kernel/linux/linux-yocto/0009-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch new file mode 100644 index 000000000..e39cfe1cd --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0009-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch @@ -0,0 +1,52 @@ +From 3834bdb78bdc39f3c4f4d590c5287ff73e3114f3 Mon Sep 17 00:00:00 2001 +From: Umang Chheda +Date: Wed, 11 Oct 2023 20:57:16 +0530 +Subject: [PATCH 09/27] PENDING: arm64: dts: qcm6490: Remove voltage voting for + USB rails + +USB driver does not vote for voltage on hsphy and ssphy +rails. Due to which the initial voltage set by bootloader +is overridden by regulator framework with min voltage specified +on regulator registration. + +Fix this temporarily by removing voltage voting support, which +will prevent regulator framework overriding the voltage set by +bootloader. + +This commit will be reverted once voltage voting support is added +in USB driver. + +Change-Id: I7123a3c0b7b6513974fc44a751f91c251b7d34c1 +Signed-off-by: Umang Chheda +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 5c3be34cb42b..65bf5a99b5dc 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -349,3 +349,17 @@ &vreg_l9b_1p2 { + regulator-allow-set-load; + regulator-allowed-modes = ; + }; ++ ++&vreg_l1b_0p8 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; ++ ++&vreg_l10c_0p8 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0010-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch b/recipes-kernel/linux/linux-yocto/0010-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch new file mode 100644 index 000000000..2af157428 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0010-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch @@ -0,0 +1,37 @@ +From f9445bc778fb1ff800933ac7043df6da61c97792 Mon Sep 17 00:00:00 2001 +From: Manish Pandey +Date: Fri, 13 Oct 2023 19:38:59 +0530 +Subject: [PATCH 10/27] QCLINUX: arm64: dts: qcom: qcm6490: disable sdhc1 for + ufs target + +Disable sdhc1 for QCM6490 for ufs boot target to avoid probe +for sdhc1 as vreg_l7b_2p9 is shared regulator for both ufs vcc +and emmc vcc. Currently this is causing probe failure for ufs. + +Change-Id: I392d2c3302cbae7256d7c6f6045dc70cdde58368 +Signed-off-by: Manish Pandey +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 65bf5a99b5dc..8f00c8b59375 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -250,6 +250,10 @@ &gpi_dma1 { + status = "okay"; + }; + ++&sdhc_1 { ++ status = "disabled"; ++}; ++ + &pm8350c_pwm { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0011-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes.patch b/recipes-kernel/linux/linux-yocto/0011-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes.patch new file mode 100644 index 000000000..4c0b35b3c --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0011-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes.patch @@ -0,0 +1,50 @@ +From 5851c6a4f5baa8bacac010ce4bb88a2132922b4b Mon Sep 17 00:00:00 2001 +From: Manish Pandey +Date: Tue, 17 Oct 2023 23:46:10 +0530 +Subject: [PATCH 11/27] PENDING: arm64: dts: qcom: qcm6490: Add UFS nodes + +Add UFS host controller and Phy nodes for Qualcomm +qcm6490 Board. + +Change-Id: Ic4c2995447b62604e922d6ca180acce08f7d2164 +Signed-off-by: Manish Pandey +Signed-off-by: Salendarsingh Gaud +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +index 8f00c8b59375..bd638812ade2 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +@@ -311,6 +311,25 @@ &uart5 { + status = "okay"; + }; + ++&ufs_mem_hc { ++ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vreg_l7b_2p9>; ++ vcc-max-microamp = <800000>; ++ vccq-supply = <&vreg_l9b_1p2>; ++ vccq-max-microamp = <900000>; ++ vccq2-supply = <&vreg_l9b_1p2>; ++ vccq2-max-microamp = <900000>; ++ ++ status = "okay"; ++}; ++ ++&ufs_mem_phy { ++ vdda-phy-supply = <&vreg_l10c_0p8>; ++ vdda-pll-supply = <&vreg_l6b_1p2>; ++ ++ status = "okay"; ++}; ++ + &usb_1 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0012-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch b/recipes-kernel/linux/linux-yocto/0012-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch new file mode 100644 index 000000000..168c6a056 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0012-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch @@ -0,0 +1,148 @@ +From 86214c7c58331bf71e608f17cbaf17e3eb8c733e Mon Sep 17 00:00:00 2001 +From: John Stultz +Date: Mon, 11 Sep 2023 10:30:31 +0800 +Subject: [PATCH 12/27] FROMLIST: dma-heap: Add proper kref handling on dma-buf + heaps + +Add proper refcounting on the dma_heap structure. +While existing heaps are built-in, we may eventually +have heaps loaded from modules, and we'll need to be +able to properly handle the references to the heaps + +Also moves minor tracking into the heap structure so +we can properly free things. + +Change-Id: Ibb88d8af4fe67133873f8e88b85f5a12d4a112ef +Signed-off-by: John Stultz +Signed-off-by: T.J. Mercier +Signed-off-by: Yong Wu +[Yong: Just add comment for "minor" and "refcount"] +Link: https://lore.kernel.org/lkml/20230911023038.30649-3-yong.wu@mediatek.com/ +Patch-mainline: linux-media @ 09/11/23, 02:30 +Signed-off-by: Vijayanand Jitta +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/lkml/20230911023038.30649-3-yong.wu@mediatek.com/] +--- + drivers/dma-buf/dma-heap.c | 38 ++++++++++++++++++++++++++++++++++---- + include/linux/dma-heap.h | 6 ++++++ + 2 files changed, 40 insertions(+), 4 deletions(-) + +diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c +index 84ae708fafe7..59328045975a 100644 +--- a/drivers/dma-buf/dma-heap.c ++++ b/drivers/dma-buf/dma-heap.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -31,6 +32,8 @@ + * @heap_devt heap device node + * @list list head connecting to list of heaps + * @heap_cdev heap char device ++ * @minor: heap device node minor number ++ * @refcount: reference counter for this heap device + * + * Represents a heap of memory from which buffers can be made. + */ +@@ -41,6 +44,8 @@ struct dma_heap { + dev_t heap_devt; + struct list_head list; + struct cdev heap_cdev; ++ int minor; ++ struct kref refcount; + }; + + static LIST_HEAD(heap_list); +@@ -220,7 +225,6 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + { + struct dma_heap *heap, *h, *err_ret; + struct device *dev_ret; +- unsigned int minor; + int ret; + + if (!exp_info->name || !strcmp(exp_info->name, "")) { +@@ -237,12 +241,13 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + if (!heap) + return ERR_PTR(-ENOMEM); + ++ kref_init(&heap->refcount); + heap->name = exp_info->name; + heap->ops = exp_info->ops; + heap->priv = exp_info->priv; + + /* Find unused minor number */ +- ret = xa_alloc(&dma_heap_minors, &minor, heap, ++ ret = xa_alloc(&dma_heap_minors, &heap->minor, heap, + XA_LIMIT(0, NUM_HEAP_MINORS - 1), GFP_KERNEL); + if (ret < 0) { + pr_err("dma_heap: Unable to get minor number for heap\n"); +@@ -251,7 +256,7 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + } + + /* Create device */ +- heap->heap_devt = MKDEV(MAJOR(dma_heap_devt), minor); ++ heap->heap_devt = MKDEV(MAJOR(dma_heap_devt), heap->minor); + + cdev_init(&heap->heap_cdev, &dma_heap_fops); + ret = cdev_add(&heap->heap_cdev, heap->heap_devt, 1); +@@ -295,12 +300,37 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + err2: + cdev_del(&heap->heap_cdev); + err1: +- xa_erase(&dma_heap_minors, minor); ++ xa_erase(&dma_heap_minors, heap->minor); + err0: + kfree(heap); + return err_ret; + } + ++static void dma_heap_release(struct kref *ref) ++{ ++ struct dma_heap *heap = container_of(ref, struct dma_heap, refcount); ++ ++ /* Note, we already holding the heap_list_lock here */ ++ list_del(&heap->list); ++ ++ device_destroy(dma_heap_class, heap->heap_devt); ++ cdev_del(&heap->heap_cdev); ++ xa_erase(&dma_heap_minors, heap->minor); ++ ++ kfree(heap); ++} ++ ++void dma_heap_put(struct dma_heap *h) ++{ ++ /* ++ * Take the heap_list_lock now to avoid racing with code ++ * scanning the list and then taking a kref. ++ */ ++ mutex_lock(&heap_list_lock); ++ kref_put(&h->refcount, dma_heap_release); ++ mutex_unlock(&heap_list_lock); ++} ++ + static char *dma_heap_devnode(const struct device *dev, umode_t *mode) + { + return kasprintf(GFP_KERNEL, "dma_heap/%s", dev_name(dev)); +diff --git a/include/linux/dma-heap.h b/include/linux/dma-heap.h +index 0c05561cad6e..f8c986dd9a8b 100644 +--- a/include/linux/dma-heap.h ++++ b/include/linux/dma-heap.h +@@ -65,4 +65,10 @@ const char *dma_heap_get_name(struct dma_heap *heap); + */ + struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info); + ++/** ++ * dma_heap_put - drops a reference to a dmabuf heap, potentially freeing it ++ * @heap: the heap whose reference count to decrement ++ */ ++void dma_heap_put(struct dma_heap *heap); ++ + #endif /* _DMA_HEAPS_H */ +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0013-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch b/recipes-kernel/linux/linux-yocto/0013-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch new file mode 100644 index 000000000..0672a7784 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0013-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch @@ -0,0 +1,183 @@ +From 2a8e87c7de49e721b22656cd2aa6b25d272e9b2f Mon Sep 17 00:00:00 2001 +From: John Stultz +Date: Mon, 11 Sep 2023 10:30:32 +0800 +Subject: [PATCH 13/27] FROMLIST: dma-heap: Provide accessors so that in-kernel + drivers can allocate dmabufs from specific heaps + +This allows drivers who don't want to create their own +DMA-BUF exporter to be able to allocate DMA-BUFs directly +from existing DMA-BUF Heaps. + +There is some concern that the premise of DMA-BUF heaps is +that userland knows better about what type of heap memory +is needed for a pipeline, so it would likely be best for +drivers to import and fill DMA-BUFs allocated by userland +instead of allocating one themselves, but this is still +up for debate. + +Change-Id: I8a31d9e66f313b56b8c9b8758e9e6784a78d1832 +Signed-off-by: John Stultz +Signed-off-by: T.J. Mercier +Signed-off-by: Yong Wu +[Yong: Fix the checkpatch alignment warning] +Link: https://lore.kernel.org/lkml/20230911023038.30649-4-yong.wu@mediatek.com/ +Patch-mainline: linux-media @ 09/11/23, 02:30 +Signed-off-by: Vijayanand Jitta +Signed-off-by: Atul Dhudase +Upstream-Status: Submitted [https://lore.kernel.org/lkml/20230911023038.30649-4-yong.wu@mediatek.com/] +--- + drivers/dma-buf/dma-heap.c | 60 ++++++++++++++++++++++++++++---------- + include/linux/dma-heap.h | 25 ++++++++++++++++ + 2 files changed, 69 insertions(+), 16 deletions(-) + +diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c +index 59328045975a..e17705427b23 100644 +--- a/drivers/dma-buf/dma-heap.c ++++ b/drivers/dma-buf/dma-heap.c +@@ -54,12 +54,15 @@ static dev_t dma_heap_devt; + static struct class *dma_heap_class; + static DEFINE_XARRAY_ALLOC(dma_heap_minors); + +-static int dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, +- unsigned int fd_flags, +- unsigned int heap_flags) ++struct dma_buf *dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, ++ unsigned int fd_flags, ++ unsigned int heap_flags) + { +- struct dma_buf *dmabuf; +- int fd; ++ if (fd_flags & ~DMA_HEAP_VALID_FD_FLAGS) ++ return ERR_PTR(-EINVAL); ++ ++ if (heap_flags & ~DMA_HEAP_VALID_HEAP_FLAGS) ++ return ERR_PTR(-EINVAL); + + /* + * Allocations from all heaps have to begin +@@ -67,9 +70,20 @@ static int dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, + */ + len = PAGE_ALIGN(len); + if (!len) +- return -EINVAL; ++ return ERR_PTR(-EINVAL); + +- dmabuf = heap->ops->allocate(heap, len, fd_flags, heap_flags); ++ return heap->ops->allocate(heap, len, fd_flags, heap_flags); ++} ++EXPORT_SYMBOL_GPL(dma_heap_buffer_alloc); ++ ++static int dma_heap_bufferfd_alloc(struct dma_heap *heap, size_t len, ++ unsigned int fd_flags, ++ unsigned int heap_flags) ++{ ++ struct dma_buf *dmabuf; ++ int fd; ++ ++ dmabuf = dma_heap_buffer_alloc(heap, len, fd_flags, heap_flags); + if (IS_ERR(dmabuf)) + return PTR_ERR(dmabuf); + +@@ -107,15 +121,9 @@ static long dma_heap_ioctl_allocate(struct file *file, void *data) + if (heap_allocation->fd) + return -EINVAL; + +- if (heap_allocation->fd_flags & ~DMA_HEAP_VALID_FD_FLAGS) +- return -EINVAL; +- +- if (heap_allocation->heap_flags & ~DMA_HEAP_VALID_HEAP_FLAGS) +- return -EINVAL; +- +- fd = dma_heap_buffer_alloc(heap, heap_allocation->len, +- heap_allocation->fd_flags, +- heap_allocation->heap_flags); ++ fd = dma_heap_bufferfd_alloc(heap, heap_allocation->len, ++ heap_allocation->fd_flags, ++ heap_allocation->heap_flags); + if (fd < 0) + return fd; + +@@ -220,6 +228,7 @@ const char *dma_heap_get_name(struct dma_heap *heap) + { + return heap->name; + } ++EXPORT_SYMBOL_GPL(dma_heap_get_name); + + struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + { +@@ -305,6 +314,24 @@ struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info) + kfree(heap); + return err_ret; + } ++EXPORT_SYMBOL_GPL(dma_heap_add); ++ ++struct dma_heap *dma_heap_find(const char *name) ++{ ++ struct dma_heap *h; ++ ++ mutex_lock(&heap_list_lock); ++ list_for_each_entry(h, &heap_list, list) { ++ if (!strcmp(h->name, name)) { ++ kref_get(&h->refcount); ++ mutex_unlock(&heap_list_lock); ++ return h; ++ } ++ } ++ mutex_unlock(&heap_list_lock); ++ return NULL; ++} ++EXPORT_SYMBOL_GPL(dma_heap_find); + + static void dma_heap_release(struct kref *ref) + { +@@ -330,6 +357,7 @@ void dma_heap_put(struct dma_heap *h) + kref_put(&h->refcount, dma_heap_release); + mutex_unlock(&heap_list_lock); + } ++EXPORT_SYMBOL_GPL(dma_heap_put); + + static char *dma_heap_devnode(const struct device *dev, umode_t *mode) + { +diff --git a/include/linux/dma-heap.h b/include/linux/dma-heap.h +index f8c986dd9a8b..31f44d83f11b 100644 +--- a/include/linux/dma-heap.h ++++ b/include/linux/dma-heap.h +@@ -65,10 +65,35 @@ const char *dma_heap_get_name(struct dma_heap *heap); + */ + struct dma_heap *dma_heap_add(const struct dma_heap_export_info *exp_info); + ++/** ++ * dma_heap_find - get the heap registered with the specified name ++ * @name: Name of the DMA-Heap to find ++ * ++ * Returns: ++ * The DMA-Heap with the provided name. ++ * ++ * NOTE: DMA-Heaps returned from this function MUST be released using ++ * dma_heap_put() when the user is done to enable the heap to be unloaded. ++ */ ++struct dma_heap *dma_heap_find(const char *name); ++ + /** + * dma_heap_put - drops a reference to a dmabuf heap, potentially freeing it + * @heap: the heap whose reference count to decrement + */ + void dma_heap_put(struct dma_heap *heap); + ++/** ++ * dma_heap_buffer_alloc - Allocate dma-buf from a dma_heap ++ * @heap: DMA-Heap to allocate from ++ * @len: size to allocate in bytes ++ * @fd_flags: flags to set on returned dma-buf fd ++ * @heap_flags: flags to pass to the dma heap ++ * ++ * This is for internal dma-buf allocations only. Free returned buffers with dma_buf_put(). ++ */ ++struct dma_buf *dma_heap_buffer_alloc(struct dma_heap *heap, size_t len, ++ unsigned int fd_flags, ++ unsigned int heap_flags); ++ + #endif /* _DMA_HEAPS_H */ +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0014-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch b/recipes-kernel/linux/linux-yocto/0014-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch new file mode 100644 index 000000000..a5acfc599 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0014-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch @@ -0,0 +1,32 @@ +From 1dbe29190ed56590f2095006cdc7754ed1122610 Mon Sep 17 00:00:00 2001 +From: Manish Pandey +Date: Fri, 3 Nov 2023 10:11:01 +0530 +Subject: [PATCH 14/27] PENDING: arm64: dts: qcom: sc7280: Add interconnect + paths to UFSHC + +QCOM UFS host controller requires interconnect path configuration +for proper working. So add them for SC7280 SoC. + +Change-Id: Ifa7c8017a718c844a35380f841b1d94da35a795f +Signed-off-by: Manish Pandey +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi +index 19705df517dd..1217de1d3266 100644 +--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi +@@ -3341,6 +3341,7 @@ ufs_mem_hc: ufs@1d84000 { + + interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_UFS_MEM_CFG 0>; ++ interconnect-names = "ufs-ddr", "cpu-ufs"; + + clocks = <&gcc GCC_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0015-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch b/recipes-kernel/linux/linux-yocto/0015-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch new file mode 100644 index 000000000..7dc9a04cb --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0015-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch @@ -0,0 +1,30 @@ +From 086bb7871f707c67a6768945bf7904780be76d52 Mon Sep 17 00:00:00 2001 +From: Naina Mehta +Date: Tue, 17 Oct 2023 13:29:51 +0530 +Subject: [PATCH 15/27] PENDING: dt-bindings: arm: qcom: Add QCM6490 RB3 board + +Document the qcom,qcm6490-rb3 board based off qcm6490 SoC. + +Change-Id: I0728e825daf0e40d6a838060f4e4cfb10db73022 +Signed-off-by: Naina Mehta +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + Documentation/devicetree/bindings/arm/qcom.yaml | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml +index fcc301d8c4b5..6481bd03b0de 100644 +--- a/Documentation/devicetree/bindings/arm/qcom.yaml ++++ b/Documentation/devicetree/bindings/arm/qcom.yaml +@@ -387,6 +387,7 @@ properties: + - enum: + - fairphone,fp5 + - qcom,qcm6490-idp ++ - qcom,qcm6490-rb3 + - const: qcom,qcm6490 + + - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0016-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch b/recipes-kernel/linux/linux-yocto/0016-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch new file mode 100644 index 000000000..984cfb40c --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0016-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch @@ -0,0 +1,354 @@ +From 0bd0e87327b7e64d83b0aa766f2996d51682a80c Mon Sep 17 00:00:00 2001 +From: Naina Mehta +Date: Tue, 17 Oct 2023 18:59:20 +0530 +Subject: [PATCH 16/27] PENDING: arm64: dts: qcom: Add qcm6490 rb3 support + +Add device tree file for rb3 board for qcm6490 SoC. + +Change-Id: I5125829dc2f37feb54d80b29e84333cba7a40c3e +Signed-off-by: Naina Mehta +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/Makefile | 1 + + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 316 +++++++++++++++++++++++ + 2 files changed, 317 insertions(+) + create mode 100644 arch/arm64/boot/dts/qcom/qcm6490-rb3.dts + +diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile +index f597224e3dcb..c21079c18bb4 100644 +--- a/arch/arm64/boot/dts/qcom/Makefile ++++ b/arch/arm64/boot/dts/qcom/Makefile +@@ -79,6 +79,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-maple.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-sony-xperia-yoshino-poplar.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8998-xiaomi-sagit.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcm6490-idp.dtb ++dtb-$(CONFIG_ARCH_QCOM) += qcm6490-rb3.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb + dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +new file mode 100644 +index 000000000000..1aacd409e632 +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -0,0 +1,316 @@ ++// SPDX-License-Identifier: BSD-3-Clause ++/* ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ */ ++ ++/dts-v1/; ++ ++/* PM7250B is configured to use SID8/9 */ ++#define PM7250B_SID 8 ++#define PM7250B_SID1 9 ++ ++#include ++#include ++#include "qcm6490.dtsi" ++#include "pm7250b.dtsi" ++#include "pm7325.dtsi" ++#include "pm8350c.dtsi" ++#include "pmk8350.dtsi" ++ ++/ { ++ model = "Qualcomm Technologies, Inc. QCM6490 RB3"; ++ compatible = "qcom,qcm6490-rb3", "qcom,qcm6490"; ++ ++ aliases { ++ serial0 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++}; ++ ++&apps_rsc { ++ regulators-0 { ++ compatible = "qcom,pm7325-rpmh-regulators"; ++ qcom,pmic-id = "b"; ++ ++ vreg_s1b_1p872: smps1 { ++ regulator-min-microvolt = <1840000>; ++ regulator-max-microvolt = <2040000>; ++ }; ++ ++ vreg_s2b_0p876: smps2 { ++ regulator-min-microvolt = <570070>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7b_0p972: smps7 { ++ regulator-min-microvolt = <535000>; ++ regulator-max-microvolt = <1120000>; ++ }; ++ ++ vreg_s8b_1p272: smps8 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1500000>; ++ }; ++ ++ vreg_l1b_0p912: ldo1 { ++ regulator-min-microvolt = <825000>; ++ regulator-max-microvolt = <925000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l2b_3p072: ldo2 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l3b_0p504: ldo3 { ++ regulator-min-microvolt = <312000>; ++ regulator-max-microvolt = <910000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l4b_0p752: ldo4 { ++ regulator-min-microvolt = <752000>; ++ regulator-max-microvolt = <820000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l5b_0p752: ldo5 { ++ regulator-min-microvolt = <552000>; ++ regulator-max-microvolt = <832000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l6b_1p2: ldo6 { ++ regulator-min-microvolt = <1140000>; ++ regulator-max-microvolt = <1260000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l7b_2p952: ldo7 { ++ regulator-min-microvolt = <2400000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l8b_0p904: ldo8 { ++ regulator-min-microvolt = <870000>; ++ regulator-max-microvolt = <970000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l9b_1p2: ldo9 { ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l11b_1p504: ldo11 { ++ regulator-min-microvolt = <1504000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l12b_0p751: ldo12 { ++ regulator-min-microvolt = <751000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l13b_0p53: ldo13 { ++ regulator-min-microvolt = <530000>; ++ regulator-max-microvolt = <824000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l14b_1p08: ldo14 { ++ regulator-min-microvolt = <1080000>; ++ regulator-max-microvolt = <1304000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l15b_0p765: ldo15 { ++ regulator-min-microvolt = <765000>; ++ regulator-max-microvolt = <1020000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l16b_1p1: ldo16 { ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l17b_1p7: ldo17 { ++ regulator-min-microvolt = <1700000>; ++ regulator-max-microvolt = <1900000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l18b_1p8: ldo18 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l19b_1p8: ldo19 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ }; ++ ++ regulators-1 { ++ compatible = "qcom,pm8350c-rpmh-regulators"; ++ qcom,pmic-id = "c"; ++ ++ vreg_s1c_2p19: smps1 { ++ regulator-min-microvolt = <2190000>; ++ regulator-max-microvolt = <2210000>; ++ }; ++ ++ vreg_s2c_0p752: smps2 { ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s5c_0p752: smps5 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vreg_s7c_0p752: smps7 { ++ regulator-min-microvolt = <465000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_s9c_1p084: smps9 { ++ regulator-min-microvolt = <1010000>; ++ regulator-max-microvolt = <1170000>; ++ }; ++ ++ vreg_s10c_0p752:smps10 { ++ regulator-min-microvolt = <752000>; ++ regulator-max-microvolt = <800000>; ++ }; ++ ++ vreg_l1c_1p8: ldo1 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l2c_1p62: ldo2 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <1980000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l3c_2p8: ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3540000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l4c_1p62: ldo4 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l5c_1p62: ldo5 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l6c_2p96: ldo6 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l7c_3p0: ldo7 { ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l8c_1p62: ldo8 { ++ regulator-min-microvolt = <1620000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l9c_2p96: ldo9 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l10c_0p88:ldo10 { ++ regulator-min-microvolt = <720000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l11c_2p8: ldo11 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l12c_1p65: ldo12 { ++ regulator-min-microvolt = <1650000>; ++ regulator-max-microvolt = <2000000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_l13c_2p7: ldo13 { ++ regulator-min-microvolt = <2700000>; ++ regulator-max-microvolt = <3544000>; ++ regulator-initial-mode = ; ++ }; ++ ++ vreg_bob_3p296: bob { ++ regulator-min-microvolt = <3008000>; ++ regulator-max-microvolt = <3960000>; ++ }; ++ }; ++}; ++ ++&qupv3_id_0 { ++ status = "okay"; ++}; ++ ++&uart5 { ++ compatible = "qcom,geni-debug-uart"; ++ status = "okay"; ++}; ++ ++&usb_1 { ++ status = "okay"; ++}; ++ ++&usb_1_dwc3 { ++ dr_mode = "peripheral"; ++}; ++ ++&usb_1_hsphy { ++ vdda-pll-supply = <&vreg_l10c_0p88>; ++ vdda18-supply = <&vreg_l1c_1p8>; ++ vdda33-supply = <&vreg_l2b_3p072>; ++ ++ status = "okay"; ++}; ++ ++&usb_1_qmpphy { ++ vdda-phy-supply = <&vreg_l6b_1p2>; ++ vdda-pll-supply = <&vreg_l1b_0p912>; ++ ++ status = "okay"; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0017-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch b/recipes-kernel/linux/linux-yocto/0017-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch new file mode 100644 index 000000000..09d9608b8 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0017-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch @@ -0,0 +1,35 @@ +From e60b0092f6fec3594b56a29815366495d4184984 Mon Sep 17 00:00:00 2001 +From: Naina Mehta +Date: Tue, 17 Oct 2023 20:58:47 +0530 +Subject: [PATCH 17/27] QCLINUX: arm64: dts: qcom: Add board-id and msm-id for + qcm6490-rb3 + +Add board-id and msm-id for QCM6490 RB3 platform as a workaround +for picking correct DTB. + +Change-Id: I031d583f08bed2827746bc8c8f4568a8064f7698 +Signed-off-by: Naina Mehta +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index 1aacd409e632..476ca1d1884b 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -21,6 +21,10 @@ / { + model = "Qualcomm Technologies, Inc. QCM6490 RB3"; + compatible = "qcom,qcm6490-rb3", "qcom,qcm6490"; + ++ /* This will be deprecated soon */ ++ qcom,msm-id = <497 0x10000>, <498 0x10000>, <475 0x10000>, <515 0x10000>; ++ qcom,board-id = <32 1>; ++ + aliases { + serial0 = &uart5; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0018-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch b/recipes-kernel/linux/linux-yocto/0018-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch new file mode 100644 index 000000000..be0ee2280 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0018-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch @@ -0,0 +1,50 @@ +From 3e5982d79384ae5f0334b6d615914682ed09d1e9 Mon Sep 17 00:00:00 2001 +From: Manish Pandey +Date: Wed, 1 Nov 2023 11:58:28 +0530 +Subject: [PATCH 18/27] PENDING: arm64: dts: qcom: Add UFS nodes for + qcm6490-rb3 + +Add UFS host controller and Phy nodes for Qualcomm +qcm6490-rb3 Board. + +Change-Id: I3234e524247f3b5296d21a990e3de383134f9496 +Signed-off-by: Manish Pandey +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index 476ca1d1884b..ac6233452429 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -296,6 +296,25 @@ &uart5 { + status = "okay"; + }; + ++&ufs_mem_hc { ++ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; ++ vcc-supply = <&vreg_l7b_2p952>; ++ vcc-max-microamp = <800000>; ++ vccq-supply = <&vreg_l9b_1p2>; ++ vccq-max-microamp = <900000>; ++ vccq2-supply = <&vreg_l9b_1p2>; ++ vccq2-max-microamp = <900000>; ++ ++ status = "okay"; ++}; ++ ++&ufs_mem_phy { ++ vdda-phy-supply = <&vreg_l10c_0p88>; ++ vdda-pll-supply = <&vreg_l6b_1p2>; ++ ++ status = "okay"; ++}; ++ + &usb_1 { + status = "okay"; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0019-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch b/recipes-kernel/linux/linux-yocto/0019-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch new file mode 100644 index 000000000..2281ae1ab --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0019-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch @@ -0,0 +1,46 @@ +From d560dbfed1dae3d2103fc24dcb4ba498f0ca595c Mon Sep 17 00:00:00 2001 +From: Umang Chheda +Date: Wed, 18 Oct 2023 18:12:00 +0530 +Subject: [PATCH 19/27] PENDING: arm64: dts: qcom: Remove voltage vote support + for UFS + +UFS rails have different voltage requirement for UFS2.x v/s UFS3.x. +Bootloader sets the proper voltage based on UFS type. There can be +case where the voltage set by bootloader is overridden by HLOS client. + +To prevent above issue, Add change to remove voltage voting support +for UFS rails for QC6490 RB3 platform. + +Change-Id: I3431583c544be399d6a1bc0a138e62c6fe189f5b +Signed-off-by: Umang Chheda +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index ac6233452429..3a1c781c965f 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -337,3 +337,17 @@ &usb_1_qmpphy { + + status = "okay"; + }; ++ ++&vreg_l7b_2p952 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; ++ ++&vreg_l9b_1p2 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0020-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch b/recipes-kernel/linux/linux-yocto/0020-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch new file mode 100644 index 000000000..0227cd36e --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0020-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch @@ -0,0 +1,58 @@ +From 1be6161c596c6bb6eb537e6027b1b4972f397e88 Mon Sep 17 00:00:00 2001 +From: Umang Chheda +Date: Wed, 18 Oct 2023 18:14:15 +0530 +Subject: [PATCH 20/27] PENDING: arm64: dts: qcm6490-rb3: Remove voltage voting + for USB rails + +USB driver does not vote for voltage on hsphy and ssphy +rails. Due to which the initial voltage set by bootloader +is overridden by regulator framework with min voltage specified +on regulator registration. + +Fix this temporarily by removing voltage voting support, which +will prevent regulator framework overriding the voltage set by +bootloader for QC6490 RB3 Platform. + +This commit will be reverted once voltage voting support is added +in USB driver. + +Change-Id: I5bf30f9ac8b58ac60cdabbc756775bf3be679e9b +Signed-off-by: Umang Chheda +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490-rb3.dts | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +index 3a1c781c965f..b244e66e9857 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts ++++ b/arch/arm64/boot/dts/qcom/qcm6490-rb3.dts +@@ -338,6 +338,13 @@ &usb_1_qmpphy { + status = "okay"; + }; + ++&vreg_l1b_0p912 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; ++ + &vreg_l7b_2p952 { + /delete-property/regulator-min-microvolt; + /delete-property/regulator-max-microvolt; +@@ -351,3 +358,10 @@ &vreg_l9b_1p2 { + regulator-allow-set-load; + regulator-allowed-modes = ; + }; ++ ++&vreg_l10c_0p88 { ++ /delete-property/regulator-min-microvolt; ++ /delete-property/regulator-max-microvolt; ++ regulator-allow-set-load; ++ regulator-allowed-modes = ; ++}; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0021-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch b/recipes-kernel/linux/linux-yocto/0021-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch new file mode 100644 index 000000000..e6a7fc1d3 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0021-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch @@ -0,0 +1,211 @@ +From b9b99e5d0a54edc73620a1522ad3d1a4a6d115fb Mon Sep 17 00:00:00 2001 +From: Taniya Das +Date: Mon, 30 Oct 2023 23:24:19 +0530 +Subject: [PATCH 21/27] PENDING: clk: qcom: gcc: Enable the force mem core for + UFS ICE clock + +Enable the force mem core for UFS ICE clock. Update the gdsc +transition delays to the recommended values for functional correctness. + +Change-Id: Ibdb19068a0441c185d120ec183e4478f0c0ac3ae +Signed-off-by: Taniya Das +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + drivers/clk/qcom/camcc-sc7280.c | 19 +++++++++++++++++++ + drivers/clk/qcom/gcc-sc7280.c | 13 +++++++++++++ + drivers/clk/qcom/gpucc-sc7280.c | 7 +++++++ + drivers/clk/qcom/videocc-sc7280.c | 7 +++++++ + 4 files changed, 46 insertions(+) + +diff --git a/drivers/clk/qcom/camcc-sc7280.c b/drivers/clk/qcom/camcc-sc7280.c +index 4396fddba7a6..c1b71b4865e7 100644 +--- a/drivers/clk/qcom/camcc-sc7280.c ++++ b/drivers/clk/qcom/camcc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -2247,6 +2248,9 @@ static struct clk_branch cam_cc_sleep_clk = { + + static struct gdsc cam_cc_titan_top_gdsc = { + .gdscr = 0xc194, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_titan_top_gdsc", + }, +@@ -2256,6 +2260,9 @@ static struct gdsc cam_cc_titan_top_gdsc = { + + static struct gdsc cam_cc_bps_gdsc = { + .gdscr = 0x7004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_bps_gdsc", + }, +@@ -2265,6 +2272,9 @@ static struct gdsc cam_cc_bps_gdsc = { + + static struct gdsc cam_cc_ife_0_gdsc = { + .gdscr = 0xa004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ife_0_gdsc", + }, +@@ -2274,6 +2284,9 @@ static struct gdsc cam_cc_ife_0_gdsc = { + + static struct gdsc cam_cc_ife_1_gdsc = { + .gdscr = 0xb004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ife_1_gdsc", + }, +@@ -2283,6 +2296,9 @@ static struct gdsc cam_cc_ife_1_gdsc = { + + static struct gdsc cam_cc_ife_2_gdsc = { + .gdscr = 0xb070, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ife_2_gdsc", + }, +@@ -2292,6 +2308,9 @@ static struct gdsc cam_cc_ife_2_gdsc = { + + static struct gdsc cam_cc_ipe_0_gdsc = { + .gdscr = 0x8004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "cam_cc_ipe_0_gdsc", + }, +diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c +index 1dc804154031..dbb2fcb4e96a 100644 +--- a/drivers/clk/qcom/gcc-sc7280.c ++++ b/drivers/clk/qcom/gcc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -3094,6 +3095,9 @@ static struct clk_branch gcc_wpss_rscp_clk = { + + static struct gdsc gcc_pcie_0_gdsc = { + .gdscr = 0x6b004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gcc_pcie_0_gdsc", + }, +@@ -3112,6 +3116,9 @@ static struct gdsc gcc_pcie_1_gdsc = { + + static struct gdsc gcc_ufs_phy_gdsc = { + .gdscr = 0x77004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gcc_ufs_phy_gdsc", + }, +@@ -3121,6 +3128,9 @@ static struct gdsc gcc_ufs_phy_gdsc = { + + static struct gdsc gcc_usb30_prim_gdsc = { + .gdscr = 0xf004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gcc_usb30_prim_gdsc", + }, +@@ -3467,6 +3477,9 @@ static int gcc_sc7280_probe(struct platform_device *pdev) + regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); + regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13)); + ++ /* FORCE_MEM_CORE_ON for ufs phy ice core clocks */ ++ qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true); ++ + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, + ARRAY_SIZE(gcc_dfs_clocks)); + if (ret) +diff --git a/drivers/clk/qcom/gpucc-sc7280.c b/drivers/clk/qcom/gpucc-sc7280.c +index 1490cd45a654..a30d9941644d 100644 +--- a/drivers/clk/qcom/gpucc-sc7280.c ++++ b/drivers/clk/qcom/gpucc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -379,6 +380,9 @@ static struct clk_branch gpu_cc_sleep_clk = { + + static struct gdsc cx_gdsc = { + .gdscr = 0x106c, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x2, + .gds_hw_ctrl = 0x1540, + .pd = { + .name = "cx_gdsc", +@@ -389,6 +393,9 @@ static struct gdsc cx_gdsc = { + + static struct gdsc gx_gdsc = { + .gdscr = 0x100c, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x2, + .clamp_io_ctrl = 0x1508, + .pd = { + .name = "gx_gdsc", +diff --git a/drivers/clk/qcom/videocc-sc7280.c b/drivers/clk/qcom/videocc-sc7280.c +index 615695d82319..425b7d1dc3cc 100644 +--- a/drivers/clk/qcom/videocc-sc7280.c ++++ b/drivers/clk/qcom/videocc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -232,6 +233,9 @@ static struct clk_branch video_cc_venus_ahb_clk = { + + static struct gdsc mvs0_gdsc = { + .gdscr = 0x3004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x6, + .pd = { + .name = "mvs0_gdsc", + }, +@@ -241,6 +245,9 @@ static struct gdsc mvs0_gdsc = { + + static struct gdsc mvsc_gdsc = { + .gdscr = 0x2004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0x6, + .pd = { + .name = "mvsc_gdsc", + }, +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0022-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch b/recipes-kernel/linux/linux-yocto/0022-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch new file mode 100644 index 000000000..1562b553d --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0022-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch @@ -0,0 +1,80 @@ +From 74488c93732c63ded058bf390b07730d2eb84d8c Mon Sep 17 00:00:00 2001 +From: Taniya Das +Date: Mon, 30 Oct 2023 23:29:06 +0530 +Subject: [PATCH 22/27] PENDING: arm64: dts: qcm6490: Update the protected + clocks for QCM6490 + +Certain clocks are not accessible on QCM6490 board and thus require them +to be marked protected. +Also disable the LPASS nodes which are not to be used. + +Change-Id: I6c2205c127480979ffeaec073991e918dee46f5c +Signed-off-by: Taniya Das +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490.dtsi | 48 +++++++++++++++++++++++++++ + 1 file changed, 48 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +index b93270cae9ae..cccb50ce6269 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +@@ -81,6 +81,54 @@ trusted_apps_mem: trusted_apps@c1800000 { + }; + }; + ++&gcc { ++ protected-clocks = ,, ++ , , ++ , , ++ , , ++ , , ++ , , ++ ,, ++ , , ++ , ++ , , ++ , , ++ , , ++ , , ++ , , ++ , , ++ , , ++ , , ++ , ; ++}; ++ ++&lpass_audiocc { ++ qcom,adsp-skip-pll; ++ protected-clocks = , ++ , , ++ , , ++ , , ++ , , ++ , , ++ , ++ , ++ , , ++ ; ++ /delete-property/ power-domains; ++}; ++ ++&lpass_aon { ++ status = "disabled"; ++}; ++ ++&lpass_core { ++ status = "disabled"; ++}; ++ ++&lpass_hm { ++ status = "disabled"; ++}; ++ + &video_mem { + reg = <0x0 0x8a700000 0x0 0x500000>; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0023-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch b/recipes-kernel/linux/linux-yocto/0023-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch new file mode 100644 index 000000000..eb4f51fd7 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0023-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch @@ -0,0 +1,60 @@ +From c0249bf708cff37ccb5f679ed2bcbbd86f9db142 Mon Sep 17 00:00:00 2001 +From: Taniya Das +Date: Tue, 31 Oct 2023 23:56:38 +0530 +Subject: [PATCH 23/27] PENDING: clk: qcom: lpassaudiocc: Add support to skip + PLL configuration + +On certain targets the PLL configuration should be skipped, thus add a +device property to support the same. + +Change-Id: I0fa8ca17cb488513dc1663aef64bb4f15f1db1f5 +Signed-off-by: Taniya Das +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + drivers/clk/qcom/lpassaudiocc-sc7280.c | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c +index 134eb1529ede..5322ff53a3e1 100644 +--- a/drivers/clk/qcom/lpassaudiocc-sc7280.c ++++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* + * Copyright (c) 2021, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -765,11 +766,13 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) + goto exit; + } + +- clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio_cc_pll_config); ++ if (!of_property_read_bool(pdev->dev.of_node, "qcom,adsp-skip-pll")) { ++ clk_zonda_pll_configure(&lpass_audio_cc_pll, regmap, &lpass_audio_cc_pll_config); + +- /* PLL settings */ +- regmap_write(regmap, 0x4, 0x3b); +- regmap_write(regmap, 0x8, 0xff05); ++ /* PLL settings */ ++ regmap_write(regmap, 0x4, 0x3b); ++ regmap_write(regmap, 0x8, 0xff05); ++ } + + ret = qcom_cc_really_probe(pdev, &lpass_audio_cc_sc7280_desc, regmap); + if (ret) { +@@ -777,6 +780,9 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev) + goto exit; + } + ++ lpass_audio_cc_sc7280_regmap_config.name = "lpassaudio_cc_reset"; ++ lpass_audio_cc_sc7280_regmap_config.max_register = 0xc8; ++ + ret = qcom_cc_probe_by_index(pdev, 1, &lpass_audio_cc_reset_sc7280_desc); + if (ret) { + dev_err(&pdev->dev, "Failed to register LPASS AUDIO CC Resets\n"); +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0024-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch b/recipes-kernel/linux/linux-yocto/0024-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch new file mode 100644 index 000000000..a49fa18b6 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0024-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch @@ -0,0 +1,36 @@ +From ac2426dbe03f089329ff9255387e905067fe4d63 Mon Sep 17 00:00:00 2001 +From: Taniya Das +Date: Wed, 1 Nov 2023 10:30:17 +0530 +Subject: [PATCH 24/27] PENDING: dt-bindings: clock: Add "qcom,adsp-skip-pll" + property + +Add support for "qcom,adsp-skip-pll" so as to avoid configuring the +LPASS PLL. + +Change-Id: Icc554afe39702cc5d1418b13cff7392ce8b4fe5b +Signed-off-by: Taniya Das +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + .../devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +index 447cdc447a0c..5587d4ca82a6 100644 +--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml ++++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +@@ -49,6 +49,11 @@ properties: + peripheral loader. + type: boolean + ++ qcom,adsp-skip-pll: ++ description: ++ Indicates if the LPASS PLL configuration would be skipped. ++ type: boolean ++ + required: + - compatible + - reg +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0025-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch b/recipes-kernel/linux/linux-yocto/0025-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch new file mode 100644 index 000000000..f1b973353 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0025-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch @@ -0,0 +1,34 @@ +From 78f71c3b83f64a6966a1ff5e96ffda00be02a760 Mon Sep 17 00:00:00 2001 +From: Atul Dhudase +Date: Tue, 31 Oct 2023 11:18:40 +0530 +Subject: [PATCH 25/27] PENDING: dt-bindings: pinctrl: qcom,sc7280-pinctrl: add + gpio-reserved-ranges + +Add gpio-reserved-ranges property for SC7280 (used on QCM6490 boards). + +Change-Id: Ifd1943314dc13170aeef31a4d9bdf137b61d49ce +Signed-off-by: Atul Dhudase +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + .../devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +index 368d44ff5468..c8735ab97e40 100644 +--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml ++++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +@@ -41,6 +41,10 @@ properties: + gpio-ranges: + maxItems: 1 + ++ gpio-reserved-ranges: ++ minItems: 1 ++ maxItems: 88 ++ + gpio-line-names: + maxItems: 175 + +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/0026-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch b/recipes-kernel/linux/linux-yocto/0026-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch new file mode 100644 index 000000000..63a13c126 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/0026-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch @@ -0,0 +1,33 @@ +From 1dded8e7ad9db4ae56fd309556d8de77033c040e Mon Sep 17 00:00:00 2001 +From: Atul Dhudase +Date: Tue, 31 Oct 2023 11:30:18 +0530 +Subject: [PATCH 26/27] PENDING: arm64: dts: qcom: qcm6490: Add + gpio-reserved-ranges + +Add gpio-reserved-ranges for QCM6490 boards. + +Change-Id: I89b242737c0a03e17560cee2fbfc3bb0521ee9ce +Signed-off-by: Atul Dhudase +Upstream-Status: Pending +--- + arch/arm64/boot/dts/qcom/qcm6490.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qcm6490.dtsi b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +index cccb50ce6269..e05e0f3b4b12 100644 +--- a/arch/arm64/boot/dts/qcom/qcm6490.dtsi ++++ b/arch/arm64/boot/dts/qcom/qcm6490.dtsi +@@ -129,6 +129,10 @@ &lpass_hm { + status = "disabled"; + }; + ++&tlmm { ++ gpio-reserved-ranges = <32 2>, <48 4>; ++}; ++ + &video_mem { + reg = <0x0 0x8a700000 0x0 0x500000>; + }; +-- +2.25.1 + diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc index 653d5678d..11b68fe6d 100644 --- a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-armv8a.scc @@ -5,6 +5,7 @@ kconf hardware qcom.cfg include qcom-msm8916.scc include qcom-msm8996.scc include qcom-qcm2290.scc +include qcom-qcm6490.scc include qcom-sdm845.scc include qcom-sm6115.scc include qcom-sm8250.scc diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg new file mode 100644 index 000000000..6fd6146bc --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.cfg @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: MIT + +CONFIG_PINCTRL_SC7280=y +CONFIG_PINCTRL_SC7280_LPASS_LPI=m +CONFIG_SND_SOC_SC7280=m +CONFIG_INTERCONNECT_QCOM_SC7280=y + +CONFIG_SC_CAMCC_7280=y +CONFIG_SC_DISPCC_7280=y +CONFIG_SC_GPUCC_7280=y +CONFIG_SC_LPASS_CORECC_7280=y +CONFIG_SC_VIDEOCC_7280=y + +CONFIG_PHY_QCOM_USB_HS=y +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y +CONFIG_USB_DWC3_QCOM=y +CONFIG_PHY_QCOM_QMP_COMBO=y + +CONFIG_QCOM_WDT=m \ No newline at end of file diff --git a/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc new file mode 100644 index 000000000..bf53a4707 --- /dev/null +++ b/recipes-kernel/linux/linux-yocto/bsp/qcom-armv8a/qcom-qcm6490.scc @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT + +kconf hardware qcom-rpmh.cfg +kconf hardware qcom-qcm6490.cfg diff --git a/recipes-kernel/linux/linux-yocto_6.5.bbappend b/recipes-kernel/linux/linux-yocto_6.5.bbappend index 96cce089d..7ad2dbbdd 100644 --- a/recipes-kernel/linux/linux-yocto_6.5.bbappend +++ b/recipes-kernel/linux/linux-yocto_6.5.bbappend @@ -1,4 +1,30 @@ SRC_URI:append:qcom = " \ file://0001-arm64-dts-qcom-qrb2210-rb1-Swap-UART-index.patch \ file://0001-arm64-dts-qcom-qcm2290-temporarily-disable-cluster-i.patch \ + file://0001-FROMLIST-arm64-dts-qcom-Use-QCOM_SCM_VMID-defines-fo.patch \ + file://0002-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-Fairphone-.patch \ + file://0003-FROMLIST-dt-bindings-arm-qcom-Add-QCM6490-IDP-board.patch \ + file://0004-FROMLIST-arm64-dts-qcom-Add-qcm6490-dts-file.patch \ + file://0005-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-Q.patch \ + file://0006-FROMLIST-arm64-dts-qcom-sc7280-Add-UFS-nodes-for-sc7.patch \ + file://0007-FROMGIT-phy-qcom-qmp-ufs-Add-Phy-Configuration-suppo.patch \ + file://0008-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch \ + file://0009-PENDING-arm64-dts-qcm6490-Remove-voltage-voting-for-.patch \ + file://0010-QCLINUX-arm64-dts-qcom-qcm6490-disable-sdhc1-for-ufs.patch \ + file://0011-PENDING-arm64-dts-qcom-qcm6490-Add-UFS-nodes.patch \ + file://0012-FROMLIST-dma-heap-Add-proper-kref-handling-on-dma-bu.patch \ + file://0013-FROMLIST-dma-heap-Provide-accessors-so-that-in-kerne.patch \ + file://0014-PENDING-arm64-dts-qcom-sc7280-Add-interconnect-paths.patch \ + file://0015-PENDING-dt-bindings-arm-qcom-Add-QCM6490-RB3-board.patch \ + file://0016-PENDING-arm64-dts-qcom-Add-qcm6490-rb3-support.patch \ + file://0017-QCLINUX-arm64-dts-qcom-Add-board-id-and-msm-id-for-q.patch \ + file://0018-PENDING-arm64-dts-qcom-Add-UFS-nodes-for-qcm6490-rb3.patch \ + file://0019-PENDING-arm64-dts-qcom-Remove-voltage-vote-support-f.patch \ + file://0020-PENDING-arm64-dts-qcm6490-rb3-Remove-voltage-voting-.patch \ + file://0021-PENDING-clk-qcom-gcc-Enable-the-force-mem-core-for-U.patch \ + file://0022-PENDING-arm64-dts-qcm6490-Update-the-protected-clock.patch \ + file://0023-PENDING-clk-qcom-lpassaudiocc-Add-support-to-skip-PL.patch \ + file://0024-PENDING-dt-bindings-clock-Add-qcom-adsp-skip-pll-pro.patch \ + file://0025-PENDING-dt-bindings-pinctrl-qcom-sc7280-pinctrl-add-.patch \ + file://0026-PENDING-arm64-dts-qcom-qcm6490-Add-gpio-reserved-ran.patch \ "