From 8fcfe76f3f621fd34ccd8f7566ada5220238344d Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 22 Nov 2024 11:05:16 +0800 Subject: [PATCH] rockchip: add ArmSoM Sige5 (RK3576, 8 Cores) board support --- package/boot/rockchip-rkbin/Makefile | 11 + .../src/bin/rk35/rk3576_bl31_v1.04.elf | Bin 0 -> 349032 bytes .../src/bin/rk35/rk3576_bl32_v1.01.bin | Bin 0 -> 428416 bytes ...3576_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin | Bin 0 -> 74336 bytes package/boot/uboot-rk3576/Makefile | 68 ++ .../patches/001-add-adc-cmd.patch | 27 + .../patches/002-adc-channel-mask-api.patch | 42 ++ .../patches/003-adc-raw-to-uv-api.patch | 58 ++ ...p-saradc-disable-adc-to-volt-convert.patch | 32 + .../005-rockchip-saradc-supports-rk3568.patch | 24 + .../patches/006-fix-efi-detection.patch | 38 + .../patches/007-supports-legacy-image.patch | 20 + .../patches/008-fix-source-cmd-bug.patch | 21 + .../patches/009-fix-bootargs-not-effect.patch | 27 + .../uboot-rk3576/patches/010-fix-ce.patch | 34 + .../patches/011-optional-tee.patch | 22 + .../patches/420-gcc-7-compiler.patch | 287 ++++++++ .../patches/430-gcc-8-compiler.patch | 305 ++++++++ .../patches/900-rk35-tftp-speed.patch | 68 ++ .../901-rk3568-disable-usb30-pcie.patch | 40 ++ .../patches/902-disable-auto-net-boot.patch | 13 + .../patches/903-skip-android-boot.patch | 28 + .../uboot-rk3576/patches/910-build-idb.patch | 33 + .../uboot-rk3576/patches/911-fix-itb-ce.patch | 29 + .../src/arch/arm/dts/rk3576-armsom-sige5.dts | 14 + package/boot/uboot-rk3576/src/cmd/adc.c | 188 +++++ .../src/configs/armsom-sige5-rk3576_defconfig | 222 ++++++ .../armv8/base-files/etc/board.d/02_network | 2 + .../etc/hotplug.d/net/40-net-smp-affinity | 1 + .../boot/dts/rockchip/rk3576-armsom-sige5.dts | 664 ++++++++++++++++++ target/linux/rockchip/image/armv8.mk | 11 + target/linux/rockchip/image/rk3528.bootscript | 8 +- 32 files changed, 2336 insertions(+), 1 deletion(-) create mode 100644 package/boot/rockchip-rkbin/src/bin/rk35/rk3576_bl31_v1.04.elf create mode 100644 package/boot/rockchip-rkbin/src/bin/rk35/rk3576_bl32_v1.01.bin create mode 100644 package/boot/rockchip-rkbin/src/bin/rk35/rk3576_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin create mode 100644 package/boot/uboot-rk3576/Makefile create mode 100644 package/boot/uboot-rk3576/patches/001-add-adc-cmd.patch create mode 100644 package/boot/uboot-rk3576/patches/002-adc-channel-mask-api.patch create mode 100644 package/boot/uboot-rk3576/patches/003-adc-raw-to-uv-api.patch create mode 100644 package/boot/uboot-rk3576/patches/004-rockchip-saradc-disable-adc-to-volt-convert.patch create mode 100644 package/boot/uboot-rk3576/patches/005-rockchip-saradc-supports-rk3568.patch create mode 100644 package/boot/uboot-rk3576/patches/006-fix-efi-detection.patch create mode 100644 package/boot/uboot-rk3576/patches/007-supports-legacy-image.patch create mode 100644 package/boot/uboot-rk3576/patches/008-fix-source-cmd-bug.patch create mode 100644 package/boot/uboot-rk3576/patches/009-fix-bootargs-not-effect.patch create mode 100644 package/boot/uboot-rk3576/patches/010-fix-ce.patch create mode 100644 package/boot/uboot-rk3576/patches/011-optional-tee.patch create mode 100644 package/boot/uboot-rk3576/patches/420-gcc-7-compiler.patch create mode 100644 package/boot/uboot-rk3576/patches/430-gcc-8-compiler.patch create mode 100644 package/boot/uboot-rk3576/patches/900-rk35-tftp-speed.patch create mode 100644 package/boot/uboot-rk3576/patches/901-rk3568-disable-usb30-pcie.patch create mode 100644 package/boot/uboot-rk3576/patches/902-disable-auto-net-boot.patch create mode 100644 package/boot/uboot-rk3576/patches/903-skip-android-boot.patch create mode 100644 package/boot/uboot-rk3576/patches/910-build-idb.patch create mode 100644 package/boot/uboot-rk3576/patches/911-fix-itb-ce.patch create mode 100644 package/boot/uboot-rk3576/src/arch/arm/dts/rk3576-armsom-sige5.dts create mode 100644 package/boot/uboot-rk3576/src/cmd/adc.c create mode 100644 package/boot/uboot-rk3576/src/configs/armsom-sige5-rk3576_defconfig create mode 100644 target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts diff --git a/package/boot/rockchip-rkbin/Makefile b/package/boot/rockchip-rkbin/Makefile index 41474b629a879d..735dce219cf7fb 100644 --- a/package/boot/rockchip-rkbin/Makefile +++ b/package/boot/rockchip-rkbin/Makefile @@ -67,6 +67,13 @@ define rkbin/rk3568 TPL:=rk35/rk3568_ddr_1560MHz_v1.21.bin endef +define rkbin/rk3576 + DEPENDS:=@TARGET_rockchip_armv8 + ATF:=rk35/rk3576_bl31_v1.04.elf + TPL:=rk35/rk3576_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin + TEE:=rk35/rk3576_bl32_v1.01.bin +endef + define rkbin/rk3588 DEPENDS:=@TARGET_rockchip_armv8 ATF:=rk35/rk3588_bl31_v1.45.elf @@ -79,6 +86,7 @@ VARIANTS:= \ rk3528 \ rk3566 \ rk3568 \ + rk3576 \ rk3588 define Build/Compile @@ -117,6 +125,9 @@ ifneq ($(SPL),) $(CP) $(PKG_BUILD_DIR)/$(BUILD_VARIANT)-idbloader.bin $(STAGING_DIR_IMAGE)/ $(CP) $(PKG_BUILD_DIR)/$(BUILD_VARIANT)-trust.bin $(STAGING_DIR_IMAGE)/ endif +ifneq ($(TEE),) + $(CP) $(PKG_BUILD_DIR)/bin/$(TEE) $(STAGING_DIR_IMAGE)/ +endif endef $(eval $(call BuildPackage/rkbin)) diff --git a/package/boot/rockchip-rkbin/src/bin/rk35/rk3576_bl31_v1.04.elf b/package/boot/rockchip-rkbin/src/bin/rk35/rk3576_bl31_v1.04.elf new file mode 100644 index 0000000000000000000000000000000000000000..3e7963e7d052fb013045b40eadbe35aba1617d48 GIT binary patch literal 349032 zcmeFaeSB2awKu-bIg?~05i*m>3n7v-0Tl;pF(i-(nv)?~3fAHztz6rCnGmd$cyA3s z8->CNP^HH9G7yVZ+e{EFnfAF4RcSM=Ed!{fwJ$U=w70jdlYno<+wvliD45@Ooiis4 zw7pM%zx#Rq_}$Oq^EsSz_RCspfA`vJuf6s@lXW-WdW)(kMR2w(F^>0yaM)`+o1PRC?GhMQQb1 zRt-m<35HD|bzhVs=iF2EZhw8%vdmQ0-*e0TdkRSzK|l}?1Ox#=KoAfF1OY)n5D)|e z0YN|z5CjAPK|l}?1Ox#=KoAfF1OY)n5D)|e0YN|z5CjAPK|l}?1Ox#=KoAfF1OY)n z5D)|e0YN|z5CjAPK|l}?1Ox#=KoAfF1OY)n5D)|e0YN|z5CjAPK|l}?1Ox#=KoAfF z1OY)n5D)|e0YN|z5CjAPK|l}?1Ox#=KoAfF1OY)n5D)|e0YN|z5CjAPK|l}?1Ox#= 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zzL;ktK43DoRWbg~Kep}z7}!!LFSHqhXDL45(zY&U49JvS9BjcO548Ci&HkbdT-w&f z_#@Xi?hE)e4*opL`CP+?evzXMF}Warl*GgjCLXqwPuWT+cgt+KEHom&G2-UO3nj7aY&K#N@x< z`XL5mgN#Ew&lh^y_gg>M&<6+{as-Z_s}fWDe(T41#-6^B2XL5YKC>a>?6-cf!56A= z>d$-H_gg=nb8x`)`tdmc{rg!z#A1Cx_4@IBp6~B`U+4D)_C%r^-x*V~W}wLjbDdm6 zuOG>Eu%Q=nv6Tb%3*;Q;TFwpfQo;9H&{xliJg4^8--SMyTk^8e-{q%zeZDH~|CQp6 ma&PH-N#8^I-qH7rzE|`;qVElTPw0C=-vj#I&-Z+Lb@ty%B(!}1 literal 0 HcmV?d00001 diff --git a/package/boot/uboot-rk3576/Makefile b/package/boot/uboot-rk3576/Makefile new file mode 100644 index 00000000000000..635edbc04b6ce9 --- /dev/null +++ b/package/boot/uboot-rk3576/Makefile @@ -0,0 +1,68 @@ +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=uboot-rockchip +PKG_RELEASE:=2 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL:=https://github.com/ArmSoM/u-boot + +PKG_SOURCE_DATE:=2024-04-18 +PKG_SOURCE_VERSION:=57b8ceed1c31601ef81a5752a78c42e536c42cfe +PKG_MIRROR_HASH:=3ff3904f405e3389e316dfe0d54cc446563d98f610a81622f8bf41894f88a540 + +include $(INCLUDE_DIR)/u-boot.mk +include $(INCLUDE_DIR)/package.mk + +define U-Boot/Default + BUILD_TARGET:=rockchip + UENV:=default + HIDDEN:=1 +endef + +define U-Boot/armsom-sige5-rk3576 + BUILD_SUBTARGET:=armv8 + NAME:=ArmSoM Sige5 + BUILD_DEVICES:= \ + armsom_sige5 + DEPENDS:=+PACKAGE_u-boot-$(1):rkbin-rk3576 + ATF:=rk3576_bl31_v1.04.elf + DDR:=rk3576_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin + TEE:=rk3576_bl32_v1.01.bin + SOC:=rk3576 +endef + +UBOOT_TARGETS := \ + armsom-sige5-rk3576 + +UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes + +UBOOT_MAKE_FLAGS += \ + IDB_SOC=$(SOC) TPL_BIN=$(STAGING_DIR_IMAGE)/$(DDR) u-boot.itb idbloader.img + +define Build/Configure + $(call Build/Configure/U-Boot) + + $(SED) 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config + $(SED) 's#CONFIG_MKIMAGE_DTC_PATH=.*#CONFIG_MKIMAGE_DTC_PATH="$(PKG_BUILD_DIR)/scripts/dtc/dtc"#g' $(PKG_BUILD_DIR)/.config + echo 'CONFIG_IDENT_STRING=" OpenWrt"' >> $(PKG_BUILD_DIR)/.config + $(CP) $(STAGING_DIR_IMAGE)/$(ATF) $(PKG_BUILD_DIR)/bl31.elf +ifneq ($(TEE),) + $(CP) $(STAGING_DIR_IMAGE)/$(TEE) $(PKG_BUILD_DIR)/tee.bin +endif +endef + +define Build/InstallDev + $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(CP) $(PKG_BUILD_DIR)/idbloader.img $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-idbloader.img + $(CP) $(PKG_BUILD_DIR)/u-boot.itb $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.itb +endef + +define Package/u-boot/install/default +endef + +$(eval $(call BuildPackage/U-Boot)) diff --git a/package/boot/uboot-rk3576/patches/001-add-adc-cmd.patch b/package/boot/uboot-rk3576/patches/001-add-adc-cmd.patch new file mode 100644 index 00000000000000..6e389d9a13dafc --- /dev/null +++ b/package/boot/uboot-rk3576/patches/001-add-adc-cmd.patch @@ -0,0 +1,27 @@ +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -589,6 +589,14 @@ config CMD_ARMFLASH + help + ARM Ltd reference designs flash partition access + ++config CMD_ADC ++ bool "adc - Access Analog to Digital Converters info and data" ++ select ADC ++ depends on DM_REGULATOR ++ help ++ Shows ADC device info and permit printing one-shot analog converted ++ data from a named Analog to Digital Converter. ++ + config CMD_CLK + bool "clk - Show clock frequencies" + help +--- a/cmd/Makefile ++++ b/cmd/Makefile +@@ -13,6 +13,7 @@ obj-y += help.o + obj-y += version.o + + # command ++obj-$(CONFIG_CMD_ADC) += adc.o + obj-$(CONFIG_CMD_AES) += aes.o + obj-$(CONFIG_CMD_AMBAPP) += ambapp.o + obj-$(CONFIG_CMD_ANDROID_AB_SELECT) += android_ab_select.o android_cmds.o diff --git a/package/boot/uboot-rk3576/patches/002-adc-channel-mask-api.patch b/package/boot/uboot-rk3576/patches/002-adc-channel-mask-api.patch new file mode 100644 index 00000000000000..25d014b52958a7 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/002-adc-channel-mask-api.patch @@ -0,0 +1,42 @@ +--- a/drivers/adc/adc-uclass.c ++++ b/drivers/adc/adc-uclass.c +@@ -84,6 +84,18 @@ int adc_data_mask(struct udevice *dev, u + return 0; + } + ++int adc_channel_mask(struct udevice *dev, unsigned int *channel_mask) ++{ ++ struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev); ++ ++ if (!uc_pdata) ++ return -ENOSYS; ++ ++ *channel_mask = uc_pdata->channel_mask; ++ ++ return 0; ++} ++ + int adc_stop(struct udevice *dev) + { + const struct adc_ops *ops = dev_get_driver_ops(dev); +--- a/include/adc.h ++++ b/include/adc.h +@@ -220,6 +220,18 @@ int adc_channels_data(struct udevice *de + int adc_data_mask(struct udevice *dev, unsigned int *data_mask); + + /** ++ * adc_channel_mask() - get channel mask for given ADC device ++ * ++ * This can be used if adc uclass platform data is filled. ++ * ++ * @dev: ADC device to check ++ * @channel_mask: pointer to the returned channel bitmask ++ * @return: 0 if OK, -ve on error ++ */ ++int adc_channel_mask(struct udevice *dev, unsigned int *channel_mask); ++ ++ ++/** + * adc_channel_single_shot() - get output data of conversion for the ADC + * device's channel. This function searches for the device with the given name, + * starts the given channel conversion and returns the output data. diff --git a/package/boot/uboot-rk3576/patches/003-adc-raw-to-uv-api.patch b/package/boot/uboot-rk3576/patches/003-adc-raw-to-uv-api.patch new file mode 100644 index 00000000000000..241df4e3de62df --- /dev/null +++ b/package/boot/uboot-rk3576/patches/003-adc-raw-to-uv-api.patch @@ -0,0 +1,58 @@ +--- a/drivers/adc/adc-uclass.c ++++ b/drivers/adc/adc-uclass.c +@@ -7,6 +7,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -365,6 +366,30 @@ nodev: + + return 0; + } ++ ++int adc_raw_to_uV(struct udevice *dev, unsigned int raw, int *uV) ++{ ++ unsigned int data_mask; ++ int ret, val, vref; ++ u64 raw64 = raw; ++ ++ ret = adc_vdd_value(dev, &vref); ++ if (ret) ++ return ret; ++ ++ if (!adc_vss_value(dev, &val)) ++ vref -= val; ++ ++ ret = adc_data_mask(dev, &data_mask); ++ if (ret) ++ return ret; ++ ++ raw64 *= vref; ++ do_div(raw64, data_mask); ++ *uV = raw64; ++ ++ return 0; ++} + + static int adc_vdd_platdata_set(struct udevice *dev) + { +--- a/include/adc.h ++++ b/include/adc.h +@@ -297,4 +297,14 @@ int adc_vss_value(struct udevice *dev, i + */ + int adc_stop(struct udevice *dev); + ++/** ++ * adc_raw_to_uV() - converts raw value to microvolts for given ADC device. ++ * ++ * @dev: ADC device used from conversion ++ * @raw: raw value to convert ++ * @uV: converted value in microvolts ++ * @return: 0 on success or -ve on error ++ */ ++int adc_raw_to_uV(struct udevice *dev, unsigned int raw, int *uV); ++ + #endif diff --git a/package/boot/uboot-rk3576/patches/004-rockchip-saradc-disable-adc-to-volt-convert.patch b/package/boot/uboot-rk3576/patches/004-rockchip-saradc-disable-adc-to-volt-convert.patch new file mode 100644 index 00000000000000..3ad0ccc494210d --- /dev/null +++ b/package/boot/uboot-rk3576/patches/004-rockchip-saradc-disable-adc-to-volt-convert.patch @@ -0,0 +1,32 @@ +From 34bfaa17488e5fd933dad63eacfef4f1c86ebd58 Mon Sep 17 00:00:00 2001 +From: Liangbin Lian +Date: Fri, 26 May 2023 14:25:07 +0800 +Subject: [PATCH] disable adc to volt convert + +--- + drivers/adc/rockchip-saradc-v2.c | 2 ++ + drivers/adc/rockchip-saradc.c | 2 ++ + 2 files changed, 4 insertions(+) + +--- a/drivers/adc/rockchip-saradc-v2.c ++++ b/drivers/adc/rockchip-saradc-v2.c +@@ -207,6 +207,8 @@ static int rockchip_saradc_ofdata_to_pla + uc_pdata->data_format = ADC_DATA_FORMAT_BIN; + uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5; + uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1; ++ uc_pdata->vdd_microvolts = -ENODATA; ++ uc_pdata->vss_microvolts = -ENODATA; + + return 0; + } +--- a/drivers/adc/rockchip-saradc.c ++++ b/drivers/adc/rockchip-saradc.c +@@ -134,6 +134,8 @@ int rockchip_saradc_ofdata_to_platdata(s + uc_pdata->data_format = ADC_DATA_FORMAT_BIN; + uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5; + uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1; ++ uc_pdata->vdd_microvolts = -ENODATA; ++ uc_pdata->vss_microvolts = -ENODATA; + + return 0; + } diff --git a/package/boot/uboot-rk3576/patches/005-rockchip-saradc-supports-rk3568.patch b/package/boot/uboot-rk3576/patches/005-rockchip-saradc-supports-rk3568.patch new file mode 100644 index 00000000000000..7a6c403f0632e6 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/005-rockchip-saradc-supports-rk3568.patch @@ -0,0 +1,24 @@ +--- a/drivers/adc/rockchip-saradc.c ++++ b/drivers/adc/rockchip-saradc.c +@@ -164,6 +164,12 @@ static const struct rockchip_saradc_data + .clk_rate = 1000000, + }; + ++static const struct rockchip_saradc_data rk3568_saradc_data = { ++ .num_bits = 10, ++ .num_channels = 8, ++ .clk_rate = 1000000, ++}; ++ + static const struct udevice_id rockchip_saradc_ids[] = { + { .compatible = "rockchip,saradc", + .data = (ulong)&saradc_data }, +@@ -171,6 +177,8 @@ static const struct udevice_id rockchip_ + .data = (ulong)&rk3066_tsadc_data }, + { .compatible = "rockchip,rk3399-saradc", + .data = (ulong)&rk3399_saradc_data }, ++ { .compatible = "rockchip,rk3568-saradc", ++ .data = (ulong)&rk3568_saradc_data }, + { } + }; + diff --git a/package/boot/uboot-rk3576/patches/006-fix-efi-detection.patch b/package/boot/uboot-rk3576/patches/006-fix-efi-detection.patch new file mode 100644 index 00000000000000..8f755398bff0e2 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/006-fix-efi-detection.patch @@ -0,0 +1,38 @@ +From 40361189b449992e14ff0bd0be18c92167ff8d00 Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Tue, 6 Jun 2023 12:27:39 +0800 +Subject: [PATCH] fix efi detection + +--- + disk/part_efi.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/disk/part_efi.c ++++ b/disk/part_efi.c +@@ -366,7 +366,7 @@ int part_get_info_efi(struct blk_desc *d + return 0; + } + +-#ifdef CONFIG_RKIMG_BOOTLOADER ++#if 0 + #if defined(CONFIG_SPL_KERNEL_BOOT) || !defined(CONFIG_SPL_BUILD) + static void gpt_entry_modify(struct blk_desc *dev_desc, + gpt_entry *gpt_pte, +@@ -489,7 +489,7 @@ static int part_test_efi(struct blk_desc + || (is_pmbr_valid(legacymbr) != 1)) { + return -1; + } +-#ifdef CONFIG_RKIMG_BOOTLOADER ++#if 0 + #if defined(CONFIG_SPL_KERNEL_BOOT) || !defined(CONFIG_SPL_BUILD) + gpt_entry *h_gpt_pte = NULL; + gpt_header *h_gpt_head = NULL; +@@ -1132,7 +1132,7 @@ static int is_pmbr_valid(legacy_mbr * mb + { + int i = 0; + +-#ifdef CONFIG_ARCH_ROCKCHIP ++#if 0 + /* + * In sd-update card, we use RKPARM partition in bootloader to load + * firmware, and use MS-DOS partition in recovery to update system. diff --git a/package/boot/uboot-rk3576/patches/007-supports-legacy-image.patch b/package/boot/uboot-rk3576/patches/007-supports-legacy-image.patch new file mode 100644 index 00000000000000..3601cc2e7301f7 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/007-supports-legacy-image.patch @@ -0,0 +1,20 @@ +From 600dbd1d1ca42e82aa11540954725a7c19952bef Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 16:58:02 +0800 +Subject: [PATCH] supports legacy image + +--- + include/configs/rockchip-common.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -180,6 +180,8 @@ + "run distro_bootcmd;" + #endif + ++#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ ++ + #endif /* CONFIG_SPL_BUILD */ + + #define CONFIG_DISPLAY_BOARDINFO_LATE diff --git a/package/boot/uboot-rk3576/patches/008-fix-source-cmd-bug.patch b/package/boot/uboot-rk3576/patches/008-fix-source-cmd-bug.patch new file mode 100644 index 00000000000000..21d0bd523f2803 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/008-fix-source-cmd-bug.patch @@ -0,0 +1,21 @@ +From fba85cc35e748ce82af8d23c8ae6b7594a927ca1 Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 17:36:35 +0800 +Subject: [PATCH] fix source cmd bug introduced by rk + +11a331d232dea79e25443776ebc3044cbe91d259 +--- + cmd/source.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/cmd/source.c ++++ b/cmd/source.c +@@ -87,7 +87,7 @@ source (ulong addr, const char *fit_unam + * past the zero-terminated sequence of image lengths to get + * to the actual image data + */ +- while (*data++ != IMAGE_PARAM_INVAL); ++ while (*data++); + break; + #endif + #if defined(CONFIG_FIT) diff --git a/package/boot/uboot-rk3576/patches/009-fix-bootargs-not-effect.patch b/package/boot/uboot-rk3576/patches/009-fix-bootargs-not-effect.patch new file mode 100644 index 00000000000000..df95339d0607b0 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/009-fix-bootargs-not-effect.patch @@ -0,0 +1,27 @@ +From ca4343eb308b019c6bc6930361b56306cd3ba55d Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 18:48:45 +0800 +Subject: [PATCH] fix boorargs not in effect + +--- + arch/arm/mach-rockchip/board.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm/mach-rockchip/board.c ++++ b/arch/arm/mach-rockchip/board.c +@@ -1341,6 +1341,7 @@ static void bootargs_add_dtb_dtbo(void * + } + } + ++#ifdef CONFIG_CMD_BOOT_ANDROID + char *board_fdt_chosen_bootargs(void *fdt) + { + int verbose = is_hotkey(HK_CMDLINE); +@@ -1384,6 +1385,7 @@ char *board_fdt_chosen_bootargs(void *fd + + return (char *)bootargs; + } ++#endif + + int ft_verify_fdt(void *fdt) + { diff --git a/package/boot/uboot-rk3576/patches/010-fix-ce.patch b/package/boot/uboot-rk3576/patches/010-fix-ce.patch new file mode 100644 index 00000000000000..0ca6f03ca4aea1 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/010-fix-ce.patch @@ -0,0 +1,34 @@ +From 07015a9f00f8cafb0985ff88bf8beb2731a45559 Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 21:39:00 +0800 +Subject: [PATCH] fix CE without RKIMG_BOOTLOADER + +--- + common/image-android.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/common/image-android.c ++++ b/common/image-android.c +@@ -38,6 +38,7 @@ DECLARE_GLOBAL_DATA_PTR; + static char andr_tmp_str[ANDR_BOOT_ARGS_SIZE + 1]; + static u32 android_kernel_comp_type = IH_COMP_NONE; + ++#ifdef CONFIG_RKIMG_BOOTLOADER + static int android_version_init(void) + { + struct andr_img_hdr *hdr = NULL; +@@ -72,11 +73,13 @@ static int android_version_init(void) + + return (os_version >> 25) & 0x7f; + } ++#endif + + u32 android_bcb_msg_sector_offset(void) + { ++#ifdef CONFIG_RKIMG_BOOTLOADER + static int android_version = -1; /* static */ +- ++#endif + /* + * get android os version: + * diff --git a/package/boot/uboot-rk3576/patches/011-optional-tee.patch b/package/boot/uboot-rk3576/patches/011-optional-tee.patch new file mode 100644 index 00000000000000..c440bb88e773cd --- /dev/null +++ b/package/boot/uboot-rk3576/patches/011-optional-tee.patch @@ -0,0 +1,22 @@ +From 41863d2b0c75b64dbd455eb4ad21936e92584b6a Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 24 Jul 2023 13:48:51 +0800 +Subject: [PATCH] optional tee.bin + +--- + arch/arm/mach-rockchip/fit_nodes.sh | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/mach-rockchip/fit_nodes.sh ++++ b/arch/arm/mach-rockchip/fit_nodes.sh +@@ -167,6 +167,10 @@ function gen_bl32_node() + return + fi + ++ if ! [ -e "tee.bin" ] && ! grep -q '^CONFIG_SPL_OPTEE=y' .config ; then ++ return ++ fi ++ + if [ "${ARCH}" == "arm" ]; then + # If not AArch32 mode + if ! grep -q '^CONFIG_ARM64_BOOT_AARCH32=y' .config ; then diff --git a/package/boot/uboot-rk3576/patches/420-gcc-7-compiler.patch b/package/boot/uboot-rk3576/patches/420-gcc-7-compiler.patch new file mode 100644 index 00000000000000..0951629642751d --- /dev/null +++ b/package/boot/uboot-rk3576/patches/420-gcc-7-compiler.patch @@ -0,0 +1,287 @@ +--- /dev/null ++++ b/include/linux/compiler-gcc7.h +@@ -0,0 +1,284 @@ ++#ifndef __LINUX_COMPILER_H ++#error "Please don't include directly, include instead." ++#endif ++ ++/* ++ * Common definitions for all gcc versions go here. ++ */ ++#define GCC_VERSION (__GNUC__ * 10000 \ ++ + __GNUC_MINOR__ * 100 \ ++ + __GNUC_PATCHLEVEL__) ++ ++/* Optimization barrier */ ++ ++/* The "volatile" is due to gcc bugs */ ++#define barrier() __asm__ __volatile__("": : :"memory") ++/* ++ * This version is i.e. to prevent dead stores elimination on @ptr ++ * where gcc and llvm may behave differently when otherwise using ++ * normal barrier(): while gcc behavior gets along with a normal ++ * barrier(), llvm needs an explicit input variable to be assumed ++ * clobbered. The issue is as follows: while the inline asm might ++ * access any memory it wants, the compiler could have fit all of ++ * @ptr into memory registers instead, and since @ptr never escaped ++ * from that, it proofed that the inline asm wasn't touching any of ++ * it. This version works well with both compilers, i.e. we're telling ++ * the compiler that the inline asm absolutely may see the contents ++ * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 ++ */ ++#define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") ++ ++/* ++ * This macro obfuscates arithmetic on a variable address so that gcc ++ * shouldn't recognize the original var, and make assumptions about it. ++ * ++ * This is needed because the C standard makes it undefined to do ++ * pointer arithmetic on "objects" outside their boundaries and the ++ * gcc optimizers assume this is the case. In particular they ++ * assume such arithmetic does not wrap. ++ * ++ * A miscompilation has been observed because of this on PPC. ++ * To work around it we hide the relationship of the pointer and the object ++ * using this macro. ++ * ++ * Versions of the ppc64 compiler before 4.1 had a bug where use of ++ * RELOC_HIDE could trash r30. The bug can be worked around by changing ++ * the inline assembly constraint from =g to =r, in this particular ++ * case either is valid. ++ */ ++#define RELOC_HIDE(ptr, off) \ ++({ \ ++ unsigned long __ptr; \ ++ __asm__ ("" : "=r"(__ptr) : "0"(ptr)); \ ++ (typeof(ptr)) (__ptr + (off)); \ ++}) ++ ++/* Make the optimizer believe the variable can be manipulated arbitrarily. */ ++#define OPTIMIZER_HIDE_VAR(var) \ ++ __asm__ ("" : "=r" (var) : "0" (var)) ++ ++#ifdef __CHECKER__ ++#define __must_be_array(a) 0 ++#else ++/* &a[0] degrades to a pointer: a different type from an array */ ++#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) ++#endif ++ ++/* ++ * Force always-inline if the user requests it so via the .config, ++ * or if gcc is too old: ++ */ ++#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \ ++ !defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4) ++#define inline inline __attribute__((always_inline)) notrace ++#define __inline__ __inline__ __attribute__((always_inline)) notrace ++#define __inline __inline __attribute__((always_inline)) notrace ++#else ++/* A lot of inline functions can cause havoc with function tracing */ ++#define inline inline notrace ++#define __inline__ __inline__ notrace ++#define __inline __inline notrace ++#endif ++ ++#define __always_inline inline __attribute__((always_inline)) ++#define noinline __attribute__((noinline)) ++ ++#define __deprecated __attribute__((deprecated)) ++#define __packed __attribute__((packed)) ++#define __weak __attribute__((weak)) ++#define __alias(symbol) __attribute__((alias(#symbol))) ++ ++/* ++ * it doesn't make sense on ARM (currently the only user of __naked) ++ * to trace naked functions because then mcount is called without ++ * stack and frame pointer being set up and there is no chance to ++ * restore the lr register to the value before mcount was called. ++ * ++ * The asm() bodies of naked functions often depend on standard calling ++ * conventions, therefore they must be noinline and noclone. ++ * ++ * GCC 4.[56] currently fail to enforce this, so we must do so ourselves. ++ * See GCC PR44290. ++ */ ++#define __naked __attribute__((naked)) noinline __noclone notrace ++ ++#define __noreturn __attribute__((noreturn)) ++ ++/* ++ * From the GCC manual: ++ * ++ * Many functions have no effects except the return value and their ++ * return value depends only on the parameters and/or global ++ * variables. Such a function can be subject to common subexpression ++ * elimination and loop optimization just as an arithmetic operator ++ * would be. ++ * [...] ++ */ ++#define __pure __attribute__((pure)) ++#define __aligned(x) __attribute__((aligned(x))) ++#define __printf(a, b) __attribute__((format(printf, a, b))) ++#define __scanf(a, b) __attribute__((format(scanf, a, b))) ++#define __attribute_const__ __attribute__((__const__)) ++#define __maybe_unused __attribute__((unused)) ++#define __always_unused __attribute__((unused)) ++ ++/* gcc version specific checks */ ++ ++#if GCC_VERSION < 30200 ++# error Sorry, your compiler is too old - please upgrade it. ++#endif ++ ++#if GCC_VERSION < 30300 ++# define __used __attribute__((__unused__)) ++#else ++# define __used __attribute__((__used__)) ++#endif ++ ++#ifdef CONFIG_GCOV_KERNEL ++# if GCC_VERSION < 30400 ++# error "GCOV profiling support for gcc versions below 3.4 not included" ++# endif /* __GNUC_MINOR__ */ ++#endif /* CONFIG_GCOV_KERNEL */ ++ ++#if GCC_VERSION >= 30400 ++#define __must_check __attribute__((warn_unused_result)) ++#define __malloc __attribute__((__malloc__)) ++#endif ++ ++#if GCC_VERSION >= 40000 ++ ++/* GCC 4.1.[01] miscompiles __weak */ ++#ifdef __KERNEL__ ++# if GCC_VERSION >= 40100 && GCC_VERSION <= 40101 ++# error Your version of gcc miscompiles the __weak directive ++# endif ++#endif ++ ++#define __used __attribute__((__used__)) ++#define __compiler_offsetof(a, b) \ ++ __builtin_offsetof(a, b) ++ ++#if GCC_VERSION >= 40100 && GCC_VERSION < 40600 ++# define __compiletime_object_size(obj) __builtin_object_size(obj, 0) ++#endif ++ ++#if GCC_VERSION >= 40300 ++/* Mark functions as cold. gcc will assume any path leading to a call ++ * to them will be unlikely. This means a lot of manual unlikely()s ++ * are unnecessary now for any paths leading to the usual suspects ++ * like BUG(), printk(), panic() etc. [but let's keep them for now for ++ * older compilers] ++ * ++ * Early snapshots of gcc 4.3 don't support this and we can't detect this ++ * in the preprocessor, but we can live with this because they're unreleased. ++ * Maketime probing would be overkill here. ++ * ++ * gcc also has a __attribute__((__hot__)) to move hot functions into ++ * a special section, but I don't see any sense in this right now in ++ * the kernel context ++ */ ++#define __cold __attribute__((__cold__)) ++ ++#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) ++ ++#ifndef __CHECKER__ ++# define __compiletime_warning(message) __attribute__((warning(message))) ++# define __compiletime_error(message) __attribute__((error(message))) ++#endif /* __CHECKER__ */ ++#endif /* GCC_VERSION >= 40300 */ ++ ++#if GCC_VERSION >= 40500 ++/* ++ * Mark a position in code as unreachable. This can be used to ++ * suppress control flow warnings after asm blocks that transfer ++ * control elsewhere. ++ * ++ * Early snapshots of gcc 4.5 don't support this and we can't detect ++ * this in the preprocessor, but we can live with this because they're ++ * unreleased. Really, we need to have autoconf for the kernel. ++ */ ++#define unreachable() __builtin_unreachable() ++ ++/* Mark a function definition as prohibited from being cloned. */ ++#define __noclone __attribute__((__noclone__, __optimize__("no-tracer"))) ++ ++#endif /* GCC_VERSION >= 40500 */ ++ ++#if GCC_VERSION >= 40600 ++/* ++ * When used with Link Time Optimization, gcc can optimize away C functions or ++ * variables which are referenced only from assembly code. __visible tells the ++ * optimizer that something else uses this function or variable, thus preventing ++ * this. ++ */ ++#define __visible __attribute__((externally_visible)) ++#endif ++ ++ ++#if GCC_VERSION >= 40900 && !defined(__CHECKER__) ++/* ++ * __assume_aligned(n, k): Tell the optimizer that the returned ++ * pointer can be assumed to be k modulo n. The second argument is ++ * optional (default 0), so we use a variadic macro to make the ++ * shorthand. ++ * ++ * Beware: Do not apply this to functions which may return ++ * ERR_PTRs. Also, it is probably unwise to apply it to functions ++ * returning extra information in the low bits (but in that case the ++ * compiler should see some alignment anyway, when the return value is ++ * massaged by 'flags = ptr & 3; ptr &= ~3;'). ++ */ ++#define __assume_aligned(a, ...) __attribute__((__assume_aligned__(a, ## __VA_ARGS__))) ++#endif ++ ++/* ++ * GCC 'asm goto' miscompiles certain code sequences: ++ * ++ * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 ++ * ++ * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. ++ * ++ * (asm goto is automatically volatile - the naming reflects this.) ++ */ ++#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) ++ ++#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP ++#if GCC_VERSION >= 40400 ++#define __HAVE_BUILTIN_BSWAP32__ ++#define __HAVE_BUILTIN_BSWAP64__ ++#endif ++#if GCC_VERSION >= 40800 ++#define __HAVE_BUILTIN_BSWAP16__ ++#endif ++#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ ++ ++#if GCC_VERSION >= 50000 ++#define KASAN_ABI_VERSION 4 ++#elif GCC_VERSION >= 40902 ++#define KASAN_ABI_VERSION 3 ++#endif ++ ++#if GCC_VERSION >= 40902 ++/* ++ * Tell the compiler that address safety instrumentation (KASAN) ++ * should not be applied to that function. ++ * Conflicts with inlining: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368 ++ */ ++#define __no_sanitize_address __attribute__((no_sanitize_address)) ++#endif ++ ++#endif /* gcc version >= 40000 specific checks */ ++ ++#if !defined(__noclone) ++#define __noclone /* not needed */ ++#endif ++ ++#if !defined(__no_sanitize_address) ++#define __no_sanitize_address ++#endif ++ ++/* ++ * A trick to suppress uninitialized variable warning without generating any ++ * code ++ */ ++#define uninitialized_var(x) x = x diff --git a/package/boot/uboot-rk3576/patches/430-gcc-8-compiler.patch b/package/boot/uboot-rk3576/patches/430-gcc-8-compiler.patch new file mode 100644 index 00000000000000..55a5182cb4f189 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/430-gcc-8-compiler.patch @@ -0,0 +1,305 @@ +From 7f5421380cc9831be42d24a67544634e55a455db Mon Sep 17 00:00:00 2001 +From: Liangbin Lian +Date: Wed, 2 Jun 2021 16:03:32 +0800 +Subject: [PATCH] support gcc 8 compiler + +--- + include/linux/compiler-gcc8.h | 292 ++++++++++++++++++++++++++++++++++ + 1 file changed, 292 insertions(+) + create mode 100644 include/linux/compiler-gcc8.h + +--- /dev/null ++++ b/include/linux/compiler-gcc8.h +@@ -0,0 +1,292 @@ ++#ifndef __LINUX_COMPILER_H ++#error "Please don't include directly, include instead." ++#endif ++ ++/* ++ * Common definitions for all gcc versions go here. ++ */ ++#define GCC_VERSION (__GNUC__ * 10000 \ ++ + __GNUC_MINOR__ * 100 \ ++ + __GNUC_PATCHLEVEL__) ++ ++/* Optimization barrier */ ++ ++/* The "volatile" is due to gcc bugs */ ++#define barrier() __asm__ __volatile__("": : :"memory") ++/* ++ * This version is i.e. to prevent dead stores elimination on @ptr ++ * where gcc and llvm may behave differently when otherwise using ++ * normal barrier(): while gcc behavior gets along with a normal ++ * barrier(), llvm needs an explicit input variable to be assumed ++ * clobbered. The issue is as follows: while the inline asm might ++ * access any memory it wants, the compiler could have fit all of ++ * @ptr into memory registers instead, and since @ptr never escaped ++ * from that, it proofed that the inline asm wasn't touching any of ++ * it. This version works well with both compilers, i.e. we're telling ++ * the compiler that the inline asm absolutely may see the contents ++ * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 ++ */ ++#define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") ++ ++/* ++ * This macro obfuscates arithmetic on a variable address so that gcc ++ * shouldn't recognize the original var, and make assumptions about it. ++ * ++ * This is needed because the C standard makes it undefined to do ++ * pointer arithmetic on "objects" outside their boundaries and the ++ * gcc optimizers assume this is the case. In particular they ++ * assume such arithmetic does not wrap. ++ * ++ * A miscompilation has been observed because of this on PPC. ++ * To work around it we hide the relationship of the pointer and the object ++ * using this macro. ++ * ++ * Versions of the ppc64 compiler before 4.1 had a bug where use of ++ * RELOC_HIDE could trash r30. The bug can be worked around by changing ++ * the inline assembly constraint from =g to =r, in this particular ++ * case either is valid. ++ */ ++#define RELOC_HIDE(ptr, off) \ ++({ \ ++ unsigned long __ptr; \ ++ __asm__ ("" : "=r"(__ptr) : "0"(ptr)); \ ++ (typeof(ptr)) (__ptr + (off)); \ ++}) ++ ++/* Make the optimizer believe the variable can be manipulated arbitrarily. */ ++#define OPTIMIZER_HIDE_VAR(var) \ ++ __asm__ ("" : "=r" (var) : "0" (var)) ++ ++#ifdef __CHECKER__ ++#define __must_be_array(a) 0 ++#else ++/* &a[0] degrades to a pointer: a different type from an array */ ++#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) ++#endif ++ ++/* ++ * Force always-inline if the user requests it so via the .config, ++ * or if gcc is too old: ++ */ ++#if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \ ++ !defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4) ++#define inline inline __attribute__((always_inline)) notrace ++#define __inline__ __inline__ __attribute__((always_inline)) notrace ++#define __inline __inline __attribute__((always_inline)) notrace ++#else ++/* A lot of inline functions can cause havoc with function tracing */ ++#define inline inline notrace ++#define __inline__ __inline__ notrace ++#define __inline __inline notrace ++#endif ++ ++#define __always_inline inline __attribute__((always_inline)) ++#define noinline __attribute__((noinline)) ++ ++#define __deprecated __attribute__((deprecated)) ++#define __packed __attribute__((packed)) ++#define __weak __attribute__((weak)) ++#define __alias(symbol) __attribute__((alias(#symbol))) ++ ++/* ++ * it doesn't make sense on ARM (currently the only user of __naked) ++ * to trace naked functions because then mcount is called without ++ * stack and frame pointer being set up and there is no chance to ++ * restore the lr register to the value before mcount was called. ++ * ++ * The asm() bodies of naked functions often depend on standard calling ++ * conventions, therefore they must be noinline and noclone. ++ * ++ * GCC 4.[56] currently fail to enforce this, so we must do so ourselves. ++ * See GCC PR44290. ++ */ ++#define __naked __attribute__((naked)) noinline __noclone notrace ++ ++#define __noreturn __attribute__((noreturn)) ++ ++/* ++ * From the GCC manual: ++ * ++ * Many functions have no effects except the return value and their ++ * return value depends only on the parameters and/or global ++ * variables. Such a function can be subject to common subexpression ++ * elimination and loop optimization just as an arithmetic operator ++ * would be. ++ * [...] ++ */ ++#define __pure __attribute__((pure)) ++#define __aligned(x) __attribute__((aligned(x))) ++#define __printf(a, b) __attribute__((format(printf, a, b))) ++#define __scanf(a, b) __attribute__((format(scanf, a, b))) ++#define __attribute_const__ __attribute__((__const__)) ++#define __maybe_unused __attribute__((unused)) ++#define __always_unused __attribute__((unused)) ++ ++/* gcc version specific checks */ ++ ++#if GCC_VERSION < 30200 ++# error Sorry, your compiler is too old - please upgrade it. ++#endif ++ ++#if GCC_VERSION < 30300 ++# define __used __attribute__((__unused__)) ++#else ++# define __used __attribute__((__used__)) ++#endif ++ ++#ifdef CONFIG_GCOV_KERNEL ++# if GCC_VERSION < 30400 ++# error "GCOV profiling support for gcc versions below 3.4 not included" ++# endif /* __GNUC_MINOR__ */ ++#endif /* CONFIG_GCOV_KERNEL */ ++ ++#if GCC_VERSION >= 30400 ++#define __must_check __attribute__((warn_unused_result)) ++#define __malloc __attribute__((__malloc__)) ++#endif ++ ++#if GCC_VERSION >= 40000 ++ ++/* GCC 4.1.[01] miscompiles __weak */ ++#ifdef __KERNEL__ ++# if GCC_VERSION >= 40100 && GCC_VERSION <= 40101 ++# error Your version of gcc miscompiles the __weak directive ++# endif ++#endif ++ ++#define __used __attribute__((__used__)) ++#define __compiler_offsetof(a, b) \ ++ __builtin_offsetof(a, b) ++ ++#if GCC_VERSION >= 40100 && GCC_VERSION < 40600 ++# define __compiletime_object_size(obj) __builtin_object_size(obj, 0) ++#endif ++ ++#if GCC_VERSION >= 40300 ++/* Mark functions as cold. gcc will assume any path leading to a call ++ * to them will be unlikely. This means a lot of manual unlikely()s ++ * are unnecessary now for any paths leading to the usual suspects ++ * like BUG(), printk(), panic() etc. [but let's keep them for now for ++ * older compilers] ++ * ++ * Early snapshots of gcc 4.3 don't support this and we can't detect this ++ * in the preprocessor, but we can live with this because they're unreleased. ++ * Maketime probing would be overkill here. ++ * ++ * gcc also has a __attribute__((__hot__)) to move hot functions into ++ * a special section, but I don't see any sense in this right now in ++ * the kernel context ++ */ ++#define __cold __attribute__((__cold__)) ++ ++#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) ++ ++#ifndef __CHECKER__ ++# define __compiletime_warning(message) __attribute__((warning(message))) ++# define __compiletime_error(message) __attribute__((error(message))) ++#endif /* __CHECKER__ */ ++#endif /* GCC_VERSION >= 40300 */ ++ ++#if GCC_VERSION >= 40500 ++/* ++ * Mark a position in code as unreachable. This can be used to ++ * suppress control flow warnings after asm blocks that transfer ++ * control elsewhere. ++ * ++ * Early snapshots of gcc 4.5 don't support this and we can't detect ++ * this in the preprocessor, but we can live with this because they're ++ * unreleased. Really, we need to have autoconf for the kernel. ++ */ ++#define unreachable() __builtin_unreachable() ++ ++/* Mark a function definition as prohibited from being cloned. */ ++#define __noclone __attribute__((__noclone__, __optimize__("no-tracer"))) ++ ++#endif /* GCC_VERSION >= 40500 */ ++ ++#if GCC_VERSION >= 40600 ++/* ++ * When used with Link Time Optimization, gcc can optimize away C functions or ++ * variables which are referenced only from assembly code. __visible tells the ++ * optimizer that something else uses this function or variable, thus preventing ++ * this. ++ */ ++#define __visible __attribute__((externally_visible)) ++#endif ++ ++ ++#if GCC_VERSION >= 40900 && !defined(__CHECKER__) ++/* ++ * __assume_aligned(n, k): Tell the optimizer that the returned ++ * pointer can be assumed to be k modulo n. The second argument is ++ * optional (default 0), so we use a variadic macro to make the ++ * shorthand. ++ * ++ * Beware: Do not apply this to functions which may return ++ * ERR_PTRs. Also, it is probably unwise to apply it to functions ++ * returning extra information in the low bits (but in that case the ++ * compiler should see some alignment anyway, when the return value is ++ * massaged by 'flags = ptr & 3; ptr &= ~3;'). ++ */ ++#define __assume_aligned(a, ...) __attribute__((__assume_aligned__(a, ## __VA_ARGS__))) ++#endif ++ ++/* ++ * GCC 'asm goto' miscompiles certain code sequences: ++ * ++ * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 ++ * ++ * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. ++ * ++ * (asm goto is automatically volatile - the naming reflects this.) ++ */ ++#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) ++ ++#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP ++#if GCC_VERSION >= 40400 ++#define __HAVE_BUILTIN_BSWAP32__ ++#define __HAVE_BUILTIN_BSWAP64__ ++#endif ++#if GCC_VERSION >= 40800 ++#define __HAVE_BUILTIN_BSWAP16__ ++#endif ++#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ ++ ++#if GCC_VERSION >= 70000 ++#define KASAN_ABI_VERSION 5 ++#elif GCC_VERSION >= 50000 ++#define KASAN_ABI_VERSION 4 ++#elif GCC_VERSION >= 40902 ++#define KASAN_ABI_VERSION 3 ++#endif ++ ++#if GCC_VERSION >= 40902 ++/* ++ * Tell the compiler that address safety instrumentation (KASAN) ++ * should not be applied to that function. ++ * Conflicts with inlining: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67368 ++ */ ++#define __no_sanitize_address __attribute__((no_sanitize_address)) ++#endif ++ ++#endif /* gcc version >= 40000 specific checks */ ++ ++#if !defined(__noclone) ++#define __noclone /* not needed */ ++#endif ++ ++#if !defined(__no_sanitize_address) ++#define __no_sanitize_address ++#endif ++ ++/* ++ * A trick to suppress uninitialized variable warning without generating any ++ * code ++ */ ++#define uninitialized_var(x) x = x ++ ++#if GCC_VERSION >= 80000 ++#define __diag_GCC_8(s) __diag(s) ++#else ++#define __diag_GCC_8(s) ++#endif diff --git a/package/boot/uboot-rk3576/patches/900-rk35-tftp-speed.patch b/package/boot/uboot-rk3576/patches/900-rk35-tftp-speed.patch new file mode 100644 index 00000000000000..3c752777567374 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/900-rk35-tftp-speed.patch @@ -0,0 +1,68 @@ +From c291573436be43868a0963103985543e82d73cc7 Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 12:44:57 +0800 +Subject: [PATCH] rk35: tftp speed + +--- + include/configs/evb_rk3528.h | 11 ++++++++++++ + include/configs/evb_rk3568.h | 12 ++++++++++++ + include/configs/evb_rk3588.h | 12 ++++++++++++ + 3 files changed, 35 insertions(+) + +--- a/include/configs/evb_rk3528.h ++++ b/include/configs/evb_rk3528.h +@@ -23,4 +23,15 @@ + #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND + #endif + ++/* ++ * TFTP speed up, by enable ip fragment, and set default blksize to MTU. ++ * Use `env set tftpblocksize 16384` to override blksize, max CONFIG_NET_MAXDEFRAG. ++ * MUST: CONFIG_TFTP_BLOCKSIZE <= CONFIG_NET_MAXDEFRAG ++ */ ++#define CONFIG_IP_DEFRAG ++/* ip fragment, CONFIG_NET_MAXDEFRAG , default 16384, max 65536 */ ++/* #define CONFIG_NET_MAXDEFRAG 16384 */ ++#define CONFIG_UDP_CHECKSUM ++#define CONFIG_TFTP_BLOCKSIZE 1468 ++ + #endif /* __CONFIGS_RK3528_EVB_H */ +--- a/include/configs/evb_rk3568.h ++++ b/include/configs/evb_rk3568.h +@@ -60,4 +60,16 @@ + + #endif /* CONFIG_ANDROID_AB */ + #endif /* CONFIG_SPL_BUILD */ ++ ++/* ++ * TFTP speed up, by enable ip fragment, and set default blksize to MTU. ++ * Use `env set tftpblocksize 16384` to override blksize, max CONFIG_NET_MAXDEFRAG. ++ * MUST: CONFIG_TFTP_BLOCKSIZE <= CONFIG_NET_MAXDEFRAG ++ */ ++#define CONFIG_IP_DEFRAG ++/* ip fragment, CONFIG_NET_MAXDEFRAG , default 16384, max 65536 */ ++/* #define CONFIG_NET_MAXDEFRAG 16384 */ ++#define CONFIG_UDP_CHECKSUM ++#define CONFIG_TFTP_BLOCKSIZE 1468 ++ + #endif /* __CONFIGS_RK3568_EVB_H */ +--- a/include/configs/evb_rk3588.h ++++ b/include/configs/evb_rk3588.h +@@ -22,4 +22,16 @@ + #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND + + #endif ++ ++/* ++ * TFTP speed up, by enable ip fragment, and set default blksize to MTU. ++ * Use `env set tftpblocksize 16384` to override blksize, max CONFIG_NET_MAXDEFRAG. ++ * MUST: CONFIG_TFTP_BLOCKSIZE <= CONFIG_NET_MAXDEFRAG ++ */ ++#define CONFIG_IP_DEFRAG ++/* ip fragment, CONFIG_NET_MAXDEFRAG , default 16384, max 65536 */ ++/* #define CONFIG_NET_MAXDEFRAG 16384 */ ++#define CONFIG_UDP_CHECKSUM ++#define CONFIG_TFTP_BLOCKSIZE 1468 ++ + #endif +\ No newline at end of file diff --git a/package/boot/uboot-rk3576/patches/901-rk3568-disable-usb30-pcie.patch b/package/boot/uboot-rk3576/patches/901-rk3568-disable-usb30-pcie.patch new file mode 100644 index 00000000000000..6834af5cf1a6f7 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/901-rk3568-disable-usb30-pcie.patch @@ -0,0 +1,40 @@ +From 88d321d1512bbe4589985150997e559a3d8ac83f Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 12:40:10 +0800 +Subject: [PATCH] disable pcie and usb3.0 on rk3568 + +--- + arch/arm/dts/rk3568-u-boot.dtsi | 15 +++++---------- + 1 file changed, 5 insertions(+), 10 deletions(-) + +--- a/arch/arm/dts/rk3568-u-boot.dtsi ++++ b/arch/arm/dts/rk3568-u-boot.dtsi +@@ -67,6 +67,11 @@ + + &usbdrd_dwc3 { + u-boot,dm-pre-reloc; ++ phys = <&u2phy0_otg>; ++ phy-names = "usb2-phy"; ++ extcon = <&usb2phy0>; ++ maximum-speed = "high-speed"; /* only USB2.0 */ ++ snps,dis_u2_susphy_quirk; /* only USB2.0 */ + status = "okay"; + }; + +@@ -376,16 +381,6 @@ + u-boot,dm-pre-reloc; + }; + +-&pcie30phy { +- u-boot,dm-pre-reloc; +- status = "okay"; +-}; +- +-&pcie3x2 { +- u-boot,dm-pre-reloc; +- status = "okay"; +-}; +- + &pinctrl { + u-boot,dm-spl; + status = "okay"; diff --git a/package/boot/uboot-rk3576/patches/902-disable-auto-net-boot.patch b/package/boot/uboot-rk3576/patches/902-disable-auto-net-boot.patch new file mode 100644 index 00000000000000..4db0406328fb0c --- /dev/null +++ b/package/boot/uboot-rk3576/patches/902-disable-auto-net-boot.patch @@ -0,0 +1,13 @@ +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -108,9 +108,7 @@ + BOOT_TARGET_MMC(func) \ + BOOT_TARGET_MTD(func) \ + BOOT_TARGET_RKNAND(func) \ +- BOOT_TARGET_USB(func) \ +- BOOT_TARGET_PXE(func) \ +- BOOT_TARGET_DHCP(func) ++ BOOT_TARGET_USB(func) + + #ifdef CONFIG_ARM64 + #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0" diff --git a/package/boot/uboot-rk3576/patches/903-skip-android-boot.patch b/package/boot/uboot-rk3576/patches/903-skip-android-boot.patch new file mode 100644 index 00000000000000..3b3e8801e554b2 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/903-skip-android-boot.patch @@ -0,0 +1,28 @@ +From f9dced95ce10893799be34534f605b34d15f3c39 Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 16:43:41 +0800 +Subject: [PATCH] skip android boot when cmd disabled + +--- + include/configs/rockchip-common.h | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/include/configs/rockchip-common.h ++++ b/include/configs/rockchip-common.h +@@ -170,12 +170,15 @@ + #elif defined(CONFIG_FIT_SIGNATURE) + #define RKIMG_BOOTCOMMAND \ + "boot_fit;" +-#else ++#elif defined(CONFIG_CMD_BOOT_ANDROID) + #define RKIMG_BOOTCOMMAND \ + "boot_android ${devtype} ${devnum};" \ + "boot_fit;" \ + "bootrkp;" \ + "run distro_bootcmd;" ++#else ++#define RKIMG_BOOTCOMMAND \ ++ "run distro_bootcmd;" + #endif + + #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ diff --git a/package/boot/uboot-rk3576/patches/910-build-idb.patch b/package/boot/uboot-rk3576/patches/910-build-idb.patch new file mode 100644 index 00000000000000..2c9fa88665c352 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/910-build-idb.patch @@ -0,0 +1,33 @@ +From bb0df1fab4c945947d99022c2dc22ad25ab90165 Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 14:59:01 +0800 +Subject: [PATCH] build idb + +--- + Makefile | 8 ++++++++ + 1 files changed, 8 insertions(+) + +--- a/Makefile ++++ b/Makefile +@@ -854,6 +854,9 @@ quiet_cmd_mkimage = MKIMAGE $@ + cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \ + $(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT)) + ++cmd_mkimage_combined = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $(COMBINED_FILE_$(@F)):$< $@ \ ++ $(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT)) ++ + quiet_cmd_mkfitimage = MKIMAGE $@ + cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -E $@ \ + $(if $(KBUILD_VERBOSE:1=), >$(MKIMAGEOUTPUT)) +@@ -1079,6 +1082,11 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I bi + u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE + $(call if_changed,pad_cat) + ++MKIMAGEFLAGS_idbloader.img = -n $(IDB_SOC) -T rksd ++COMBINED_FILE_idbloader.img = $(TPL_BIN) ++idbloader.img: spl/u-boot-spl.bin FORCE ++ $(call if_changed,mkimage_combined) ++ + MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE) + + lpc32xx-spl.img: spl/u-boot-spl.bin FORCE diff --git a/package/boot/uboot-rk3576/patches/911-fix-itb-ce.patch b/package/boot/uboot-rk3576/patches/911-fix-itb-ce.patch new file mode 100644 index 00000000000000..a1672bfc120602 --- /dev/null +++ b/package/boot/uboot-rk3576/patches/911-fix-itb-ce.patch @@ -0,0 +1,29 @@ +From 68c654bb60aba401e382174fb08ae41173c5ec9b Mon Sep 17 00:00:00 2001 +From: jjm2473 <1129525450@qq.com> +Date: Mon, 5 Jun 2023 16:10:50 +0800 +Subject: [PATCH] fix itb ce + +--- + Makefile | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/Makefile ++++ b/Makefile +@@ -1021,7 +1021,7 @@ U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT + else + ifneq ($(CONFIG_SPL_FIT_GENERATOR),"") + U_BOOT_ITS := u-boot.its +-$(U_BOOT_ITS): FORCE ++$(U_BOOT_ITS): u-boot FORCE + $(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \ + $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@ + endif +@@ -1059,7 +1059,7 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-b + $(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin dts/dt.dtb,u-boot.bin) FORCE + $(call if_changed,mkimage) + +-u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE ++u-boot.itb: u-boot-nodtb.bin u-boot.dtb $(U_BOOT_ITS) FORCE + $(call if_changed,mkfitimage) + + u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE diff --git a/package/boot/uboot-rk3576/src/arch/arm/dts/rk3576-armsom-sige5.dts b/package/boot/uboot-rk3576/src/arch/arm/dts/rk3576-armsom-sige5.dts new file mode 100644 index 00000000000000..8bccf05021285f --- /dev/null +++ b/package/boot/uboot-rk3576/src/arch/arm/dts/rk3576-armsom-sige5.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; +#include "rk3576.dtsi" +#include "rk3576-u-boot.dtsi" +#include + +/ { + model = "ArmSoM Sige5"; + compatible = "armsom,sige5", "rockchip,rk3576"; +}; diff --git a/package/boot/uboot-rk3576/src/cmd/adc.c b/package/boot/uboot-rk3576/src/cmd/adc.c new file mode 100644 index 00000000000000..9d95d0614458d7 --- /dev/null +++ b/package/boot/uboot-rk3576/src/cmd/adc.c @@ -0,0 +1,188 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 BayLibre, SAS + * Author: Neil Armstrong + */ +#include +#include +#include +#include + +static int do_adc_list(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct udevice *dev; + int ret, err; + + ret = err = uclass_first_device_check(UCLASS_ADC, &dev); + + while (dev) { + printf("- %s status: %i\n", dev->name, ret); + + ret = uclass_next_device_check(&dev); + if (ret) + err = ret; + } + + return err ? CMD_RET_FAILURE : CMD_RET_SUCCESS; +} + +static int do_adc_info(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct udevice *dev; + unsigned int data_mask, ch_mask; + int ret, vss, vdd; + + if (argc < 2) + return CMD_RET_USAGE; + + ret = uclass_get_device_by_name(UCLASS_ADC, argv[1], &dev); + if (ret) { + printf("Unknown ADC device %s\n", argv[1]); + return CMD_RET_FAILURE; + } + + printf("ADC Device '%s' :\n", argv[1]); + + ret = adc_channel_mask(dev, &ch_mask); + if (!ret) + printf("channel mask: %x\n", ch_mask); + + ret = adc_data_mask(dev, &data_mask); + if (!ret) + printf("data mask: %x\n", data_mask); + + ret = adc_vdd_value(dev, &vdd); + if (!ret) + printf("vdd: %duV\n", vdd); + + ret = adc_vss_value(dev, &vss); + if (!ret) + printf("vss: %duV\n", vss); + + return CMD_RET_SUCCESS; +} + +static int do_adc_single(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + char *varname = NULL; + struct udevice *dev; + unsigned int data; + int ret, uV, val; + + if (argc < 3) + return CMD_RET_USAGE; + + if (argc >= 4) + varname = argv[3]; + + ret = adc_channel_single_shot(argv[1], simple_strtol(argv[2], NULL, 0), + &data); + if (ret) { + printf("Error getting single shot for device %s channel %s (ret=%d)\n", + argv[1], argv[2], ret); + return CMD_RET_FAILURE; + } + + ret = uclass_get_device_by_name(UCLASS_ADC, argv[1], &dev); + if (!ret && !adc_raw_to_uV(dev, data, &uV)) { + val = uV; + printf("%u, %d uV\n", data, uV); + } else { + val = data; + printf("%u\n", data); + } + + if (varname) + env_set_ulong(varname, val); + + return CMD_RET_SUCCESS; +} + +static int do_adc_scan(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + struct adc_channel ch[ADC_MAX_CHANNEL]; + struct udevice *dev; + unsigned int ch_mask; + int i, chan, ret, uV; + + if (argc < 2) + return CMD_RET_USAGE; + + ret = uclass_get_device_by_name(UCLASS_ADC, argv[1], &dev); + if (ret) { + pr_err("Can't get the ADC %s: %d\n", argv[1], ret); + return CMD_RET_FAILURE; + } + + switch (argc) { + case 3: + ch_mask = simple_strtoul(argv[2], NULL, 0); + if (ch_mask) + break; + case 2: + ret = adc_channel_mask(dev, &ch_mask); + if (ret) { + pr_err("Can't get mask for %s: %d\n", dev->name, ret); + return CMD_RET_FAILURE; + } + break; + } + + ret = adc_channels_single_shot(dev->name, ch_mask, ch); + if (ret) { + pr_err("Can't get single shot for %s (chans mask: 0x%x): %d\n", + dev->name, ch_mask, ret); + return CMD_RET_FAILURE; + } + + for (chan = 0, i = 0; chan < ADC_MAX_CHANNEL; chan++) { + if (!(ch_mask & ADC_CHANNEL(chan))) + continue; + if (!adc_raw_to_uV(dev, ch[i].data, &uV)) + printf("[%02d]: %u, %d uV\n", ch[i].id, ch[i].data, uV); + else + printf("[%02d]: %u\n", ch[i].id, ch[i].data); + i++; + } + + return CMD_RET_SUCCESS; +} + +static cmd_tbl_t cmd_adc_sub[] = { + U_BOOT_CMD_MKENT(list, 1, 1, do_adc_list, "", ""), + U_BOOT_CMD_MKENT(info, 2, 1, do_adc_info, "", ""), + U_BOOT_CMD_MKENT(single, 4, 1, do_adc_single, "", ""), + U_BOOT_CMD_MKENT(scan, 3, 1, do_adc_scan, "", ""), +}; + +static int do_adc(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + cmd_tbl_t *c; + + if (argc < 2) + return CMD_RET_USAGE; + + /* Strip off leading 'adc' command argument */ + argc--; + argv++; + + c = find_cmd_tbl(argv[0], &cmd_adc_sub[0], ARRAY_SIZE(cmd_adc_sub)); + + if (c) + return c->cmd(cmdtp, flag, argc, argv); + else + return CMD_RET_USAGE; +} + +static char adc_help_text[] = + "list - list ADC devices\n" + "adc info - Get ADC device info\n" + "adc single [varname] - Get Single data of ADC device channel\n" + "adc scan [channel mask] - Scan all [or masked] ADC channels"; + +U_BOOT_CMD(adc, 5, 1, do_adc, "ADC sub-system", adc_help_text); diff --git a/package/boot/uboot-rk3576/src/configs/armsom-sige5-rk3576_defconfig b/package/boot/uboot-rk3576/src/configs/armsom-sige5-rk3576_defconfig new file mode 100644 index 00000000000000..8d6e4aa8f8ba5f --- /dev/null +++ b/package/boot/uboot-rk3576/src/configs/armsom-sige5-rk3576_defconfig @@ -0,0 +1,222 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x80000 +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" +CONFIG_ROCKCHIP_RK3576=y +CONFIG_ROCKCHIP_FIT_IMAGE=y +CONFIG_ROCKCHIP_VENDOR_PARTITION=y +CONFIG_USING_KERNEL_DTB_V2=y +CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y +CONFIG_ROCKCHIP_NEW_IDB=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_TARGET_EVB_RK3576=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_ARMV8_CRYPTO=y +CONFIG_DEFAULT_DEVICE_TREE="rk3576-armsom-sige5" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_IMAGE_POST_PROCESS=y +CONFIG_FIT_HW_CRYPTO=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y +CONFIG_SPL_FIT_HW_CRYPTO=y +# CONFIG_SPL_SYS_DCACHE_OFF is not set +CONFIG_BOOTDELAY=0 +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_ANDROID_BOOTLOADER=y +CONFIG_ANDROID_AVB=y +CONFIG_ANDROID_BOOT_IMAGE_HASH=y +CONFIG_BOARD_RNG_SEED=y +CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 +CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_UFS_SUPPORT=y +CONFIG_SPL_ATF=y +CONFIG_SPL_AB=y +CONFIG_FASTBOOT_BUF_ADDR=0x40c00800 +CONFIG_FASTBOOT_BUF_SIZE=0x07000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_DTIMG=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_LZMADEC is not set +# CONFIG_CMD_UNZIP is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_BOOT_ANDROID=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_UFS=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_TFTP_BOOTM=y +CONFIG_CMD_TFTP_FLASH=y +# CONFIG_CMD_MISC is not set +CONFIG_CMD_MTD_BLK=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_DTB_MINIMUM=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +# CONFIG_NET_TFTP_VARS is not set +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +# CONFIG_SARADC_ROCKCHIP is not set +CONFIG_SARADC_ROCKCHIP_V2=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_SCMI=y +CONFIG_DM_CRYPTO=y +CONFIG_SPL_DM_CRYPTO=y +CONFIG_ROCKCHIP_CRYPTO_V2=y +CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y +CONFIG_SCMI_FIRMWARE=y +CONFIG_GPIO_HOG=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_ROCKCHIP_GPIO_V2=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_I2C_MUX=y +CONFIG_DM_KEY=y +CONFIG_RK8XX_PWRKEY=y +CONFIG_ADC_KEY=y +CONFIG_MISC=y +CONFIG_SPL_MISC=y +CONFIG_MISC_DECOMPRESS=y +CONFIG_SPL_MISC_DECOMPRESS=y +CONFIG_ROCKCHIP_HW_DECOMPRESS=y +CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y +CONFIG_SPL_ROCKCHIP_SECURE_OTP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_MTD=y +CONFIG_MTD_BLK=y +CONFIG_MTD_DEVICE=y +CONFIG_MTD_SPI_NAND=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0x1 +CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_FUEL_GAUGE=y +CONFIG_POWER_FG_CW201X=y +CONFIG_POWER_FG_CW221X=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_DM_POWER_DELIVERY=y +CONFIG_TYPEC_TCPM=y +CONFIG_TYPEC_TCPCI=y +CONFIG_TYPEC_HUSB311=y +CONFIG_TYPEC_FUSB302=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_CHARGER_BQ25700=y +CONFIG_CHARGER_BQ25890=y +CONFIG_CHARGER_SGM41542=y +CONFIG_DM_CHARGE_DISPLAY=y +CONFIG_CHARGE_ANIMATION=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DM_RESET=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_RESET_ROCKCHIP=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_BASE=0x2ad40000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_ROCKCHIP_SFC=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Rockchip" +CONFIG_USB_GADGET_VENDOR_NUM=0x2207 +CONFIG_USB_GADGET_PRODUCT_NUM=0x350e +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_UFS=y +CONFIG_ROCKCHIP_UFS=y +CONFIG_DM_VIDEO=y +CONFIG_DISPLAY=y +CONFIG_DRM_ROCKCHIP=y +CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y +CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y +CONFIG_DRM_ROCKCHIP_DW_DP=y +CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y +CONFIG_DRM_ROCKCHIP_RGB=y +CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y +CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_LIB_RAND=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_RSA_N_SIZE=0x200 +CONFIG_RSA_E_SIZE=0x10 +CONFIG_RSA_C_SIZE=0x20 +CONFIG_XBC=y +CONFIG_LZ4=y +CONFIG_SPL_GZIP=y +CONFIG_ERRNO_STR=y +# CONFIG_EFI_LOADER is not set +CONFIG_AVB_LIBAVB=y +CONFIG_AVB_LIBAVB_AB=y +CONFIG_AVB_LIBAVB_ATX=y +CONFIG_AVB_LIBAVB_USER=y +CONFIG_RK_AVB_LIBAVB_USER=y +CONFIG_OPTEE_CLIENT=y +CONFIG_OPTEE_V2=y diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index aebbb372f38dc2..b2202a4f910290 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -31,6 +31,7 @@ rockchip_setup_interfaces() ;; armsom,sige1|\ armsom,sige3|\ + armsom,sige5|\ armsom,sige7|\ fastrhino,r66s|\ firefly,rk3568-roc-pc|\ @@ -99,6 +100,7 @@ rockchip_setup_macs() case "$board" in advantech,rsb4810|\ ariaboard,photonicat|\ + armsom,sige5|\ codinge,xiaobao-nas-v1|\ dilusense,dlfr100|\ ezpro,mrkaio-m68s|\ diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index cc30c5751a07da..727745867392f4 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -31,6 +31,7 @@ set_interface_core() { case "$(board_name)" in armsom,sige1|\ armsom,sige3|\ +armsom,sige5|\ armsom,sige7|\ hinlink,opc-h28k|\ radxa,e20c|\ diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts new file mode 100644 index 00000000000000..fad6a3fe86d19e --- /dev/null +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts @@ -0,0 +1,664 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3576.dtsi" + +/ { + model = "ArmSoM Sige5"; + compatible = "armsom,sige5", "rockchip,rk3576"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc; + + led-boot = &red_led; + led-failsafe = &red_led; + led-running = &red_led; + led-upgrade = &red_led; + }; + + chosen { + stdout-path = "serial0:1500000n8"; + }; + + leds: leds { + compatible = "gpio-leds"; + + green_led: green-led { + label = "green:heartbeat"; + gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + red_led: red-led { + label = "red:status"; + gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + }; + }; + + vcc_12v0_dcin: regulator-vcc-12v0-dcin { + compatible = "regulator-fixed"; + regulator-name = "vcc_12v0_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc_5v0_sys>; + }; + + vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v2_ufs_vccq_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vcc_5v0_sys>; + }; + + vcc_1v8_s0: regulator-vcc-1v8-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_s3>; + }; + + vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8_ufs_vccq2_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_s3>; + }; + + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_2v0_pldo_s3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + vin-supply = <&vcc_5v0_sys>; + }; + + vcc_3v3_pcie: regulator-vcc-3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>; + startup-delay-us = <5000>; + vin-supply = <&vcc_5v0_sys>; + }; + + vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_rtc_s5"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_5v0_sys>; + }; + + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc_5v0_sys: regulator-vcc-5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_12v0_dcin>; + }; + + vcc_5v0_device: regulator-vcc-5v0-device { + compatible = "regulator-fixed"; + regulator-name = "vcc_5v0_device"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc_12v0_dcin>; + }; + + vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3_ufs_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_5v0_sys>; + }; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&gmac0 { + phy-mode = "rgmii-id"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + + pinctrl-names = "default"; + pinctrl-0 = <ð0m0_miim + ð0m0_tx_bus2 + ð0m0_rx_bus2 + ð0m0_rgmii_clk + ð0m0_rgmii_bus + ðm0_clk0_25m_out>; + + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii-id"; + clock_in_out = "output"; + + snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + + pinctrl-names = "default"; + pinctrl-0 = <ð1m0_miim + ð1m0_tx_bus2 + ð1m0_rx_bus2 + ð1m0_rgmii_clk + ð1m0_rgmii_bus + ðm0_clk1_25m_out>; + + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + pmic@23 { + compatible = "rockchip,rk806"; + reg = <0x23>; + + interrupt-parent = <&gpio0>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + system-power-controller; + + vcc1-supply = <&vcc_5v0_sys>; + vcc2-supply = <&vcc_5v0_sys>; + vcc3-supply = <&vcc_5v0_sys>; + vcc4-supply = <&vcc_5v0_sys>; + vcc5-supply = <&vcc_5v0_sys>; + vcc6-supply = <&vcc_5v0_sys>; + vcc7-supply = <&vcc_5v0_sys>; + vcc8-supply = <&vcc_5v0_sys>; + vcc9-supply = <&vcc_5v0_sys>; + vcc10-supply = <&vcc_5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc_5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc_5v0_sys>; + + gpio-controller; + #gpio-cells = <2>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + rk806_dvs1_slp: dvs1-slp-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun1"; + }; + + rk806_dvs1_pwrdn: dvs1-pwrdn-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun2"; + }; + + rk806_dvs1_rst: dvs1-rst-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun3"; + }; + + rk806_dvs2_slp: dvs2-slp-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun1"; + }; + + rk806_dvs2_pwrdn: dvs2-pwrdn-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun2"; + }; + + rk806_dvs2_rst: dvs2-rst-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun3"; + }; + + rk806_dvs2_dvs: dvs2-dvs-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun4"; + }; + + rk806_dvs2_gpio: dvs2-gpio-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun5"; + }; + + rk806_dvs3_slp: dvs3-slp-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun1"; + }; + + rk806_dvs3_pwrdn: dvs3-pwrdn-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun2"; + }; + + rk806_dvs3_rst: dvs3-rst-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun3"; + }; + + rk806_dvs3_dvs: dvs3-dvs-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun4"; + }; + + rk806_dvs3_gpio: dvs3-gpio-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun5"; + }; + + regulators { + vdd_cpu_big_s0: dcdc-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_big_s0"; + regulator-enable-ramp-delay = <400>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_npu_s0: dcdc-reg2 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_npu_s0"; + regulator-enable-ramp-delay = <400>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vcc_3v3_s3: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd_gpu_s0: dcdc-reg5 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vddq_ddr_s0: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <800000>; + regulator-name = "vdd_logic_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd_ddr_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_1v8_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo2_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pldo2_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdda_1v2_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcca_3v3_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pldo6_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdda_ddr_pll_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v75_hdmi_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <837500>; + regulator-max-microvolt = <837500>; + regulator-name = "vdda0v75_hdmi_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdda_0v85_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdda_0v75_s0"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c2 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + clock-output-names = "hym8563"; + interrupt-parent = <&gpio0>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + wakeup-source; + #clock-cells = <0>; + }; +}; + +&mdio0 { + rgmii_phy0: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + clocks = <&cru REFCLKO25M_GMAC0_OUT>; + realtek,led-data = <0x6d60>; + }; +}; + +&mdio1 { + rgmii_phy1: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + clocks = <&cru REFCLKO25M_GMAC1_OUT>; + realtek,led-data = <0x6d60>; + }; +}; + +&pinctrl { + headphone { + hp_det: hp-det { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + led_rgb_r: led-red-en { + rockchip,pins = <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + led_rgb_g: led-green-en { + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdhci { + bus-width = <8>; + full-pwr-cycle-in-suspend; + max-frequency = <200000000>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + no-sdio; + no-sd; + non-removable; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + max-frequency = <200000000>; + no-sdio; + no-mmc; + sd-uhs-sdr50; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0m0_xfer>; + status = "okay"; +}; diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 270bd18b0708ef..dcdf3a758c4be2 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -43,6 +43,17 @@ define Device/armsom_sige3 endef TARGET_DEVICES += armsom_sige3 +define Device/armsom_sige5 + DEVICE_VENDOR := ArmSoM + DEVICE_MODEL := Sige5 + SOC := rk3576 + DEVICE_DTS := rockchip/rk3576-armsom-sige5 + UBOOT_DEVICE_NAME := armsom-sige5-rk3576 + IMAGE/sysupgrade.img.gz := boot-common | boot-script rk3528 | pine64-img | gzip | append-metadata + DEVICE_PACKAGES := kmod-brcmfmac brcmfmac-firmware-43752-sdio brcmfmac-nvram-43752-sdio wpad +endef +TARGET_DEVICES += armsom_sige5 + define Device/armsom_sige7 DEVICE_VENDOR := ArmSoM DEVICE_MODEL := Sige7 diff --git a/target/linux/rockchip/image/rk3528.bootscript b/target/linux/rockchip/image/rk3528.bootscript index 3ebc48eb30878a..71d23e21ceec36 100644 --- a/target/linux/rockchip/image/rk3528.bootscript +++ b/target/linux/rockchip/image/rk3528.bootscript @@ -1,6 +1,12 @@ part uuid mmc ${devnum}:2 uuid -setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32,0xff9f0000 root=PARTUUID=${uuid} rw rootwait" +if test $stdout = 'serial@2ad40000'; +then serial_addr=',0x2ad40000'; +elif test $stdout = 'serial@ff9f0000'; +then serial_addr=',0xff9f0000'; +fi; + +setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32${serial_addr} root=PARTUUID=${uuid} rw rootwait" load mmc ${devnum}:1 ${fdt_addr_r} rockchip.dtb load mmc ${devnum}:1 ${kernel_addr_r} kernel.img