From 71dd3cebd06e1a1c8cf05996062187aff09f17a1 Mon Sep 17 00:00:00 2001 From: tongtongcao Date: Thu, 2 Nov 2023 09:37:12 -0400 Subject: [PATCH 1/4] update readout system with DAQ configuration for 2016 MC --- ...ionWithPulserDataMergingReadoutDriver.java | 1 - ...ionWithPulserDataMergingReadoutDriver.java | 3 +- .../EcalDigitizationReadoutDriver.java | 40 +- .../EcalRawConverterReadoutDriver.java | 30 ++ .../ecal/updated/GTPClusterReadoutDriver.java | 29 ++ .../HodoscopeDigitizationReadoutDriver.java | 5 +- .../AbstractBaseRawConverter.java | 14 + .../EcalReadoutMode3RawConverter.java | 2 + .../trigger/PairTriggerReadoutDriver.java | 43 ++ .../trigger/SinglesTriggerReadoutDriver.java | 39 ++ .../hps/record/daqconfig/DAQConfigDriver.java | 88 ++++ .../hps/record/daqconfig/EvioDAQParser.java | 44 ++ .../hps/record/daqconfig/2016_v8_200nA_37.txt | 489 ++++++++++++++++++ .../hps/record/daqconfig/2016_v8_200nA_39.txt | 489 ++++++++++++++++++ .../hps/record/daqconfig/2016_v8_200nA_46.txt | 422 +++++++++++++++ .../readout/PhysicsRun2016TrigPairs.lcsim | 261 ++++++++++ .../readout/PhysicsRun2016TrigSingles.lcsim | 249 +++++++++ 17 files changed, 2240 insertions(+), 8 deletions(-) create mode 100644 record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt create mode 100644 record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt create mode 100644 record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt create mode 100644 steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigPairs.lcsim create mode 100644 steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigSingles.lcsim diff --git a/digi/src/main/java/org/hps/digi/EcalDigitizationWithPulserDataMergingReadoutDriver.java b/digi/src/main/java/org/hps/digi/EcalDigitizationWithPulserDataMergingReadoutDriver.java index 52015f0aae..5eca8ea45c 100644 --- a/digi/src/main/java/org/hps/digi/EcalDigitizationWithPulserDataMergingReadoutDriver.java +++ b/digi/src/main/java/org/hps/digi/EcalDigitizationWithPulserDataMergingReadoutDriver.java @@ -81,7 +81,6 @@ public void actionPerformed(ActionEvent e) { // Get the FADC configuration. config = daq.getEcalFADCConfig(); configStat = true; - integrationThreshold = config.getThreshold((int)10); } }); } diff --git a/digi/src/main/java/org/hps/digi/HodoscopeDigitizationWithPulserDataMergingReadoutDriver.java b/digi/src/main/java/org/hps/digi/HodoscopeDigitizationWithPulserDataMergingReadoutDriver.java index 65b267c575..a989c48258 100644 --- a/digi/src/main/java/org/hps/digi/HodoscopeDigitizationWithPulserDataMergingReadoutDriver.java +++ b/digi/src/main/java/org/hps/digi/HodoscopeDigitizationWithPulserDataMergingReadoutDriver.java @@ -77,6 +77,8 @@ public HodoscopeDigitizationWithPulserDataMergingReadoutDriver() { setNumberSamplesBefore(6); setPulseTimeParameter(4.0); setPhotoelectronsPerMeV(10.0); + + setIntegrationThreshold(12); } /** @@ -106,7 +108,6 @@ public void actionPerformed(ActionEvent e) { // Get the FADC configuration. config = daq.getHodoFADCConfig(); configStat = true; - integrationThreshold = config.getThreshold((int)10); } }); } diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalDigitizationReadoutDriver.java b/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalDigitizationReadoutDriver.java index 2149b21afb..a429daa63e 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalDigitizationReadoutDriver.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalDigitizationReadoutDriver.java @@ -5,6 +5,7 @@ import java.util.Set; import org.hps.conditions.database.DatabaseConditionsManager; +import org.hps.conditions.ecal.EcalChannel; import org.hps.conditions.ecal.EcalChannelConstants; import org.hps.conditions.ecal.EcalConditions; import org.hps.conditions.ecal.EcalChannel.EcalChannelCollection; @@ -13,6 +14,8 @@ import org.hps.record.daqconfig2019.ConfigurationManager2019; import org.hps.record.daqconfig2019.DAQConfig2019; import org.hps.record.daqconfig2019.FADCConfigEcal2019; +import org.hps.record.daqconfig.ConfigurationManager; +import org.hps.record.daqconfig.DAQConfig; import org.lcsim.geometry.Detector; import org.lcsim.geometry.subdetector.HPSEcal3; @@ -50,7 +53,37 @@ public EcalDigitizationReadoutDriver() { setPhotoelectronsPerMeV(32.8); setPulseTimeParameter(9.6); - } + } + + /** + * Sets whether or not the DAQ configuration is applied into the driver + * the EvIO data stream or whether to read the configuration from data files. + * + * @param state - true indicates that the DAQ configuration is + * applied into the readout system, and false that it + * is not applied into the readout system. + */ + public void setDaqConfiguration2016AppliedintoReadout(boolean state) { + // If the DAQ configuration should be read, attach a listener + // to track when it updates. + if (state) { + ConfigurationManager.addActionListener(new ActionListener() { + @Override + public void actionPerformed(ActionEvent e) { + // Get the DAQ configuration. + DAQConfig daq = ConfigurationManager.getInstance(); + + // Load the DAQ settings from the configuration manager. + numSamplesAfter = daq.getFADCConfig().getNSA() / nsPerSample; + numSamplesBefore = daq.getFADCConfig().getNSB() / nsPerSample; + readoutWindow = daq.getFADCConfig().getWindowWidth() / nsPerSample; + + // Get the FADC configuration. + configStat = true; + } + }); + } + } /** * Sets whether or not the DAQ configuration is applied into the driver @@ -78,7 +111,6 @@ public void actionPerformed(ActionEvent e) { // Get the FADC configuration. config = daq.getEcalFADCConfig(); configStat = true; - integrationThreshold = config.getThreshold((int)10); } }); } @@ -88,11 +120,11 @@ public void actionPerformed(ActionEvent e) { public void detectorChanged(Detector detector) { // Get a copy of the calorimeter conditions for the detector. ecalConditions = DatabaseConditionsManager.getInstance().getEcalConditions(); - + // Store the calorimeter conditions table for converting between // geometric IDs and channel objects. geoMap = DatabaseConditionsManager.getInstance().getCachedConditions(EcalChannelCollection.class, "ecal_channels").getCachedData(); - + // Run the superclass method. super.detectorChanged(detector); } diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalRawConverterReadoutDriver.java b/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalRawConverterReadoutDriver.java index b230451f08..3f7ada1e92 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalRawConverterReadoutDriver.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/EcalRawConverterReadoutDriver.java @@ -11,6 +11,8 @@ import org.hps.readout.rawconverter.EcalReadoutMode3RawConverter; import org.hps.record.daqconfig2019.ConfigurationManager2019; import org.hps.record.daqconfig2019.DAQConfig2019; +import org.hps.record.daqconfig.ConfigurationManager; +import org.hps.record.daqconfig.DAQConfig; import org.lcsim.geometry.Detector; import org.lcsim.geometry.subdetector.HPSEcal3; @@ -44,6 +46,34 @@ public EcalRawConverterReadoutDriver() { setSkipBadChannels(true); } + /** + * Sets whether or not the DAQ configuration is applied into the driver + * the EvIO data stream or whether to read the configuration from data files. + * + * @param state - true indicates that the DAQ configuration is + * applied into the readout system, and false that it + * is not applied into the readout system. + */ + public void setDaqConfiguration2016AppliedintoReadout(boolean state) { + // Track changes in the DAQ configuration. + if (state) { + ConfigurationManager.addActionListener(new ActionListener() { + @Override + public void actionPerformed(ActionEvent e) { + // Get the DAQ configuration. + DAQConfig daq = ConfigurationManager.getInstance(); + + // Load the DAQ settings from the configuration manager. + getConverter().setNumberSamplesAfter(daq.getFADCConfig().getNSA()); + getConverter().setNumberSamplesBefore(daq.getFADCConfig().getNSB()); + + // Get the FADC configuration. + getConverter().setFADCConfig2016(daq.getFADCConfig()); + } + }); + } + } + /** * Sets whether or not the DAQ configuration is applied into the driver * the EvIO data stream or whether to read the configuration from data files. diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/GTPClusterReadoutDriver.java b/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/GTPClusterReadoutDriver.java index 3a4c5188a5..84ef87c258 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/GTPClusterReadoutDriver.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/ecal/updated/GTPClusterReadoutDriver.java @@ -16,6 +16,9 @@ import org.hps.record.daqconfig2019.ConfigurationManager2019; import org.hps.record.daqconfig2019.DAQConfig2019; import org.hps.record.daqconfig2019.VTPConfig2019; +import org.hps.record.daqconfig.ConfigurationManager; +import org.hps.record.daqconfig.DAQConfig; +import org.hps.record.daqconfig.GTPConfig; import org.lcsim.event.CalorimeterHit; import org.lcsim.event.Cluster; import org.lcsim.event.EventHeader; @@ -111,6 +114,32 @@ public class GTPClusterReadoutDriver extends ReadoutDriver { private HPSEcal3 calorimeterGeometry = null; + /** + * Sets whether or not the DAQ configuration is applied into the driver + * the EvIO data stream or whether to read the configuration from data files. + * + * @param state - true indicates that the DAQ configuration is + * applied into the readout system, and false that it + * is not applied into the readout system. + */ + public void setDaqConfiguration2016AppliedintoReadout(boolean state) { + // If the DAQ configuration should be read, attach a listener + // to track when it updates. + if (state) { + ConfigurationManager.addActionListener(new ActionListener() { + @Override + public void actionPerformed(ActionEvent e) { + // Get the DAQ configuration. + DAQConfig daq = ConfigurationManager.getInstance(); + GTPConfig config = daq.getGTPConfig(); + + // Load the DAQ settings from the configuration manager. + seedEnergyThreshold = config.getSeedEnergyCutConfig().getLowerBound(); + } + }); + } + } + /** * Sets whether or not the DAQ configuration is applied into the driver * the EvIO data stream or whether to read the configuration from data files. diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/hodoscope/HodoscopeDigitizationReadoutDriver.java b/ecal-readout-sim/src/main/java/org/hps/readout/hodoscope/HodoscopeDigitizationReadoutDriver.java index 6c537c9c46..05639dccec 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/hodoscope/HodoscopeDigitizationReadoutDriver.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/hodoscope/HodoscopeDigitizationReadoutDriver.java @@ -71,6 +71,8 @@ public HodoscopeDigitizationReadoutDriver() { setNumberSamplesBefore(6); setPulseTimeParameter(4.0); setPhotoelectronsPerMeV(10.0); + + setIntegrationThreshold(12); } /** @@ -81,7 +83,7 @@ public HodoscopeDigitizationReadoutDriver() { * applied into the readout system, and false that it * is not applied into the readout system. */ - public void setDaqConfigurationAppliedintoReadout(boolean state) { + public void setDaqConfigurationAppliedintoReadout(boolean state) { // If the DAQ configuration should be read, attach a listener // to track when it updates. if (state) { @@ -99,7 +101,6 @@ public void actionPerformed(ActionEvent e) { // Get the FADC configuration. config = daq.getHodoFADCConfig(); configStat = true; - integrationThreshold = config.getThreshold((int)10); } }); } diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/AbstractBaseRawConverter.java b/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/AbstractBaseRawConverter.java index 833854e3e2..4e8c3c2945 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/AbstractBaseRawConverter.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/AbstractBaseRawConverter.java @@ -1,6 +1,7 @@ package org.hps.readout.rawconverter; import org.hps.recon.ecal.EcalUtils; +import org.hps.record.daqconfig.FADCConfig; import org.hps.record.daqconfig2019.FADCConfigEcal2019; import org.hps.record.daqconfig2019.FADCConfigHodo2019; import org.lcsim.geometry.Detector; @@ -30,6 +31,11 @@ public abstract class AbstractBaseRawConverter { */ private int nsa = Integer.MIN_VALUE; + /** + * The 2016 DAQ Ecal FADC parameters. + */ + protected FADCConfig config2016 = null; + /** * The 2019 DAQ Ecal FADC parameters. */ @@ -113,6 +119,14 @@ public void setNumberSamplesBefore(int nsb) { this.nsb = nsb; } + /** + * Sets 2016 DAQ Ecal FADC config + * @param config + */ + public final void setFADCConfig2016(FADCConfig config) { + this.config2016 = config; + } + /** * Sets 2019 DAQ Ecal FADC config * @param config diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/EcalReadoutMode3RawConverter.java b/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/EcalReadoutMode3RawConverter.java index c8606e583b..65777c2db7 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/EcalReadoutMode3RawConverter.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/rawconverter/EcalReadoutMode3RawConverter.java @@ -31,12 +31,14 @@ public void updateDetector(Detector detector) { @Override protected double getGain(long cellID) { if(configEcal != null) return configEcal.getGain(cellID); + else if(config2016 != null) return config2016.getGain(cellID); else return findChannel(cellID).getGain().getGain(); } @Override protected double getPedestal(long cellID) { if(configEcal != null) return configEcal.getPedestal(cellID); + else if(config2016 != null) return config2016.getPedestal(cellID); else return findChannel(cellID).getCalibration().getPedestal(); } diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/trigger/PairTriggerReadoutDriver.java b/ecal-readout-sim/src/main/java/org/hps/readout/trigger/PairTriggerReadoutDriver.java index 9561037abd..fab0ade46b 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/trigger/PairTriggerReadoutDriver.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/trigger/PairTriggerReadoutDriver.java @@ -1,5 +1,7 @@ package org.hps.readout.trigger; +import java.awt.event.ActionEvent; +import java.awt.event.ActionListener; import java.util.ArrayList; import java.util.Collection; import java.util.LinkedList; @@ -9,13 +11,24 @@ import org.hps.readout.ReadoutDataManager; import org.hps.readout.TriggerDriver; import org.hps.recon.ecal.EcalUtils; +import org.hps.record.daqconfig2019.ConfigurationManager2019; +import org.hps.record.daqconfig2019.DAQConfig2019; +import org.hps.record.daqconfig.ConfigurationManager; +import org.hps.record.daqconfig.DAQConfig; import org.hps.record.triggerbank.TriggerModule; +import org.hps.record.triggerbank.TriggerModule2019; import org.lcsim.event.Cluster; import org.lcsim.event.EventHeader; import org.lcsim.geometry.Detector; import org.lcsim.geometry.subdetector.HPSEcal3; public class PairTriggerReadoutDriver extends TriggerDriver { + /** + * Indicates pair trigger type. Corresponding DAQ configuration is accessed by DAQ + * configuration system, and applied into readout. + */ + private String triggerType = "pair1"; + // ================================================================== // ==== Trigger General Default Parameters ========================== // ================================================================== @@ -44,6 +57,30 @@ public void detectorChanged(Detector detector) { } } + /** + * Sets whether or not the DAQ configuration is applied into the driver + * the EvIO data stream or whether to read the configuration from data files. + * + * @param state - true indicates that the DAQ configuration is + * applied into the readout system, and false that it + * is not applied into the readout system. + */ + public void setDaqConfiguration2016AppliedintoReadout(boolean state) { + // If the DAQ configuration should be read, attach a listener + // to track when it updates. + if (state) { + ConfigurationManager.addActionListener(new ActionListener() { + @Override + public void actionPerformed(ActionEvent e) { + // Get the DAQ configuration. + DAQConfig daq = ConfigurationManager.getInstance(); + if(triggerType.contentEquals(PAIR0)) triggerModule.loadDAQConfiguration(daq.getSSPConfig().getPair1Config()); + else if(triggerType.contentEquals(PAIR1)) triggerModule.loadDAQConfiguration(daq.getSSPConfig().getPair2Config()); + } + }); + } + } + @Override public void startOfData() { // Define the driver collection dependencies. @@ -112,6 +149,12 @@ public void setInputCollectionName(String clusterCollectionName) { inputCollectionName = clusterCollectionName; } + public void setTriggerType(String trigger) { + if(!trigger.equals(PAIR0) && !trigger.equals(PAIR1)) + throw new IllegalArgumentException("Error: wrong trigger type name \"" + trigger + "\"."); + triggerType = trigger; + } + /** * Sets the highest allowed energy a cluster may have and still * pass the cluster total energy single cluster cut. Value uses diff --git a/ecal-readout-sim/src/main/java/org/hps/readout/trigger/SinglesTriggerReadoutDriver.java b/ecal-readout-sim/src/main/java/org/hps/readout/trigger/SinglesTriggerReadoutDriver.java index 3a97a624ca..aa16b5f236 100755 --- a/ecal-readout-sim/src/main/java/org/hps/readout/trigger/SinglesTriggerReadoutDriver.java +++ b/ecal-readout-sim/src/main/java/org/hps/readout/trigger/SinglesTriggerReadoutDriver.java @@ -1,9 +1,13 @@ package org.hps.readout.trigger; +import java.awt.event.ActionEvent; +import java.awt.event.ActionListener; import java.util.Collection; import org.hps.readout.ReadoutDataManager; import org.hps.readout.TriggerDriver; +import org.hps.record.daqconfig.ConfigurationManager; +import org.hps.record.daqconfig.DAQConfig; import org.hps.record.triggerbank.TriggerModule; import org.lcsim.event.Cluster; import org.lcsim.event.EventHeader; @@ -23,6 +27,11 @@ * manager so that a triggered readout event may be written. */ public class SinglesTriggerReadoutDriver extends TriggerDriver { + /** + * Indicates pair trigger type. Corresponding DAQ configuration is accessed by DAQ + * configuration system, and applied into readout. + */ + private String triggerType = "singles0"; // ============================================================== // ==== LCIO Collections ======================================== @@ -94,6 +103,30 @@ public void detectorChanged(Detector detector) { } } + /** + * Sets whether or not the DAQ configuration is applied into the driver + * the EvIO data stream or whether to read the configuration from data files. + * + * @param state - true indicates that the DAQ configuration is + * applied into the readout system, and false that it + * is not applied into the readout system. + */ + public void setDaqConfiguration2016AppliedintoReadout(boolean state) { + // If the DAQ configuration should be read, attach a listener + // to track when it updates. + if (state) { + ConfigurationManager.addActionListener(new ActionListener() { + @Override + public void actionPerformed(ActionEvent e) { + // Get the DAQ configuration. + DAQConfig daq = ConfigurationManager.getInstance(); + if(triggerType.contentEquals(SINGLES0)) triggerModule.loadDAQConfiguration(daq.getSSPConfig().getSingles1Config()); + else if(triggerType.contentEquals(SINGLES1)) triggerModule.loadDAQConfiguration(daq.getSSPConfig().getSingles2Config()); + } + }); + } + } + @Override public void process(EventHeader event) { // Check that clusters are available for the trigger. @@ -190,6 +223,12 @@ protected double getTimeNeededForLocalOutput() { return 0; } + public void setTriggerType(String trigger) { + if(!trigger.equals(SINGLES0) && !trigger.equals(SINGLES1)) + throw new IllegalArgumentException("Error: wrong trigger type name \"" + trigger + "\"."); + triggerType = trigger; + } + /** * Sets the beam energy for the trigger. This is only used to * determine the range of the x-axis for trigger plots. diff --git a/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java b/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java index 3119225ab6..3840cff2e5 100644 --- a/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java +++ b/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java @@ -4,6 +4,8 @@ import java.io.File; import java.io.FileReader; import java.io.IOException; +import java.io.InputStream; +import java.io.InputStreamReader; import java.util.ArrayList; import java.util.List; @@ -43,8 +45,16 @@ public class DAQConfigDriver extends Driver { private boolean firstEvent = true; private boolean readDataFiles = false; private File[] dataFiles = new File[3]; + private InputStream[] inputFiles = new InputStream[3]; private int[] crateNumber = { 46, 37, 39 }; + + /** + * Indicates whether the DAQ configuration is applied in the readout system. + */ + private boolean daqConfigurationAppliedintoReadout = false; + private String daqVersion = null; + /** * Verifies the parameter filepath for the data file * repository and checks that appropriate data files exist for the @@ -53,6 +63,34 @@ public class DAQConfigDriver extends Driver { */ @Override public void startOfData() { + // Check whether to apply the DAQ configuration into the readout system. + if (daqConfigurationAppliedintoReadout) { + daqVersion = "2016_v8_200nA"; + // Define the data file objects. + for (int i = 0; i < inputFiles.length; i++) { + inputFiles[i] = DAQConfigDriver.class.getResourceAsStream(daqVersion + "_" + crateNumber[i] + ".txt"); + } + + // If this is the first event and data files are to be read, + // import the data files and generate the DAQ information. + // Get the data files in the form of a data array. + String[][] data; + try { + data = getInputFileArrays(inputFiles); + } catch (IOException e) { + throw new RuntimeException("An error occurred when processing the data files."); + } + + // Instantiate an EvIO DAQ parser and feed it the data. + EvioDAQParser daqConfig = new EvioDAQParser(); + for (int i = 0; i < inputFiles.length; i++) { + daqConfig.parse(crateNumber[i], runNumber, data[i]); + } + + // Update the configuration manager. + ConfigurationManager.updateConfiguration(daqConfig); + } + // Check whether to use stored data files or the EvIO data stream // as the source of the DAQ settings. Nothing needs to be done // in the latter case. @@ -135,6 +173,45 @@ public void process(EventHeader event) { firstEvent = false; } + /** + * Converts DAQ configuration data files into an array of strings where each + * array entry represents a line in the configuration file. The first array + * index of the returned object corresponds to the file, and the second array + * index corresponds to the line. + * + * @param dataFiles - An array of File objects pointing to the data + * files that are to be converted. These are expected to be + * plain text files. + * @return Returns a two-dimensional array of String objects where + * the first array index corresponds to the object of the same index in + * the File array and the second array index corresponds to + * the lines in the file referenced by the File object. + * @throws IOException Occurs if there is an issue with accessing or reading the + * objects in the objects referred to by the files pointed + * to in the dataFiles array. + */ + private static final String[][] getInputFileArrays(InputStream[] dataFiles) throws IOException { + // Create file readers to process the data files. + InputStreamReader[] fr = new InputStreamReader[dataFiles.length]; + BufferedReader[] reader = new BufferedReader[dataFiles.length]; + for (int i = 0; i < dataFiles.length; i++) { + fr[i] = new InputStreamReader(dataFiles[i]); + reader[i] = new BufferedReader(fr[i]); + } + + // Convert the reader streams into line-delimited strings. + String[][] data = getDataFileArrays(reader); + + // Close the readers. + for (int i = 0; i < dataFiles.length; i++) { + reader[i].close(); + fr[i].close(); + } + + // Return the data array. + return data; + } + /** * Converts DAQ configuration data files into an array of strings * where each array entry represents a line in the configuration @@ -252,4 +329,15 @@ public void setDataFileRepository(String filepath) { public void setReadDataFiles(boolean state) { readDataFiles = state; } + + /** + * Sets whether or not the DAQ configuration is applied into the readout system. + * + * @param state - true indicates that the DAQ configuration is + * applied into the readout system, and false that it + * is not applied into the readout system. + */ + public void setDaqConfigurationAppliedintoReadout(boolean state) { + daqConfigurationAppliedintoReadout = state; + } } diff --git a/record-util/src/main/java/org/hps/record/daqconfig/EvioDAQParser.java b/record-util/src/main/java/org/hps/record/daqconfig/EvioDAQParser.java index 3e585bf985..150a50b929 100644 --- a/record-util/src/main/java/org/hps/record/daqconfig/EvioDAQParser.java +++ b/record-util/src/main/java/org/hps/record/daqconfig/EvioDAQParser.java @@ -1,5 +1,9 @@ package org.hps.record.daqconfig; +import java.io.BufferedWriter; +import java.io.File; +import java.io.FileWriter; +import java.io.IOException; import java.util.ArrayList; import java.util.Arrays; import java.util.HashMap; @@ -23,6 +27,9 @@ * should be used for accessing this information for any other classes. */ public class EvioDAQParser { + /** Indicates if save DAQ configuration banks into txt files */ + private boolean saveConfigBank = false; + /* * Read/Parse/Save the DAQ trigger configuration settings. * These settings arrive in multiple banks, but they *should* be in the same event. @@ -43,6 +50,9 @@ public class EvioDAQParser { /** The EvIO bank identification tag for DAQ configuration banks. */ public static final int BANK_TAG = 0xE10E; + // Threshold constant + public static final int THRESHOLDCONSTANT = 18; + // Stores the hardware codes for each trigger type. private static final int[] singlesIOsrc = { 20, 21 }; private static final int[] pairsIOsrc = { 22, 23 }; @@ -239,9 +249,43 @@ public void parse(int crate, int runNumber, String[] configurationTables) { // the DAQ configuration from it. parseConfigMap(); + if(THRESHOLD.size() != GAIN.size()) { + assignConstantTHRESHOLD(); + } + // If the expected number of banks have been parsed and debugging // text is enabled, print out all of the parsed variables. if(nBanks > 2 && debug) { printVars(); } + + // If saveConfigBank is enabled, save configuration into a text file for each crate separately. + if(saveConfigBank) { + try{ + String fileName = Integer.toString(runNumber) + '_' + Integer.toString(crate) + ".txt"; + File file = new File(fileName); + //if file doesnt exists, then create it + if(!file.exists()){ + file.createNewFile(); + } + FileWriter fileWritter = new FileWriter(file.getName(),true); + BufferedWriter bufferWritter = new BufferedWriter(fileWritter); + for (String configTable : configurationTables) { + bufferWritter.write(configTable); + } + bufferWritter.close(); + } + catch(IOException e){ + e.printStackTrace(); + } + } + } + + /** + * Set constant threshold for each Ecal channel + */ + private void assignConstantTHRESHOLD() { + for(EcalChannel ch : GAIN.keySet()) { + THRESHOLD.put(ch, THRESHOLDCONSTANT); + } } /** diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt new file mode 100644 index 0000000000..577bf04562 --- /dev/null +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt @@ -0,0 +1,489 @@ +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf + +# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE +# # N: 0 or 1 - selects the hps singles trigger bit +# # REGION: 0 to 6 - selects which region index to define +# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive) +# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive) +# # PRESCALE: 0 to 65535 - set the prescale value for the region + +SSP_CRATE hps11 +SSP_ALLSLOTS +SSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0 +SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80 +SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300 +SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000 +SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300 +SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80 +SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0 +SSP_CRATE end + + + +########################## +# GTP +########################## +GTP_CRATE all + +GTP_CLUSTER_PULSE_COIN 4 4 + +# SEED thrershold in MeV (0-8191) +GTP_CLUSTER_PULSE_THRESHOLD 100 + +GTP_CRATE end + +########################## +# HPS 11 Crate +########################## + +### TI +TI_CRATE hps11 + +TI_FIBER_DELAY_OFFSET 0x80 0xcf +TI_BUFFER_LEVEL 5 +TI_BLOCK_LEVEL 10 + +## HOLD OFF +# 1.44 us holdoff: +#TI_HOLDOFF 1 3 1 +TI_HOLDOFF 1 6 1 + +# 4 triggers in 10*3840ns +#TI_HOLDOFF 4 10 1 +#TI_HOLDOFF 4 15 1 +TI_HOLDOFF 4 20 1 + + +# PRESCALE-FACTOR = 2 + +# SINGLES-0: +TI_INPUT_PRESCALE 1 13 + +# SINGLES-1: +TI_INPUT_PRESCALE 2 1 + +# PAIRS-0: +TI_INPUT_PRESCALE 3 6 + +# PAIRS-1: +TI_INPUT_PRESCALE 4 0 + +# COSMIC/LED: +TI_INPUT_PRESCALE 5 0 + +# PULSER: +TI_INPUT_PRESCALE 6 0 + +TI_CRATE end + + +### SSP +SSP_CRATE hps11 + +SSP_ALLSLOTS +SSP_W_WIDTH 50 +SSP_W_OFFSET 753 + +# COSMIC: +#SSP_W_WIDTH 100 +#SSP_W_OFFSET 799 + +SSP_HPS_PULSER 1000 # pulser period (s) + +# ecal triggers: +# HPS SINGLES 0 -> TI TS1 +SSP_HPS_SET_IO_SRC 7 20 #ENABLED +#SSP_HPS_SET_IO_SRC 7 0 #DISABLED + +#HPS SINGLES 1 -> TI TS2 +SSP_HPS_SET_IO_SRC 8 21 #ENABLED +#SSP_HPS_SET_IO_SRC 8 0 #DISABLED + +#HPS PAIRS 0 -> TI TS3 +SSP_HPS_SET_IO_SRC 9 22 #ENABLED +#SSP_HPS_SET_IO_SRC 9 0 #DISABLED + +#HPS PAIRS 1 -> TI TS4 +SSP_HPS_SET_IO_SRC 10 23 #ENABLED +#SSP_HPS_SET_IO_SRC 10 0 #DISABLED + +# HPS COSMIC/LED -> TI TS5 +#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED +#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMIC +SSP_HPS_SET_IO_SRC 11 0 #DISABLED + +# PULSER -> TI TS6 +SSP_HPS_SET_IO_SRC 12 18 #ENABLED +#SSP_HPS_SET_IO_SRC 12 0 #DISABLED + + +# coinc time 10=40 ns +SSP_HPS_COSMIC_TIMECOINCIDENCE 10 + +# cosmic B0 and B1 (136<<8) + led trigger (254<<0) +SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070 + +SSP_HPS_LATENCY 475 + +# Singles 0 trigger +SSP_HPS_SINGLES_EMIN 0 100 1 +SSP_HPS_SINGLES_EMAX 0 2700 1 +SSP_HPS_SINGLES_NMIN 0 3 1 + +# Singles 1 trigger +SSP_HPS_SINGLES_EMIN 1 1300 1 +SSP_HPS_SINGLES_EMAX 1 2600 1 +SSP_HPS_SINGLES_NMIN 1 3 1 + +# Pairs 0 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 0 2 +SSP_HPS_PAIRS_EMIN 0 150 +SSP_HPS_PAIRS_EMAX 0 1400 +SSP_HPS_PAIRS_NMIN 0 2 +SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1 +SSP_HPS_PAIRS_DIFFMAX 0 1100 1 +SSP_HPS_PAIRS_COPLANARITY 0 180 1 +SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1 + +# Pairs 1 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 1 3 +SSP_HPS_PAIRS_EMIN 1 150 +SSP_HPS_PAIRS_EMAX 1 1400 +SSP_HPS_PAIRS_NMIN 1 2 +SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1 +SSP_HPS_PAIRS_DIFFMAX 1 1100 1 +SSP_HPS_PAIRS_COPLANARITY 1 35 1 +SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1 + +SSP_CRATE end + + +### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1 +FADC250_CRATE hps11 + +FADC250_DAC 3300 +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 12 +FADC250_NSA 240 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +#Set RF clock threshold +FADC250_TET 800 + +FADC250_SLOT 13 +FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + + +########################## +# HPS 12 Crate +########################## + +### TI +TI_CRATE hps12 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + + +########################## +# HPS 1 Crate +########################## + +### TI +TI_CRATE hps1 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps1 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + +# Set LED system trigger threshold +FADC250_SLOT 20 +FADC250_CH_TET 15 500 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + +########################## +# HPS 2 Crate +########################## + +### TI +TI_CRATE hps2 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps2 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + + +# Set cosmic system trigger threshold +# 12bit -> 1V: 40 = ~10mV threshold +# relative to pedestal +FADC250_SLOT 20 +FADC250_CH_TET 13 40 +FADC250_CH_TET 14 40 +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + + +FADC250_CRATE end + + +# include trigger/HPS/small/dsc2/hps11.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps11 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THRESHOLD (0=27mV): +DSC2_WIDTH 20 40 +#DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 +# +# FOR NEUTRON COUTNERS: +DSC2_THRESHOLD 50 50 + + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + + +# WHAT IS THIS (NOTHING IN SLOT2): +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + +# +DSC2_CRATE end + +# include trigger/HPS/small/dsc2/hps12.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps12 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THERSHOLD (0=27mV): +DSC2_WIDTH 20 40 +DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 0 + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + +# WHAT IS THIS (NOTHING IN SLOT2)? +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + + + +DSC2_CRATE end + +# ECAL PEDESTALS: + +# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg + +FADC250_CRATE hps1 +FADC250_DAC 3280 +FADC250_SLOT 3 +FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166 +FADC250_SLOT 4 +FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226 +FADC250_SLOT 5 +FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250 +FADC250_SLOT 6 +FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441 +FADC250_SLOT 7 +FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876 +FADC250_SLOT 8 +FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933 +FADC250_SLOT 9 +FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724 +FADC250_SLOT 14 +FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373 +FADC250_SLOT 15 +FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736 +FADC250_SLOT 16 +FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744 +FADC250_SLOT 17 +FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867 +FADC250_SLOT 18 +FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572 +FADC250_SLOT 19 +FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367 +FADC250_SLOT 20 +FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000 +FADC250_CH_TET 13 3000 +FADC250_CH_TET 14 3000 +FADC250_CH_TET 15 3000 +FADC250_CRATE end + +# ECAL GAINS: + +# include trigger/HPS/small/fadc250/gains/EcalGains.trg + +FADC250_CRATE hps1 +FADC250_SLOT 3 +FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151 +FADC250_SLOT 4 +FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155 +FADC250_SLOT 5 +FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151 +FADC250_SLOT 6 +FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151 +FADC250_SLOT 7 +FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159 +FADC250_SLOT 8 +FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155 +FADC250_SLOT 9 +FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163 +FADC250_SLOT 14 +FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161 +FADC250_SLOT 15 +FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152 +FADC250_SLOT 16 +FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141 +FADC250_SLOT 17 +FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150 +FADC250_SLOT 18 +FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148 +FADC250_SLOT 19 +FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143 +FADC250_SLOT 20 +FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000 +FADC250_CRATE end + + +# SVT stuff + +# include dpm/dpm-default.trg + +DPM_CRATE all +DPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xml +DPM_CRATE end + +# include dpm/dpm-3sam-3rms-7932.trg + +DPM_CRATE all +DPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xml +DPM_CRATE end +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end \ No newline at end of file diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt new file mode 100644 index 0000000000..d3699150e0 --- /dev/null +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt @@ -0,0 +1,489 @@ +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf + +# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE +# # N: 0 or 1 - selects the hps singles trigger bit +# # REGION: 0 to 6 - selects which region index to define +# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive) +# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive) +# # PRESCALE: 0 to 65535 - set the prescale value for the region + +SSP_CRATE hps11 +SSP_ALLSLOTS +SSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0 +SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80 +SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300 +SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000 +SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300 +SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80 +SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0 +SSP_CRATE end + + + +########################## +# GTP +########################## +GTP_CRATE all + +GTP_CLUSTER_PULSE_COIN 4 4 + +# SEED thrershold in MeV (0-8191) +GTP_CLUSTER_PULSE_THRESHOLD 100 + +GTP_CRATE end + +########################## +# HPS 11 Crate +########################## + +### TI +TI_CRATE hps11 + +TI_FIBER_DELAY_OFFSET 0x80 0xcf +TI_BUFFER_LEVEL 5 +TI_BLOCK_LEVEL 10 + +## HOLD OFF +# 1.44 us holdoff: +#TI_HOLDOFF 1 3 1 +TI_HOLDOFF 1 6 1 + +# 4 triggers in 10*3840ns +#TI_HOLDOFF 4 10 1 +#TI_HOLDOFF 4 15 1 +TI_HOLDOFF 4 20 1 + + +# PRESCALE-FACTOR = 2 + +# SINGLES-0: +TI_INPUT_PRESCALE 1 13 + +# SINGLES-1: +TI_INPUT_PRESCALE 2 1 + +# PAIRS-0: +TI_INPUT_PRESCALE 3 6 + +# PAIRS-1: +TI_INPUT_PRESCALE 4 0 + +# COSMIC/LED: +TI_INPUT_PRESCALE 5 0 + +# PULSER: +TI_INPUT_PRESCALE 6 0 + +TI_CRATE end + + +### SSP +SSP_CRATE hps11 + +SSP_ALLSLOTS +SSP_W_WIDTH 50 +SSP_W_OFFSET 753 + +# COSMIC: +#SSP_W_WIDTH 100 +#SSP_W_OFFSET 799 + +SSP_HPS_PULSER 1000 # pulser period (s) + +# ecal triggers: +# HPS SINGLES 0 -> TI TS1 +SSP_HPS_SET_IO_SRC 7 20 #ENABLED +#SSP_HPS_SET_IO_SRC 7 0 #DISABLED + +#HPS SINGLES 1 -> TI TS2 +SSP_HPS_SET_IO_SRC 8 21 #ENABLED +#SSP_HPS_SET_IO_SRC 8 0 #DISABLED + +#HPS PAIRS 0 -> TI TS3 +SSP_HPS_SET_IO_SRC 9 22 #ENABLED +#SSP_HPS_SET_IO_SRC 9 0 #DISABLED + +#HPS PAIRS 1 -> TI TS4 +SSP_HPS_SET_IO_SRC 10 23 #ENABLED +#SSP_HPS_SET_IO_SRC 10 0 #DISABLED + +# HPS COSMIC/LED -> TI TS5 +#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED +#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMIC +SSP_HPS_SET_IO_SRC 11 0 #DISABLED + +# PULSER -> TI TS6 +SSP_HPS_SET_IO_SRC 12 18 #ENABLED +#SSP_HPS_SET_IO_SRC 12 0 #DISABLED + + +# coinc time 10=40 ns +SSP_HPS_COSMIC_TIMECOINCIDENCE 10 + +# cosmic B0 and B1 (136<<8) + led trigger (254<<0) +SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070 + +SSP_HPS_LATENCY 475 + +# Singles 0 trigger +SSP_HPS_SINGLES_EMIN 0 100 1 +SSP_HPS_SINGLES_EMAX 0 2700 1 +SSP_HPS_SINGLES_NMIN 0 3 1 + +# Singles 1 trigger +SSP_HPS_SINGLES_EMIN 1 1300 1 +SSP_HPS_SINGLES_EMAX 1 2600 1 +SSP_HPS_SINGLES_NMIN 1 3 1 + +# Pairs 0 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 0 2 +SSP_HPS_PAIRS_EMIN 0 150 +SSP_HPS_PAIRS_EMAX 0 1400 +SSP_HPS_PAIRS_NMIN 0 2 +SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1 +SSP_HPS_PAIRS_DIFFMAX 0 1100 1 +SSP_HPS_PAIRS_COPLANARITY 0 180 1 +SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1 + +# Pairs 1 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 1 3 +SSP_HPS_PAIRS_EMIN 1 150 +SSP_HPS_PAIRS_EMAX 1 1400 +SSP_HPS_PAIRS_NMIN 1 2 +SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1 +SSP_HPS_PAIRS_DIFFMAX 1 1100 1 +SSP_HPS_PAIRS_COPLANARITY 1 35 1 +SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1 + +SSP_CRATE end + + +### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1 +FADC250_CRATE hps11 + +FADC250_DAC 3300 +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 12 +FADC250_NSA 240 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +#Set RF clock threshold +FADC250_TET 800 + +FADC250_SLOT 13 +FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + + +########################## +# HPS 12 Crate +########################## + +### TI +TI_CRATE hps12 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + + +########################## +# HPS 1 Crate +########################## + +### TI +TI_CRATE hps1 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps1 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + +# Set LED system trigger threshold +FADC250_SLOT 20 +FADC250_CH_TET 15 500 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + +########################## +# HPS 2 Crate +########################## + +### TI +TI_CRATE hps2 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps2 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + + +# Set cosmic system trigger threshold +# 12bit -> 1V: 40 = ~10mV threshold +# relative to pedestal +FADC250_SLOT 20 +FADC250_CH_TET 13 40 +FADC250_CH_TET 14 40 +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + + +FADC250_CRATE end + + +# include trigger/HPS/small/dsc2/hps11.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps11 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THRESHOLD (0=27mV): +DSC2_WIDTH 20 40 +#DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 +# +# FOR NEUTRON COUTNERS: +DSC2_THRESHOLD 50 50 + + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + + +# WHAT IS THIS (NOTHING IN SLOT2): +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + +# +DSC2_CRATE end + +# include trigger/HPS/small/dsc2/hps12.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps12 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THERSHOLD (0=27mV): +DSC2_WIDTH 20 40 +DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 0 + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + +# WHAT IS THIS (NOTHING IN SLOT2)? +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + + + +DSC2_CRATE end + +# ECAL PEDESTALS: + +# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg + +FADC250_CRATE hps2 +FADC250_DAC 3280 +FADC250_SLOT 3 +FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270 +FADC250_SLOT 4 +FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645 +FADC250_SLOT 5 +FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707 +FADC250_SLOT 6 +FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711 +FADC250_SLOT 7 +FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586 +FADC250_SLOT 8 +FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954 +FADC250_SLOT 9 +FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473 +FADC250_SLOT 14 +FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613 +FADC250_SLOT 15 +FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175 +FADC250_SLOT 16 +FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495 +FADC250_SLOT 17 +FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245 +FADC250_SLOT 18 +FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552 +FADC250_SLOT 19 +FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373 +FADC250_SLOT 20 +FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000 +FADC250_CH_TET 13 3000 +FADC250_CH_TET 14 3000 +FADC250_CH_TET 15 3000 +FADC250_CRATE end + +# ECAL GAINS: + +# include trigger/HPS/small/fadc250/gains/EcalGains.trg + +FADC250_CRATE hps2 +FADC250_SLOT 3 +FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155 +FADC250_SLOT 4 +FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137 +FADC250_SLOT 5 +FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149 +FADC250_SLOT 6 +FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151 +FADC250_SLOT 7 +FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166 +FADC250_SLOT 8 +FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154 +FADC250_SLOT 9 +FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164 +FADC250_SLOT 14 +FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167 +FADC250_SLOT 15 +FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151 +FADC250_SLOT 16 +FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146 +FADC250_SLOT 17 +FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137 +FADC250_SLOT 18 +FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170 +FADC250_SLOT 19 +FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136 +FADC250_SLOT 20 +FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000 +FADC250_CRATE end + + +# SVT stuff + +# include dpm/dpm-default.trg + +DPM_CRATE all +DPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xml +DPM_CRATE end + +# include dpm/dpm-3sam-3rms-7932.trg + +DPM_CRATE all +DPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xml +DPM_CRATE end +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end \ No newline at end of file diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt new file mode 100644 index 0000000000..e504f034f5 --- /dev/null +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt @@ -0,0 +1,422 @@ +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf + +# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE +# # N: 0 or 1 - selects the hps singles trigger bit +# # REGION: 0 to 6 - selects which region index to define +# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive) +# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive) +# # PRESCALE: 0 to 65535 - set the prescale value for the region + +SSP_CRATE hps11 +SSP_ALLSLOTS +SSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0 +SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80 +SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300 +SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000 +SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300 +SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80 +SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0 +SSP_CRATE end + + + +########################## +# GTP +########################## +GTP_CRATE all + +GTP_CLUSTER_PULSE_COIN 4 4 + +# SEED thrershold in MeV (0-8191) +GTP_CLUSTER_PULSE_THRESHOLD 100 + +GTP_CRATE end + +########################## +# HPS 11 Crate +########################## + +### TI +TI_CRATE hps11 + +TI_FIBER_DELAY_OFFSET 0x80 0xcf +TI_BUFFER_LEVEL 5 +TI_BLOCK_LEVEL 10 + +## HOLD OFF +# 1.44 us holdoff: +#TI_HOLDOFF 1 3 1 +TI_HOLDOFF 1 6 1 + +# 4 triggers in 10*3840ns +#TI_HOLDOFF 4 10 1 +#TI_HOLDOFF 4 15 1 +TI_HOLDOFF 4 20 1 + + +# PRESCALE-FACTOR = 2 + +# SINGLES-0: +TI_INPUT_PRESCALE 1 13 + +# SINGLES-1: +TI_INPUT_PRESCALE 2 1 + +# PAIRS-0: +TI_INPUT_PRESCALE 3 6 + +# PAIRS-1: +TI_INPUT_PRESCALE 4 0 + +# COSMIC/LED: +TI_INPUT_PRESCALE 5 0 + +# PULSER: +TI_INPUT_PRESCALE 6 0 + +TI_CRATE end + + +### SSP +SSP_CRATE hps11 + +SSP_ALLSLOTS +SSP_W_WIDTH 50 +SSP_W_OFFSET 753 + +# COSMIC: +#SSP_W_WIDTH 100 +#SSP_W_OFFSET 799 + +SSP_HPS_PULSER 1000 # pulser period (s) + +# ecal triggers: +# HPS SINGLES 0 -> TI TS1 +SSP_HPS_SET_IO_SRC 7 20 #ENABLED +#SSP_HPS_SET_IO_SRC 7 0 #DISABLED + +#HPS SINGLES 1 -> TI TS2 +SSP_HPS_SET_IO_SRC 8 21 #ENABLED +#SSP_HPS_SET_IO_SRC 8 0 #DISABLED + +#HPS PAIRS 0 -> TI TS3 +SSP_HPS_SET_IO_SRC 9 22 #ENABLED +#SSP_HPS_SET_IO_SRC 9 0 #DISABLED + +#HPS PAIRS 1 -> TI TS4 +SSP_HPS_SET_IO_SRC 10 23 #ENABLED +#SSP_HPS_SET_IO_SRC 10 0 #DISABLED + +# HPS COSMIC/LED -> TI TS5 +#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED +#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMIC +SSP_HPS_SET_IO_SRC 11 0 #DISABLED + +# PULSER -> TI TS6 +SSP_HPS_SET_IO_SRC 12 18 #ENABLED +#SSP_HPS_SET_IO_SRC 12 0 #DISABLED + + +# coinc time 10=40 ns +SSP_HPS_COSMIC_TIMECOINCIDENCE 10 + +# cosmic B0 and B1 (136<<8) + led trigger (254<<0) +SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070 + +SSP_HPS_LATENCY 475 + +# Singles 0 trigger +SSP_HPS_SINGLES_EMIN 0 100 1 +SSP_HPS_SINGLES_EMAX 0 2700 1 +SSP_HPS_SINGLES_NMIN 0 3 1 + +# Singles 1 trigger +SSP_HPS_SINGLES_EMIN 1 1300 1 +SSP_HPS_SINGLES_EMAX 1 2600 1 +SSP_HPS_SINGLES_NMIN 1 3 1 + +# Pairs 0 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 0 2 +SSP_HPS_PAIRS_EMIN 0 150 +SSP_HPS_PAIRS_EMAX 0 1400 +SSP_HPS_PAIRS_NMIN 0 2 +SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1 +SSP_HPS_PAIRS_DIFFMAX 0 1100 1 +SSP_HPS_PAIRS_COPLANARITY 0 180 1 +SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1 + +# Pairs 1 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 1 3 +SSP_HPS_PAIRS_EMIN 1 150 +SSP_HPS_PAIRS_EMAX 1 1400 +SSP_HPS_PAIRS_NMIN 1 2 +SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1 +SSP_HPS_PAIRS_DIFFMAX 1 1100 1 +SSP_HPS_PAIRS_COPLANARITY 1 35 1 +SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1 + +SSP_CRATE end + + +### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1 +FADC250_CRATE hps11 + +FADC250_DAC 3300 +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 12 +FADC250_NSA 240 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +#Set RF clock threshold +FADC250_TET 800 + +FADC250_SLOT 13 +FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + + +########################## +# HPS 12 Crate +########################## + +### TI +TI_CRATE hps12 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + + +########################## +# HPS 1 Crate +########################## + +### TI +TI_CRATE hps1 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps1 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + +# Set LED system trigger threshold +FADC250_SLOT 20 +FADC250_CH_TET 15 500 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + +########################## +# HPS 2 Crate +########################## + +### TI +TI_CRATE hps2 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps2 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + + +# Set cosmic system trigger threshold +# 12bit -> 1V: 40 = ~10mV threshold +# relative to pedestal +FADC250_SLOT 20 +FADC250_CH_TET 13 40 +FADC250_CH_TET 14 40 +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + + +FADC250_CRATE end + + +# include trigger/HPS/small/dsc2/hps11.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps11 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THRESHOLD (0=27mV): +DSC2_WIDTH 20 40 +#DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 +# +# FOR NEUTRON COUTNERS: +DSC2_THRESHOLD 50 50 + + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + + +# WHAT IS THIS (NOTHING IN SLOT2): +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + +# +DSC2_CRATE end + +# include trigger/HPS/small/dsc2/hps12.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps12 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THERSHOLD (0=27mV): +DSC2_WIDTH 20 40 +DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 0 + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + +# WHAT IS THIS (NOTHING IN SLOT2)? +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + + + +DSC2_CRATE end + +# ECAL PEDESTALS: + +# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg + +# ECAL GAINS: + +# include trigger/HPS/small/fadc250/gains/EcalGains.trg + +# SVT stuff + +# include dpm/dpm-default.trg + +DPM_CRATE all +DPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xml +DPM_CRATE end + +# include dpm/dpm-3sam-3rms-7932.trg + +DPM_CRATE all +DPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xml +DPM_CRATE end +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end \ No newline at end of file diff --git a/steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigPairs.lcsim b/steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigPairs.lcsim new file mode 100644 index 0000000000..d8e2e8f781 --- /dev/null +++ b/steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigPairs.lcsim @@ -0,0 +1,261 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + true + + + + + EcalHits + + + 8.0 + 32.0 + false + + + + MCParticle + + + 32.0 + 32.0 + false + + + + TrackerHits + + + 8.0 + 32.0 + false + + + + TrackerHits_Inactive + + + 8.0 + 32.0 + false + + + + TrackerHitsECal + + + 8.0 + 32.0 + false + + + + + + false + true + true + + + + + + EcalHits + EcalRawHits + EcalReadoutHits + EcalTruthRelations + TriggerPathTruthRelations + + true + + + 1 + true + + 13 + 18 + + + + false + + + false + + + + + true + + + false + + + + + + 4 + + true + + + false + + + + + EcalClustersGTP + + + 15 + + + 0.100 + + true + + + + 200 + ${outputFile}.slcio + + + + + diff --git a/steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigSingles.lcsim b/steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigSingles.lcsim new file mode 100644 index 0000000000..7215921e7b --- /dev/null +++ b/steering-files/src/main/resources/org/hps/steering/readout/PhysicsRun2016TrigSingles.lcsim @@ -0,0 +1,249 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + true + + + + + EcalHits + + + 8.0 + 32.0 + false + + + + MCParticle + + + 32.0 + 32.0 + false + + + + TrackerHits + + + 8.0 + 32.0 + false + + + + TrackerHitsECal + + + 8.0 + 32.0 + false + + + + + + false + true + true + + + + + + EcalHits + EcalRawHits + EcalReadoutHits + EcalTruthRelations + TriggerPathTruthRelations + + true + + + 1 + true + + 37 + 18 + + + false + + + false + + + + + true + + + false + + + + + + 4 + + true + + + false + + + + + EcalClustersGTP + + + 32 + + 0.100 + + true + + + + 200 + ${outputFile}.slcio + + + + + From 0f1b13107de5d2799ae85afc60dd6920c8151fbd Mon Sep 17 00:00:00 2001 From: tongtongcao Date: Wed, 17 Jan 2024 13:15:34 -0500 Subject: [PATCH 2/4] change value for track-cluster time offset in 2016 MC recon steering files --- .../org/hps/steering/recon/PhysicsRun2016FullReconMC.lcsim | 2 +- .../recon/PhysicsRun2016FullReconMCWithTruthTuple.lcsim | 4 ++-- .../PhysicsRun2016FullReconMC_GBL_TrackClusterMatcher.lcsim | 2 +- .../PhysicsRun2016FullReconMC_KF_TrackClusterMatcher.lcsim | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC.lcsim b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC.lcsim index 9c84d9226f..217c22e467 100644 --- a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC.lcsim +++ b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC.lcsim @@ -157,7 +157,7 @@ -0.08 0.030 -4.3 - 44.8 + 36.8 true false 0.0 diff --git a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMCWithTruthTuple.lcsim b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMCWithTruthTuple.lcsim index e5e759bcf5..58cc61c7ba 100644 --- a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMCWithTruthTuple.lcsim +++ b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMCWithTruthTuple.lcsim @@ -159,7 +159,7 @@ -0.08 0.030 -4.3 - 43 + 36.8 2.15 2.8 5.0 @@ -168,7 +168,7 @@ true false 0.0 - 43 + 36.8 diff --git a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_GBL_TrackClusterMatcher.lcsim b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_GBL_TrackClusterMatcher.lcsim index b447a6d642..570c1f4e0d 100644 --- a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_GBL_TrackClusterMatcher.lcsim +++ b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_GBL_TrackClusterMatcher.lcsim @@ -282,7 +282,7 @@ -0.08 0.030 -4.3 - 44.8 + 36.8 true false 0.0 diff --git a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_KF_TrackClusterMatcher.lcsim b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_KF_TrackClusterMatcher.lcsim index 4d08ce3b8d..f0464bf529 100644 --- a/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_KF_TrackClusterMatcher.lcsim +++ b/steering-files/src/main/resources/org/hps/steering/recon/PhysicsRun2016FullReconMC_KF_TrackClusterMatcher.lcsim @@ -139,7 +139,7 @@ 0.0 5.0 10 - 44.8 + 36.8 true false TrackClusterMatcherMinDistance From 44d87b8a4725afa85735a3047f9faab1b2e3151e Mon Sep 17 00:00:00 2001 From: tongtongcao Date: Fri, 19 Jan 2024 16:25:54 -0500 Subject: [PATCH 3/4] add another 2016 DAQ configuraton version for production runs --- .../hps/record/daqconfig/DAQConfigDriver.java | 17 +- .../hps/record/daqconfig/2016_v7_200nA_37.txt | 474 ++++++++++++++++++ .../hps/record/daqconfig/2016_v7_200nA_39.txt | 474 ++++++++++++++++++ .../hps/record/daqconfig/2016_v7_200nA_46.txt | 399 +++++++++++++++ .../hps/record/daqconfig/2016_v8_200nA_37.txt | 15 - .../hps/record/daqconfig/2016_v8_200nA_39.txt | 15 - .../hps/record/daqconfig/2016_v8_200nA_46.txt | 23 - 7 files changed, 1363 insertions(+), 54 deletions(-) create mode 100644 record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_37.txt create mode 100644 record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_39.txt create mode 100644 record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_46.txt diff --git a/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java b/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java index 3840cff2e5..3c110ff3d8 100644 --- a/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java +++ b/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java @@ -65,7 +65,8 @@ public class DAQConfigDriver extends Driver { public void startOfData() { // Check whether to apply the DAQ configuration into the readout system. if (daqConfigurationAppliedintoReadout) { - daqVersion = "2016_v8_200nA"; + if(runNumber == -1) runNumber = this.getConditionsManager().getRun(); + daqVersion = mapBetweenRunNumberDAQVersion(runNumber); // Define the data file objects. for (int i = 0; i < inputFiles.length; i++) { inputFiles[i] = DAQConfigDriver.class.getResourceAsStream(daqVersion + "_" + crateNumber[i] + ".txt"); @@ -340,4 +341,18 @@ public void setReadDataFiles(boolean state) { public void setDaqConfigurationAppliedintoReadout(boolean state) { daqConfigurationAppliedintoReadout = state; } + + /** + * According to run number, a specified DAQ version name is returned. + * @param runNumber + * @return name of a DAQ configuration version + */ + private String mapBetweenRunNumberDAQVersion(int runNumber) { + + // 2019 experiment + if(runNumber >= 7609 && runNumber <=7809) + return "2016_v7_200nA"; + else return "2016_v8_200nA"; + + } } diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_37.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_37.txt new file mode 100644 index 0000000000..c12aae69b6 --- /dev/null +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_37.txt @@ -0,0 +1,474 @@ +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf + +# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE +# # N: 0 or 1 - selects the hps singles trigger bit +# # REGION: 0 to 6 - selects which region index to define +# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive) +# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive) +# # PRESCALE: 0 to 65535 - set the prescale value for the region + +SSP_CRATE hps11 +SSP_ALLSLOTS +SSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0 +SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80 +SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300 +SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000 +SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300 +SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80 +SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0 +SSP_CRATE end + + + +########################## +# GTP +########################## +GTP_CRATE all + +GTP_CLUSTER_PULSE_COIN 4 4 + +# SEED thrershold in MeV (0-8191) +GTP_CLUSTER_PULSE_THRESHOLD 100 + +GTP_CRATE end + +########################## +# HPS 11 Crate +########################## + +### TI +TI_CRATE hps11 + +TI_FIBER_DELAY_OFFSET 0x80 0xcf +TI_BUFFER_LEVEL 5 +TI_BLOCK_LEVEL 10 + +## HOLD OFF +# 1.44 us holdoff: +#TI_HOLDOFF 1 3 1 +TI_HOLDOFF 1 6 1 + +# 4 triggers in 10*3840ns +#TI_HOLDOFF 4 10 1 +#TI_HOLDOFF 4 15 1 +TI_HOLDOFF 4 20 1 + + +# PRESCALE-FACTOR = 2 + +# SINGLES-0: +TI_INPUT_PRESCALE 1 13 + +# SINGLES-1: +TI_INPUT_PRESCALE 2 1 + +# PAIRS-0: +TI_INPUT_PRESCALE 3 6 + +# PAIRS-1: +TI_INPUT_PRESCALE 4 0 + +# COSMIC/LED: +TI_INPUT_PRESCALE 5 0 + +# PULSER: +TI_INPUT_PRESCALE 6 0 + +TI_CRATE end + + +### SSP +SSP_CRATE hps11 + +SSP_ALLSLOTS +SSP_W_WIDTH 50 +SSP_W_OFFSET 753 + +# COSMIC: +#SSP_W_WIDTH 100 +#SSP_W_OFFSET 799 + +SSP_HPS_PULSER 1000 # pulser period (s) + +# ecal triggers: +# HPS SINGLES 0 -> TI TS1 +SSP_HPS_SET_IO_SRC 7 20 #ENABLED +#SSP_HPS_SET_IO_SRC 7 0 #DISABLED + +#HPS SINGLES 1 -> TI TS2 +SSP_HPS_SET_IO_SRC 8 21 #ENABLED +#SSP_HPS_SET_IO_SRC 8 0 #DISABLED + +#HPS PAIRS 0 -> TI TS3 +SSP_HPS_SET_IO_SRC 9 22 #ENABLED +#SSP_HPS_SET_IO_SRC 9 0 #DISABLED + +#HPS PAIRS 1 -> TI TS4 +SSP_HPS_SET_IO_SRC 10 23 #ENABLED +#SSP_HPS_SET_IO_SRC 10 0 #DISABLED + +# HPS COSMIC/LED -> TI TS5 +#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED +#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMIC +SSP_HPS_SET_IO_SRC 11 0 #DISABLED + +# PULSER -> TI TS6 +SSP_HPS_SET_IO_SRC 12 18 #ENABLED +#SSP_HPS_SET_IO_SRC 12 0 #DISABLED + + +# coinc time 10=40 ns +SSP_HPS_COSMIC_TIMECOINCIDENCE 10 + +# cosmic B0 and B1 (136<<8) + led trigger (254<<0) +SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070 + +SSP_HPS_LATENCY 475 + +# Singles 0 trigger +SSP_HPS_SINGLES_EMIN 0 100 1 +SSP_HPS_SINGLES_EMAX 0 2700 1 +SSP_HPS_SINGLES_NMIN 0 3 1 + +# Singles 1 trigger +SSP_HPS_SINGLES_EMIN 1 1300 1 +SSP_HPS_SINGLES_EMAX 1 2600 1 +SSP_HPS_SINGLES_NMIN 1 3 1 + +# Pairs 0 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 0 2 +SSP_HPS_PAIRS_EMIN 0 150 +SSP_HPS_PAIRS_EMAX 0 1400 +SSP_HPS_PAIRS_NMIN 0 2 +SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1 +SSP_HPS_PAIRS_DIFFMAX 0 1100 1 +SSP_HPS_PAIRS_COPLANARITY 0 180 1 +SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1 + +# Pairs 1 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 1 3 +SSP_HPS_PAIRS_EMIN 1 150 +SSP_HPS_PAIRS_EMAX 1 1400 +SSP_HPS_PAIRS_NMIN 1 2 +SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1 +SSP_HPS_PAIRS_DIFFMAX 1 1100 1 +SSP_HPS_PAIRS_COPLANARITY 1 40 1 +SSP_HPS_PAIRS_ENERGYDIST 1 5.5 600 1 + +SSP_CRATE end + + +### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1 +FADC250_CRATE hps11 + +FADC250_DAC 3300 +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 12 +FADC250_NSA 240 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +#Set RF clock threshold +FADC250_TET 800 + +FADC250_SLOT 13 +FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + + +########################## +# HPS 12 Crate +########################## + +### TI +TI_CRATE hps12 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + + +########################## +# HPS 1 Crate +########################## + +### TI +TI_CRATE hps1 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps1 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + +# Set LED system trigger threshold +FADC250_SLOT 20 +FADC250_CH_TET 15 500 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + +########################## +# HPS 2 Crate +########################## + +### TI +TI_CRATE hps2 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps2 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + + +# Set cosmic system trigger threshold +# 12bit -> 1V: 40 = ~10mV threshold +# relative to pedestal +FADC250_SLOT 20 +FADC250_CH_TET 13 40 +FADC250_CH_TET 14 40 +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + + +FADC250_CRATE end + + +# include trigger/HPS/small/dsc2/hps11.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps11 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THRESHOLD (0=27mV): +DSC2_WIDTH 20 40 +#DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 +# +# FOR NEUTRON COUTNERS: +DSC2_THRESHOLD 50 50 + + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + + +# WHAT IS THIS (NOTHING IN SLOT2): +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + +# +DSC2_CRATE end + +# include trigger/HPS/small/dsc2/hps12.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps12 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THERSHOLD (0=27mV): +DSC2_WIDTH 20 40 +DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 0 + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + +# WHAT IS THIS (NOTHING IN SLOT2)? +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + + + +DSC2_CRATE end + +# ECAL PEDESTALS: + +# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg + +FADC250_CRATE hps1 +FADC250_DAC 3280 +FADC250_SLOT 3 +FADC250_ALLCH_PED 125.186 57.711 99.597 98.279 114.444 122.129 99.089 131.870 138.372 140.125 135.171 139.746 93.289 129.688 104.436 118.410 +FADC250_SLOT 4 +FADC250_ALLCH_PED 104.223 97.113 83.810 90.282 116.386 77.066 156.835 65.894 103.205 94.717 61.654 103.698 61.303 129.469 90.623 121.038 +FADC250_SLOT 5 +FADC250_ALLCH_PED 87.929 144.788 96.375 117.616 97.057 125.941 112.425 132.354 87.984 144.518 111.969 124.205 100.098 113.012 87.441 120.632 +FADC250_SLOT 6 +FADC250_ALLCH_PED 130.230 102.243 166.559 161.828 156.131 148.732 127.255 107.225 130.763 140.916 85.872 126.148 137.526 113.344 101.278 123.098 +FADC250_SLOT 7 +FADC250_ALLCH_PED 124.592 139.252 129.938 128.458 127.483 107.718 144.170 147.740 112.409 107.857 127.696 122.148 102.287 113.220 115.276 107.140 +FADC250_SLOT 8 +FADC250_ALLCH_PED 142.739 134.975 99.674 124.378 127.850 110.083 125.354 119.806 115.251 93.908 139.388 136.532 155.375 115.824 127.947 51.109 +FADC250_SLOT 9 +FADC250_ALLCH_PED 126.100 140.596 108.605 113.271 129.356 120.662 131.918 139.161 108.159 126.044 121.686 84.504 125.799 105.054 96.130 138.396 +FADC250_SLOT 14 +FADC250_ALLCH_PED 95.570 100.523 130.089 101.458 115.711 114.493 169.712 141.265 128.605 93.143 123.836 113.267 130.540 121.935 113.330 112.143 +FADC250_SLOT 15 +FADC250_ALLCH_PED 104.805 149.627 106.456 186.784 140.376 150.660 144.281 150.701 111.870 164.063 103.983 132.756 109.343 130.632 143.747 120.878 +FADC250_SLOT 16 +FADC250_ALLCH_PED 112.506 144.101 118.333 136.921 157.266 82.593 112.781 111.756 79.820 108.956 86.379 132.845 128.091 107.217 104.459 116.470 +FADC250_SLOT 17 +FADC250_ALLCH_PED 95.151 93.228 126.880 119.779 140.736 92.961 121.271 120.831 118.379 85.063 133.599 99.308 91.769 96.628 70.187 104.488 +FADC250_SLOT 18 +FADC250_ALLCH_PED 103.410 125.040 141.046 90.727 143.673 106.374 129.395 130.797 130.825 115.541 114.785 135.705 88.147 162.129 134.901 137.289 +FADC250_SLOT 19 +FADC250_ALLCH_PED 110.346 129.690 129.970 54.117 92.438 145.104 127.536 134.662 125.678 120.741 141.166 122.930 132.650 105.722 120.158 134.537 +FADC250_SLOT 20 +FADC250_ALLCH_PED 111.363 91.837 107.287 127.857 81.930 116.762 105.284 86.066 124.456 83.516 102.283 98.657 107.887 105.244 126.978 179.571 +FADC250_CH_TET 13 3000 +FADC250_CH_TET 14 3000 +FADC250_CH_TET 15 3000 +FADC250_CRATE end + +# ECAL GAINS: + +# include trigger/HPS/small/fadc250/gains/EcalGains.trg + +FADC250_CRATE hps1 +FADC250_SLOT 3 +FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151 +FADC250_SLOT 4 +FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155 +FADC250_SLOT 5 +FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151 +FADC250_SLOT 6 +FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151 +FADC250_SLOT 7 +FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159 +FADC250_SLOT 8 +FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155 +FADC250_SLOT 9 +FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163 +FADC250_SLOT 14 +FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161 +FADC250_SLOT 15 +FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152 +FADC250_SLOT 16 +FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141 +FADC250_SLOT 17 +FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150 +FADC250_SLOT 18 +FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148 +FADC250_SLOT 19 +FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143 +FADC250_SLOT 20 +FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000 +FADC250_CRATE end + diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_39.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_39.txt new file mode 100644 index 0000000000..512051918a --- /dev/null +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_39.txt @@ -0,0 +1,474 @@ +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf + +# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE +# # N: 0 or 1 - selects the hps singles trigger bit +# # REGION: 0 to 6 - selects which region index to define +# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive) +# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive) +# # PRESCALE: 0 to 65535 - set the prescale value for the region + +SSP_CRATE hps11 +SSP_ALLSLOTS +SSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0 +SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80 +SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300 +SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000 +SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300 +SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80 +SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0 +SSP_CRATE end + + + +########################## +# GTP +########################## +GTP_CRATE all + +GTP_CLUSTER_PULSE_COIN 4 4 + +# SEED thrershold in MeV (0-8191) +GTP_CLUSTER_PULSE_THRESHOLD 100 + +GTP_CRATE end + +########################## +# HPS 11 Crate +########################## + +### TI +TI_CRATE hps11 + +TI_FIBER_DELAY_OFFSET 0x80 0xcf +TI_BUFFER_LEVEL 5 +TI_BLOCK_LEVEL 10 + +## HOLD OFF +# 1.44 us holdoff: +#TI_HOLDOFF 1 3 1 +TI_HOLDOFF 1 6 1 + +# 4 triggers in 10*3840ns +#TI_HOLDOFF 4 10 1 +#TI_HOLDOFF 4 15 1 +TI_HOLDOFF 4 20 1 + + +# PRESCALE-FACTOR = 2 + +# SINGLES-0: +TI_INPUT_PRESCALE 1 13 + +# SINGLES-1: +TI_INPUT_PRESCALE 2 1 + +# PAIRS-0: +TI_INPUT_PRESCALE 3 6 + +# PAIRS-1: +TI_INPUT_PRESCALE 4 0 + +# COSMIC/LED: +TI_INPUT_PRESCALE 5 0 + +# PULSER: +TI_INPUT_PRESCALE 6 0 + +TI_CRATE end + + +### SSP +SSP_CRATE hps11 + +SSP_ALLSLOTS +SSP_W_WIDTH 50 +SSP_W_OFFSET 753 + +# COSMIC: +#SSP_W_WIDTH 100 +#SSP_W_OFFSET 799 + +SSP_HPS_PULSER 1000 # pulser period (s) + +# ecal triggers: +# HPS SINGLES 0 -> TI TS1 +SSP_HPS_SET_IO_SRC 7 20 #ENABLED +#SSP_HPS_SET_IO_SRC 7 0 #DISABLED + +#HPS SINGLES 1 -> TI TS2 +SSP_HPS_SET_IO_SRC 8 21 #ENABLED +#SSP_HPS_SET_IO_SRC 8 0 #DISABLED + +#HPS PAIRS 0 -> TI TS3 +SSP_HPS_SET_IO_SRC 9 22 #ENABLED +#SSP_HPS_SET_IO_SRC 9 0 #DISABLED + +#HPS PAIRS 1 -> TI TS4 +SSP_HPS_SET_IO_SRC 10 23 #ENABLED +#SSP_HPS_SET_IO_SRC 10 0 #DISABLED + +# HPS COSMIC/LED -> TI TS5 +#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED +#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMIC +SSP_HPS_SET_IO_SRC 11 0 #DISABLED + +# PULSER -> TI TS6 +SSP_HPS_SET_IO_SRC 12 18 #ENABLED +#SSP_HPS_SET_IO_SRC 12 0 #DISABLED + + +# coinc time 10=40 ns +SSP_HPS_COSMIC_TIMECOINCIDENCE 10 + +# cosmic B0 and B1 (136<<8) + led trigger (254<<0) +SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070 + +SSP_HPS_LATENCY 475 + +# Singles 0 trigger +SSP_HPS_SINGLES_EMIN 0 100 1 +SSP_HPS_SINGLES_EMAX 0 2700 1 +SSP_HPS_SINGLES_NMIN 0 3 1 + +# Singles 1 trigger +SSP_HPS_SINGLES_EMIN 1 1300 1 +SSP_HPS_SINGLES_EMAX 1 2600 1 +SSP_HPS_SINGLES_NMIN 1 3 1 + +# Pairs 0 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 0 2 +SSP_HPS_PAIRS_EMIN 0 150 +SSP_HPS_PAIRS_EMAX 0 1400 +SSP_HPS_PAIRS_NMIN 0 2 +SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1 +SSP_HPS_PAIRS_DIFFMAX 0 1100 1 +SSP_HPS_PAIRS_COPLANARITY 0 180 1 +SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1 + +# Pairs 1 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 1 3 +SSP_HPS_PAIRS_EMIN 1 150 +SSP_HPS_PAIRS_EMAX 1 1400 +SSP_HPS_PAIRS_NMIN 1 2 +SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1 +SSP_HPS_PAIRS_DIFFMAX 1 1100 1 +SSP_HPS_PAIRS_COPLANARITY 1 40 1 +SSP_HPS_PAIRS_ENERGYDIST 1 5.5 600 1 + +SSP_CRATE end + + +### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1 +FADC250_CRATE hps11 + +FADC250_DAC 3300 +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 12 +FADC250_NSA 240 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +#Set RF clock threshold +FADC250_TET 800 + +FADC250_SLOT 13 +FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + + +########################## +# HPS 12 Crate +########################## + +### TI +TI_CRATE hps12 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + + +########################## +# HPS 1 Crate +########################## + +### TI +TI_CRATE hps1 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps1 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + +# Set LED system trigger threshold +FADC250_SLOT 20 +FADC250_CH_TET 15 500 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + +########################## +# HPS 2 Crate +########################## + +### TI +TI_CRATE hps2 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps2 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + + +# Set cosmic system trigger threshold +# 12bit -> 1V: 40 = ~10mV threshold +# relative to pedestal +FADC250_SLOT 20 +FADC250_CH_TET 13 40 +FADC250_CH_TET 14 40 +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + + +FADC250_CRATE end + + +# include trigger/HPS/small/dsc2/hps11.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps11 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THRESHOLD (0=27mV): +DSC2_WIDTH 20 40 +#DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 +# +# FOR NEUTRON COUTNERS: +DSC2_THRESHOLD 50 50 + + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + + +# WHAT IS THIS (NOTHING IN SLOT2): +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + +# +DSC2_CRATE end + +# include trigger/HPS/small/dsc2/hps12.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps12 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THERSHOLD (0=27mV): +DSC2_WIDTH 20 40 +DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 0 + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + +# WHAT IS THIS (NOTHING IN SLOT2)? +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + + + +DSC2_CRATE end + +# ECAL PEDESTALS: + +# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg + +FADC250_CRATE hps2 +FADC250_DAC 3280 +FADC250_SLOT 3 +FADC250_ALLCH_PED 139.464 111.395 91.504 133.155 122.316 87.834 158.535 100.563 133.568 138.763 113.478 146.252 136.280 118.431 132.933 154.135 +FADC250_SLOT 4 +FADC250_ALLCH_PED 138.353 115.934 134.680 117.613 106.014 172.758 162.369 137.848 149.039 124.659 145.923 129.595 148.602 138.078 147.356 123.454 +FADC250_SLOT 5 +FADC250_ALLCH_PED 98.626 79.345 98.268 125.789 126.974 113.326 110.155 143.023 126.257 129.427 100.889 141.952 126.913 104.820 116.580 119.020 +FADC250_SLOT 6 +FADC250_ALLCH_PED 95.764 112.139 120.352 111.037 143.287 118.002 90.450 91.093 120.375 163.058 120.418 130.188 94.254 152.445 105.349 124.482 +FADC250_SLOT 7 +FADC250_ALLCH_PED 177.998 110.649 109.614 126.912 135.265 148.943 131.121 116.215 149.066 133.898 120.394 110.877 120.910 138.092 125.468 144.891 +FADC250_SLOT 8 +FADC250_ALLCH_PED 116.424 126.560 90.178 99.343 106.439 85.487 122.079 134.620 85.670 153.306 113.000 78.573 104.665 92.263 80.838 95.279 +FADC250_SLOT 9 +FADC250_ALLCH_PED 124.074 183.990 160.400 156.542 122.419 105.508 114.894 118.670 111.940 172.100 146.281 117.390 134.147 138.907 139.566 165.369 +FADC250_SLOT 14 +FADC250_ALLCH_PED 153.085 151.190 116.559 101.665 125.040 141.937 126.613 113.950 157.997 151.804 120.771 142.236 104.529 150.171 92.393 129.228 +FADC250_SLOT 15 +FADC250_ALLCH_PED 94.448 130.321 93.398 87.462 106.021 124.509 120.982 121.829 108.682 114.682 123.177 85.331 101.533 118.427 159.985 79.192 +FADC250_SLOT 16 +FADC250_ALLCH_PED 108.479 113.801 95.297 93.803 104.905 123.080 107.069 103.252 123.496 99.576 153.093 117.727 115.701 141.530 89.565 99.474 +FADC250_SLOT 17 +FADC250_ALLCH_PED 116.243 129.412 114.294 105.546 112.820 125.663 115.076 110.764 128.006 117.435 116.739 115.410 114.728 108.244 161.246 120.926 +FADC250_SLOT 18 +FADC250_ALLCH_PED 140.665 128.572 116.441 143.920 140.457 140.618 143.284 105.739 103.351 110.195 140.223 181.580 139.244 117.327 129.159 156.827 +FADC250_SLOT 19 +FADC250_ALLCH_PED 118.018 138.067 144.713 102.156 94.484 143.161 91.274 88.046 95.808 119.072 111.367 98.593 129.276 143.269 100.950 143.769 +FADC250_SLOT 20 +FADC250_ALLCH_PED 114.762 113.603 124.586 113.246 93.907 112.779 115.199 73.768 115.324 115.747 91.045 86.951 127.238 145.878 167.641 120.880 +FADC250_CH_TET 13 3000 +FADC250_CH_TET 14 3000 +FADC250_CH_TET 15 3000 +FADC250_CRATE end + +# ECAL GAINS: + +# include trigger/HPS/small/fadc250/gains/EcalGains.trg + +FADC250_CRATE hps2 +FADC250_SLOT 3 +FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155 +FADC250_SLOT 4 +FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137 +FADC250_SLOT 5 +FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149 +FADC250_SLOT 6 +FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151 +FADC250_SLOT 7 +FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166 +FADC250_SLOT 8 +FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154 +FADC250_SLOT 9 +FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164 +FADC250_SLOT 14 +FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167 +FADC250_SLOT 15 +FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151 +FADC250_SLOT 16 +FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146 +FADC250_SLOT 17 +FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137 +FADC250_SLOT 18 +FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170 +FADC250_SLOT 19 +FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136 +FADC250_SLOT 20 +FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000 +FADC250_CRATE end + diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_46.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_46.txt new file mode 100644 index 0000000000..184ee5913f --- /dev/null +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v7_200nA_46.txt @@ -0,0 +1,399 @@ +# include trigger/HPS/small/ssp/trigger/feemaskA.cnf + +# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE +# # N: 0 or 1 - selects the hps singles trigger bit +# # REGION: 0 to 6 - selects which region index to define +# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive) +# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive) +# # PRESCALE: 0 to 65535 - set the prescale value for the region + +SSP_CRATE hps11 +SSP_ALLSLOTS +SSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0 +SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80 +SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300 +SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000 +SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300 +SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80 +SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0 +SSP_CRATE end + + + +########################## +# GTP +########################## +GTP_CRATE all + +GTP_CLUSTER_PULSE_COIN 4 4 + +# SEED thrershold in MeV (0-8191) +GTP_CLUSTER_PULSE_THRESHOLD 100 + +GTP_CRATE end + +########################## +# HPS 11 Crate +########################## + +### TI +TI_CRATE hps11 + +TI_FIBER_DELAY_OFFSET 0x80 0xcf +TI_BUFFER_LEVEL 5 +TI_BLOCK_LEVEL 10 + +## HOLD OFF +# 1.44 us holdoff: +#TI_HOLDOFF 1 3 1 +TI_HOLDOFF 1 6 1 + +# 4 triggers in 10*3840ns +#TI_HOLDOFF 4 10 1 +#TI_HOLDOFF 4 15 1 +TI_HOLDOFF 4 20 1 + + +# PRESCALE-FACTOR = 2 + +# SINGLES-0: +TI_INPUT_PRESCALE 1 13 + +# SINGLES-1: +TI_INPUT_PRESCALE 2 1 + +# PAIRS-0: +TI_INPUT_PRESCALE 3 6 + +# PAIRS-1: +TI_INPUT_PRESCALE 4 0 + +# COSMIC/LED: +TI_INPUT_PRESCALE 5 0 + +# PULSER: +TI_INPUT_PRESCALE 6 0 + +TI_CRATE end + + +### SSP +SSP_CRATE hps11 + +SSP_ALLSLOTS +SSP_W_WIDTH 50 +SSP_W_OFFSET 753 + +# COSMIC: +#SSP_W_WIDTH 100 +#SSP_W_OFFSET 799 + +SSP_HPS_PULSER 1000 # pulser period (s) + +# ecal triggers: +# HPS SINGLES 0 -> TI TS1 +SSP_HPS_SET_IO_SRC 7 20 #ENABLED +#SSP_HPS_SET_IO_SRC 7 0 #DISABLED + +#HPS SINGLES 1 -> TI TS2 +SSP_HPS_SET_IO_SRC 8 21 #ENABLED +#SSP_HPS_SET_IO_SRC 8 0 #DISABLED + +#HPS PAIRS 0 -> TI TS3 +SSP_HPS_SET_IO_SRC 9 22 #ENABLED +#SSP_HPS_SET_IO_SRC 9 0 #DISABLED + +#HPS PAIRS 1 -> TI TS4 +SSP_HPS_SET_IO_SRC 10 23 #ENABLED +#SSP_HPS_SET_IO_SRC 10 0 #DISABLED + +# HPS COSMIC/LED -> TI TS5 +#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED +#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMIC +SSP_HPS_SET_IO_SRC 11 0 #DISABLED + +# PULSER -> TI TS6 +SSP_HPS_SET_IO_SRC 12 18 #ENABLED +#SSP_HPS_SET_IO_SRC 12 0 #DISABLED + + +# coinc time 10=40 ns +SSP_HPS_COSMIC_TIMECOINCIDENCE 10 + +# cosmic B0 and B1 (136<<8) + led trigger (254<<0) +SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070 + +SSP_HPS_LATENCY 475 + +# Singles 0 trigger +SSP_HPS_SINGLES_EMIN 0 100 1 +SSP_HPS_SINGLES_EMAX 0 2700 1 +SSP_HPS_SINGLES_NMIN 0 3 1 + +# Singles 1 trigger +SSP_HPS_SINGLES_EMIN 1 1300 1 +SSP_HPS_SINGLES_EMAX 1 2600 1 +SSP_HPS_SINGLES_NMIN 1 3 1 + +# Pairs 0 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 0 2 +SSP_HPS_PAIRS_EMIN 0 150 +SSP_HPS_PAIRS_EMAX 0 1400 +SSP_HPS_PAIRS_NMIN 0 2 +SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1 +SSP_HPS_PAIRS_DIFFMAX 0 1100 1 +SSP_HPS_PAIRS_COPLANARITY 0 180 1 +SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1 + +# Pairs 1 trigger +SSP_HPS_PAIRS_TIMECOINCIDENCE 1 3 +SSP_HPS_PAIRS_EMIN 1 150 +SSP_HPS_PAIRS_EMAX 1 1400 +SSP_HPS_PAIRS_NMIN 1 2 +SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1 +SSP_HPS_PAIRS_DIFFMAX 1 1100 1 +SSP_HPS_PAIRS_COPLANARITY 1 40 1 +SSP_HPS_PAIRS_ENERGYDIST 1 5.5 600 1 + +SSP_CRATE end + + +### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1 +FADC250_CRATE hps11 + +FADC250_DAC 3300 +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 12 +FADC250_NSA 240 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 + +#Set RF clock threshold +FADC250_TET 800 + +FADC250_SLOT 13 +FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + + +########################## +# HPS 12 Crate +########################## + +### TI +TI_CRATE hps12 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + + +########################## +# HPS 1 Crate +########################## + +### TI +TI_CRATE hps1 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps1 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + +# Set LED system trigger threshold +FADC250_SLOT 20 +FADC250_CH_TET 15 500 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_CRATE end + +########################## +# HPS 2 Crate +########################## + +### TI +TI_CRATE hps2 +TI_FIBER_DELAY_OFFSET 0x80 0xc9 +TI_CRATE end + +### FADC +FADC250_CRATE hps2 + + +FADC250_W_OFFSET 3012 +FADC250_W_WIDTH 200 + +# COSMIC: +#FADC250_W_OFFSET 3180 +#FADC250_W_WIDTH 400 + +FADC250_MODE 1 +FADC250_NSB 20 +FADC250_NSA 100 +FADC250_NPEAK 1 + +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + +FADC250_TET 18 + + +# Set cosmic system trigger threshold +# 12bit -> 1V: 40 = ~10mV threshold +# relative to pedestal +FADC250_SLOT 20 +FADC250_CH_TET 13 40 +FADC250_CH_TET 14 40 +# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 +FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + + +FADC250_CRATE end + + +# include trigger/HPS/small/dsc2/hps11.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps11 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THRESHOLD (0=27mV): +DSC2_WIDTH 20 40 +#DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 +# +# FOR NEUTRON COUTNERS: +DSC2_THRESHOLD 50 50 + + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + + +# WHAT IS THIS (NOTHING IN SLOT2): +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + +# +DSC2_CRATE end + +# include trigger/HPS/small/dsc2/hps12.cnf + +# +# dsc2 config file for expid=clondev +# +# this file contains settings for JLAB VME Discriminators DSC2 +# +# CRATE <- crate name, usually IP name +# +# DSC2_SLOT 2 <- slot# +# +# DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns) +# +# DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask +# +# DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask +# +# DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask +# +# DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask +# +# DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV) +# +# DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV) +# +# following, if used, will supersede TRG width: +# +# DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns) +# +# DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns) +# +# +DSC2_CRATE hps12 + +DSC2_SLOT all + +# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clock +DSC2_SCALER_REFPRESCALE 1250 + +# ECAL, MINIMIZE THERSHOLD (0=27mV): +DSC2_WIDTH 20 40 +DSC2_THRESHOLD 0 0 +#DSC2_TRGDIGITAL 140 0 + +# RF SIGNAL, SLOT 20 CHANNELS 13/14: +DSC2_SLOT 20 +DSC2_CH_THRESHOLD 13 400 500 +DSC2_CH_THRESHOLD 14 400 500 + +# WHAT IS THIS (NOTHING IN SLOT2)? +DSC2_SLOT 2 +DSC2_CH_THRESHOLD 1 300 200 + + + +DSC2_CRATE end diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt index 577bf04562..43d48e1bdd 100644 --- a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_37.txt @@ -472,18 +472,3 @@ FADC250_SLOT 20 FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000 FADC250_CRATE end - -# SVT stuff - -# include dpm/dpm-default.trg - -DPM_CRATE all -DPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xml -DPM_CRATE end - -# include dpm/dpm-3sam-3rms-7932.trg - -DPM_CRATE all -DPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xml -DPM_CRATE end -# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps1FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 124.729 58.177 100.372 97.915 115.122 123.172 99.425 132.094 138.944 139.204 136.099 139.212 93.624 130.962 106.341 119.166FADC250_SLOT 4FADC250_ALLCH_PED 103.400 96.933 83.870 90.894 116.914 78.030 157.337 66.150 103.596 95.398 63.125 104.623 62.783 129.533 90.119 122.226FADC250_SLOT 5FADC250_ALLCH_PED 88.389 144.622 95.765 117.982 97.231 127.252 111.750 133.222 87.868 144.940 112.159 125.185 100.791 113.120 88.444 121.250FADC250_SLOT 6FADC250_ALLCH_PED 130.566 103.411 166.785 162.101 156.611 149.917 128.444 108.939 131.234 141.498 86.864 125.591 137.258 113.246 101.359 124.441FADC250_SLOT 7FADC250_ALLCH_PED 126.355 139.678 131.119 126.939 127.578 107.737 144.249 147.616 113.548 109.104 128.372 122.991 102.084 113.804 116.348 106.876FADC250_SLOT 8FADC250_ALLCH_PED 142.953 134.814 98.824 124.754 127.869 109.512 125.869 120.208 115.709 93.502 139.332 136.596 156.505 115.568 128.892 51.933FADC250_SLOT 9FADC250_ALLCH_PED 126.214 141.245 108.747 113.355 128.587 120.376 131.740 139.381 108.219 127.106 121.996 85.430 126.140 105.110 97.019 138.724FADC250_SLOT 14FADC250_ALLCH_PED 96.408 101.997 130.601 102.551 116.196 114.697 169.329 142.738 129.067 94.148 123.884 113.819 130.835 123.141 113.645 112.373FADC250_SLOT 15FADC250_ALLCH_PED 105.529 149.772 107.299 187.666 140.714 150.856 144.797 150.552 112.587 164.866 105.369 133.153 110.062 131.124 144.244 121.736FADC250_SLOT 16FADC250_ALLCH_PED 112.906 144.134 118.264 136.614 158.355 83.335 112.717 112.573 80.664 109.292 87.218 132.793 128.031 108.323 105.795 116.744FADC250_SLOT 17FADC250_ALLCH_PED 94.633 93.850 127.836 120.445 141.242 92.969 121.899 121.420 118.267 85.644 133.716 99.771 92.427 96.514 69.970 104.867FADC250_SLOT 18FADC250_ALLCH_PED 103.000 124.486 141.754 91.056 144.074 107.646 129.304 131.125 130.744 115.645 115.351 136.301 87.764 162.447 135.860 137.572FADC250_SLOT 19FADC250_ALLCH_PED 110.812 129.325 129.598 54.803 92.855 145.057 127.725 135.590 126.344 121.308 141.950 123.177 132.399 106.950 120.587 134.367FADC250_SLOT 20FADC250_ALLCH_PED 111.502 92.516 107.733 127.885 81.783 117.096 105.521 86.459 125.872 83.583 102.750 98.770 108.622 200.000 200.000 200.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps1FADC250_SLOT 3FADC250_ALLCH_GAIN 0.158 0.168 0.158 0.155 0.173 0.134 0.137 0.149 0.136 0.149 0.154 0.163 0.169 0.160 0.174 0.151FADC250_SLOT 4FADC250_ALLCH_GAIN 0.156 0.145 0.159 0.149 0.158 0.147 0.159 0.149 0.157 0.165 0.148 0.153 0.160 0.179 0.137 0.155FADC250_SLOT 5FADC250_ALLCH_GAIN 0.156 0.139 0.129 0.153 0.134 0.145 0.150 0.157 0.143 0.143 0.140 0.152 0.148 0.155 0.135 0.151FADC250_SLOT 6FADC250_ALLCH_GAIN 0.149 0.137 0.167 0.132 0.138 0.122 0.165 0.156 0.158 0.141 0.153 0.153 0.153 0.132 0.152 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.158 0.137 0.156 0.138 0.146 0.156 0.160 0.148 0.129 0.129 0.164 0.141 0.156 0.138 0.141 0.159FADC250_SLOT 8FADC250_ALLCH_GAIN 0.138 0.145 0.139 0.152 0.146 0.152 0.143 0.158 0.145 0.144 0.149 0.165 0.172 0.153 0.146 0.155FADC250_SLOT 9FADC250_ALLCH_GAIN 0.159 0.157 0.156 0.133 0.132 0.151 0.150 0.145 0.152 0.136 0.154 0.141 0.143 0.160 0.154 0.163FADC250_SLOT 14FADC250_ALLCH_GAIN 0.146 0.150 0.155 0.226 0.142 0.156 0.164 0.123 0.135 0.152 0.142 0.164 0.150 0.159 0.136 0.161FADC250_SLOT 15FADC250_ALLCH_GAIN 0.146 0.162 0.161 0.156 0.180 0.165 0.156 0.145 0.158 0.159 0.137 0.149 0.169 0.154 0.145 0.152FADC250_SLOT 16FADC250_ALLCH_GAIN 0.141 0.136 0.151 0.145 0.170 0.133 0.138 0.142 0.150 0.161 0.145 0.160 0.152 0.160 0.158 0.141FADC250_SLOT 17FADC250_ALLCH_GAIN 0.157 0.152 0.154 0.133 0.155 0.166 0.162 0.168 0.155 0.154 0.162 0.133 0.145 0.161 0.165 0.150FADC250_SLOT 18FADC250_ALLCH_GAIN 0.136 0.159 0.137 0.144 0.162 0.153 0.133 0.136 0.135 0.151 0.145 0.150 0.143 0.148 0.159 0.148FADC250_SLOT 19FADC250_ALLCH_GAIN 0.134 0.131 0.145 0.155 0.145 0.146 0.137 0.153 0.139 0.183 0.155 0.166 0.151 0.167 0.140 0.143FADC250_SLOT 20FADC250_ALLCH_GAIN 0.141 0.146 0.124 0.142 0.139 0.149 0.155 0.149 0.129 0.161 0.164 0.159 0.146 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end \ No newline at end of file diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt index d3699150e0..d38dc1469a 100644 --- a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_39.txt @@ -472,18 +472,3 @@ FADC250_SLOT 20 FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000 FADC250_CRATE end - -# SVT stuff - -# include dpm/dpm-default.trg - -DPM_CRATE all -DPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xml -DPM_CRATE end - -# include dpm/dpm-3sam-3rms-7932.trg - -DPM_CRATE all -DPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xml -DPM_CRATE end -# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trgFADC250_CRATE hps2FADC250_DAC 3280FADC250_SLOT 3FADC250_ALLCH_PED 140.735 112.236 92.497 134.831 122.899 88.599 157.645 101.778 134.973 139.234 114.950 147.963 137.083 119.371 132.795 155.270FADC250_SLOT 4FADC250_ALLCH_PED 139.223 116.493 134.458 117.226 107.798 173.681 163.017 139.044 149.702 125.742 146.271 130.000 149.778 138.952 148.589 124.645FADC250_SLOT 5FADC250_ALLCH_PED 99.704 79.990 98.895 126.453 126.481 113.891 110.048 143.690 127.239 129.462 101.352 142.480 126.893 104.686 117.981 119.707FADC250_SLOT 6FADC250_ALLCH_PED 97.709 113.641 121.408 111.523 144.176 119.372 91.310 92.045 121.923 163.665 121.908 131.701 94.874 153.090 105.619 125.711FADC250_SLOT 7FADC250_ALLCH_PED 179.134 110.875 110.244 127.440 136.697 149.591 131.611 116.291 149.272 134.619 121.552 111.778 120.195 138.638 126.228 145.586FADC250_SLOT 8FADC250_ALLCH_PED 117.374 127.166 91.785 100.240 107.542 86.814 123.029 135.297 86.748 153.299 113.819 79.006 106.013 92.659 81.905 95.954FADC250_SLOT 9FADC250_ALLCH_PED 124.206 183.991 160.415 157.000 123.575 106.578 115.525 119.327 112.973 172.608 146.904 118.091 134.833 138.827 139.703 166.473FADC250_SLOT 14FADC250_ALLCH_PED 153.086 151.816 117.170 102.687 125.684 142.218 127.782 114.210 158.969 152.119 122.638 142.583 104.921 151.183 93.195 130.613FADC250_SLOT 15FADC250_ALLCH_PED 95.431 130.810 94.116 88.770 108.365 125.587 121.638 122.810 110.191 114.970 123.351 86.433 103.002 119.253 160.559 80.175FADC250_SLOT 16FADC250_ALLCH_PED 109.697 114.499 95.904 95.125 106.158 123.539 108.619 103.568 124.110 99.899 154.634 118.457 116.094 142.237 90.539 100.495FADC250_SLOT 17FADC250_ALLCH_PED 117.889 130.424 115.099 106.077 114.249 126.123 115.934 111.685 128.858 118.248 117.725 116.912 115.324 109.242 161.982 122.245FADC250_SLOT 18FADC250_ALLCH_PED 141.920 128.746 116.768 144.519 140.685 141.454 143.691 105.650 103.442 109.925 140.403 182.085 140.228 117.869 129.708 157.552FADC250_SLOT 19FADC250_ALLCH_PED 119.287 138.815 144.345 102.717 94.858 143.438 91.494 89.146 97.076 119.678 112.433 99.692 129.841 143.627 101.285 144.373FADC250_SLOT 20FADC250_ALLCH_PED 115.747 114.471 125.073 114.333 94.332 114.271 115.668 75.055 116.233 115.968 91.934 88.001 127.579 200.000 200.000 2000.000FADC250_CH_TET 13 3000FADC250_CH_TET 14 3000FADC250_CH_TET 15 3000FADC250_CRATE end# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trgFADC250_CRATE hps2FADC250_SLOT 3FADC250_ALLCH_GAIN 0.210 0.192 0.182 0.221 0.195 0.188 0.197 0.173 0.203 0.198 0.150 0.137 0.149 0.158 0.161 0.155FADC250_SLOT 4FADC250_ALLCH_GAIN 0.152 0.159 0.174 0.168 0.160 0.172 0.150 0.147 0.144 0.164 0.160 0.171 0.150 0.175 0.153 0.137FADC250_SLOT 5FADC250_ALLCH_GAIN 0.146 0.147 0.145 0.148 0.143 0.144 0.151 0.159 0.150 0.155 0.138 0.156 0.147 0.153 0.159 0.149FADC250_SLOT 6FADC250_ALLCH_GAIN 0.142 0.131 0.141 0.135 0.142 0.156 0.163 0.173 0.153 0.153 0.158 0.138 0.177 0.158 0.155 0.151FADC250_SLOT 7FADC250_ALLCH_GAIN 0.150 0.166 0.164 0.132 0.155 0.146 0.168 0.160 0.156 0.168 0.159 0.155 0.164 0.156 0.152 0.166FADC250_SLOT 8FADC250_ALLCH_GAIN 0.146 0.145 0.280 0.149 0.148 0.181 0.140 0.151 0.153 0.169 0.163 0.146 0.164 0.145 0.143 0.154FADC250_SLOT 9FADC250_ALLCH_GAIN 0.136 0.149 0.141 0.157 0.165 0.133 0.150 0.158 0.149 0.160 0.132 0.133 0.144 0.147 0.151 0.164FADC250_SLOT 14FADC250_ALLCH_GAIN 0.155 0.147 0.152 0.158 0.141 0.152 0.137 0.177 0.151 0.165 0.111 0.157 0.134 0.155 0.164 0.167FADC250_SLOT 15FADC250_ALLCH_GAIN 0.163 0.151 0.166 0.154 0.171 0.142 0.133 0.204 0.147 0.172 0.143 0.137 0.181 0.152 0.149 0.151FADC250_SLOT 16FADC250_ALLCH_GAIN 0.173 0.170 0.133 0.160 0.157 0.140 0.153 0.168 0.163 0.162 0.176 0.175 0.166 0.170 0.159 0.146FADC250_SLOT 17FADC250_ALLCH_GAIN 0.143 0.133 0.136 0.151 0.137 0.147 0.163 0.134 0.154 0.152 0.151 0.148 0.174 0.137 0.141 0.137FADC250_SLOT 18FADC250_ALLCH_GAIN 0.159 0.149 0.149 0.152 0.142 0.146 0.158 0.134 0.152 0.159 0.157 0.158 0.156 0.143 0.161 0.170FADC250_SLOT 19FADC250_ALLCH_GAIN 0.157 0.179 0.149 0.145 0.163 0.158 0.166 0.164 0.177 0.131 0.144 0.148 0.142 0.151 0.154 0.136FADC250_SLOT 20FADC250_ALLCH_GAIN 0.169 0.149 0.164 0.140 0.143 0.147 0.153 0.160 0.157 0.155 0.149 0.168 0.163 1.000 1.000 1.000FADC250_CRATE end# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end \ No newline at end of file diff --git a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt index e504f034f5..7fdd4fce7a 100644 --- a/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt +++ b/record-util/src/main/resources/org/hps/record/daqconfig/2016_v8_200nA_46.txt @@ -397,26 +397,3 @@ DSC2_CH_THRESHOLD 1 300 200 DSC2_CRATE end - -# ECAL PEDESTALS: - -# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg - -# ECAL GAINS: - -# include trigger/HPS/small/fadc250/gains/EcalGains.trg - -# SVT stuff - -# include dpm/dpm-default.trg - -DPM_CRATE all -DPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xml -DPM_CRATE end - -# include dpm/dpm-3sam-3rms-7932.trg - -DPM_CRATE all -DPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xml -DPM_CRATE end -# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end# include trigger/HPS/small/ssp/trigger/feemaskA.cnf# SSP_HPS_SINGLES_PRESCALE N REGION XMIN XMAX PRESCALE# # N: 0 or 1 - selects the hps singles trigger bit# # REGION: 0 to 6 - selects which region index to define# # XMIN: -31 to 31 - chooses the ECAL x coordinate to start region definition (inclusive)# # XMAX: -31 to 31 - chooses the ECAL x coordinate to end region definition (inclusive)# # PRESCALE: 0 to 65535 - set the prescale value for the regionSSP_CRATE hps11SSP_ALLSLOTSSSP_HPS_SINGLES_PRESCALE 1 0 -30 -13 0SSP_HPS_SINGLES_PRESCALE 1 1 -12 -9 80SSP_HPS_SINGLES_PRESCALE 1 2 -8 -7 1300SSP_HPS_SINGLES_PRESCALE 1 3 -6 -3 18000SSP_HPS_SINGLES_PRESCALE 1 4 -2 1 1300SSP_HPS_SINGLES_PRESCALE 1 5 2 5 80SSP_HPS_SINGLES_PRESCALE 1 6 6 30 0SSP_CRATE end########################### GTP##########################GTP_CRATE allGTP_CLUSTER_PULSE_COIN 4 4# SEED thrershold in MeV (0-8191)GTP_CLUSTER_PULSE_THRESHOLD 100GTP_CRATE end########################### HPS 11 Crate############################# TITI_CRATE hps11TI_FIBER_DELAY_OFFSET 0x80 0xcfTI_BUFFER_LEVEL 5TI_BLOCK_LEVEL 10## HOLD OFF# 1.44 us holdoff:#TI_HOLDOFF 1 3 1TI_HOLDOFF 1 6 1# 4 triggers in 10*3840ns#TI_HOLDOFF 4 10 1#TI_HOLDOFF 4 15 1TI_HOLDOFF 4 20 1# PRESCALE-FACTOR = 2# SINGLES-0:TI_INPUT_PRESCALE 1 13# SINGLES-1:TI_INPUT_PRESCALE 2 1# PAIRS-0:TI_INPUT_PRESCALE 3 6# PAIRS-1:TI_INPUT_PRESCALE 4 0# COSMIC/LED:TI_INPUT_PRESCALE 5 0# PULSER:TI_INPUT_PRESCALE 6 0TI_CRATE end### SSPSSP_CRATE hps11SSP_ALLSLOTSSSP_W_WIDTH 50SSP_W_OFFSET 753# COSMIC:#SSP_W_WIDTH 100#SSP_W_OFFSET 799SSP_HPS_PULSER 1000 # pulser period (s)# ecal triggers:# HPS SINGLES 0 -> TI TS1SSP_HPS_SET_IO_SRC 7 20 #ENABLED#SSP_HPS_SET_IO_SRC 7 0 #DISABLED#HPS SINGLES 1 -> TI TS2SSP_HPS_SET_IO_SRC 8 21 #ENABLED#SSP_HPS_SET_IO_SRC 8 0 #DISABLED#HPS PAIRS 0 -> TI TS3SSP_HPS_SET_IO_SRC 9 22 #ENABLED#SSP_HPS_SET_IO_SRC 9 0 #DISABLED#HPS PAIRS 1 -> TI TS4SSP_HPS_SET_IO_SRC 10 23 #ENABLED#SSP_HPS_SET_IO_SRC 10 0 #DISABLED# HPS COSMIC/LED -> TI TS5#SSP_HPS_SET_IO_SRC 11 24 #ENABLED-LED#SSP_HPS_SET_IO_SRC 11 25 #ENABLED-COSMICSSP_HPS_SET_IO_SRC 11 0 #DISABLED# PULSER -> TI TS6SSP_HPS_SET_IO_SRC 12 18 #ENABLED#SSP_HPS_SET_IO_SRC 12 0 #DISABLED# coinc time 10=40 nsSSP_HPS_COSMIC_TIMECOINCIDENCE 10# cosmic B0 and B1 (136<<8) + led trigger (254<<0)SSP_HPS_COSMIC_PATTERNCOINCIDENCE 35070SSP_HPS_LATENCY 475# Singles 0 triggerSSP_HPS_SINGLES_EMIN 0 100 1SSP_HPS_SINGLES_EMAX 0 2700 1SSP_HPS_SINGLES_NMIN 0 3 1# Singles 1 triggerSSP_HPS_SINGLES_EMIN 1 1300 1SSP_HPS_SINGLES_EMAX 1 2600 1SSP_HPS_SINGLES_NMIN 1 3 1# Pairs 0 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 0 2SSP_HPS_PAIRS_EMIN 0 150SSP_HPS_PAIRS_EMAX 0 1400SSP_HPS_PAIRS_NMIN 0 2SSP_HPS_PAIRS_SUMMAX_MIN 0 1900 500 1SSP_HPS_PAIRS_DIFFMAX 0 1100 1SSP_HPS_PAIRS_COPLANARITY 0 180 1SSP_HPS_PAIRS_ENERGYDIST 0 5.5 400 1# Pairs 1 triggerSSP_HPS_PAIRS_TIMECOINCIDENCE 1 3SSP_HPS_PAIRS_EMIN 1 150SSP_HPS_PAIRS_EMAX 1 1400SSP_HPS_PAIRS_NMIN 1 2SSP_HPS_PAIRS_SUMMAX_MIN 1 2000 600 1SSP_HPS_PAIRS_DIFFMAX 1 1100 1SSP_HPS_PAIRS_COPLANARITY 1 35 1SSP_HPS_PAIRS_ENERGYDIST 1 5.5 700 1SSP_CRATE end### FADC: RF SIGNALS, HPS11, SLOT 13, CHANNELS 0/1FADC250_CRATE hps11FADC250_DAC 3300FADC250_W_OFFSET 3012FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 12FADC250_NSA 240FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1#Set RF clock thresholdFADC250_TET 800FADC250_SLOT 13FADC250_ALLCH_PED 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 12 Crate############################# TITI_CRATE hps12TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end########################### HPS 1 Crate############################# TITI_CRATE hps1TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps1FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set LED system trigger thresholdFADC250_SLOT 20FADC250_CH_TET 15 500# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end########################### HPS 2 Crate############################# TITI_CRATE hps2TI_FIBER_DELAY_OFFSET 0x80 0xc9TI_CRATE end### FADCFADC250_CRATE hps2FADC250_W_OFFSET 3012FADC250_W_WIDTH 200# COSMIC:#FADC250_W_OFFSET 3180#FADC250_W_WIDTH 400FADC250_MODE 1FADC250_NSB 20FADC250_NSA 100FADC250_NPEAK 1# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_ADC_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TRG_MASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_TET 18# Set cosmic system trigger threshold# 12bit -> 1V: 40 = ~10mV threshold# relative to pedestalFADC250_SLOT 20FADC250_CH_TET 13 40FADC250_CH_TET 14 40# channel: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15FADC250_TET_IGNORE_MASK 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FADC250_CRATE end# include trigger/HPS/small/dsc2/hps11.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps11DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THRESHOLD (0=27mV):DSC2_WIDTH 20 40#DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 ## FOR NEUTRON COUTNERS:DSC2_THRESHOLD 50 50# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2):DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200#DSC2_CRATE end# include trigger/HPS/small/dsc2/hps12.cnf## dsc2 config file for expid=clondev## this file contains settings for JLAB VME Discriminators DSC2## CRATE <- crate name, usually IP name## DSC2_SLOT 2 <- slot### DSC2_WIDTH 20 40 <- TDC width (ns), TRG width (ns)## DSC2_TDCMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC enable mask## DSC2_TRGMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG enable mask## DSC2_TDCORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TDC OR mask## DSC2_TRGORMASK 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 <- TRG OR mask## DSC2_THRESHOLD 20 50 <- board threshold: TDC threshold (mV), TRG threshold (mV)## DSC2_CH_THRESHOLD 0 20 50 <- channel threshold: channel#, TDC threshold (mV), TRG threshold (mV)## following, if used, will supersede TRG width:## DSC2_TRGDIGITAL 40 64 <- board digital TRG output: width (ns), delay (ns)## DSC2_CH_TRGDIGITAL 0 40 64 <- channel digital TRG output: channel#, width (ns), delay (ns)##DSC2_CRATE hps12DSC2_SLOT all# DSC2_SCALER_REFPRESCALE=1250 => 100kHz Reference clockDSC2_SCALER_REFPRESCALE 1250# ECAL, MINIMIZE THERSHOLD (0=27mV):DSC2_WIDTH 20 40DSC2_THRESHOLD 0 0#DSC2_TRGDIGITAL 140 0# RF SIGNAL, SLOT 20 CHANNELS 13/14:DSC2_SLOT 20DSC2_CH_THRESHOLD 13 400 500DSC2_CH_THRESHOLD 14 400 500# WHAT IS THIS (NOTHING IN SLOT2)?DSC2_SLOT 2DSC2_CH_THRESHOLD 1 300 200DSC2_CRATE end# ECAL PEDESTALS:# include trigger/HPS/small/fadc250/peds/EcalPeds_200nA.trg# ECAL GAINS:# include trigger/HPS/small/fadc250/gains/EcalGains.trg# SVT stuff# include dpm/dpm-default.trgDPM_CRATE allDPM_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/config/rce_config.xmlDPM_CRATE end# include dpm/dpm-3sam-3rms-7932.trgDPM_CRATE allDPM_THR_CONFIG_FILE /usr/clas12/release/1.3.0/slac_svt/svtdaq/daq/thresholds/20160408_7932_thresholds_3rms.xmlDPM_CRATE end \ No newline at end of file From 43a6b3301301f0de78c9b9bb021ccbbdfcadf57e Mon Sep 17 00:00:00 2001 From: tongtongcao Date: Mon, 22 Jan 2024 12:54:38 -0500 Subject: [PATCH 4/4] tiny change for a comment --- .../src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java b/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java index 3c110ff3d8..afa6a557b3 100644 --- a/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java +++ b/record-util/src/main/java/org/hps/record/daqconfig/DAQConfigDriver.java @@ -349,7 +349,7 @@ public void setDaqConfigurationAppliedintoReadout(boolean state) { */ private String mapBetweenRunNumberDAQVersion(int runNumber) { - // 2019 experiment + // 2016 experiment if(runNumber >= 7609 && runNumber <=7809) return "2016_v7_200nA"; else return "2016_v8_200nA";