Skip to content
This repository has been archived by the owner on May 13, 2024. It is now read-only.

Latest commit

 

History

History
30 lines (15 loc) · 1.55 KB

ACKNOWLEDGEMENT.md

File metadata and controls

30 lines (15 loc) · 1.55 KB

This project would not be possible if without the great contributions and support from academia and industry.

Many academic researchers have contributed to the project:

  • Prof. Yun Liang's group (PKU): Xiaochen Hao, Lianwei Cui, Size Zheng, Xiuping Cui, Yunshan Jia

  • Prof. Zhiru Zhang's group (Cornell): Yi-Hsiang Lai, Shaojie Xiang, Nitish Srivastava, Brendan Sullivan

  • Prof. Wenguang Chen and Youhui Zhang's group (THU), and Prof. Yu Zhang's group (USTC): Mingzhe Zhang, Weihao Zhang, Guanyu Feng, Huanqi Cao

  • Prof. Jason Cong's group (UCLA): Jie Wang

  • Prof. Vivek Sarkar's group (GATECH): Prithayan Barua

  • Prof. Huiyang Zhou's group (NCSU): Abdullah-Al Kafi

Many Intel people have helped enabling the technology:

  • System Software Group: Geoff Lowney, John C. Kreatsoulas, Nithin George, Paul Petersen, Gorge Powley, Carmen Badea, Daya Khudia, Adam Herr, Charlotte Dryden, Pablo Reble, Vishakha Agrawal, Mike Voss, Vasanth Tovinkere

  • Intel Labs: Christopher J. Hughes, Pradeep Dubey, Jim Held, Timothy Mattson, Sanket Tavarageri, Kunal Banerjee, Bharat Kaul, Justin Gottschlich, Todd A. Anderson, Michael Beale

  • Accelerated Computing Systems and Graphics Group: Hong Jiang, Lidong Xu, Kari Pulli, Fangwen Fu, Hongzheng Li, Sabareesh Ganapathy, Daniel Rhee

  • GPU Software Engineering Group: Kai Yu Chen, Guei-Yuan Lueh, Yuting Yang

  • Programmable Solution Group: Jose Alvarez, Bernhard Friebe, Dan Prikster, Mohamed Issa, Aravind Dasu, John Freeman, Gordon Chiu, Davor Capalija, Tomasz Czajkowski, Andrei Hagiescu

  • Intel FPGA DevCloud: Lawrence Landis, Jimmy Tran