aarch32-syntax: Also test set-reg

macaw-aarch32-syntax/test-data/get-regs.cbl → macaw-aarch32-syntax/test-data/get-set.cbl

@@ -51,4 +51,55 @@
     (let v29 (get-reg v29 regs))
     (let v30 (get-reg v30 regs))
     (let v31 (get-reg v31 regs))
+    (set-reg r0 r0 regs)
+    (set-reg r1 r1 regs)
+    (set-reg r2 r2 regs)
+    (set-reg r3 r3 regs)
+    (set-reg r4 r4 regs)
+    (set-reg r5 r5 regs)
+    (set-reg r6 r6 regs)
+    (set-reg r7 r7 regs)
+    (set-reg r8 r8 regs)
+    (set-reg r9 r9 regs)
+    (set-reg r10 r10 regs)
+    (set-reg r11 r11 regs)
+    (set-reg fp fp regs)
+    (set-reg r12 r12 regs)
+    (set-reg ip ip regs)
+    (set-reg r13 r13 regs)
+    (set-reg sp sp regs)
+    (set-reg r14 r14 regs)
+    (set-reg lr lr regs)
+    (set-reg v0 v0 regs)
+    (set-reg v1 v1 regs)
+    (set-reg v2 v2 regs)
+    (set-reg v3 v3 regs)
+    (set-reg v4 v4 regs)
+    (set-reg v5 v5 regs)
+    (set-reg v6 v6 regs)
+    (set-reg v7 v7 regs)
+    (set-reg v8 v8 regs)
+    (set-reg v9 v9 regs)
+    (set-reg v10 v10 regs)
+    (set-reg v11 v11 regs)
+    (set-reg v12 v12 regs)
+    (set-reg v13 v13 regs)
+    (set-reg v14 v14 regs)
+    (set-reg v15 v15 regs)
+    (set-reg v16 v16 regs)
+    (set-reg v17 v17 regs)
+    (set-reg v18 v18 regs)
+    (set-reg v19 v19 regs)
+    (set-reg v20 v20 regs)
+    (set-reg v21 v21 regs)
+    (set-reg v22 v22 regs)
+    (set-reg v23 v23 regs)
+    (set-reg v24 v24 regs)
+    (set-reg v25 v25 regs)
+    (set-reg v26 v26 regs)
+    (set-reg v27 v27 regs)
+    (set-reg v28 v28 regs)
+    (set-reg v29 v29 regs)
+    (set-reg v30 v30 regs)
+    (set-reg v31 v31 regs)
     (return regs)))