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patch-dir632.patch
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patch-dir632.patch
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diff --git a/target/linux/ar71xx/base-files/etc/diag.sh b/target/linux/ar71xx/base-files/etc/diag.sh
index 708e2c5..2afd4c6 100755
--- a/target/linux/ar71xx/base-files/etc/diag.sh
+++ b/target/linux/ar71xx/base-files/etc/diag.sh
@@ -47,6 +47,9 @@ get_status_led() {
dir-615-e4)
status_led="d-link:green:power"
;;
+ dir-632-a1)
+ status_led="d-link:amber:power"
+ ;;
dir-615-c1)
status_led="d-link:green:status"
;;
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
index afeae42..e023ba8 100755
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/01_leds
@@ -60,6 +60,12 @@ dir-615-e4)
ucidef_set_led_switch "lan4" "LAN4" "d-link:green:lan4" "switch0" "0x10"
;;
+dir-632-a1)
+ ucidef_set_led_usbdev "usb" "USB" "d-link:green:usb" "1-1"
+ ucidef_set_led_netdev "wan" "WAN" "d-link:green:wan" "eth1"
+ ucidef_set_led_wlan "wlan" "WLAN" "d-link:green:wireless" "phy0tpt"
+ ;;
+
dir-825-b1 | \
dir-825-c1)
ucidef_set_led_usbdev "usb" "USB" "d-link:blue:usb" "1-1"
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
index ca58a39..13b4a55 100755
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/02_network
@@ -216,6 +216,14 @@ wpe72)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
+dir-632-a1)
+ ucidef_set_interfaces_lan_wan "eth0" "eth1"
+ ucidef_add_switch "switch0" "1" "1"
+ ucidef_add_switch_vlan "switch0" "1" "0 1 2 3 4 5 6 7 8"
+ ;;
+
+
+
ap121 |\
ap121-mini |\
ap96 |\
diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration
index 718a924..3bf74fe 100755
--- a/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration
+++ b/target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration
@@ -57,6 +57,7 @@ ap121-mini|\
ap96|\
airrouter|\
dir-600-a1|\
+dir-632-a1|\
dir-615-c1|\
dir-615-e4|\
ja76pf|\
diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh b/target/linux/ar71xx/base-files/lib/ar71xx.sh
index b7056f2..2a15923 100755
--- a/target/linux/ar71xx/base-files/lib/ar71xx.sh
+++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh
@@ -222,6 +222,9 @@ ar71xx_board_detect() {
*"DIR-615 rev. E4")
name="dir-615-e4"
;;
+ *"DIR-632 rev. A1")
+ name="dir-632-a1"
+ ;;
*"DIR-825 rev. B1")
name="dir-825-b1"
;;
diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
index 85e9d61..1b82d38 100755
--- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
@@ -108,6 +108,7 @@ platform_check_image() {
dir-600-a1 | \
dir-615-c1 | \
dir-615-e4 | \
+ dir-632-a1 | \
dir-825-c1 | \
dir-835-a1 | \
ew-dorin | \
diff --git a/target/linux/ar71xx/config-3.8 b/target/linux/ar71xx/config-3.8
index 32393fb..2393f7e 100644
--- a/target/linux/ar71xx/config-3.8
+++ b/target/linux/ar71xx/config-3.8
@@ -2,6 +2,27 @@ CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
# CONFIG_AG71XX_DEBUG_FS is not set
+CONFIG_AG7240=y
+# CONFIG_AG7240_GE0_GMII is not set
+CONFIG_AG7240_GE0_IS_CONNECTED=y
+CONFIG_AG7240_GE0_MII=y
+# CONFIG_AG7240_GE0_RGMII is not set
+CONFIG_AG7240_GE1_IS_CONNECTED=y
+CONFIG_AG7240_GE1_MII=y
+CONFIG_AG7240_MAC_LOCATION=0x1fff0000
+CONFIG_AG7240_NUMBER_RX_PKTS=252
+CONFIG_AG7240_NUMBER_TX_PKTS=80
+# CONFIG_AG7240_USE_TRC is not set
+CONFIG_AR7240_S26_PHY=y
+# CONFIG_AR7240_S26_VLAN_IGMP is not set
+# CONFIG_AR7242_RGMII_PHY is not set
+CONFIG_AR7242_RTL8309G_PHY=y
+# CONFIG_AR7242_S16_PHY is not set
+# CONFIG_AR7242_VIR_PHY is not set
+# CONFIG_AR8021_PHY is not set
+CONFIG_AG7240_LEN_PER_TX_DS=1536
+CONFIG_AG7240_NUMBER_TX_PKTS=80
+CONFIG_AG7240_NUMBER_RX_PKTS=252
CONFIG_AR8216_PHY=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
@@ -38,6 +59,7 @@ CONFIG_ATH79_MACH_CAP4200AG=y
CONFIG_ATH79_MACH_DB120=y
CONFIG_ATH79_MACH_DIR_600_A1=y
CONFIG_ATH79_MACH_DIR_615_C1=y
+CONFIG_ATH79_MACH_DIR_632_A1=y
CONFIG_ATH79_MACH_DIR_825_B1=y
CONFIG_ATH79_MACH_DIR_825_C1=y
CONFIG_ATH79_MACH_EAP7660D=y
@@ -99,6 +121,8 @@ CONFIG_ATH79_NVRAM=y
CONFIG_ATH79_PCI_ATH9K_FIXUP=y
CONFIG_ATH79_ROUTERBOOT=y
# CONFIG_ATH79_WDT is not set
+# CONFIG_ATHEROS_HEADER_EN is not set
+# CONFIG_ATHRS_QOS is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CMDLINE="rootfstype=squashfs,yaffs,jffs2 noinitrd"
@@ -191,12 +215,9 @@ CONFIG_MIPS_MT_DISABLED=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_M25P80=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
@@ -210,6 +231,7 @@ CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
CONFIG_NET_DSA_MV88E6063=y
CONFIG_NET_DSA_TAG_TRAILER=y
+CONFIG_NET_SCH_FQ_CODEL=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
@@ -226,6 +248,7 @@ CONFIG_RTL8366RB_PHY=y
CONFIG_RTL8366S_PHY=y
CONFIG_RTL8366_SMI=y
CONFIG_RTL8367_PHY=y
+# CONFIG_S26_SWITCH_ONLY_MODE is not set
# CONFIG_SCSI_DMA is not set
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-632-a1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-632-a1.c
new file mode 100644
index 0000000..27ad0ad
--- /dev/null
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-632-a1.c
@@ -0,0 +1,433 @@
+/*
+ * D-Link DIR-632 rev. A1 board support
+ *
+ * Copyright (C) 2013 Andrew McDonnell <[email protected]>
+ * Copyright (C) 2010-2012 Gabor Juhos <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+#include <linux/ar8216_platform.h>
+#include "common.h"
+#include "dev-common.h"
+#include "dev-eth.h"
+#include "dev-m25p80.h"
+#include "dev-gpio-buttons.h"
+#include "dev-leds-gpio.h"
+#include "dev-ap9x-pci.h"
+#include "dev-usb.h"
+#include "machtypes.h"
+#include "nvram.h"
+
+/* Set the following to zero to have a look at actual RAM when trying to find MAC addresses, etc. */
+#define DEBUG_CHECK_MEMORY_CONTENTS 1
+
+ /* Various in-memory items of interest:
+ *
+ * Memory Flash Description
+ * 1f040000 040000 u-boot environment variables
+ * 1ffb0004 7b0004 ASCII MAC address matching the case sticker.
+ * I suspect this is 'fixed' when you first execute
+ * setenv mac= in u-boot (which I inadvertently did)
+ * (mtd "MAC" partition)
+ * 1ffe0000 7e0000 NVRAM (area prefix: "HSLF")
+ * (partway through factory mtd "LP" partition)
+ * 1fff0000 7f0000 Hardware MAC address for eth0, according to source
+ * code of DD-WRT and zRouter, except this MAC address
+ * is _different_ to the stickered MAC address.
+ * (mtd "ART" partition)
+ * 1fff0006 7f0006 Hardware MAC address for eth1, according to source
+ * code of DD-WRT and zRouter, except this MAC address
+ * is set to ff:ff:ff:ff:ff:ff in my router.
+ * 1ff10000 7f1000 PCI EEPROM - "calibration data"
+ * 1ff1010c 7f110c PCI EEPROM - WLAN mac address reported in DD-WRT
+ * In my board this is set to 00:00:22:22:22:22
+ * Which happens to be the same as the NVRAM value
+ * ath_hwaddr
+ */
+
+/* Network architecture:
+ *
+ * eth0 --> 8309 switch - LAN
+ * eth1 --> S26 switch - WAN
+ * wlan0 --> PCI ath9k driver
+ */
+
+#define ADDR_UBOOT 0x1f040000
+#define ADDR_AMAC 0x1ffb0000
+#define ADDR_NVRAM 0x1ffe0000
+#define ADDR_HMAC 0x1fff0000
+#define ADDR_PCIBASE 0x1fff0000
+#define ADDR_EEPROM 0x1fff1000
+
+#define EEPROM_WLAN_MAC_OFFSET 0x10c
+
+#define NVRAM_SIZE 0x10000
+
+#define DIR632_MAC0_OFFSET 0
+#define DIR632_MAC1_OFFSET 6
+
+#define DIR632_AMAC_OFFSET 4
+
+/*
+
+ Known LED and GPIO Definitions, derived from
+
+ http://zrouter.org/projects/zrouter/repository/entry/boards/D-Link/DIR-632/GPIO
+ http://zrouter.org/projects/zrouter/repository/entry/boards/D-Link/DIR-632/board.hints
+
+ and from practical experimentation using the DD-WRT generic_leds and testing
+
+GPIO LED
+ 0 LED WPS (blue)
+ 1 LED STATUS (bicolour: orange)
+ 6 LED STATUS (bicolour: green)
+ 7 LED WAN (bicolour: orange)
+ 8 BUTTON Reset
+ 9 UART
+ 10 UART
+ 11 LED USB (green)
+ 12 BUTTON WPS
+ 13 Test point TP3
+ 14 Test point TP4
+ 15 Test point TP5
+ 17 LED WAN (bicolour: green)
+
+Additionally, the ATH9k has GPIO, specified for the LED in platform data
+
+ 0 LED, WLAN (green)
+
+*/
+
+#define DIR_632_A1_GPIO_LED_WPS 0
+#define DIR_632_A1_GPIO_LED_POWER_AMBER 1
+#define DIR_632_A1_GPIO_LED_POWER_GREEN 6
+#define DIR_632_A1_GPIO_LED_WAN_AMBER 7
+#define DIR_632_A1_GPIO_LED_USB 11
+#define DIR_632_A1_GPIO_LED_WAN_GREEN 17
+
+#define DIR_632_A1_WLAN_GPIO_LED 0
+
+#define DIR_632_A1_GPIO_BTN_RESET 8
+#define DIR_632_A1_GPIO_BTN_WPS 12
+
+#define DIR_632_A1_KEYS_POLL_INTERVAL 20 /* msecs */
+#define DIR_632_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_632_A1_KEYS_POLL_INTERVAL)
+
+static struct gpio_led dir_632_a1_leds_gpio[] __initdata = {
+ {
+ .name = "d-link:blue:wps",
+ .gpio = DIR_632_A1_GPIO_LED_WPS,
+ .active_low = 1,
+ }, {
+ .name = "d-link:amber:power",
+ .gpio = DIR_632_A1_GPIO_LED_POWER_AMBER,
+ .default_state = LEDS_GPIO_DEFSTATE_KEEP,
+ }, {
+ .name = "d-link:green:power",
+ .gpio = DIR_632_A1_GPIO_LED_POWER_GREEN,
+ }, {
+ .name = "d-link:amber:wan",
+ .gpio = DIR_632_A1_GPIO_LED_WAN_AMBER,
+ }, {
+ .name = "d-link:green:wan",
+ .gpio = DIR_632_A1_GPIO_LED_WAN_GREEN,
+ .active_low = 1,
+ }, {
+ .name = "d-link:green:usb",
+ .gpio = DIR_632_A1_GPIO_LED_USB,
+ .active_low = 1,
+ },
+};
+
+static struct gpio_keys_button dir_632_a1_gpio_keys[] __initdata = {
+ {
+ .desc = "reset", // tested OK, using cat /sys/kernel/debug/gpio/
+ .type = EV_KEY,
+ .code = KEY_RESTART,
+ .debounce_interval = DIR_632_A1_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DIR_632_A1_GPIO_BTN_RESET, /* Note, zrouter flags is 0x4a1, if this doesnt work ... */
+ .active_low = 1,
+ }, {
+ .desc = "wps", // tested OK, using cat /sys/kernel/debug/gpio/
+ .type = EV_KEY,
+ .code = KEY_WPS_BUTTON,
+ .debounce_interval = DIR_632_A1_KEYS_DEBOUNCE_INTERVAL,
+ .gpio = DIR_632_A1_GPIO_BTN_WPS, /* Note, zrouter flags is 0x4a1, if this doesnt work ... */
+ .active_low = 1,
+ }
+};
+
+static struct ar8327_pad_cfg dir632_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+ };
+
+static struct ar8327_platform_data dir632_ar8327_data = {
+ .pad0_cfg = &dir632_ar8327_pad0_cfg,
+ .port0_cfg = {
+ .force_link = 1,
+
+ .speed = AR8327_PORT_SPEED_1000,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ },
+ };
+
+static struct mdio_board_info dir632_mdio0_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &dir632_ar8327_data,
+ },
+ };
+
+/* At 0x1000 in the upper 64K of memory of my DIR632 is PCI EEPROM information.
+ * However DD-WRT does a scan at the start of each 0x1000 of the entire 64k,
+ * so we do just in case. */
+static void *dir_632_a1_get_eeprom_caldata(int slot)
+{
+ u8 *base;
+ for (base=(u8 *)KSEG1ADDR(0x1f000000);base<(u8 *)KSEG1ADDR(0x1ffff000);base+=0x1000) {
+ u32 *cal = (u32 *)base;
+ if (*cal==0xa55a0000 || *cal==0x5aa50000) {
+ /* protection bit is always zero on inflash devices, so we can use for match it */
+ if (slot) {
+ base+=0x4000;
+ }
+ pr_info("dir632: found PCI EEPROM for slot %d at %p\n",slot,base);
+ return base;
+ }
+ }
+ return NULL;
+}
+
+static int is_mac_all_ones(u8* mac) {
+ return !memcmp(mac,"\xff\xff\xff\xff\xff\xff",6);
+}
+
+static int is_mac_all_zeros(u8* mac) {
+ return !memcmp(mac,"\x0\x0\x0\x0\x0\x0",6);
+}
+
+static int is_mac_ok(u8* mac) {
+ return !is_mac_all_zeros(mac) && !is_mac_all_ones(mac) && memcmp(mac,"\x08\x0\x0\x0\x0\x0",6);
+}
+
+static struct ag7240_platform_data ath79_ag7240_eth_data;
+
+static struct platform_device ath79_ag7240_eth_device = {
+ .name = "ag7240",
+ .id = 0,
+ .dev = {
+ .platform_data = &ath79_ag7240_eth_data,
+ },
+};
+
+static struct flash_platform_data dir_632_a1_flash = {
+ .type = "mx25l6405d",
+};
+
+/*
+ * Platform initialisation for the DIR-632-A1 mainboard.
+ *
+ * Here we set platform-specific data for each device that may be loaded later.
+ *
+ * This router has:
+ * (a) AG7240 ethernet
+ * eth0: connected to RTL8309G, physically to 8-port switch
+ * eth1: connected vi internal S26 switch to WAN port
+ * (b) mdio port - bus used to control the switches (I think)
+ * (c) ath9k wireless - on PCI bus
+ * (d) USB2
+ * (e) serial port
+ * (f) GPIO - buttons - WPS button and Reset button, of course with OpenWRT
+ * you can change these to whatever you want
+ * (g) GPIO - leds - 8 switch LEDS controlled by ag7240 driver
+ * - power/status - can be green or orange in factory firmware
+ * - WAN - can be green or orange in factory firmware
+ * - WLAN - green - controlled by ath9k driver
+ * - WPS - blue
+ * - USB - green
+ * (h) Watchdog timer
+ * The board also has two extra placeholders for other LEDS so it hopefully
+ * will be possible to buzz these out and use them as spare GPIO in the future
+ * (i) Flash - SPI controlled flash, 8MB
+ *
+ * MAC addresses:
+ *
+ * The factory firmware reads an ASCII MAC address from the MAC partition
+ * and seems to assign it to all ports. Note that DD-WRT reads the wireless MAC
+ * 00:00:22:22:22:22 from the ART partition in the Atheros PCI 'eeprom' data
+ * (see http://wiki.openwrt.org/doc/howto/restore_art_partition )
+ * so it appears that D-link just ignore this and replace it with the stickered
+ * MAC as well.
+ *
+ * However a _different_ MAC is binary encoded in the start of the ART partition
+ * and this us assigned to eth0 and eth1 by uboot!
+ *
+ * So I am not really sure what the correct algorithm is for selecting all this!
+ *
+ * Looking at other similar boards, whoever ported them to OpenWRT chose to
+ * do different things...
+ */
+static void __init dir_632_a1_setup(void)
+{
+
+ const char *nvram = (char *)KSEG1ADDR(ADDR_NVRAM);
+ u8 *ee = (u8 *)KSEG1ADDR(ADDR_PCIBASE); /* PCI Cal data - will be set by getCalData() */
+ u8 mac_buffer[6];
+ u8 *wmac = NULL; /* This may end up with a MAC address to pass through to ath9k for it to use instead of PCI calibration data */
+ u8 *art = (u8 *)KSEG1ADDR(ADDR_HMAC); /* Early-hardware MAC addresses */
+ u8 *hmac = NULL;
+
+#if DEBUG_CHECK_MEMORY_CONTENTS
+ print_hex_dump(KERN_DEBUG, "uboot args: ", DUMP_PREFIX_ADDRESS, 16, 1, (u8*)KSEG1ADDR(ADDR_UBOOT), 64, true);
+ print_hex_dump(KERN_DEBUG, "nvram: ", DUMP_PREFIX_ADDRESS, 16, 1, (u8*)KSEG1ADDR(ADDR_NVRAM), 64, true);
+ print_hex_dump(KERN_DEBUG, "art: ", DUMP_PREFIX_ADDRESS, 16, 1, (u8*)KSEG1ADDR(ADDR_HMAC), 64, true);
+ print_hex_dump(KERN_DEBUG, "pci eeprom: ", DUMP_PREFIX_ADDRESS, 16, 1, (u8*)KSEG1ADDR(ADDR_EEPROM), 64, true);
+ print_hex_dump(KERN_DEBUG, "boxmac : ", DUMP_PREFIX_ADDRESS, 16, 1, (u8*)KSEG1ADDR(ADDR_AMAC), 64, true);
+#endif
+
+ /* Depending on the factory firmware prior usage, there may be a MAC address for the WLAN */
+ if (ath79_nvram_parse_mac_addr(nvram, NVRAM_SIZE,"ath0_hwaddr=", mac_buffer) == 0) {
+ wmac = mac_buffer;
+ pr_debug("dir_632_a1_setup(): NVRAM ath0_hwaddr=%pM", wmac);
+ }
+
+ if (mac_pton( (char*) ((u8*)KSEG1ADDR(ADDR_AMAC)+DIR632_AMAC_OFFSET), mac_buffer)) {
+ if (!(is_mac_all_ones(mac_buffer) || is_mac_all_zeros(mac_buffer))) {
+ // use this instead for WLAN and for Eth? what is the desired behaviour?
+ // for now apply to WLAN
+ wmac = mac_buffer;
+ pr_debug("dir_632_a1_setup(): ASCII (uboot-set) mac=%pM", wmac);
+ }
+ }
+
+ /* If we use the ar71xx_ag7240 driver that came with Attitude Adjustment,
+ * the network just doesnt work, cant find PHY, etc.
+ * Instead, we ported the ag7240 driver from DD-WRT, which does work.
+ * But it turns out we still need the following settings.
+ */
+ ath79_register_mdio(0, 0);
+ mdiobus_register_board_info(dir632_mdio0_info, ARRAY_SIZE(dir632_mdio0_info));
+
+ /* GMAC0 is connected to the RTL8309G switch (8-port switch) */
+ ath79_init_mac(ath79_ag7240_eth_data.mac_addr1, art + DIR632_MAC0_OFFSET, 0);
+ pr_info("DIR-632-A1 using eth0 mac=%pM\n", ath79_ag7240_eth_data.mac_addr1);
+
+ /* GMAC1 is connected to the internal S26 switch */
+ /* If a mac address is in the ART, use it, otherwise, offset by one */
+ hmac = art + DIR632_MAC1_OFFSET;
+ if (is_mac_all_ones(hmac)) {
+ ath79_init_mac(ath79_ag7240_eth_data.mac_addr2, art + DIR632_MAC0_OFFSET, 1);
+ } else {
+ ath79_init_mac(ath79_ag7240_eth_data.mac_addr2, art + DIR632_MAC1_OFFSET, 0);
+ }
+ pr_info("DIR-632-A1 using eth1 mac=%pM\n", ath79_ag7240_eth_data.mac_addr2);
+
+ platform_device_register(&ath79_ag7240_eth_device);
+
+ ath79_register_m25p80(&dir_632_a1_flash);
+
+ /*
+ * Further GPIO information.
+ *
+ * Some GPIO can be repurposed / enabled / disabled
+ *
+ * AR7240_GPIO_FUNCTION_UART_EN
+ * --> enable a Uart on 9,10 (set 9 as RxIn and 10 as TxOut)
+ *
+ * AR7240_GPIO_FUNCTION_SPI_CS_0_EN|AR7240_GPIO_FUNCTION_SPI_CS_1_EN
+ * --> enable SPI CS0/CS1 on GPIO0/1 - but we have tested LEDs / buttons
+ * so this is not in use; we can also assume this has already
+ * been disabled as a function by default by now...
+ * AR71XX_GPIO_FUNC_STEREO_EN
+ * --> enable sound on 6,7,8,11 - but we have tested LEDs / buttons
+ * so this is not in use; we can also assume this has already
+ * been disabled as a function by default by now...
+ *
+ * D-link refers to reset on GPIO12 as 'jumpstart'
+ * D-link _also_ refers to AR7240_GPIO_RESET on GPIO21 in its WDT implementatoin
+ * it looks like if a FACTORY_RESET ioctl is called then if this line is
+ * asserted in a 4second time window then a factory reset is also done...
+ * not sure how this interacts with 'JUMPSTART' (reset) because I cant find
+ * a second factory reset button pin on the board...
+ * Does this mean is that there are actually >= 22 GPIO (not 20)
+ * for AR7242 ...?
+ *
+ * I buzzed out the following as well:
+ *
+ * TP3 --> connected to GPIO15
+ *
+ * At boot: GPIO_2=1 (stuck), GPIO_10=1 (stuck)
+ *
+ * OpenWRT sets AR724X_GPIO_FUNC_UART_EN in dev_common
+ */
+
+ ath79_gpio_function_enable(AR724X_GPIO_FUNC_JTAG_DISABLE); // Make LEDs on GPIO6/7 work
+
+ ath79_gpio_function_disable(
+ AR71XX_GPIO_FUNC_STEREO_EN |
+ AR724X_GPIO_FUNCTION_CLK_OBS6_ENABLE | // cleared by D-link
+ AR724X_GPIO_FUNC_UART_RTS_CTS_EN | // cleared by D-link
+ AR724X_GPIO_FUNCTION_PCIEPHY_TST_EN | // cleared by D-link
+ AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
+ AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
+ AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
+ AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
+ AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
+
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_632_a1_leds_gpio),
+ dir_632_a1_leds_gpio);
+
+ ath79_register_gpio_keys_polled(-1, DIR_632_A1_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(dir_632_a1_gpio_keys),
+ dir_632_a1_gpio_keys);
+
+ /* We have usb */
+ ath79_register_usb();
+
+ /* Pass on data for the WLAN PCI device: */
+ ee = dir_632_a1_get_eeprom_caldata(0);
+ if (ee && !wmac) {
+ /* If no value in NVRAM for wireless, check if there is a valid MAC address
+ * in the PCI EEPROM. If so, and it is valid we do nothing.
+ * If not valid, then look in the ART instead for an address to pass along. */
+ if (!is_mac_ok(ee+EEPROM_WLAN_MAC_OFFSET)) {
+ pr_warn("Found empty wireless MAC address in calibration dataset, leave the responsibility to the driver to use the correct one.\n");
+ wmac = ee - 0x1000; /* This implies the possibility in this architecture that there could be a second PCI slot and the MAC is 0x1000 below it... */
+ }
+ /* Check the value in the ART is valid before allowing it to be used. For some reason we don't check 08:00:00:00:00:00 */
+ if (wmac && (is_mac_all_ones(wmac) || is_mac_all_zeros(wmac))) {
+ pr_warn("Found empty wireless MAC address in ART, leave the responsibility to the driver to use the correct one\n");
+ wmac = NULL;
+ }
+ }
+ if (wmac) {
+ pr_info("DIR-632-A1 user set wmac=%pM", wmac);
+ }
+
+ /* inform the ath9k which of its GPIO the WLAN LED is on */
+ ap9x_pci_setup_wmac_led_pin(0, DIR_632_A1_WLAN_GPIO_LED); // if this doesnt work, go back and traceit through again - reg values match, so only base? c/f set_wl0_led DDWRT
+
+ /* inform the ath9k what wmac to use and where to find its radio cal data */
+ /* also initialises PCI bus */
+ ap91_pci_init(ee, wmac);
+
+ /* uart, gpio base and wdt are init from ath79/setup.c */
+}
+
+MIPS_MACHINE(ATH79_MACH_DIR_632_A1, "DIR-632-A1", "D-Link DIR-632 rev. A1",
+ dir_632_a1_setup);
+
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
index 656a6ef..3002601 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h
@@ -22,6 +22,12 @@ struct ag71xx_switch_platform_data {
u8 phy_poll_mask;
};
+struct ag7240_platform_data {
+ u8 mac_addr1[ETH_ALEN];
+ u8 mac_addr2[ETH_ALEN];
+};
+
+
struct ag71xx_platform_data {
phy_interface_t phy_if_mode;
u32 phy_mask;
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/Kconfig b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/Kconfig
new file mode 100644
index 0000000..6c557a3
--- /dev/null
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/Kconfig
@@ -0,0 +1,127 @@
+config AG7240
+ tristate "Atheros AR7240 GigE (as per DIR-632-A1)"
+ default n
+ help
+ This enables the Atheros AR7240 gigE driver module with S26 and RTL8309
+ switches as used by the D-link DIR-632-A1 router.
+
+config AR7240_S26_VLAN_IGMP
+ bool "Support vlan and igmp functions in AR7240-S26 switch"
+ default n
+ depends on AG7240
+
+config ATHEROS_HEADER_EN
+ bool "Add two bytes atheros header before the ethernet packet."
+ default n
+ depends on AG7240
+
+choice
+ prompt "port 0 interface type"
+ default AG7240_GE0_MII if ATH79_MACH_DIR_632_A1
+ depends on AG7240
+
+config AG7240_GE0_MII
+ bool "MII mode"
+
+config AG7240_GE0_GMII
+ bool "GMII mode"
+
+config AG7240_GE0_RGMII
+ bool "RGMII mode"
+
+endchoice
+
+config AG7240_GE0_IS_CONNECTED
+ bool "port 0 is connected to a PHY"
+ depends on AG7240
+ default y if ATH79_MACH_DIR_632_A1
+
+choice
+ prompt "port 0 PHY or switch used"
+ default AR7242_RTL8309G_PHY if ATH79_MACH_DIR_632_A1
+ depends on AG7240_GE0_IS_CONNECTED
+
+config AR7242_RTL8309G_PHY
+ bool "Realtek RTL8309G Switch"
+
+config AR7242_RGMII_PHY
+ bool "AR7242 RGMII Phy"
+
+config AR7242_S16_PHY
+ bool "AR7242 S16 Switch"
+
+config WZRG450
+ bool "WZRG450 Vlan Mapping"
+ depends on AR7242_S16_PHY
+
+config AR7242_VIR_PHY
+ bool "AR7242 Vitual Switch"
+
+endchoice
+
+config ATHRS_QOS
+ bool "Enable MAC 0 QOS "
+ depends on AG7240
+
+choice
+ prompt "port 1 interface type (depends on port0)"
+ depends on AG7240
+
+config AG7240_GE1_MII
+ bool "MII mode"
+
+endchoice
+
+config AG7240_GE1_IS_CONNECTED
+ bool "port 1 is connected to a PHY"
+ default y if ATH79_MACH_DIR_632_A1
+ depends on AG7240
+
+choice
+ prompt "port 1 PHY or switch used"
+ default AR7240_S26_PHY if ATH79_MACH_DIR_632_A1
+ depends on AG7240_GE1_IS_CONNECTED
+
+config AR7240_S26_PHY
+ bool "Atheros S26 Phy"
+
+config S26_SWITCH_ONLY_MODE
+ bool "Enable switch only mode"
+ depends on AR7240_S26_PHY
+
+config AR8021_PHY
+ bool "Atheros AR8021 Phy"
+
+endchoice
+
+config AG7240_LEN_PER_TX_DS
+ int "Len per tx descriptor"
+ default "1536"
+ depends on AG7240
+
+config AG7240_NUMBER_TX_PKTS
+ int "Number tx pkts"
+ default "80" if ATH79_MACH_DIR_632_A1
+ default "100"
+ depends on AG7240
+
+config AG7240_NUMBER_RX_PKTS
+ int "Number rx pkts"
+ default "252"
+ depends on AG7240
+
+config AG7240_MAC_LOCATION
+ hex "Memory location of MAC addresses (in flash)"
+ default "0x1fff0000" if ATH79_MACH_DIR_632_A1
+ default "0xbfff0000"
+ help
+ This is the physical address in memory that contains
+ the MAC addresses for the board Ethernet interfaces. They
+ are stored sequentially in 6 byte groups, for the total number
+ of interfaces supported on the board.
+ depends on AG7240
+
+config AG7240_USE_TRC
+ bool "Print realtime trace on asserts, this will negatively affect performance"
+ default 0
+ depends on AG7240
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/Makefile b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/Makefile
new file mode 100644
index 0000000..20e423b
--- /dev/null
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/Makefile
@@ -0,0 +1,14 @@
+#
+# Makefile for Ar7240 gigabit MAC and Phys
+#
+obj-$(CONFIG_AG7240) += ag7240_mod.o
+
+obj-phy-$(CONFIG_AR7240_S26_PHY) += ar7240_s26_phy.o
+obj-phy-$(CONFIG_AR7240_S26_VLAN_IGMP) += python_vlan_igmp.o
+obj-phy-$(CONFIG_AR7242_RGMII_PHY) += athrf1_phy.o
+obj-phy-$(CONFIG_AR7242_S16_PHY) += athrs16_phy.o
+obj-phy-$(CONFIG_AR7242_RTL8309G_PHY) += rtl8309g_phy.o
+obj-phy-$(CONFIG_AR7242_VIR_PHY) += athr_vir_phy.o
+
+ag7240_mod-objs := $(obj-phy-y) ag7240.o
+
diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/ag7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/ag7240.c
new file mode 100644
index 0000000..ea9e58f
--- /dev/null
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag7240/ag7240.c
@@ -0,0 +1,2553 @@
+/*
+
+ * Copyright (c) 2008, Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/stddef.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <asm/byteorder.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/delay.h>
+#include <linux/timer.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/bitops.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <net/sch_generic.h>
+#include <linux/if_pppox.h>
+#include <linux/ip.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <asm/mach-ath79/ag71xx_platform.h>
+
+#include "ag7240.h"
+#include "ag7240_phy.h"
+#include "ag7240_trc.h"
+
+ag7240_mac_t *ag7240_macs[2];
+static void ag7240_hw_setup(ag7240_mac_t *mac);
+static void ag7240_hw_stop(ag7240_mac_t *mac);
+static void ag7240_oom_timer(unsigned long data);
+static int check_for_dma_status(ag7240_mac_t *mac,int ac);
+static int ag7240_tx_alloc(ag7240_mac_t *mac);
+static int ag7240_rx_alloc(ag7240_mac_t *mac);
+static void ag7240_rx_free(ag7240_mac_t *mac);
+static void ag7240_tx_free(ag7240_mac_t *mac);
+static int ag7240_ring_alloc(ag7240_ring_t *r, int count);
+static int ag7240_rx_replenish(ag7240_mac_t *mac);
+static void ag7240_get_default_macaddr(ag7240_mac_t *mac, u8 *mac_addr);
+static int ag7240_tx_reap(ag7240_mac_t *mac,int ac);
+static void ag7240_ring_release(ag7240_mac_t *mac, ag7240_ring_t *r);
+static void ag7240_ring_free(ag7240_ring_t *r);
+static void ag7240_tx_timeout_task(struct work_struct *work);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+static int ag7240_poll(struct napi_struct *napi, int budget);
+#else
+static int ag7240_poll(struct net_device *dev, int *budget);
+#endif
+#define ETH_VLAN_HLEN 18
+#ifdef CONFIG_AR7240_S26_VLAN_IGMP
+int athr_ioctl(struct net_device *dev,uint32_t *args, int cmd);
+#else
+int athr_ioctl(uint32_t *args, int cmd);
+#endif
+void ar7240_s26_intr(void);
+void ag7240_dma_reset(ag7240_mac_t *mac);
+
+int ag7240_recv_packets(struct net_device *dev, ag7240_mac_t *mac,
+ int max_work, int *work_done);
+static irqreturn_t ag7240_intr(int cpl, void *dev_id);
+static irqreturn_t ag7240_link_intr(int cpl, void *dev_id);
+static struct sk_buff * ag7240_buffer_alloc(void);
+#ifdef ETH_SOFT_LED
+ATH_LED_CONTROL PLedCtrl;
+atomic_t Ledstatus;
+#endif
+
+extern uint32_t ar7240_ahb_freq;
+extern void athrs26_reg_dev(ag7240_mac_t **mac);
+extern void athrs26_enable_linkIntrs(int ethUnit);
+extern void athrs26_disable_linkIntrs(int ethUnit);
+extern int athrs26_phy_is_link_alive(int phyUnit);
+extern void athrs26_phy_stab_wr(int phy_id, int phy_up, int phy_speed);
+extern uint32_t athrs26_reg_read(unsigned int s26_addr);
+extern void athrs26_reg_write(unsigned int s26_addr, unsigned int s26_write_data);
+extern void s26_wr_phy(unsigned int phy_addr, unsigned int reg_addr, unsigned int write_data);
+
+char *mii_str[2][4] = {
+ {"GMii", "Mii", "RGMii", "RMii"},
+ {"GMii","Mii","RGMii", "RMii"}
+};
+int rg_phy_speed = -1 , rg_phy_duplex = -1;
+char *spd_str[] = {"10Mbps", "100Mbps", "1000Mbps"};
+char *dup_str[] = {"half duplex", "full duplex"};
+
+#define MODULE_NAME "AG7240"
+MODULE_LICENSE("Dual BSD/GPL");
+
+static uint32_t prev_dma_chk_ts;
+/* if 0 compute in init */
+int tx_len_per_ds = 0;
+int phy_in_reset = 0;
+int enet_ac = 0;
+module_param(tx_len_per_ds, int, 0);
+MODULE_PARM_DESC(tx_len_per_ds, "Size of DMA chunk");
+
+/* if 0 compute in init */
+int tx_max_desc_per_ds_pkt=0;
+
+/* if 0 compute in init */
+int fifo_3 = 0x1f00140;
+module_param(fifo_3, int, 0);
+MODULE_PARM_DESC(fifo_3, "fifo cfg 3 settings");
+
+int mii0_if = AG7240_MII0_INTERFACE;
+module_param(mii0_if, int, 0);
+MODULE_PARM_DESC(mii0_if, "mii0 connect");
+
+int mii1_if = AG7240_MII1_INTERFACE;
+module_param(mii1_if, int, 0);
+MODULE_PARM_DESC(mii1_if, "mii1 connect");
+
+#define SW_PLL 0x1f000000ul
+int gige_pll = 0x1a000000;
+module_param(gige_pll, int, 0);
+MODULE_PARM_DESC(gige_pll, "Pll for (R)GMII if");
+
+int fifo_5 = 0xbefff;
+module_param(fifo_5, int, 0);
+MODULE_PARM_DESC(fifo_5, "fifo cfg 5 settings");
+
+int xmii_val = 0x16000000;
+
+int ignore_packet_inspection = 0;
+
+void set_packet_inspection_flag(int flag)
+{
+ if(flag==0)
+ ignore_packet_inspection = 0;
+ else
+ ignore_packet_inspection = 1;
+}
+
+#define addr_to_words(addr, w1, w2) { \
+ w1 = (addr[5] << 24) | (addr[4] << 16) | (addr[3] << 8) | addr[2]; \
+ w2 = (addr[1] << 24) | (addr[0] << 16) | 0; \
+}
+
+/*
+ * Defines specific to this implemention
+ */
+
+#ifndef CONFIG_AG7240_LEN_PER_TX_DS
+#error Please run menuconfig and define CONFIG_AG7240_LEN_PER_TX_DS
+#endif
+
+#ifndef CONFIG_AG7240_NUMBER_TX_PKTS
+#error Please run menuconfig and define CONFIG_AG7240_NUMBER_TX_PKTS
+#endif
+
+#ifndef CONFIG_AG7240_NUMBER_RX_PKTS
+#error Please run menuconfig and define CONFIG_AG7240_NUMBER_RX_PKTS
+#endif
+#define AG7240_TX_FIFO_LEN 2048
+#define AG7240_TX_MIN_DS_LEN 128
+#define AG7240_TX_MAX_DS_LEN AG7240_TX_FIFO_LEN
+
+#define AG7240_TX_MTU_LEN AG71XX_TX_MTU_LEN
+
+#define AG7240_TX_DESC_CNT CONFIG_AG7240_NUMBER_TX_PKTS*tx_max_desc_per_ds_pkt
+#define AG7240_TX_REAP_THRESH AG7240_TX_DESC_CNT/2
+#define AG7240_TX_QSTART_THRESH 4*tx_max_desc_per_ds_pkt
+
+#define AG7240_RX_DESC_CNT CONFIG_AG7240_NUMBER_RX_PKTS
+
+#define AG7240_NAPI_WEIGHT 64
+#define AG7240_PHY_POLL_SECONDS 2
+#define AG7240_LED_POLL_SECONDS (HZ/10)
+
+#define ENET_UNIT_LAN 1
+#define ENET_UNIT_WAN 0
+
+
+static inline int ag7240_tx_reap_thresh(ag7240_mac_t *mac,int ac)
+{
+ ag7240_ring_t *r = &mac->mac_txring[ac];
+
+ return (ag7240_ndesc_unused(mac, r) < AG7240_TX_REAP_THRESH);
+}
+
+static inline int ag7240_tx_ring_full(ag7240_mac_t *mac,int ac)
+{
+ ag7240_ring_t *r = &mac->mac_txring[ac];
+
+ ag7240_trc_new(ag7240_ndesc_unused(mac, r),"tx ring full");
+ return (ag7240_ndesc_unused(mac, r) < tx_max_desc_per_ds_pkt + 2);
+}
+static int
+ag7240_open(struct net_device *dev)
+{
+ unsigned int w1 = 0, w2 = 0;
+ ag7240_mac_t *mac = (ag7240_mac_t *)netdev_priv(dev);
+ int st,flags;
+ uint32_t mask;
+
+#ifdef SWITCH_AHB_FREQ
+ u32 tmp_pll, pll;
+#endif
+
+ assert(mac);