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Meeting Oct 24th & Nov 8th & Nov 22nd, CPA_S and CPA_W correction + Simulation code&results #5

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DerrickYLJ opened this issue Oct 25, 2023 · 6 comments

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@DerrickYLJ
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DerrickYLJ commented Oct 25, 2023

Any curve below the Ernst curve is not possible to achieve since Ernst curve represents the lowest theoretical possible delay

Screen Shot 2023-10-24 at 11 24 24 PM

Any curve below the Ernst curve is not possible to be achieved since Ernst curve represents the lowest theoretical possible delay.

@DerrickYLJ
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In our architecture, RTA, CPA_S, and FA are logically the same and will output very similar answers under the assumptions in FA.

  • CPA_S, in which each virtual link is separated from the whole architecture and worst-case delay is computed individually, is implemented based on FA assumption in a similar logic to FA.
  • RTA computes worst-case delay with the equations that utilize recurrent value I, which will mostly be calculated once in the architecture and then it's essentially very similar to FA/CPA_S

@DerrickYLJ
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The discussing points:

  • The e2e consistency between Song's simulated traces and RTA, FA, and CPA_S results

@DerrickYLJ
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DerrickYLJ commented Oct 25, 2023

#4 From Professor Song's Comments:
@DerrickYLJ Contrary to what I've said during our last meeting, unfortunately I did not find time to reproduce more simulation traces, neither to verify the existing traces.
I put here the simulation model that I've built using "java modelling tools" https://jmt.sourceforge.net/
I put also the first simulation traces produced two or three weeks ago.
If you have time before next Wednesday, maybe you can take a look on the different traces to verify if the e2e delays are correct or wrong, especially for those VLs having higher simulation delays than the theoretics given by RTA and CPA-S and FA (I see at least VL1, VL2, VL7 and VL8). You can see for example if the e2e delays are consistent with the local delays on their paths.
Otherwise, no worry, we can discuss Wednesday to make clear the next step.
Here is the screenshot of the model:
Capture d’écran 2023-10-23 à 09 11 40

And simulation traces:

SWaToES3_VL13_Response Time.csv
SWaToES3_VL9_Response Time.csv
SWaToES3_VL7_Response Time.csv
SWaToES3_VL3_Response Time.csv
SWaToES3_VL11_Response Time.csv
SWaToES3_VL8_Response Time.csv
SWaToES3_VL4_Response Time.csv
SWbToES2_VL12_Response Time.csv
VL13_System Response Time.csv
VL6_System Response Time.csv
VL10_System Response Time.csv
VL5_System Response Time.csv
VL9_System Response Time.csv
VL7_System Response Time.csv
VL3_System Response Time.csv
VL2_System Response Time.csv
VL11_System Response Time.csv
VL8_System Response Time.csv
VL4_System Response Time.csv
SWaToES1_VL6_Response Time.csv
SWaToES1_VL12_Response Time.csv
SWaToES1_VL5_Response Time.csv
SWaToES1_VL9_Response Time.csv
SWaToES1_VL7_Response Time.csv
SWaToES1_VL2_Response Time.csv
SWbToES4_VL10_Response Time.csv
SWbToES4_VL9_Response Time.csv
SWbToES4_VL11_Response Time.csv
SWbToES2_VL11_Response Time.csv
SWbToES2_VL8_Response Time.csv
SWbToSWa_VL13_Response Time.csv
SWbToSWa_VL6_Response Time.csv
SWbToSWa_VL9_Response Time.csv
SWbToSWa_VL7_Response Time.csv
SWbToSWa_VL3_Response Time.csv
SWbToSWa_VL2_Response Time.csv
SWaToSWb_VL12_Response Time.csv
SWaToSWb_VL10_Response Time.csv
SWaToSWb_VL11_Response Time.csv
SWaToSWb_VL8_Response Time.csv
ES4toSWb_VL13_Response Time.csv
ES4toSWb_VL6_Response Time.csv
ES3toSWa_VL12_Response Time.csv
ES3toSWa_VL10_Response Time.csv
ES2toSWb_VL9_Response Time.csv
ES2toSWb_VL7_Response Time.csv
ES2toSWb_VL3_Response Time.csv
ES2toSWb_VL2_Response Time.csv
ES1toSWa_VL11_Response Time.csv
ES1toSWa_VL8_Response Time.csv
ES1toSWa_VL4_Response Time.csv
SWbToES2_VL1_Response Time.csv
SWaToSWb_VL1_Response Time.csv
VL1_System Response Time.csv
ES1toSWa_VL1_Response Time.csv
ES3toSWa_VL5_Response Time.csv
VL12_System Response Time.csv

@DerrickYLJ
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DerrickYLJ commented Oct 25, 2023

resolved.

@DerrickYLJ DerrickYLJ changed the title Meeting Oct 24th, CPA_S and CPA_W correction Meeting Oct 24th & Nov 8th, CPA_S and CPA_W correction Nov 8, 2023
@DerrickYLJ
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DerrickYLJ commented Nov 8, 2023

Update the new result for RTA without the assumption that any VLs block the target VL won't block it once again.
The updated results are below:
Screen Shot 2023-11-08 at 1 17 13 AM

data_rta = [417.0, 471.0, 507.0, 340.0, 183.0, 350.0, 744.0, 533.0, 744.0, 511.0, 632.0, 396.0, 609.0]
data_cpa_w = [417, 471, 507, 340, 183, 350, 744, 533, 744, 511, 632, 396, 609]
first_simulation_ernst = [371, 401, 401, 293, 58, 128, 467, 415, 453, 112, 415, 126, 150]
NC_PK = [401.911, 420.994, 443.627, 312.160, 266.764, 420.212, 699.366, 507.494, 699.366, 465.147, 620.064, 255.920, 563.543]

Observation:
RTA and CPA_W are outputting the same results.

Task:

  • Simulate CPA_S without the assumption
  • Discuss how to simulate FA with Theo

@DerrickYLJ DerrickYLJ changed the title Meeting Oct 24th & Nov 8th, CPA_S and CPA_W correction Meeting Oct 24th & Nov 8th & Nov 22nd, CPA_S and CPA_W correction Nov 22, 2023
@DerrickYLJ
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DerrickYLJ commented Nov 22, 2023

CPA_S Correction:

case 1 : VL1

ES1 -> (VL4 + VL11) -> Switch A -> (VL11) -> Switch B -> (VL11) -> ES2
path P1 e2e latency. best case: 6, worst case: 417
From PyCPA.

If blocking factor is greater than target wcd, we apply the rule; otherwise, only blocking it once.

  • subtract the transmission time (twice for VL1 for example) to lower the bound more rigorously
  • read the paper new FA

@DerrickYLJ DerrickYLJ changed the title Meeting Oct 24th & Nov 8th & Nov 22nd, CPA_S and CPA_W correction Meeting Oct 24th & Nov 8th & Nov 22nd, CPA_S and CPA_W correction + Simulation code&results Jul 3, 2024
@DerrickYLJ DerrickYLJ pinned this issue Jul 3, 2024
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