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Added NM180410 Board Support #1058
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joshua-nmi
commented
Oct 23, 2023
- added NM180410 support
- modified LPC55Sxx to support variants with smaller flash sizes (ex: 256kB)
This looks mostly good. The change of flash size is problematic because it impacts existing |
Thanks Mathias for your feedback. We've bought an LPC55S69EVB, an LPC55S28EVB, and we also verified this on the LPC55S26JEV98 which is what we used on the NM180410 and could confirm in all flash size configurations, the last 30kb of flash causes issue. What's your thoughts on the following proposal:
This should have minimal impact to the existing projects using the LPC55S69 as the HIC and lay the foundation for other users who would like to use different flash sizes (there is one for 512kB LPC55S28JBD100K for example). Please let us know your preference and how you would like us to proceed. Thanks, |
I would like the new memory map to be able to support LPC5516, which compared to LPC55S26 should mean restricting to 64 KiB of RAM and I think the "S" vs non-"S" should make a difference (speaking under the control of @flit). I am puzzled that you needed to reduce flash size by 30 KiB. LPC551x datasheet says "The last 17 pages (12 KB) are reserved on the 256KB flash devices resulting in 244 KB internal flash memory.". Updated proposal:
Current interface firmware requires about ~76 KiB Flash and the new upper limit would go down from 190 KiB to 160 KiB. This should be enough headroom for a while. |
Thanks for the direction. We will proceed with your proposal. We will close this pull request and re-open when we are ready. Regarding the last 30k, AN12949 Chapter 3 Section 3.2 Caution on PFR region (page 5) states: Special caution needs to be taken when you operate last few pages near PFR. Do not perform a sector erase (erase 32KB) of the last flash sector. Based on the three different variants that we've tried, this might be universal across the entire LPC55xx series. Anyway, we will implement the change under LPC5516 as you've suggested. Many thanks for your guidance and support on this. |
Hi @mathias-arm We've implemented all the proposed changes listed in our Slack channel conversations and had successfully ran the automated tests. I've took the liberty to re-organize the code under Thanks, |
@mathias-arm , thanks for looking at this during thanksgiving week. We will get started on implementing your feedback and let you when they are done. |
@mathias-arm Hope you had a good thanksgiving. All the changes you've requested were implemented and re-tested. Thanks for your feedback. |
Item 5 on my list above was still relevant (with some changes):
This is necessary to avoid flashing incompatible fimwares. |
records/hic_hal/lpc55s26.yaml
Outdated
macros: | ||
- INTERFACE_LPC55XX | ||
- CPU_LPC55S26JBD64 | ||
- DAPLINK_HIC_ID=0x4C504355 # DAPLINK_HIC_ID_LPC55XX |
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DAPLINK_HIC_ID=0x4C509955 # DAPLINK_HIC_ID_LPC552X
#include "daplink.h" | ||
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// This GPIO configuration is only valid for the LPC55XX HIC | ||
COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_LPC55XX); |
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COMPILER_ASSERT((DAPLINK_HIC_ID == DAPLINK_HIC_ID_LPC55XX) ||
(DAPLINK_HIC_ID == DAPLINK_HIC_ID_LPC552X));
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- Update file
source/daplink/daplink.h
to add#define DAPLINK_HIC_ID_LPC552X 0x4C509955 // 'LPc\x55'
- Add/change
DAPLINK_HIC_ID_LPC552X
where needed
Otherwise the rest looks good
I made a mistake, I wanted to merge this to |